Update clang to r339409.
Change-Id: I800772d2d838223be1f6b40d490c4591b937fca2
diff --git a/linux-x64/clang/include/llvm/MC/MCAsmBackend.h b/linux-x64/clang/include/llvm/MC/MCAsmBackend.h
index a8a5850..030d3c0 100644
--- a/linux-x64/clang/include/llvm/MC/MCAsmBackend.h
+++ b/linux-x64/clang/include/llvm/MC/MCAsmBackend.h
@@ -16,6 +16,7 @@
#include "llvm/MC/MCDirectives.h"
#include "llvm/MC/MCFixup.h"
#include "llvm/MC/MCFragment.h"
+#include "llvm/Support/Endian.h"
#include <cstdint>
#include <memory>
@@ -29,6 +30,7 @@
class MCFragment;
class MCInst;
class MCObjectStreamer;
+class MCObjectTargetWriter;
class MCObjectWriter;
struct MCCodePaddingContext;
class MCRelaxableFragment;
@@ -41,21 +43,31 @@
std::unique_ptr<MCCodePadder> CodePadder;
protected: // Can only create subclasses.
- MCAsmBackend();
- MCAsmBackend(std::unique_ptr<MCCodePadder> TargetCodePadder);
+ MCAsmBackend(support::endianness Endian);
public:
MCAsmBackend(const MCAsmBackend &) = delete;
MCAsmBackend &operator=(const MCAsmBackend &) = delete;
virtual ~MCAsmBackend();
+ const support::endianness Endian;
+
/// lifetime management
virtual void reset() {}
/// Create a new MCObjectWriter instance for use by the assembler backend to
/// emit the final object file.
- virtual std::unique_ptr<MCObjectWriter>
- createObjectWriter(raw_pwrite_stream &OS) const = 0;
+ std::unique_ptr<MCObjectWriter>
+ createObjectWriter(raw_pwrite_stream &OS) const;
+
+ /// Create an MCObjectWriter that writes two object files: a .o file which is
+ /// linked into the final program and a .dwo file which is used by debuggers.
+ /// This function is only supported with ELF targets.
+ std::unique_ptr<MCObjectWriter>
+ createDwoObjectWriter(raw_pwrite_stream &OS, raw_pwrite_stream &DwoOS) const;
+
+ virtual std::unique_ptr<MCObjectTargetWriter>
+ createObjectTargetWriter() const = 0;
/// \name Target Fixup Interfaces
/// @{
@@ -80,9 +92,16 @@
/// the offset specified by the fixup and following the fixup kind as
/// appropriate. Errors (such as an out of range fixup value) should be
/// reported via \p Ctx.
+ /// The \p STI is present only for fragments of type MCRelaxableFragment and
+ /// MCDataFragment with hasInstructions() == true.
virtual void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
const MCValue &Target, MutableArrayRef<char> Data,
- uint64_t Value, bool IsResolved) const = 0;
+ uint64_t Value, bool IsResolved,
+ const MCSubtargetInfo *STI) const = 0;
+
+ /// Check whether the given target requires emitting differences of two
+ /// symbols as a set of relocations.
+ virtual bool requiresDiffExpressionRelocations() const { return false; }
/// @}
@@ -92,14 +111,18 @@
/// Check whether the given instruction may need relaxation.
///
/// \param Inst - The instruction to test.
- virtual bool mayNeedRelaxation(const MCInst &Inst) const = 0;
+ /// \param STI - The MCSubtargetInfo in effect when the instruction was
+ /// encoded.
+ virtual bool mayNeedRelaxation(const MCInst &Inst,
+ const MCSubtargetInfo &STI) const = 0;
/// Target specific predicate for whether a given fixup requires the
/// associated instruction to be relaxed.
virtual bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved,
uint64_t Value,
const MCRelaxableFragment *DF,
- const MCAsmLayout &Layout) const;
+ const MCAsmLayout &Layout,
+ const bool WasForced) const;
/// Simple predicate for targets where !Resolved implies requiring relaxation
virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
@@ -127,7 +150,7 @@
/// target cannot generate such a sequence, it should return an error.
///
/// \return - True on success.
- virtual bool writeNopData(uint64_t Count, MCObjectWriter *OW) const = 0;
+ virtual bool writeNopData(raw_ostream &OS, uint64_t Count) const = 0;
/// Give backend an opportunity to finish layout after relaxation
virtual void finishLayout(MCAssembler const &Asm,
@@ -136,7 +159,7 @@
/// Handle any target-specific assembler flags. By default, do nothing.
virtual void handleAssemblerFlag(MCAssemblerFlag Flag) {}
- /// \brief Generate the compact unwind encoding for the CFI instructions.
+ /// Generate the compact unwind encoding for the CFI instructions.
virtual uint32_t
generateCompactUnwindEncoding(ArrayRef<MCCFIInstruction>) const {
return 0;
diff --git a/linux-x64/clang/include/llvm/MC/MCAsmInfo.h b/linux-x64/clang/include/llvm/MC/MCAsmInfo.h
index c538c46..120fb8f 100644
--- a/linux-x64/clang/include/llvm/MC/MCAsmInfo.h
+++ b/linux-x64/clang/include/llvm/MC/MCAsmInfo.h
@@ -84,6 +84,15 @@
/// directive for emitting thread local BSS Symbols. Default is false.
bool HasMachoTBSSDirective = false;
+ /// True if this is a non-GNU COFF target. The COFF port of the GNU linker
+ /// doesn't handle associative comdats in the way that we would like to use
+ /// them.
+ bool HasCOFFAssociativeComdats = false;
+
+ /// True if this is a non-GNU COFF target. For GNU targets, we don't generate
+ /// constants into comdat sections.
+ bool HasCOFFComdatConstants = false;
+
/// This is the maximum possible length of an instruction, which is needed to
/// compute the size of an inline asm. Defaults to 4.
unsigned MaxInstLength = 4;
@@ -344,6 +353,10 @@
/// For example, foo(plt) instead of foo@plt. Defaults to false.
bool UseParensForSymbolVariant = false;
+ /// True if the target supports flags in ".loc" directive, false if only
+ /// location is allowed.
+ bool SupportsExtendedDwarfLocDirective = true;
+
//===--- Prologue State ----------------------------------------------===//
std::vector<MCCFIInstruction> InitialFrameState;
@@ -416,7 +429,7 @@
return nullptr;
}
- /// \brief True if the section is atomized using the symbols in it.
+ /// True if the section is atomized using the symbols in it.
/// This is false if the section is not atomized at all (most ELF sections) or
/// if it is atomized based on its contents (MachO' __TEXT,__cstring for
/// example).
@@ -459,6 +472,8 @@
bool hasMachoZeroFillDirective() const { return HasMachoZeroFillDirective; }
bool hasMachoTBSSDirective() const { return HasMachoTBSSDirective; }
+ bool hasCOFFAssociativeComdats() const { return HasCOFFAssociativeComdats; }
+ bool hasCOFFComdatConstants() const { return HasCOFFComdatConstants; }
unsigned getMaxInstLength() const { return MaxInstLength; }
unsigned getMinInstAlignment() const { return MinInstAlignment; }
bool getDollarIsPC() const { return DollarIsPC; }
@@ -579,6 +594,9 @@
bool doDwarfFDESymbolsUseAbsDiff() const { return DwarfFDESymbolsUseAbsDiff; }
bool useDwarfRegNumForCFI() const { return DwarfRegNumForCFI; }
bool useParensForSymbolVariant() const { return UseParensForSymbolVariant; }
+ bool supportsExtendedDwarfLocDirective() const {
+ return SupportsExtendedDwarfLocDirective;
+ }
void addInitialFrameState(const MCCFIInstruction &Inst) {
InitialFrameState.push_back(Inst);
diff --git a/linux-x64/clang/include/llvm/MC/MCAsmLayout.h b/linux-x64/clang/include/llvm/MC/MCAsmLayout.h
index 1b20d5b..b711db3 100644
--- a/linux-x64/clang/include/llvm/MC/MCAsmLayout.h
+++ b/linux-x64/clang/include/llvm/MC/MCAsmLayout.h
@@ -37,11 +37,11 @@
/// lower ordinal will be valid.
mutable DenseMap<const MCSection *, MCFragment *> LastValidFragment;
- /// \brief Make sure that the layout for the given fragment is valid, lazily
+ /// Make sure that the layout for the given fragment is valid, lazily
/// computing it if necessary.
void ensureValid(const MCFragment *F) const;
- /// \brief Is the layout for this fragment valid?
+ /// Is the layout for this fragment valid?
bool isFragmentValid(const MCFragment *F) const;
public:
@@ -50,12 +50,12 @@
/// Get the assembler object this is a layout for.
MCAssembler &getAssembler() const { return Assembler; }
- /// \brief Invalidate the fragments starting with F because it has been
+ /// Invalidate the fragments starting with F because it has been
/// resized. The fragment's size should have already been updated, but
/// its bundle padding will be recomputed.
void invalidateFragmentsFrom(MCFragment *F);
- /// \brief Perform layout for a single fragment, assuming that the previous
+ /// Perform layout for a single fragment, assuming that the previous
/// fragment has already been laid out correctly, and the parent section has
/// been initialized.
void layoutFragment(MCFragment *Fragment);
@@ -72,31 +72,31 @@
/// \name Fragment Layout Data
/// @{
- /// \brief Get the offset of the given fragment inside its containing section.
+ /// Get the offset of the given fragment inside its containing section.
uint64_t getFragmentOffset(const MCFragment *F) const;
/// @}
/// \name Utility Functions
/// @{
- /// \brief Get the address space size of the given section, as it effects
+ /// Get the address space size of the given section, as it effects
/// layout. This may differ from the size reported by \see getSectionSize() by
/// not including section tail padding.
uint64_t getSectionAddressSize(const MCSection *Sec) const;
- /// \brief Get the data size of the given section, as emitted to the object
+ /// Get the data size of the given section, as emitted to the object
/// file. This may include additional padding, or be 0 for virtual sections.
uint64_t getSectionFileSize(const MCSection *Sec) const;
- /// \brief Get the offset of the given symbol, as computed in the current
+ /// Get the offset of the given symbol, as computed in the current
/// layout.
/// \return True on success.
bool getSymbolOffset(const MCSymbol &S, uint64_t &Val) const;
- /// \brief Variant that reports a fatal error if the offset is not computable.
+ /// Variant that reports a fatal error if the offset is not computable.
uint64_t getSymbolOffset(const MCSymbol &S) const;
- /// \brief If this symbol is equivalent to A + Constant, return A.
+ /// If this symbol is equivalent to A + Constant, return A.
const MCSymbol *getBaseSymbol(const MCSymbol &Symbol) const;
/// @}
diff --git a/linux-x64/clang/include/llvm/MC/MCAssembler.h b/linux-x64/clang/include/llvm/MC/MCAssembler.h
index b91b044..0f9499d 100644
--- a/linux-x64/clang/include/llvm/MC/MCAssembler.h
+++ b/linux-x64/clang/include/llvm/MC/MCAssembler.h
@@ -99,11 +99,11 @@
private:
MCContext &Context;
- MCAsmBackend &Backend;
+ std::unique_ptr<MCAsmBackend> Backend;
- MCCodeEmitter &Emitter;
+ std::unique_ptr<MCCodeEmitter> Emitter;
- MCObjectWriter &Writer;
+ std::unique_ptr<MCObjectWriter> Writer;
SectionListType Sections;
@@ -130,7 +130,7 @@
// refactoring too.
mutable SmallPtrSet<const MCSymbol *, 32> ThumbFuncs;
- /// \brief The bundle alignment size currently set in the assembler.
+ /// The bundle alignment size currently set in the assembler.
///
/// By default it's 0, which means bundling is disabled.
unsigned BundleAlignSize;
@@ -162,12 +162,14 @@
/// evaluates to.
/// \param Value [out] On return, the value of the fixup as currently laid
/// out.
+ /// \param WasForced [out] On return, the value in the fixup is set to the
+ /// correct value if WasForced is true, even if evaluateFixup returns false.
/// \return Whether the fixup value was fully resolved. This is true if the
/// \p Value result is fixed, otherwise the value may change due to
/// relocation.
bool evaluateFixup(const MCAsmLayout &Layout, const MCFixup &Fixup,
const MCFragment *DF, MCValue &Target,
- uint64_t &Value) const;
+ uint64_t &Value, bool &WasForced) const;
/// Check whether a fixup can be satisfied, or whether it needs to be relaxed
/// (increased in size, in order to hold its value correctly).
@@ -178,11 +180,11 @@
bool fragmentNeedsRelaxation(const MCRelaxableFragment *IF,
const MCAsmLayout &Layout) const;
- /// \brief Perform one layout iteration and return true if any offsets
+ /// Perform one layout iteration and return true if any offsets
/// were adjusted.
bool layoutOnce(MCAsmLayout &Layout);
- /// \brief Perform one layout iteration of the given section and return true
+ /// Perform one layout iteration of the given section and return true
/// if any offsets were adjusted.
bool layoutSectionOnce(MCAsmLayout &Layout, MCSection &Sec);
@@ -214,8 +216,9 @@
// concrete and require clients to pass in a target like object. The other
// option is to make this abstract, and have targets provide concrete
// implementations as we do with AsmParser.
- MCAssembler(MCContext &Context, MCAsmBackend &Backend,
- MCCodeEmitter &Emitter, MCObjectWriter &Writer);
+ MCAssembler(MCContext &Context, std::unique_ptr<MCAsmBackend> Backend,
+ std::unique_ptr<MCCodeEmitter> Emitter,
+ std::unique_ptr<MCObjectWriter> Writer);
MCAssembler(const MCAssembler &) = delete;
MCAssembler &operator=(const MCAssembler &) = delete;
~MCAssembler();
@@ -235,8 +238,8 @@
/// defining a separate atom.
bool isSymbolLinkerVisible(const MCSymbol &SD) const;
- /// Emit the section contents using the given object writer.
- void writeSectionData(const MCSection *Section,
+ /// Emit the section contents to \p OS.
+ void writeSectionData(raw_ostream &OS, const MCSection *Section,
const MCAsmLayout &Layout) const;
/// Check whether a given symbol has been flagged with .thumb_func.
@@ -274,11 +277,17 @@
MCContext &getContext() const { return Context; }
- MCAsmBackend &getBackend() const { return Backend; }
+ MCAsmBackend *getBackendPtr() const { return Backend.get(); }
- MCCodeEmitter &getEmitter() const { return Emitter; }
+ MCCodeEmitter *getEmitterPtr() const { return Emitter.get(); }
- MCObjectWriter &getWriter() const { return Writer; }
+ MCObjectWriter *getWriterPtr() const { return Writer.get(); }
+
+ MCAsmBackend &getBackend() const { return *Backend; }
+
+ MCCodeEmitter &getEmitter() const { return *Emitter; }
+
+ MCObjectWriter &getWriter() const { return *Writer; }
MCDwarfLineTableParams getDWARFLinetableParams() const { return LTParams; }
void setDWARFLinetableParams(MCDwarfLineTableParams P) { LTParams = P; }
@@ -409,6 +418,13 @@
const MCLOHContainer &getLOHContainer() const {
return const_cast<MCAssembler *>(this)->getLOHContainer();
}
+
+ struct CGProfileEntry {
+ const MCSymbolRefExpr *From;
+ const MCSymbolRefExpr *To;
+ uint64_t Count;
+ };
+ std::vector<CGProfileEntry> CGProfile;
/// @}
/// \name Backend Data Access
/// @{
@@ -424,21 +440,22 @@
FileNames.push_back(FileName);
}
- /// \brief Write the necessary bundle padding to the given object writer.
+ /// Write the necessary bundle padding to \p OS.
/// Expects a fragment \p F containing instructions and its size \p FSize.
- void writeFragmentPadding(const MCFragment &F, uint64_t FSize,
- MCObjectWriter *OW) const;
+ void writeFragmentPadding(raw_ostream &OS, const MCEncodedFragment &F,
+ uint64_t FSize) const;
/// @}
void dump() const;
};
-/// \brief Compute the amount of padding required before the fragment \p F to
+/// Compute the amount of padding required before the fragment \p F to
/// obey bundling restrictions, where \p FOffset is the fragment's offset in
/// its section and \p FSize is the fragment's size.
-uint64_t computeBundlePadding(const MCAssembler &Assembler, const MCFragment *F,
- uint64_t FOffset, uint64_t FSize);
+uint64_t computeBundlePadding(const MCAssembler &Assembler,
+ const MCEncodedFragment *F, uint64_t FOffset,
+ uint64_t FSize);
} // end namespace llvm
diff --git a/linux-x64/clang/include/llvm/MC/MCCodePadder.h b/linux-x64/clang/include/llvm/MC/MCCodePadder.h
index b7772b6..4dde6bf 100644
--- a/linux-x64/clang/include/llvm/MC/MCCodePadder.h
+++ b/linux-x64/clang/include/llvm/MC/MCCodePadder.h
@@ -28,7 +28,6 @@
struct MCCodePaddingContext {
bool IsPaddingActive;
- bool IsBasicBlockInsideInnermostLoop;
bool IsBasicBlockReachableViaFallthrough;
bool IsBasicBlockReachableViaBranch;
};
diff --git a/linux-x64/clang/include/llvm/MC/MCCodeView.h b/linux-x64/clang/include/llvm/MC/MCCodeView.h
index c8f1451..1d9e3c6 100644
--- a/linux-x64/clang/include/llvm/MC/MCCodeView.h
+++ b/linux-x64/clang/include/llvm/MC/MCCodeView.h
@@ -27,7 +27,7 @@
class MCStreamer;
class CodeViewContext;
-/// \brief Instances of this class represent the information from a
+/// Instances of this class represent the information from a
/// .cv_loc directive.
class MCCVLoc {
uint32_t FunctionId;
@@ -50,13 +50,13 @@
public:
unsigned getFunctionId() const { return FunctionId; }
- /// \brief Get the FileNum of this MCCVLoc.
+ /// Get the FileNum of this MCCVLoc.
unsigned getFileNum() const { return FileNum; }
- /// \brief Get the Line of this MCCVLoc.
+ /// Get the Line of this MCCVLoc.
unsigned getLine() const { return Line; }
- /// \brief Get the Column of this MCCVLoc.
+ /// Get the Column of this MCCVLoc.
unsigned getColumn() const { return Column; }
bool isPrologueEnd() const { return PrologueEnd; }
@@ -64,13 +64,13 @@
void setFunctionId(unsigned FID) { FunctionId = FID; }
- /// \brief Set the FileNum of this MCCVLoc.
+ /// Set the FileNum of this MCCVLoc.
void setFileNum(unsigned fileNum) { FileNum = fileNum; }
- /// \brief Set the Line of this MCCVLoc.
+ /// Set the Line of this MCCVLoc.
void setLine(unsigned line) { Line = line; }
- /// \brief Set the Column of this MCCVLoc.
+ /// Set the Column of this MCCVLoc.
void setColumn(unsigned column) {
assert(column <= UINT16_MAX);
Column = column;
@@ -80,7 +80,7 @@
void setIsStmt(bool IS) { IsStmt = IS; }
};
-/// \brief Instances of this class represent the line information for
+/// Instances of this class represent the line information for
/// the CodeView line table entries. Which is created after a machine
/// instruction is assembled and uses an address from a temporary label
/// created at the current address in the current section and the info from
@@ -201,7 +201,7 @@
bool isValidCVFileNumber(unsigned FileNumber);
- /// \brief Add a line entry.
+ /// Add a line entry.
void addLineEntry(const MCCVLineEntry &LineEntry);
std::vector<MCCVLineEntry> getFunctionLineEntries(unsigned FuncId);
diff --git a/linux-x64/clang/include/llvm/MC/MCContext.h b/linux-x64/clang/include/llvm/MC/MCContext.h
index c110ffd..a712e2d 100644
--- a/linux-x64/clang/include/llvm/MC/MCContext.h
+++ b/linux-x64/clang/include/llvm/MC/MCContext.h
@@ -137,6 +137,9 @@
/// The compilation directory to use for DW_AT_comp_dir.
SmallString<128> CompilationDir;
+ /// Prefix replacement map for source file information.
+ std::map<const std::string, const std::string> DebugPrefixMap;
+
/// The main file name if passed in explicitly.
std::string MainFileName;
@@ -272,7 +275,7 @@
unsigned UniqueID,
const MCSymbolELF *Associated);
- /// \brief Map of currently defined macros.
+ /// Map of currently defined macros.
StringMap<MCAsmMacro> MacroMap;
public:
@@ -295,6 +298,10 @@
CodeViewContext &getCVContext();
+ /// Clear the current cv_loc, if there is one. Avoids lazily creating a
+ /// CodeViewContext if none is needed.
+ void clearCVLocSeen();
+
void setAllowTemporaryLabels(bool Value) { AllowTemporaryLabels = Value; }
void setUseNamesOnTempLabels(bool Value) { UseNamesOnTempLabels = Value; }
@@ -338,7 +345,7 @@
/// Gets a symbol that will be defined to the final stack offset of a local
/// variable after codegen.
///
- /// \param Idx - The index of a local variable passed to @llvm.localescape.
+ /// \param Idx - The index of a local variable passed to \@llvm.localescape.
MCSymbol *getOrCreateFrameAllocSymbol(StringRef FuncName, unsigned Idx);
MCSymbol *getOrCreateParentFrameOffsetSymbol(StringRef FuncName);
@@ -478,20 +485,32 @@
/// \name Dwarf Management
/// @{
- /// \brief Get the compilation directory for DW_AT_comp_dir
+ /// Get the compilation directory for DW_AT_comp_dir
/// The compilation directory should be set with \c setCompilationDir before
/// calling this function. If it is unset, an empty string will be returned.
StringRef getCompilationDir() const { return CompilationDir; }
- /// \brief Set the compilation directory for DW_AT_comp_dir
+ /// Set the compilation directory for DW_AT_comp_dir
void setCompilationDir(StringRef S) { CompilationDir = S.str(); }
- /// \brief Get the main file name for use in error messages and debug
+ /// Get the debug prefix map.
+ const std::map<const std::string, const std::string> &
+ getDebugPrefixMap() const {
+ return DebugPrefixMap;
+ }
+
+ /// Add an entry to the debug prefix map.
+ void addDebugPrefixMapEntry(const std::string &From, const std::string &To);
+
+ // Remaps all debug directory paths in-place as per the debug prefix map.
+ void RemapDebugPaths();
+
+ /// Get the main file name for use in error messages and debug
/// info. This can be set to ensure we've got the correct file name
/// after preprocessing or for -save-temps.
const std::string &getMainFileName() const { return MainFileName; }
- /// \brief Set the main file name and override the default.
+ /// Set the main file name and override the default.
void setMainFileName(StringRef S) { MainFileName = S; }
/// Creates an entry in the dwarf file and directory tables.
@@ -546,6 +565,11 @@
Source);
}
+ /// Reports whether MD5 checksum usage is consistent (all-or-none).
+ bool isDwarfMD5UsageConsistent(unsigned CUID) const {
+ return getMCDwarfLineTable(CUID).isMD5UsageConsistent();
+ }
+
/// Saves the information from the currently parsed dwarf .loc directive
/// and sets DwarfLocSeen. When the next instruction is assembled an entry
/// in the line number table with this information and the address of the
@@ -649,7 +673,7 @@
// operator new and delete aren't allowed inside namespaces.
// The throw specifications are mandated by the standard.
-/// \brief Placement new for using the MCContext's allocator.
+/// Placement new for using the MCContext's allocator.
///
/// This placement form of operator new uses the MCContext's allocator for
/// obtaining memory. It is a non-throwing new, which means that it returns
@@ -675,7 +699,7 @@
size_t Alignment = 8) noexcept {
return C.allocate(Bytes, Alignment);
}
-/// \brief Placement delete companion to the new above.
+/// Placement delete companion to the new above.
///
/// This operator is just a companion to the new above. There is no way of
/// invoking it directly; see the new operator for more details. This operator
@@ -709,7 +733,7 @@
return C.allocate(Bytes, Alignment);
}
-/// \brief Placement delete[] companion to the new[] above.
+/// Placement delete[] companion to the new[] above.
///
/// This operator is just a companion to the new[] above. There is no way of
/// invoking it directly; see the new[] operator for more details. This operator
diff --git a/linux-x64/clang/include/llvm/MC/MCDisassembler/MCExternalSymbolizer.h b/linux-x64/clang/include/llvm/MC/MCDisassembler/MCExternalSymbolizer.h
index bd3e5d4..df909a0 100644
--- a/linux-x64/clang/include/llvm/MC/MCDisassembler/MCExternalSymbolizer.h
+++ b/linux-x64/clang/include/llvm/MC/MCDisassembler/MCExternalSymbolizer.h
@@ -22,7 +22,7 @@
namespace llvm {
-/// \brief Symbolize using user-provided, C API, callbacks.
+/// Symbolize using user-provided, C API, callbacks.
///
/// See llvm-c/Disassembler.h.
class MCExternalSymbolizer : public MCSymbolizer {
diff --git a/linux-x64/clang/include/llvm/MC/MCDisassembler/MCRelocationInfo.h b/linux-x64/clang/include/llvm/MC/MCDisassembler/MCRelocationInfo.h
index 7836e88..6030ae6 100644
--- a/linux-x64/clang/include/llvm/MC/MCDisassembler/MCRelocationInfo.h
+++ b/linux-x64/clang/include/llvm/MC/MCDisassembler/MCRelocationInfo.h
@@ -21,7 +21,7 @@
class MCContext;
class MCExpr;
-/// \brief Create MCExprs from relocations found in an object file.
+/// Create MCExprs from relocations found in an object file.
class MCRelocationInfo {
protected:
MCContext &Ctx;
@@ -32,7 +32,7 @@
MCRelocationInfo &operator=(const MCRelocationInfo &) = delete;
virtual ~MCRelocationInfo();
- /// \brief Create an MCExpr for the target-specific \p VariantKind.
+ /// Create an MCExpr for the target-specific \p VariantKind.
/// The VariantKinds are defined in llvm-c/Disassembler.h.
/// Used by MCExternalSymbolizer.
/// \returns If possible, an MCExpr corresponding to VariantKind, else 0.
diff --git a/linux-x64/clang/include/llvm/MC/MCDisassembler/MCSymbolizer.h b/linux-x64/clang/include/llvm/MC/MCDisassembler/MCSymbolizer.h
index d85cf5e..0bfa569 100644
--- a/linux-x64/clang/include/llvm/MC/MCDisassembler/MCSymbolizer.h
+++ b/linux-x64/clang/include/llvm/MC/MCDisassembler/MCSymbolizer.h
@@ -27,7 +27,7 @@
class MCInst;
class raw_ostream;
-/// \brief Symbolize and annotate disassembled instructions.
+/// Symbolize and annotate disassembled instructions.
///
/// For now this mimics the old symbolization logic (from both ARM and x86), that
/// relied on user-provided (C API) callbacks to do the actual symbol lookup in
@@ -42,7 +42,7 @@
std::unique_ptr<MCRelocationInfo> RelInfo;
public:
- /// \brief Construct an MCSymbolizer, taking ownership of \p RelInfo.
+ /// Construct an MCSymbolizer, taking ownership of \p RelInfo.
MCSymbolizer(MCContext &Ctx, std::unique_ptr<MCRelocationInfo> RelInfo)
: Ctx(Ctx), RelInfo(std::move(RelInfo)) {
}
@@ -51,7 +51,7 @@
MCSymbolizer &operator=(const MCSymbolizer &) = delete;
virtual ~MCSymbolizer();
- /// \brief Try to add a symbolic operand instead of \p Value to the MCInst.
+ /// Try to add a symbolic operand instead of \p Value to the MCInst.
///
/// Instead of having a difficult to read immediate, a symbolic operand would
/// represent this immediate in a more understandable way, for instance as a
@@ -70,7 +70,7 @@
bool IsBranch, uint64_t Offset,
uint64_t InstSize) = 0;
- /// \brief Try to add a comment on the PC-relative load.
+ /// Try to add a comment on the PC-relative load.
/// For instance, in Mach-O, this is used to add annotations to instructions
/// that use C string literals, as found in __cstring.
virtual void tryAddingPcLoadReferenceComment(raw_ostream &cStream,
diff --git a/linux-x64/clang/include/llvm/MC/MCDwarf.h b/linux-x64/clang/include/llvm/MC/MCDwarf.h
index 5cdb176..2bfaf19 100644
--- a/linux-x64/clang/include/llvm/MC/MCDwarf.h
+++ b/linux-x64/clang/include/llvm/MC/MCDwarf.h
@@ -42,16 +42,16 @@
class SMLoc;
class SourceMgr;
-/// \brief Instances of this class represent the name of the dwarf
+/// Instances of this class represent the name of the dwarf
/// .file directive and its associated dwarf file number in the MC file,
/// and MCDwarfFile's are created and uniqued by the MCContext class where
/// the file number for each is its index into the vector of DwarfFiles (note
/// index 0 is not used and not a valid dwarf file number).
struct MCDwarfFile {
- // \brief The base name of the file without its directory path.
+ // The base name of the file without its directory path.
std::string Name;
- // \brief The index into the list of directory names for this file name.
+ // The index into the list of directory names for this file name.
unsigned DirIndex;
/// The MD5 checksum, if there is one. Non-owning pointer to data allocated
@@ -63,7 +63,7 @@
Optional<StringRef> Source;
};
-/// \brief Instances of this class represent the information from a
+/// Instances of this class represent the information from a
/// dwarf .loc directive.
class MCDwarfLoc {
uint32_t FileNum;
@@ -95,55 +95,55 @@
// for an MCDwarfLoc object.
public:
- /// \brief Get the FileNum of this MCDwarfLoc.
+ /// Get the FileNum of this MCDwarfLoc.
unsigned getFileNum() const { return FileNum; }
- /// \brief Get the Line of this MCDwarfLoc.
+ /// Get the Line of this MCDwarfLoc.
unsigned getLine() const { return Line; }
- /// \brief Get the Column of this MCDwarfLoc.
+ /// Get the Column of this MCDwarfLoc.
unsigned getColumn() const { return Column; }
- /// \brief Get the Flags of this MCDwarfLoc.
+ /// Get the Flags of this MCDwarfLoc.
unsigned getFlags() const { return Flags; }
- /// \brief Get the Isa of this MCDwarfLoc.
+ /// Get the Isa of this MCDwarfLoc.
unsigned getIsa() const { return Isa; }
- /// \brief Get the Discriminator of this MCDwarfLoc.
+ /// Get the Discriminator of this MCDwarfLoc.
unsigned getDiscriminator() const { return Discriminator; }
- /// \brief Set the FileNum of this MCDwarfLoc.
+ /// Set the FileNum of this MCDwarfLoc.
void setFileNum(unsigned fileNum) { FileNum = fileNum; }
- /// \brief Set the Line of this MCDwarfLoc.
+ /// Set the Line of this MCDwarfLoc.
void setLine(unsigned line) { Line = line; }
- /// \brief Set the Column of this MCDwarfLoc.
+ /// Set the Column of this MCDwarfLoc.
void setColumn(unsigned column) {
assert(column <= UINT16_MAX);
Column = column;
}
- /// \brief Set the Flags of this MCDwarfLoc.
+ /// Set the Flags of this MCDwarfLoc.
void setFlags(unsigned flags) {
assert(flags <= UINT8_MAX);
Flags = flags;
}
- /// \brief Set the Isa of this MCDwarfLoc.
+ /// Set the Isa of this MCDwarfLoc.
void setIsa(unsigned isa) {
assert(isa <= UINT8_MAX);
Isa = isa;
}
- /// \brief Set the Discriminator of this MCDwarfLoc.
+ /// Set the Discriminator of this MCDwarfLoc.
void setDiscriminator(unsigned discriminator) {
Discriminator = discriminator;
}
};
-/// \brief Instances of this class represent the line information for
+/// Instances of this class represent the line information for
/// the dwarf line table entries. Which is created after a machine
/// instruction is assembled and uses an address from a temporary label
/// created at the current address in the current section and the info from
@@ -168,13 +168,13 @@
static void Make(MCObjectStreamer *MCOS, MCSection *Section);
};
-/// \brief Instances of this class represent the line information for a compile
+/// Instances of this class represent the line information for a compile
/// unit where machine instructions have been assembled after seeing .loc
/// directives. This is the information used to build the dwarf line
/// table for a section.
class MCLineSection {
public:
- // \brief Add an entry to this MCLineSection's line entries.
+ // Add an entry to this MCLineSection's line entries.
void addLineEntry(const MCDwarfLineEntry &LineEntry, MCSection *Sec) {
MCLineDivisions[Sec].push_back(LineEntry);
}
@@ -213,11 +213,14 @@
SmallVector<std::string, 3> MCDwarfDirs;
SmallVector<MCDwarfFile, 3> MCDwarfFiles;
StringMap<unsigned> SourceIdMap;
- StringRef CompilationDir;
+ std::string CompilationDir;
MCDwarfFile RootFile;
- bool HasMD5 = false;
bool HasSource = false;
+private:
+ bool HasAllMD5 = true;
+ bool HasAnyMD5 = false;
+public:
MCDwarfLineTableHeader() = default;
Expected<unsigned> tryGetFile(StringRef &Directory, StringRef &FileName,
@@ -231,11 +234,22 @@
Emit(MCStreamer *MCOS, MCDwarfLineTableParams Params,
ArrayRef<char> SpecialOpcodeLengths,
Optional<MCDwarfLineStr> &LineStr) const;
+ void resetMD5Usage() {
+ HasAllMD5 = true;
+ HasAnyMD5 = false;
+ }
+ void trackMD5Usage(bool MD5Used) {
+ HasAllMD5 &= MD5Used;
+ HasAnyMD5 |= MD5Used;
+ }
+ bool isMD5UsageConsistent() const {
+ return MCDwarfFiles.empty() || (HasAllMD5 == HasAnyMD5);
+ }
private:
void emitV2FileDirTables(MCStreamer *MCOS) const;
- void emitV5FileDirTables(MCStreamer *MCOS,
- Optional<MCDwarfLineStr> &LineStr) const;
+ void emitV5FileDirTables(MCStreamer *MCOS, Optional<MCDwarfLineStr> &LineStr,
+ StringRef CtxCompilationDir) const;
};
class MCDwarfDwoLineTable {
@@ -251,7 +265,7 @@
Header.RootFile.DirIndex = 0;
Header.RootFile.Checksum = Checksum;
Header.RootFile.Source = Source;
- Header.HasMD5 = (Checksum != nullptr);
+ Header.trackMD5Usage(Checksum);
Header.HasSource = Source.hasValue();
}
@@ -294,10 +308,22 @@
Header.RootFile.DirIndex = 0;
Header.RootFile.Checksum = Checksum;
Header.RootFile.Source = Source;
- Header.HasMD5 = (Checksum != nullptr);
+ Header.trackMD5Usage(Checksum);
Header.HasSource = Source.hasValue();
}
+ void resetRootFile() {
+ assert(Header.MCDwarfFiles.empty());
+ Header.RootFile.Name.clear();
+ Header.resetMD5Usage();
+ Header.HasSource = false;
+ }
+
+ bool hasRootFile() const { return !Header.RootFile.Name.empty(); }
+
+ // Report whether MD5 usage has been consistent (all-or-none).
+ bool isMD5UsageConsistent() const { return Header.isMD5UsageConsistent(); }
+
MCSymbol *getLabel() const {
return Header.Label;
}
@@ -336,6 +362,13 @@
static void Encode(MCContext &Context, MCDwarfLineTableParams Params,
int64_t LineDelta, uint64_t AddrDelta, raw_ostream &OS);
+ /// Utility function to encode a Dwarf pair of LineDelta and AddrDeltas using
+ /// fixed length operands.
+ static bool FixedEncode(MCContext &Context,
+ MCDwarfLineTableParams Params,
+ int64_t LineDelta, uint64_t AddrDelta,
+ raw_ostream &OS, uint32_t *Offset, uint32_t *Size);
+
/// Utility function to emit the encoding to a streamer.
static void Emit(MCStreamer *MCOS, MCDwarfLineTableParams Params,
int64_t LineDelta, uint64_t AddrDelta);
@@ -422,41 +455,41 @@
}
public:
- /// \brief .cfi_def_cfa defines a rule for computing CFA as: take address from
+ /// .cfi_def_cfa defines a rule for computing CFA as: take address from
/// Register and add Offset to it.
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register,
int Offset) {
return MCCFIInstruction(OpDefCfa, L, Register, -Offset, "");
}
- /// \brief .cfi_def_cfa_register modifies a rule for computing CFA. From now
+ /// .cfi_def_cfa_register modifies a rule for computing CFA. From now
/// on Register will be used instead of the old one. Offset remains the same.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register) {
return MCCFIInstruction(OpDefCfaRegister, L, Register, 0, "");
}
- /// \brief .cfi_def_cfa_offset modifies a rule for computing CFA. Register
+ /// .cfi_def_cfa_offset modifies a rule for computing CFA. Register
/// remains the same, but offset is new. Note that it is the absolute offset
/// that will be added to a defined register to the compute CFA address.
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset) {
return MCCFIInstruction(OpDefCfaOffset, L, 0, -Offset, "");
}
- /// \brief .cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but
+ /// .cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but
/// Offset is a relative value that is added/subtracted from the previous
/// offset.
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment) {
return MCCFIInstruction(OpAdjustCfaOffset, L, 0, Adjustment, "");
}
- /// \brief .cfi_offset Previous value of Register is saved at offset Offset
+ /// .cfi_offset Previous value of Register is saved at offset Offset
/// from CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register,
int Offset) {
return MCCFIInstruction(OpOffset, L, Register, Offset, "");
}
- /// \brief .cfi_rel_offset Previous value of Register is saved at offset
+ /// .cfi_rel_offset Previous value of Register is saved at offset
/// Offset from the current CFA register. This is transformed to .cfi_offset
/// using the known displacement of the CFA register from the CFA.
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register,
@@ -464,54 +497,54 @@
return MCCFIInstruction(OpRelOffset, L, Register, Offset, "");
}
- /// \brief .cfi_register Previous value of Register1 is saved in
+ /// .cfi_register Previous value of Register1 is saved in
/// register Register2.
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1,
unsigned Register2) {
return MCCFIInstruction(OpRegister, L, Register1, Register2);
}
- /// \brief .cfi_window_save SPARC register window is saved.
+ /// .cfi_window_save SPARC register window is saved.
static MCCFIInstruction createWindowSave(MCSymbol *L) {
return MCCFIInstruction(OpWindowSave, L, 0, 0, "");
}
- /// \brief .cfi_restore says that the rule for Register is now the same as it
+ /// .cfi_restore says that the rule for Register is now the same as it
/// was at the beginning of the function, after all initial instructions added
/// by .cfi_startproc were executed.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register) {
return MCCFIInstruction(OpRestore, L, Register, 0, "");
}
- /// \brief .cfi_undefined From now on the previous value of Register can't be
+ /// .cfi_undefined From now on the previous value of Register can't be
/// restored anymore.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register) {
return MCCFIInstruction(OpUndefined, L, Register, 0, "");
}
- /// \brief .cfi_same_value Current value of Register is the same as in the
+ /// .cfi_same_value Current value of Register is the same as in the
/// previous frame. I.e., no restoration is needed.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register) {
return MCCFIInstruction(OpSameValue, L, Register, 0, "");
}
- /// \brief .cfi_remember_state Save all current rules for all registers.
+ /// .cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction createRememberState(MCSymbol *L) {
return MCCFIInstruction(OpRememberState, L, 0, 0, "");
}
- /// \brief .cfi_restore_state Restore the previously saved state.
+ /// .cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createRestoreState(MCSymbol *L) {
return MCCFIInstruction(OpRestoreState, L, 0, 0, "");
}
- /// \brief .cfi_escape Allows the user to add arbitrary bytes to the unwind
+ /// .cfi_escape Allows the user to add arbitrary bytes to the unwind
/// info.
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals) {
return MCCFIInstruction(OpEscape, L, 0, 0, Vals);
}
- /// \brief A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE
+ /// A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size) {
return MCCFIInstruction(OpGnuArgsSize, L, 0, Size, "");
}
diff --git a/linux-x64/clang/include/llvm/MC/MCELFObjectWriter.h b/linux-x64/clang/include/llvm/MC/MCELFObjectWriter.h
index fd8d118..389a4d7 100644
--- a/linux-x64/clang/include/llvm/MC/MCELFObjectWriter.h
+++ b/linux-x64/clang/include/llvm/MC/MCELFObjectWriter.h
@@ -12,6 +12,8 @@
#include "llvm/ADT/Triple.h"
#include "llvm/BinaryFormat/ELF.h"
+#include "llvm/MC/MCObjectWriter.h"
+#include "llvm/MC/MCSectionELF.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/raw_ostream.h"
#include <cstdint>
@@ -50,7 +52,7 @@
void dump() const { print(errs()); }
};
-class MCELFObjectTargetWriter {
+class MCELFObjectTargetWriter : public MCObjectTargetWriter {
const uint8_t OSABI;
const uint16_t EMachine;
const unsigned HasRelocationAddend : 1;
@@ -63,6 +65,11 @@
public:
virtual ~MCELFObjectTargetWriter() = default;
+ virtual Triple::ObjectFormatType getFormat() const { return Triple::ELF; }
+ static bool classof(const MCObjectTargetWriter *W) {
+ return W->getFormat() == Triple::ELF;
+ }
+
static uint8_t getOSABI(Triple::OSType OSType) {
switch (OSType) {
case Triple::CloudABI:
@@ -84,6 +91,8 @@
virtual void sortRelocs(const MCAssembler &Asm,
std::vector<ELFRelocationEntry> &Relocs);
+ virtual void addTargetSectionFlags(MCContext &Ctx, MCSectionELF &Sec);
+
/// \name Accessors
/// @{
uint8_t getOSABI() const { return OSABI; }
@@ -132,7 +141,7 @@
}
};
-/// \brief Construct a new ELF writer instance.
+/// Construct a new ELF writer instance.
///
/// \param MOTW - The target specific ELF writer subclass.
/// \param OS - The stream to write to.
@@ -141,6 +150,11 @@
createELFObjectWriter(std::unique_ptr<MCELFObjectTargetWriter> MOTW,
raw_pwrite_stream &OS, bool IsLittleEndian);
+std::unique_ptr<MCObjectWriter>
+createELFDwoObjectWriter(std::unique_ptr<MCELFObjectTargetWriter> MOTW,
+ raw_pwrite_stream &OS, raw_pwrite_stream &DwoOS,
+ bool IsLittleEndian);
+
} // end namespace llvm
#endif // LLVM_MC_MCELFOBJECTWRITER_H
diff --git a/linux-x64/clang/include/llvm/MC/MCELFStreamer.h b/linux-x64/clang/include/llvm/MC/MCELFStreamer.h
index 2f23cd6..3797079 100644
--- a/linux-x64/clang/include/llvm/MC/MCELFStreamer.h
+++ b/linux-x64/clang/include/llvm/MC/MCELFStreamer.h
@@ -24,7 +24,8 @@
class MCELFStreamer : public MCObjectStreamer {
public:
MCELFStreamer(MCContext &Context, std::unique_ptr<MCAsmBackend> TAB,
- raw_pwrite_stream &OS, std::unique_ptr<MCCodeEmitter> Emitter);
+ std::unique_ptr<MCObjectWriter> OW,
+ std::unique_ptr<MCCodeEmitter> Emitter);
~MCELFStreamer() override = default;
@@ -58,7 +59,8 @@
unsigned ByteAlignment) override;
void EmitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr,
- uint64_t Size = 0, unsigned ByteAlignment = 0) override;
+ uint64_t Size = 0, unsigned ByteAlignment = 0,
+ SMLoc L = SMLoc()) override;
void EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol, uint64_t Size,
unsigned ByteAlignment = 0) override;
void EmitValueImpl(const MCExpr *Value, unsigned Size,
@@ -68,6 +70,9 @@
void EmitValueToAlignment(unsigned, int64_t, unsigned, unsigned) override;
+ void emitCGProfileEntry(const MCSymbolRefExpr *From,
+ const MCSymbolRefExpr *To, uint64_t Count) override;
+
void FinishImpl() override;
void EmitBundleAlignMode(unsigned AlignPow2) override;
@@ -80,8 +85,10 @@
void EmitInstToData(const MCInst &Inst, const MCSubtargetInfo &) override;
void fixSymbolsInTLSFixups(const MCExpr *expr);
+ void finalizeCGProfileEntry(const MCSymbolRefExpr *&S);
+ void finalizeCGProfile();
- /// \brief Merge the content of the fragment \p EF into the fragment \p DF.
+ /// Merge the content of the fragment \p EF into the fragment \p DF.
void mergeFragment(MCDataFragment *, MCDataFragment *);
bool SeenIdent = false;
@@ -93,7 +100,7 @@
MCELFStreamer *createARMELFStreamer(MCContext &Context,
std::unique_ptr<MCAsmBackend> TAB,
- raw_pwrite_stream &OS,
+ std::unique_ptr<MCObjectWriter> OW,
std::unique_ptr<MCCodeEmitter> Emitter,
bool RelaxAll, bool IsThumb);
diff --git a/linux-x64/clang/include/llvm/MC/MCExpr.h b/linux-x64/clang/include/llvm/MC/MCExpr.h
index fcbbe65..0d8f3ca 100644
--- a/linux-x64/clang/include/llvm/MC/MCExpr.h
+++ b/linux-x64/clang/include/llvm/MC/MCExpr.h
@@ -31,7 +31,7 @@
using SectionAddrMap = DenseMap<const MCSection *, uint64_t>;
-/// \brief Base class for the full range of assembler expressions which are
+/// Base class for the full range of assembler expressions which are
/// needed for parsing.
class MCExpr {
public:
@@ -85,7 +85,7 @@
/// \name Expression Evaluation
/// @{
- /// \brief Try to evaluate the expression to an absolute value.
+ /// Try to evaluate the expression to an absolute value.
///
/// \param Res - The absolute value, if evaluation succeeds.
/// \param Layout - The assembler layout object to use for evaluating symbol
@@ -96,11 +96,12 @@
const SectionAddrMap &Addrs) const;
bool evaluateAsAbsolute(int64_t &Res) const;
bool evaluateAsAbsolute(int64_t &Res, const MCAssembler &Asm) const;
+ bool evaluateAsAbsolute(int64_t &Res, const MCAssembler *Asm) const;
bool evaluateAsAbsolute(int64_t &Res, const MCAsmLayout &Layout) const;
bool evaluateKnownAbsolute(int64_t &Res, const MCAsmLayout &Layout) const;
- /// \brief Try to evaluate the expression to a relocatable value, i.e. an
+ /// Try to evaluate the expression to a relocatable value, i.e. an
/// expression of the fixed form (a - b + constant).
///
/// \param Res - The relocatable value, if evaluation succeeds.
@@ -110,14 +111,14 @@
bool evaluateAsRelocatable(MCValue &Res, const MCAsmLayout *Layout,
const MCFixup *Fixup) const;
- /// \brief Try to evaluate the expression to the form (a - b + constant) where
+ /// Try to evaluate the expression to the form (a - b + constant) where
/// neither a nor b are variables.
///
/// This is a more aggressive variant of evaluateAsRelocatable. The intended
/// use is for when relocations are not available, like the .size directive.
bool evaluateAsValue(MCValue &Res, const MCAsmLayout &Layout) const;
- /// \brief Find the "associated section" for this expression, which is
+ /// Find the "associated section" for this expression, which is
/// currently defined as the absolute section for constants, or
/// otherwise the section associated with the first defined symbol in the
/// expression.
@@ -131,7 +132,7 @@
return OS;
}
-//// \brief Represent a constant integer expression.
+//// Represent a constant integer expression.
class MCConstantExpr : public MCExpr {
int64_t Value;
@@ -157,7 +158,7 @@
}
};
-/// \brief Represent a reference to a symbol from inside an expression.
+/// Represent a reference to a symbol from inside an expression.
///
/// A symbol reference in an expression may be a use of a label, a use of an
/// assembler variable (defined constant), or constitute an implicit definition
@@ -217,6 +218,8 @@
VK_PPC_LO, // symbol@l
VK_PPC_HI, // symbol@h
VK_PPC_HA, // symbol@ha
+ VK_PPC_HIGH, // symbol@high
+ VK_PPC_HIGHA, // symbol@higha
VK_PPC_HIGHER, // symbol@higher
VK_PPC_HIGHERA, // symbol@highera
VK_PPC_HIGHEST, // symbol@highest
@@ -233,6 +236,8 @@
VK_PPC_TPREL_LO, // symbol@tprel@l
VK_PPC_TPREL_HI, // symbol@tprel@h
VK_PPC_TPREL_HA, // symbol@tprel@ha
+ VK_PPC_TPREL_HIGH, // symbol@tprel@high
+ VK_PPC_TPREL_HIGHA, // symbol@tprel@higha
VK_PPC_TPREL_HIGHER, // symbol@tprel@higher
VK_PPC_TPREL_HIGHERA, // symbol@tprel@highera
VK_PPC_TPREL_HIGHEST, // symbol@tprel@highest
@@ -240,6 +245,8 @@
VK_PPC_DTPREL_LO, // symbol@dtprel@l
VK_PPC_DTPREL_HI, // symbol@dtprel@h
VK_PPC_DTPREL_HA, // symbol@dtprel@ha
+ VK_PPC_DTPREL_HIGH, // symbol@dtprel@high
+ VK_PPC_DTPREL_HIGHA, // symbol@dtprel@higha
VK_PPC_DTPREL_HIGHER, // symbol@dtprel@higher
VK_PPC_DTPREL_HIGHERA, // symbol@dtprel@highera
VK_PPC_DTPREL_HIGHEST, // symbol@dtprel@highest
@@ -279,12 +286,14 @@
VK_Hexagon_IE_GOT,
VK_WebAssembly_FUNCTION, // Function table index, rather than virtual addr
+ VK_WebAssembly_GLOBAL, // Global object index
VK_WebAssembly_TYPEINDEX,// Type table index
VK_AMDGPU_GOTPCREL32_LO, // symbol@gotpcrel32@lo
VK_AMDGPU_GOTPCREL32_HI, // symbol@gotpcrel32@hi
VK_AMDGPU_REL32_LO, // symbol@rel32@lo
VK_AMDGPU_REL32_HI, // symbol@rel32@hi
+ VK_AMDGPU_REL64, // symbol@rel64
VK_TPREL,
VK_DTPREL
@@ -346,7 +355,7 @@
}
};
-/// \brief Unary assembler expressions.
+/// Unary assembler expressions.
class MCUnaryExpr : public MCExpr {
public:
enum Opcode {
@@ -390,10 +399,10 @@
/// \name Accessors
/// @{
- /// \brief Get the kind of this unary expression.
+ /// Get the kind of this unary expression.
Opcode getOpcode() const { return Op; }
- /// \brief Get the child of this unary expression.
+ /// Get the child of this unary expression.
const MCExpr *getSubExpr() const { return Expr; }
/// @}
@@ -403,7 +412,7 @@
}
};
-/// \brief Binary assembler expressions.
+/// Binary assembler expressions.
class MCBinaryExpr : public MCExpr {
public:
enum Opcode {
@@ -547,13 +556,13 @@
/// \name Accessors
/// @{
- /// \brief Get the kind of this binary expression.
+ /// Get the kind of this binary expression.
Opcode getOpcode() const { return Op; }
- /// \brief Get the left-hand side expression of the binary operator.
+ /// Get the left-hand side expression of the binary operator.
const MCExpr *getLHS() const { return LHS; }
- /// \brief Get the right-hand side expression of the binary operator.
+ /// Get the right-hand side expression of the binary operator.
const MCExpr *getRHS() const { return RHS; }
/// @}
@@ -563,7 +572,7 @@
}
};
-/// \brief This is an extension point for target-specific MCExpr subclasses to
+/// This is an extension point for target-specific MCExpr subclasses to
/// implement.
///
/// NOTE: All subclasses are required to have trivial destructors because
@@ -580,6 +589,9 @@
virtual bool evaluateAsRelocatableImpl(MCValue &Res,
const MCAsmLayout *Layout,
const MCFixup *Fixup) const = 0;
+ // This should be set when assigned expressions are not valid ".set"
+ // expressions, e.g. registers, and must be inlined.
+ virtual bool inlineAssignedExpr() const { return false; }
virtual void visitUsedExpr(MCStreamer& Streamer) const = 0;
virtual MCFragment *findAssociatedFragment() const = 0;
diff --git a/linux-x64/clang/include/llvm/MC/MCFixup.h b/linux-x64/clang/include/llvm/MC/MCFixup.h
index b83086c..5f301ea 100644
--- a/linux-x64/clang/include/llvm/MC/MCFixup.h
+++ b/linux-x64/clang/include/llvm/MC/MCFixup.h
@@ -19,7 +19,7 @@
namespace llvm {
class MCExpr;
-/// \brief Extensible enumeration to represent the type of a fixup.
+/// Extensible enumeration to represent the type of a fixup.
enum MCFixupKind {
FK_Data_1 = 0, ///< A one-byte fixup.
FK_Data_2, ///< A two-byte fixup.
@@ -41,6 +41,14 @@
FK_SecRel_2, ///< A two-byte section relative fixup.
FK_SecRel_4, ///< A four-byte section relative fixup.
FK_SecRel_8, ///< A eight-byte section relative fixup.
+ FK_Data_Add_1, ///< A one-byte add fixup.
+ FK_Data_Add_2, ///< A two-byte add fixup.
+ FK_Data_Add_4, ///< A four-byte add fixup.
+ FK_Data_Add_8, ///< A eight-byte add fixup.
+ FK_Data_Sub_1, ///< A one-byte sub fixup.
+ FK_Data_Sub_2, ///< A two-byte sub fixup.
+ FK_Data_Sub_4, ///< A four-byte sub fixup.
+ FK_Data_Sub_8, ///< A eight-byte sub fixup.
FirstTargetFixupKind = 128,
@@ -49,7 +57,7 @@
MaxTargetFixupKind = (1 << 8)
};
-/// \brief Encode information on a single operation to perform on a byte
+/// Encode information on a single operation to perform on a byte
/// sequence (e.g., an encoded instruction) which requires assemble- or run-
/// time patching.
///
@@ -90,6 +98,28 @@
return FI;
}
+ /// Return a fixup corresponding to the add half of a add/sub fixup pair for
+ /// the given Fixup.
+ static MCFixup createAddFor(const MCFixup &Fixup) {
+ MCFixup FI;
+ FI.Value = Fixup.getValue();
+ FI.Offset = Fixup.getOffset();
+ FI.Kind = (unsigned)getAddKindForKind(Fixup.getKind());
+ FI.Loc = Fixup.getLoc();
+ return FI;
+ }
+
+ /// Return a fixup corresponding to the sub half of a add/sub fixup pair for
+ /// the given Fixup.
+ static MCFixup createSubFor(const MCFixup &Fixup) {
+ MCFixup FI;
+ FI.Value = Fixup.getValue();
+ FI.Offset = Fixup.getOffset();
+ FI.Kind = (unsigned)getSubKindForKind(Fixup.getKind());
+ FI.Loc = Fixup.getLoc();
+ return FI;
+ }
+
MCFixupKind getKind() const { return MCFixupKind(Kind); }
uint32_t getOffset() const { return Offset; }
@@ -97,7 +127,7 @@
const MCExpr *getValue() const { return Value; }
- /// \brief Return the generic fixup kind for a value with the given size. It
+ /// Return the generic fixup kind for a value with the given size. It
/// is an error to pass an unsupported size.
static MCFixupKind getKindForSize(unsigned Size, bool isPCRel) {
switch (Size) {
@@ -109,6 +139,30 @@
}
}
+ /// Return the generic fixup kind for an addition with a given size. It
+ /// is an error to pass an unsupported size.
+ static MCFixupKind getAddKindForKind(unsigned Kind) {
+ switch (Kind) {
+ default: llvm_unreachable("Unknown type to convert!");
+ case FK_Data_1: return FK_Data_Add_1;
+ case FK_Data_2: return FK_Data_Add_2;
+ case FK_Data_4: return FK_Data_Add_4;
+ case FK_Data_8: return FK_Data_Add_8;
+ }
+ }
+
+ /// Return the generic fixup kind for an subtraction with a given size. It
+ /// is an error to pass an unsupported size.
+ static MCFixupKind getSubKindForKind(unsigned Kind) {
+ switch (Kind) {
+ default: llvm_unreachable("Unknown type to convert!");
+ case FK_Data_1: return FK_Data_Sub_1;
+ case FK_Data_2: return FK_Data_Sub_2;
+ case FK_Data_4: return FK_Data_Sub_4;
+ case FK_Data_8: return FK_Data_Sub_8;
+ }
+ }
+
SMLoc getLoc() const { return Loc; }
};
diff --git a/linux-x64/clang/include/llvm/MC/MCFixupKindInfo.h b/linux-x64/clang/include/llvm/MC/MCFixupKindInfo.h
index 58183bd..483abb3 100644
--- a/linux-x64/clang/include/llvm/MC/MCFixupKindInfo.h
+++ b/linux-x64/clang/include/llvm/MC/MCFixupKindInfo.h
@@ -12,7 +12,7 @@
namespace llvm {
-/// \brief Target independent information on a fixup kind.
+/// Target independent information on a fixup kind.
struct MCFixupKindInfo {
enum FixupKindFlags {
/// Is this fixup kind PCrelative? This is used by the assembler backend to
diff --git a/linux-x64/clang/include/llvm/MC/MCFragment.h b/linux-x64/clang/include/llvm/MC/MCFragment.h
index 38c3655..c999c9f 100644
--- a/linux-x64/clang/include/llvm/MC/MCFragment.h
+++ b/linux-x64/clang/include/llvm/MC/MCFragment.h
@@ -56,18 +56,13 @@
bool HasInstructions;
private:
- /// \brief Should this fragment be aligned to the end of a bundle?
- bool AlignToBundleEnd;
-
- uint8_t BundlePadding;
-
/// LayoutOrder - The layout order of this fragment.
unsigned LayoutOrder;
/// The data for the section this fragment is in.
MCSection *Parent;
- /// Atom - The atom this fragment is in, as represented by it's defining
+ /// Atom - The atom this fragment is in, as represented by its defining
/// symbol.
const MCSymbol *Atom;
@@ -84,7 +79,7 @@
protected:
MCFragment(FragmentType Kind, bool HasInstructions,
- uint8_t BundlePadding, MCSection *Parent = nullptr);
+ MCSection *Parent = nullptr);
~MCFragment();
@@ -110,26 +105,11 @@
unsigned getLayoutOrder() const { return LayoutOrder; }
void setLayoutOrder(unsigned Value) { LayoutOrder = Value; }
- /// \brief Does this fragment have instructions emitted into it? By default
+ /// Does this fragment have instructions emitted into it? By default
/// this is false, but specific fragment types may set it to true.
bool hasInstructions() const { return HasInstructions; }
- /// \brief Should this fragment be placed at the end of an aligned bundle?
- bool alignToBundleEnd() const { return AlignToBundleEnd; }
- void setAlignToBundleEnd(bool V) { AlignToBundleEnd = V; }
-
- /// \brief Get the padding size that must be inserted before this fragment.
- /// Used for bundling. By default, no padding is inserted.
- /// Note that padding size is restricted to 8 bits. This is an optimization
- /// to reduce the amount of space used for each fragment. In practice, larger
- /// padding should never be required.
- uint8_t getBundlePadding() const { return BundlePadding; }
-
- /// \brief Set the padding size for this fragment. By default it's a no-op,
- /// and only some fragments have a meaningful implementation.
- void setBundlePadding(uint8_t N) { BundlePadding = N; }
-
- /// \brief Return true if given frgment has FT_Dummy type.
+ /// Return true if given frgment has FT_Dummy type.
bool isDummy() const { return Kind == FT_Dummy; }
void dump() const;
@@ -137,8 +117,7 @@
class MCDummyFragment : public MCFragment {
public:
- explicit MCDummyFragment(MCSection *Sec)
- : MCFragment(FT_Dummy, false, 0, Sec) {}
+ explicit MCDummyFragment(MCSection *Sec) : MCFragment(FT_Dummy, false, Sec) {}
static bool classof(const MCFragment *F) { return F->getKind() == FT_Dummy; }
};
@@ -147,10 +126,19 @@
/// data.
///
class MCEncodedFragment : public MCFragment {
+ /// Should this fragment be aligned to the end of a bundle?
+ bool AlignToBundleEnd = false;
+
+ uint8_t BundlePadding = 0;
+
protected:
MCEncodedFragment(MCFragment::FragmentType FType, bool HasInstructions,
MCSection *Sec)
- : MCFragment(FType, HasInstructions, 0, Sec) {}
+ : MCFragment(FType, HasInstructions, Sec) {}
+
+ /// STI - The MCSubtargetInfo in effect when the instruction was encoded.
+ /// must be non-null for instructions.
+ const MCSubtargetInfo *STI = nullptr;
public:
static bool classof(const MCFragment *F) {
@@ -161,9 +149,36 @@
case MCFragment::FT_Relaxable:
case MCFragment::FT_CompactEncodedInst:
case MCFragment::FT_Data:
+ case MCFragment::FT_Dwarf:
return true;
}
}
+
+ /// Should this fragment be placed at the end of an aligned bundle?
+ bool alignToBundleEnd() const { return AlignToBundleEnd; }
+ void setAlignToBundleEnd(bool V) { AlignToBundleEnd = V; }
+
+ /// Get the padding size that must be inserted before this fragment.
+ /// Used for bundling. By default, no padding is inserted.
+ /// Note that padding size is restricted to 8 bits. This is an optimization
+ /// to reduce the amount of space used for each fragment. In practice, larger
+ /// padding should never be required.
+ uint8_t getBundlePadding() const { return BundlePadding; }
+
+ /// Set the padding size for this fragment. By default it's a no-op,
+ /// and only some fragments have a meaningful implementation.
+ void setBundlePadding(uint8_t N) { BundlePadding = N; }
+
+ /// Retrieve the MCSubTargetInfo in effect when the instruction was encoded.
+ /// Guaranteed to be non-null if hasInstructions() == true
+ const MCSubtargetInfo *getSubtargetInfo() const { return STI; }
+
+ /// Record that the fragment contains instructions with the MCSubtargetInfo in
+ /// effect when the instruction was encoded.
+ void setHasInstructions(const MCSubtargetInfo &STI) {
+ HasInstructions = true;
+ this->STI = &STI;
+ }
};
/// Interface implemented by fragments that contain encoded instructions and/or
@@ -202,6 +217,7 @@
Sec) {}
public:
+
using const_fixup_iterator = SmallVectorImpl<MCFixup>::const_iterator;
using fixup_iterator = SmallVectorImpl<MCFixup>::iterator;
@@ -217,7 +233,7 @@
static bool classof(const MCFragment *F) {
MCFragment::FragmentType Kind = F->getKind();
return Kind == MCFragment::FT_Relaxable || Kind == MCFragment::FT_Data ||
- Kind == MCFragment::FT_CVDefRange;
+ Kind == MCFragment::FT_CVDefRange || Kind == MCFragment::FT_Dwarf;;
}
};
@@ -228,8 +244,6 @@
MCDataFragment(MCSection *Sec = nullptr)
: MCEncodedFragmentWithFixups<32, 4>(FT_Data, false, Sec) {}
- void setHasInstructions(bool V) { HasInstructions = V; }
-
static bool classof(const MCFragment *F) {
return F->getKind() == MCFragment::FT_Data;
}
@@ -259,20 +273,15 @@
/// Inst - The instruction this is a fragment for.
MCInst Inst;
- /// STI - The MCSubtargetInfo in effect when the instruction was encoded.
- const MCSubtargetInfo &STI;
-
public:
MCRelaxableFragment(const MCInst &Inst, const MCSubtargetInfo &STI,
MCSection *Sec = nullptr)
: MCEncodedFragmentWithFixups(FT_Relaxable, true, Sec),
- Inst(Inst), STI(STI) {}
+ Inst(Inst) { this->STI = &STI; }
const MCInst &getInst() const { return Inst; }
void setInst(const MCInst &Value) { Inst = Value; }
- const MCSubtargetInfo &getSubtargetInfo() { return STI; }
-
static bool classof(const MCFragment *F) {
return F->getKind() == MCFragment::FT_Relaxable;
}
@@ -300,9 +309,8 @@
public:
MCAlignFragment(unsigned Alignment, int64_t Value, unsigned ValueSize,
unsigned MaxBytesToEmit, MCSection *Sec = nullptr)
- : MCFragment(FT_Align, false, 0, Sec), Alignment(Alignment),
- EmitNops(false), Value(Value),
- ValueSize(ValueSize), MaxBytesToEmit(MaxBytesToEmit) {}
+ : MCFragment(FT_Align, false, Sec), Alignment(Alignment), EmitNops(false),
+ Value(Value), ValueSize(ValueSize), MaxBytesToEmit(MaxBytesToEmit) {}
/// \name Accessors
/// @{
@@ -370,7 +378,7 @@
};
MCPaddingFragment(MCSection *Sec = nullptr)
- : MCFragment(FT_Padding, false, 0, Sec), PaddingPoliciesMask(PFK_None),
+ : MCFragment(FT_Padding, false, Sec), PaddingPoliciesMask(PFK_None),
IsInsertionPoint(false), Size(UINT64_C(0)),
InstInfo({false, MCInst(), false, {0}}) {}
@@ -419,22 +427,23 @@
class MCFillFragment : public MCFragment {
/// Value to use for filling bytes.
- uint8_t Value;
-
+ uint64_t Value;
+ uint8_t ValueSize;
/// The number of bytes to insert.
- const MCExpr &Size;
+ const MCExpr &NumValues;
/// Source location of the directive that this fragment was created for.
SMLoc Loc;
public:
- MCFillFragment(uint8_t Value, const MCExpr &Size, SMLoc Loc,
- MCSection *Sec = nullptr)
- : MCFragment(FT_Fill, false, 0, Sec), Value(Value), Size(Size), Loc(Loc) {
- }
+ MCFillFragment(uint64_t Value, uint8_t VSize, const MCExpr &NumValues,
+ SMLoc Loc, MCSection *Sec = nullptr)
+ : MCFragment(FT_Fill, false, Sec), Value(Value), ValueSize(VSize),
+ NumValues(NumValues), Loc(Loc) {}
- uint8_t getValue() const { return Value; }
- const MCExpr &getSize() const { return Size; }
+ uint64_t getValue() const { return Value; }
+ uint8_t getValueSize() const { return ValueSize; }
+ const MCExpr &getNumValues() const { return NumValues; }
SMLoc getLoc() const { return Loc; }
@@ -456,7 +465,7 @@
public:
MCOrgFragment(const MCExpr &Offset, int8_t Value, SMLoc Loc,
MCSection *Sec = nullptr)
- : MCFragment(FT_Org, false, 0, Sec), Offset(&Offset), Value(Value), Loc(Loc) {}
+ : MCFragment(FT_Org, false, Sec), Offset(&Offset), Value(Value), Loc(Loc) {}
/// \name Accessors
/// @{
@@ -485,7 +494,7 @@
public:
MCLEBFragment(const MCExpr &Value_, bool IsSigned_, MCSection *Sec = nullptr)
- : MCFragment(FT_LEB, false, 0, Sec), Value(&Value_), IsSigned(IsSigned_) {
+ : MCFragment(FT_LEB, false, Sec), Value(&Value_), IsSigned(IsSigned_) {
Contents.push_back(0);
}
@@ -506,7 +515,7 @@
}
};
-class MCDwarfLineAddrFragment : public MCFragment {
+class MCDwarfLineAddrFragment : public MCEncodedFragmentWithFixups<8, 1> {
/// LineDelta - the value of the difference between the two line numbers
/// between two .loc dwarf directives.
int64_t LineDelta;
@@ -515,15 +524,11 @@
/// make up the address delta between two .loc dwarf directives.
const MCExpr *AddrDelta;
- SmallString<8> Contents;
-
public:
MCDwarfLineAddrFragment(int64_t LineDelta, const MCExpr &AddrDelta,
MCSection *Sec = nullptr)
- : MCFragment(FT_Dwarf, false, 0, Sec), LineDelta(LineDelta),
- AddrDelta(&AddrDelta) {
- Contents.push_back(0);
- }
+ : MCEncodedFragmentWithFixups<8, 1>(FT_Dwarf, false, Sec),
+ LineDelta(LineDelta), AddrDelta(&AddrDelta) {}
/// \name Accessors
/// @{
@@ -532,9 +537,6 @@
const MCExpr &getAddrDelta() const { return *AddrDelta; }
- SmallString<8> &getContents() { return Contents; }
- const SmallString<8> &getContents() const { return Contents; }
-
/// @}
static bool classof(const MCFragment *F) {
@@ -551,7 +553,7 @@
public:
MCDwarfCallFrameFragment(const MCExpr &AddrDelta, MCSection *Sec = nullptr)
- : MCFragment(FT_DwarfFrame, false, 0, Sec), AddrDelta(&AddrDelta) {
+ : MCFragment(FT_DwarfFrame, false, Sec), AddrDelta(&AddrDelta) {
Contents.push_back(0);
}
@@ -576,7 +578,7 @@
public:
MCSymbolIdFragment(const MCSymbol *Sym, MCSection *Sec = nullptr)
- : MCFragment(FT_SymbolId, false, 0, Sec), Sym(Sym) {}
+ : MCFragment(FT_SymbolId, false, Sec), Sym(Sym) {}
/// \name Accessors
/// @{
@@ -610,7 +612,7 @@
unsigned StartLineNum, const MCSymbol *FnStartSym,
const MCSymbol *FnEndSym,
MCSection *Sec = nullptr)
- : MCFragment(FT_CVInlineLines, false, 0, Sec), SiteFuncId(SiteFuncId),
+ : MCFragment(FT_CVInlineLines, false, Sec), SiteFuncId(SiteFuncId),
StartFileId(StartFileId), StartLineNum(StartLineNum),
FnStartSym(FnStartSym), FnEndSym(FnEndSym) {}
diff --git a/linux-x64/clang/include/llvm/MC/MCInst.h b/linux-x64/clang/include/llvm/MC/MCInst.h
index db28fd0..67bb11a 100644
--- a/linux-x64/clang/include/llvm/MC/MCInst.h
+++ b/linux-x64/clang/include/llvm/MC/MCInst.h
@@ -30,7 +30,7 @@
class MCInstPrinter;
class raw_ostream;
-/// \brief Instances of this class represent operands of the MCInst class.
+/// Instances of this class represent operands of the MCInst class.
/// This is a simple discriminated union.
class MCOperand {
enum MachineOperandType : unsigned char {
@@ -61,13 +61,13 @@
bool isExpr() const { return Kind == kExpr; }
bool isInst() const { return Kind == kInst; }
- /// \brief Returns the register number.
+ /// Returns the register number.
unsigned getReg() const {
assert(isReg() && "This is not a register operand!");
return RegVal;
}
- /// \brief Set the register number.
+ /// Set the register number.
void setReg(unsigned Reg) {
assert(isReg() && "This is not a register operand!");
RegVal = Reg;
@@ -150,11 +150,13 @@
void print(raw_ostream &OS) const;
void dump() const;
+ bool isBareSymbolRef() const;
+ bool evaluateAsConstantImm(int64_t &Imm) const;
};
template <> struct isPodLike<MCOperand> { static const bool value = true; };
-/// \brief Instances of this class represent a single low-level machine
+/// Instances of this class represent a single low-level machine
/// instruction.
class MCInst {
unsigned Opcode = 0;
@@ -201,7 +203,7 @@
void print(raw_ostream &OS) const;
void dump() const;
- /// \brief Dump the MCInst as prettily as possible using the additional MC
+ /// Dump the MCInst as prettily as possible using the additional MC
/// structures, if given. Operators are separated by the \p Separator
/// string.
void dump_pretty(raw_ostream &OS, const MCInstPrinter *Printer = nullptr,
diff --git a/linux-x64/clang/include/llvm/MC/MCInstBuilder.h b/linux-x64/clang/include/llvm/MC/MCInstBuilder.h
index 30609bd..c5c4f48 100644
--- a/linux-x64/clang/include/llvm/MC/MCInstBuilder.h
+++ b/linux-x64/clang/include/llvm/MC/MCInstBuilder.h
@@ -23,42 +23,42 @@
MCInst Inst;
public:
- /// \brief Create a new MCInstBuilder for an MCInst with a specific opcode.
+ /// Create a new MCInstBuilder for an MCInst with a specific opcode.
MCInstBuilder(unsigned Opcode) {
Inst.setOpcode(Opcode);
}
- /// \brief Add a new register operand.
+ /// Add a new register operand.
MCInstBuilder &addReg(unsigned Reg) {
Inst.addOperand(MCOperand::createReg(Reg));
return *this;
}
- /// \brief Add a new integer immediate operand.
+ /// Add a new integer immediate operand.
MCInstBuilder &addImm(int64_t Val) {
Inst.addOperand(MCOperand::createImm(Val));
return *this;
}
- /// \brief Add a new floating point immediate operand.
+ /// Add a new floating point immediate operand.
MCInstBuilder &addFPImm(double Val) {
Inst.addOperand(MCOperand::createFPImm(Val));
return *this;
}
- /// \brief Add a new MCExpr operand.
+ /// Add a new MCExpr operand.
MCInstBuilder &addExpr(const MCExpr *Val) {
Inst.addOperand(MCOperand::createExpr(Val));
return *this;
}
- /// \brief Add a new MCInst operand.
+ /// Add a new MCInst operand.
MCInstBuilder &addInst(const MCInst *Val) {
Inst.addOperand(MCOperand::createInst(Val));
return *this;
}
- /// \brief Add an operand.
+ /// Add an operand.
MCInstBuilder &addOperand(const MCOperand &Op) {
Inst.addOperand(Op);
return *this;
diff --git a/linux-x64/clang/include/llvm/MC/MCInstPrinter.h b/linux-x64/clang/include/llvm/MC/MCInstPrinter.h
index 0694030..df221e1 100644
--- a/linux-x64/clang/include/llvm/MC/MCInstPrinter.h
+++ b/linux-x64/clang/include/llvm/MC/MCInstPrinter.h
@@ -15,7 +15,6 @@
namespace llvm {
-template <typename T> class ArrayRef;
class MCAsmInfo;
class MCInst;
class MCInstrInfo;
@@ -36,13 +35,13 @@
} // end namespace HexStyle
-/// \brief This is an instance of a target assembly language printer that
+/// This is an instance of a target assembly language printer that
/// converts an MCInst to valid target assembly syntax.
class MCInstPrinter {
protected:
- /// \brief A stream that comments can be emitted to if desired. Each comment
+ /// A stream that comments can be emitted to if desired. Each comment
/// must end with a newline. This will be null if verbose assembly emission
- /// is disable.
+ /// is disabled.
raw_ostream *CommentStream = nullptr;
const MCAsmInfo &MAI;
const MCInstrInfo &MII;
@@ -66,18 +65,18 @@
virtual ~MCInstPrinter();
- /// \brief Specify a stream to emit comments to.
+ /// Specify a stream to emit comments to.
void setCommentStream(raw_ostream &OS) { CommentStream = &OS; }
- /// \brief Print the specified MCInst to the specified raw_ostream.
+ /// Print the specified MCInst to the specified raw_ostream.
virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
const MCSubtargetInfo &STI) = 0;
- /// \brief Return the name of the specified opcode enum (e.g. "MOV32ri") or
+ /// Return the name of the specified opcode enum (e.g. "MOV32ri") or
/// empty if we can't resolve it.
StringRef getOpcodeName(unsigned Opcode) const;
- /// \brief Print the assembler register name.
+ /// Print the assembler register name.
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
bool getUseMarkup() const { return UseMarkup; }
diff --git a/linux-x64/clang/include/llvm/MC/MCInstrAnalysis.h b/linux-x64/clang/include/llvm/MC/MCInstrAnalysis.h
index dd3e1df..0777add 100644
--- a/linux-x64/clang/include/llvm/MC/MCInstrAnalysis.h
+++ b/linux-x64/clang/include/llvm/MC/MCInstrAnalysis.h
@@ -22,6 +22,9 @@
namespace llvm {
+class MCRegisterInfo;
+class Triple;
+
class MCInstrAnalysis {
protected:
friend class Target;
@@ -60,11 +63,56 @@
return Info->get(Inst.getOpcode()).isTerminator();
}
- /// \brief Given a branch instruction try to get the address the branch
+ /// Returns true if at least one of the register writes performed by
+ /// \param Inst implicitly clears the upper portion of all super-registers.
+ ///
+ /// Example: on X86-64, a write to EAX implicitly clears the upper half of
+ /// RAX. Also (still on x86) an XMM write perfomed by an AVX 128-bit
+ /// instruction implicitly clears the upper portion of the correspondent
+ /// YMM register.
+ ///
+ /// This method also updates an APInt which is used as mask of register
+ /// writes. There is one bit for every explicit/implicit write performed by
+ /// the instruction. If a write implicitly clears its super-registers, then
+ /// the corresponding bit is set (vic. the corresponding bit is cleared).
+ ///
+ /// The first bits in the APint are related to explicit writes. The remaining
+ /// bits are related to implicit writes. The sequence of writes follows the
+ /// machine operand sequence. For implicit writes, the sequence is defined by
+ /// the MCInstrDesc.
+ ///
+ /// The assumption is that the bit-width of the APInt is correctly set by
+ /// the caller. The default implementation conservatively assumes that none of
+ /// the writes clears the upper portion of a super-register.
+ virtual bool clearsSuperRegisters(const MCRegisterInfo &MRI,
+ const MCInst &Inst,
+ APInt &Writes) const;
+
+ /// Returns true if \param Inst is a dependency breaking instruction for the
+ /// given subtarget.
+ ///
+ /// The value computed by a dependency breaking instruction is not dependent
+ /// on the inputs. An example of dependency breaking instruction on X86 is
+ /// `XOR %eax, %eax`.
+ /// TODO: In future, we could implement an alternative approach where this
+ /// method returns `true` if the input instruction is not dependent on
+ /// some/all of its input operands. An APInt mask could then be used to
+ /// identify independent operands.
+ virtual bool isDependencyBreaking(const MCSubtargetInfo &STI,
+ const MCInst &Inst) const;
+
+ /// Given a branch instruction try to get the address the branch
/// targets. Return true on success, and the address in Target.
virtual bool
evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
uint64_t &Target) const;
+
+ /// Returns (PLT virtual address, GOT virtual address) pairs for PLT entries.
+ virtual std::vector<std::pair<uint64_t, uint64_t>>
+ findPltEntries(uint64_t PltSectionVA, ArrayRef<uint8_t> PltContents,
+ uint64_t GotPltSectionVA, const Triple &TargetTriple) const {
+ return {};
+ }
};
} // end namespace llvm
diff --git a/linux-x64/clang/include/llvm/MC/MCInstrDesc.h b/linux-x64/clang/include/llvm/MC/MCInstrDesc.h
index ff4c756..3e000a2 100644
--- a/linux-x64/clang/include/llvm/MC/MCInstrDesc.h
+++ b/linux-x64/clang/include/llvm/MC/MCInstrDesc.h
@@ -35,12 +35,12 @@
EARLY_CLOBBER // Operand is an early clobber register operand
};
-/// \brief These are flags set on operands, but should be considered
+/// These are flags set on operands, but should be considered
/// private, all access should go through the MCOperandInfo accessors.
/// See the accessors for a description of what these are.
enum OperandFlags { LookupPtrRegClass = 0, Predicate, OptionalDef };
-/// \brief Operands are tagged with one of the values of this enum.
+/// Operands are tagged with one of the values of this enum.
enum OperandType {
OPERAND_UNKNOWN = 0,
OPERAND_IMMEDIATE = 1,
@@ -60,42 +60,39 @@
OPERAND_FIRST_TARGET = 12,
};
-enum GenericOperandType {
-};
-
}
-/// \brief This holds information about one operand of a machine instruction,
+/// This holds information about one operand of a machine instruction,
/// indicating the register class for register operands, etc.
class MCOperandInfo {
public:
- /// \brief This specifies the register class enumeration of the operand
+ /// This specifies the register class enumeration of the operand
/// if the operand is a register. If isLookupPtrRegClass is set, then this is
/// an index that is passed to TargetRegisterInfo::getPointerRegClass(x) to
/// get a dynamic register class.
int16_t RegClass;
- /// \brief These are flags from the MCOI::OperandFlags enum.
+ /// These are flags from the MCOI::OperandFlags enum.
uint8_t Flags;
- /// \brief Information about the type of the operand.
+ /// Information about the type of the operand.
uint8_t OperandType;
- /// \brief The lower 16 bits are used to specify which constraints are set.
+ /// The lower 16 bits are used to specify which constraints are set.
/// The higher 16 bits are used to specify the value of constraints (4 bits
/// each).
uint32_t Constraints;
- /// \brief Set if this operand is a pointer value and it requires a callback
+ /// Set if this operand is a pointer value and it requires a callback
/// to look up its register class.
bool isLookupPtrRegClass() const {
return Flags & (1 << MCOI::LookupPtrRegClass);
}
- /// \brief Set if this is one of the operands that made up of the predicate
+ /// Set if this is one of the operands that made up of the predicate
/// operand that controls an isPredicable() instruction.
bool isPredicate() const { return Flags & (1 << MCOI::Predicate); }
- /// \brief Set if this operand is a optional def.
+ /// Set if this operand is a optional def.
bool isOptionalDef() const { return Flags & (1 << MCOI::OptionalDef); }
bool isGenericType() const {
@@ -114,7 +111,7 @@
//===----------------------------------------------------------------------===//
namespace MCID {
-/// \brief These should be considered private to the implementation of the
+/// These should be considered private to the implementation of the
/// MCInstrDesc class. Clients should use the predicate methods on MCInstrDesc,
/// not use these directly. These all correspond to bitfields in the
/// MCInstrDesc::Flags field.
@@ -130,6 +127,7 @@
IndirectBranch,
Compare,
MoveImm,
+ MoveReg,
Bitcast,
Select,
DelaySlot,
@@ -151,11 +149,12 @@
ExtractSubreg,
InsertSubreg,
Convergent,
- Add
+ Add,
+ Trap
};
}
-/// \brief Describe properties that are true of each instruction in the target
+/// Describe properties that are true of each instruction in the target
/// description file. This captures information about side effects, register
/// use and many other things. There is one instance of this struct for each
/// target instruction class, and the MachineInstr class points to this struct
@@ -177,12 +176,12 @@
// deprecated due to a "complex" reason, below.
int64_t DeprecatedFeature;
- // A complex method to determine is a certain is deprecated or not, and return
- // the reason for deprecation.
+ // A complex method to determine if a certain instruction is deprecated or
+ // not, and return the reason for deprecation.
bool (*ComplexDeprecationInfo)(MCInst &, const MCSubtargetInfo &,
std::string &);
- /// \brief Returns the value of the specific constraint if
+ /// Returns the value of the specific constraint if
/// it is set. Returns -1 if it is not set.
int getOperandConstraint(unsigned OpNum,
MCOI::OperandConstraint Constraint) const {
@@ -194,15 +193,15 @@
return -1;
}
- /// \brief Returns true if a certain instruction is deprecated and if so
+ /// Returns true if a certain instruction is deprecated and if so
/// returns the reason in \p Info.
bool getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI,
std::string &Info) const;
- /// \brief Return the opcode number for this descriptor.
+ /// Return the opcode number for this descriptor.
unsigned getOpcode() const { return Opcode; }
- /// \brief Return the number of declared MachineOperands for this
+ /// Return the number of declared MachineOperands for this
/// MachineInstruction. Note that variadic (isVariadic() returns true)
/// instructions may have additional operands at the end of the list, and note
/// that the machine instruction may include implicit register def/uses as
@@ -218,44 +217,50 @@
return make_range(opInfo_begin(), opInfo_end());
}
- /// \brief Return the number of MachineOperands that are register
+ /// Return the number of MachineOperands that are register
/// definitions. Register definitions always occur at the start of the
/// machine operand list. This is the number of "outs" in the .td file,
/// and does not include implicit defs.
unsigned getNumDefs() const { return NumDefs; }
- /// \brief Return flags of this instruction.
+ /// Return flags of this instruction.
uint64_t getFlags() const { return Flags; }
- /// \brief Return true if this instruction can have a variable number of
+ /// Return true if this instruction can have a variable number of
/// operands. In this case, the variable operands will be after the normal
/// operands but before the implicit definitions and uses (if any are
/// present).
bool isVariadic() const { return Flags & (1ULL << MCID::Variadic); }
- /// \brief Set if this instruction has an optional definition, e.g.
+ /// Set if this instruction has an optional definition, e.g.
/// ARM instructions which can set condition code if 's' bit is set.
bool hasOptionalDef() const { return Flags & (1ULL << MCID::HasOptionalDef); }
- /// \brief Return true if this is a pseudo instruction that doesn't
+ /// Return true if this is a pseudo instruction that doesn't
/// correspond to a real machine instruction.
bool isPseudo() const { return Flags & (1ULL << MCID::Pseudo); }
- /// \brief Return true if the instruction is a return.
+ /// Return true if the instruction is a return.
bool isReturn() const { return Flags & (1ULL << MCID::Return); }
- /// \brief Return true if the instruction is an add instruction.
+ /// Return true if the instruction is an add instruction.
bool isAdd() const { return Flags & (1ULL << MCID::Add); }
- /// \brief Return true if the instruction is a call.
+ /// Return true if this instruction is a trap.
+ bool isTrap() const { return Flags & (1ULL << MCID::Trap); }
+
+ /// Return true if the instruction is a register to register move.
+ bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); }
+
+ /// Return true if the instruction is a call.
bool isCall() const { return Flags & (1ULL << MCID::Call); }
- /// \brief Returns true if the specified instruction stops control flow
+ /// Returns true if the specified instruction stops control flow
/// from executing the instruction immediately following it. Examples include
/// unconditional branches and return instructions.
bool isBarrier() const { return Flags & (1ULL << MCID::Barrier); }
- /// \brief Returns true if this instruction part of the terminator for
+ /// Returns true if this instruction part of the terminator for
/// a basic block. Typically this is things like return and branch
/// instructions.
///
@@ -263,17 +268,17 @@
/// but before control flow occurs.
bool isTerminator() const { return Flags & (1ULL << MCID::Terminator); }
- /// \brief Returns true if this is a conditional, unconditional, or
+ /// Returns true if this is a conditional, unconditional, or
/// indirect branch. Predicates below can be used to discriminate between
/// these cases, and the TargetInstrInfo::AnalyzeBranch method can be used to
/// get more information.
bool isBranch() const { return Flags & (1ULL << MCID::Branch); }
- /// \brief Return true if this is an indirect branch, such as a
+ /// Return true if this is an indirect branch, such as a
/// branch through a register.
bool isIndirectBranch() const { return Flags & (1ULL << MCID::IndirectBranch); }
- /// \brief Return true if this is a branch which may fall
+ /// Return true if this is a branch which may fall
/// through to the next instruction or may transfer control flow to some other
/// block. The TargetInstrInfo::AnalyzeBranch method can be used to get more
/// information about this branch.
@@ -281,7 +286,7 @@
return isBranch() & !isBarrier() & !isIndirectBranch();
}
- /// \brief Return true if this is a branch which always
+ /// Return true if this is a branch which always
/// transfers control flow to some other block. The
/// TargetInstrInfo::AnalyzeBranch method can be used to get more information
/// about this branch.
@@ -289,40 +294,40 @@
return isBranch() & isBarrier() & !isIndirectBranch();
}
- /// \brief Return true if this is a branch or an instruction which directly
+ /// Return true if this is a branch or an instruction which directly
/// writes to the program counter. Considered 'may' affect rather than
/// 'does' affect as things like predication are not taken into account.
bool mayAffectControlFlow(const MCInst &MI, const MCRegisterInfo &RI) const;
- /// \brief Return true if this instruction has a predicate operand
+ /// Return true if this instruction has a predicate operand
/// that controls execution. It may be set to 'always', or may be set to other
/// values. There are various methods in TargetInstrInfo that can be used to
/// control and modify the predicate in this instruction.
bool isPredicable() const { return Flags & (1ULL << MCID::Predicable); }
- /// \brief Return true if this instruction is a comparison.
+ /// Return true if this instruction is a comparison.
bool isCompare() const { return Flags & (1ULL << MCID::Compare); }
- /// \brief Return true if this instruction is a move immediate
+ /// Return true if this instruction is a move immediate
/// (including conditional moves) instruction.
bool isMoveImmediate() const { return Flags & (1ULL << MCID::MoveImm); }
- /// \brief Return true if this instruction is a bitcast instruction.
+ /// Return true if this instruction is a bitcast instruction.
bool isBitcast() const { return Flags & (1ULL << MCID::Bitcast); }
- /// \brief Return true if this is a select instruction.
+ /// Return true if this is a select instruction.
bool isSelect() const { return Flags & (1ULL << MCID::Select); }
- /// \brief Return true if this instruction cannot be safely
+ /// Return true if this instruction cannot be safely
/// duplicated. For example, if the instruction has a unique labels attached
/// to it, duplicating it would cause multiple definition errors.
bool isNotDuplicable() const { return Flags & (1ULL << MCID::NotDuplicable); }
- /// \brief Returns true if the specified instruction has a delay slot which
+ /// Returns true if the specified instruction has a delay slot which
/// must be filled by the code generator.
bool hasDelaySlot() const { return Flags & (1ULL << MCID::DelaySlot); }
- /// \brief Return true for instructions that can be folded as memory operands
+ /// Return true for instructions that can be folded as memory operands
/// in other instructions. The most common use for this is instructions that
/// are simple loads from memory that don't modify the loaded value in any
/// way, but it can also be used for instructions that can be expressed as
@@ -331,7 +336,7 @@
/// that return a value in their only virtual register definition.
bool canFoldAsLoad() const { return Flags & (1ULL << MCID::FoldableAsLoad); }
- /// \brief Return true if this instruction behaves
+ /// Return true if this instruction behaves
/// the same way as the generic REG_SEQUENCE instructions.
/// E.g., on ARM,
/// dX VMOVDRR rY, rZ
@@ -343,7 +348,7 @@
/// override accordingly.
bool isRegSequenceLike() const { return Flags & (1ULL << MCID::RegSequence); }
- /// \brief Return true if this instruction behaves
+ /// Return true if this instruction behaves
/// the same way as the generic EXTRACT_SUBREG instructions.
/// E.g., on ARM,
/// rX, rY VMOVRRD dZ
@@ -358,7 +363,7 @@
return Flags & (1ULL << MCID::ExtractSubreg);
}
- /// \brief Return true if this instruction behaves
+ /// Return true if this instruction behaves
/// the same way as the generic INSERT_SUBREG instructions.
/// E.g., on ARM,
/// dX = VSETLNi32 dY, rZ, Imm
@@ -371,7 +376,7 @@
bool isInsertSubregLike() const { return Flags & (1ULL << MCID::InsertSubreg); }
- /// \brief Return true if this instruction is convergent.
+ /// Return true if this instruction is convergent.
///
/// Convergent instructions may not be made control-dependent on any
/// additional values.
@@ -381,18 +386,18 @@
// Side Effect Analysis
//===--------------------------------------------------------------------===//
- /// \brief Return true if this instruction could possibly read memory.
+ /// Return true if this instruction could possibly read memory.
/// Instructions with this flag set are not necessarily simple load
/// instructions, they may load a value and modify it, for example.
bool mayLoad() const { return Flags & (1ULL << MCID::MayLoad); }
- /// \brief Return true if this instruction could possibly modify memory.
+ /// Return true if this instruction could possibly modify memory.
/// Instructions with this flag set are not necessarily simple store
/// instructions, they may store a modified value based on their operands, or
/// may not actually modify anything, for example.
bool mayStore() const { return Flags & (1ULL << MCID::MayStore); }
- /// \brief Return true if this instruction has side
+ /// Return true if this instruction has side
/// effects that are not modeled by other flags. This does not return true
/// for instructions whose effects are captured by:
///
@@ -412,7 +417,7 @@
// Flags that indicate whether an instruction can be modified by a method.
//===--------------------------------------------------------------------===//
- /// \brief Return true if this may be a 2- or 3-address instruction (of the
+ /// Return true if this may be a 2- or 3-address instruction (of the
/// form "X = op Y, Z, ..."), which produces the same result if Y and Z are
/// exchanged. If this flag is set, then the
/// TargetInstrInfo::commuteInstruction method may be used to hack on the
@@ -424,7 +429,7 @@
/// commute them.
bool isCommutable() const { return Flags & (1ULL << MCID::Commutable); }
- /// \brief Return true if this is a 2-address instruction which can be changed
+ /// Return true if this is a 2-address instruction which can be changed
/// into a 3-address instruction if needed. Doing this transformation can be
/// profitable in the register allocator, because it means that the
/// instruction can use a 2-address form if possible, but degrade into a less
@@ -442,7 +447,7 @@
return Flags & (1ULL << MCID::ConvertibleTo3Addr);
}
- /// \brief Return true if this instruction requires custom insertion support
+ /// Return true if this instruction requires custom insertion support
/// when the DAG scheduler is inserting it into a machine basic block. If
/// this is true for the instruction, it basically means that it is a pseudo
/// instruction used at SelectionDAG time that is expanded out into magic code
@@ -454,13 +459,13 @@
return Flags & (1ULL << MCID::UsesCustomInserter);
}
- /// \brief Return true if this instruction requires *adjustment* after
+ /// Return true if this instruction requires *adjustment* after
/// instruction selection by calling a target hook. For example, this can be
/// used to fill in ARM 's' optional operand depending on whether the
/// conditional flag register is used.
bool hasPostISelHook() const { return Flags & (1ULL << MCID::HasPostISelHook); }
- /// \brief Returns true if this instruction is a candidate for remat. This
+ /// Returns true if this instruction is a candidate for remat. This
/// flag is only used in TargetInstrInfo method isTriviallyRematerializable.
///
/// If this flag is set, the isReallyTriviallyReMaterializable()
@@ -470,7 +475,7 @@
return Flags & (1ULL << MCID::Rematerializable);
}
- /// \brief Returns true if this instruction has the same cost (or less) than a
+ /// Returns true if this instruction has the same cost (or less) than a
/// move instruction. This is useful during certain types of optimizations
/// (e.g., remat during two-address conversion or machine licm) where we would
/// like to remat or hoist the instruction, but not if it costs more than
@@ -481,7 +486,7 @@
/// for different subtargets.
bool isAsCheapAsAMove() const { return Flags & (1ULL << MCID::CheapAsAMove); }
- /// \brief Returns true if this instruction source operands have special
+ /// Returns true if this instruction source operands have special
/// register allocation requirements that are not captured by the operand
/// register classes. e.g. ARM::STRD's two source registers must be an even /
/// odd pair, ARM::STM registers have to be in ascending order. Post-register
@@ -491,7 +496,7 @@
return Flags & (1ULL << MCID::ExtraSrcRegAllocReq);
}
- /// \brief Returns true if this instruction def operands have special register
+ /// Returns true if this instruction def operands have special register
/// allocation requirements that are not captured by the operand register
/// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
/// ARM::LDM registers have to be in ascending order. Post-register
@@ -501,7 +506,7 @@
return Flags & (1ULL << MCID::ExtraDefRegAllocReq);
}
- /// \brief Return a list of registers that are potentially read by any
+ /// Return a list of registers that are potentially read by any
/// instance of this machine instruction. For example, on X86, the "adc"
/// instruction adds two register operands and adds the carry bit in from the
/// flags register. In this case, the instruction is marked as implicitly
@@ -511,7 +516,7 @@
/// This method returns null if the instruction has no implicit uses.
const MCPhysReg *getImplicitUses() const { return ImplicitUses; }
- /// \brief Return the number of implicit uses this instruction has.
+ /// Return the number of implicit uses this instruction has.
unsigned getNumImplicitUses() const {
if (!ImplicitUses)
return 0;
@@ -521,7 +526,7 @@
return i;
}
- /// \brief Return a list of registers that are potentially written by any
+ /// Return a list of registers that are potentially written by any
/// instance of this machine instruction. For example, on X86, many
/// instructions implicitly set the flags register. In this case, they are
/// marked as setting the FLAGS. Likewise, many instructions always deposit
@@ -533,7 +538,7 @@
/// This method returns null if the instruction has no implicit defs.
const MCPhysReg *getImplicitDefs() const { return ImplicitDefs; }
- /// \brief Return the number of implicit defs this instruct has.
+ /// Return the number of implicit defs this instruct has.
unsigned getNumImplicitDefs() const {
if (!ImplicitDefs)
return 0;
@@ -543,7 +548,7 @@
return i;
}
- /// \brief Return true if this instruction implicitly
+ /// Return true if this instruction implicitly
/// uses the specified physical register.
bool hasImplicitUseOfPhysReg(unsigned Reg) const {
if (const MCPhysReg *ImpUses = ImplicitUses)
@@ -553,22 +558,22 @@
return false;
}
- /// \brief Return true if this instruction implicitly
+ /// Return true if this instruction implicitly
/// defines the specified physical register.
bool hasImplicitDefOfPhysReg(unsigned Reg,
const MCRegisterInfo *MRI = nullptr) const;
- /// \brief Return the scheduling class for this instruction. The
+ /// Return the scheduling class for this instruction. The
/// scheduling class is an index into the InstrItineraryData table. This
/// returns zero if there is no known scheduling information for the
/// instruction.
unsigned getSchedClass() const { return SchedClass; }
- /// \brief Return the number of bytes in the encoding of this instruction,
+ /// Return the number of bytes in the encoding of this instruction,
/// or zero if the encoding size cannot be known from the opcode.
unsigned getSize() const { return Size; }
- /// \brief Find the index of the first operand in the
+ /// Find the index of the first operand in the
/// operand list that is used to represent the predicate. It returns -1 if
/// none is found.
int findFirstPredOperandIdx() const {
@@ -580,7 +585,7 @@
return -1;
}
- /// \brief Return true if this instruction defines the specified physical
+ /// Return true if this instruction defines the specified physical
/// register, either explicitly or implicitly.
bool hasDefOfPhysReg(const MCInst &MI, unsigned Reg,
const MCRegisterInfo &RI) const;
diff --git a/linux-x64/clang/include/llvm/MC/MCInstrInfo.h b/linux-x64/clang/include/llvm/MC/MCInstrInfo.h
index 80f1f32..18da87c 100644
--- a/linux-x64/clang/include/llvm/MC/MCInstrInfo.h
+++ b/linux-x64/clang/include/llvm/MC/MCInstrInfo.h
@@ -20,7 +20,7 @@
namespace llvm {
//---------------------------------------------------------------------------
-/// \brief Interface to description of machine instruction set.
+/// Interface to description of machine instruction set.
class MCInstrInfo {
const MCInstrDesc *Desc; // Raw array to allow static init'n
const unsigned *InstrNameIndices; // Array for name indices in InstrNameData
@@ -28,7 +28,7 @@
unsigned NumOpcodes; // Number of entries in the desc array
public:
- /// \brief Initialize MCInstrInfo, called by TableGen auto-generated routines.
+ /// Initialize MCInstrInfo, called by TableGen auto-generated routines.
/// *DO NOT USE*.
void InitMCInstrInfo(const MCInstrDesc *D, const unsigned *NI, const char *ND,
unsigned NO) {
@@ -40,14 +40,14 @@
unsigned getNumOpcodes() const { return NumOpcodes; }
- /// \brief Return the machine instruction descriptor that corresponds to the
+ /// Return the machine instruction descriptor that corresponds to the
/// specified instruction opcode.
const MCInstrDesc &get(unsigned Opcode) const {
assert(Opcode < NumOpcodes && "Invalid opcode!");
return Desc[Opcode];
}
- /// \brief Returns the name for the instructions with the given opcode.
+ /// Returns the name for the instructions with the given opcode.
StringRef getName(unsigned Opcode) const {
assert(Opcode < NumOpcodes && "Invalid opcode!");
return StringRef(&InstrNameData[InstrNameIndices[Opcode]]);
diff --git a/linux-x64/clang/include/llvm/MC/MCInstrItineraries.h b/linux-x64/clang/include/llvm/MC/MCInstrItineraries.h
index f0824e7..fe81376 100644
--- a/linux-x64/clang/include/llvm/MC/MCInstrItineraries.h
+++ b/linux-x64/clang/include/llvm/MC/MCInstrItineraries.h
@@ -67,12 +67,12 @@
int NextCycles_; ///< Number of machine cycles to next stage
ReservationKinds Kind_; ///< Kind of the FU reservation
- /// \brief Returns the number of cycles the stage is occupied.
+ /// Returns the number of cycles the stage is occupied.
unsigned getCycles() const {
return Cycles_;
}
- /// \brief Returns the choice of FUs.
+ /// Returns the choice of FUs.
unsigned getUnits() const {
return Units_;
}
@@ -81,7 +81,7 @@
return Kind_;
}
- /// \brief Returns the number of cycles from the start of this stage to the
+ /// Returns the number of cycles from the start of this stage to the
/// start of the next stage in the itinerary
unsigned getNextCycles() const {
return (NextCycles_ >= 0) ? (unsigned)NextCycles_ : Cycles_;
@@ -120,28 +120,28 @@
: SchedModel(SM), Stages(S), OperandCycles(OS), Forwardings(F),
Itineraries(SchedModel.InstrItineraries) {}
- /// \brief Returns true if there are no itineraries.
+ /// Returns true if there are no itineraries.
bool isEmpty() const { return Itineraries == nullptr; }
- /// \brief Returns true if the index is for the end marker itinerary.
+ /// Returns true if the index is for the end marker itinerary.
bool isEndMarker(unsigned ItinClassIndx) const {
return ((Itineraries[ItinClassIndx].FirstStage == UINT16_MAX) &&
(Itineraries[ItinClassIndx].LastStage == UINT16_MAX));
}
- /// \brief Return the first stage of the itinerary.
+ /// Return the first stage of the itinerary.
const InstrStage *beginStage(unsigned ItinClassIndx) const {
unsigned StageIdx = Itineraries[ItinClassIndx].FirstStage;
return Stages + StageIdx;
}
- /// \brief Return the last+1 stage of the itinerary.
+ /// Return the last+1 stage of the itinerary.
const InstrStage *endStage(unsigned ItinClassIndx) const {
unsigned StageIdx = Itineraries[ItinClassIndx].LastStage;
return Stages + StageIdx;
}
- /// \brief Return the total stage latency of the given class. The latency is
+ /// Return the total stage latency of the given class. The latency is
/// the maximum completion time for any stage in the itinerary. If no stages
/// exist, it defaults to one cycle.
unsigned getStageLatency(unsigned ItinClassIndx) const {
@@ -160,7 +160,7 @@
return Latency;
}
- /// \brief Return the cycle for the given class and operand. Return -1 if no
+ /// Return the cycle for the given class and operand. Return -1 if no
/// cycle is specified for the operand.
int getOperandCycle(unsigned ItinClassIndx, unsigned OperandIdx) const {
if (isEmpty())
@@ -174,7 +174,7 @@
return (int)OperandCycles[FirstIdx + OperandIdx];
}
- /// \brief Return true if there is a pipeline forwarding between instructions
+ /// Return true if there is a pipeline forwarding between instructions
/// of itinerary classes DefClass and UseClasses so that value produced by an
/// instruction of itinerary class DefClass, operand index DefIdx can be
/// bypassed when it's read by an instruction of itinerary class UseClass,
@@ -197,7 +197,7 @@
Forwardings[FirstUseIdx + UseIdx];
}
- /// \brief Compute and return the use operand latency of a given itinerary
+ /// Compute and return the use operand latency of a given itinerary
/// class and operand index if the value is produced by an instruction of the
/// specified itinerary class and def operand index.
int getOperandLatency(unsigned DefClass, unsigned DefIdx,
@@ -221,7 +221,7 @@
return UseCycle;
}
- /// \brief Return the number of micro-ops that the given class decodes to.
+ /// Return the number of micro-ops that the given class decodes to.
/// Return -1 for classes that require dynamic lookup via TargetInstrInfo.
int getNumMicroOps(unsigned ItinClassIndx) const {
if (isEmpty())
diff --git a/linux-x64/clang/include/llvm/MC/MCLabel.h b/linux-x64/clang/include/llvm/MC/MCLabel.h
index b6579fd..aaf7069 100644
--- a/linux-x64/clang/include/llvm/MC/MCLabel.h
+++ b/linux-x64/clang/include/llvm/MC/MCLabel.h
@@ -18,11 +18,11 @@
class raw_ostream;
-/// \brief Instances of this class represent a label name in the MC file,
+/// Instances of this class represent a label name in the MC file,
/// and MCLabel are created and uniqued by the MCContext class. MCLabel
/// should only be constructed for valid instances in the object file.
class MCLabel {
- // \brief The instance number of this Directional Local Label.
+ // The instance number of this Directional Local Label.
unsigned Instance;
private: // MCContext creates and uniques these.
@@ -34,16 +34,16 @@
MCLabel(const MCLabel &) = delete;
MCLabel &operator=(const MCLabel &) = delete;
- /// \brief Get the current instance of this Directional Local Label.
+ /// Get the current instance of this Directional Local Label.
unsigned getInstance() const { return Instance; }
- /// \brief Increment the current instance of this Directional Local Label.
+ /// Increment the current instance of this Directional Local Label.
unsigned incInstance() { return ++Instance; }
- /// \brief Print the value to the stream \p OS.
+ /// Print the value to the stream \p OS.
void print(raw_ostream &OS) const;
- /// \brief Print the value to stderr.
+ /// Print the value to stderr.
void dump() const;
};
diff --git a/linux-x64/clang/include/llvm/MC/MCMachObjectWriter.h b/linux-x64/clang/include/llvm/MC/MCMachObjectWriter.h
index 594869f..22fbeb7 100644
--- a/linux-x64/clang/include/llvm/MC/MCMachObjectWriter.h
+++ b/linux-x64/clang/include/llvm/MC/MCMachObjectWriter.h
@@ -26,7 +26,7 @@
class MachObjectWriter;
-class MCMachObjectTargetWriter {
+class MCMachObjectTargetWriter : public MCObjectTargetWriter {
const unsigned Is64Bit : 1;
const uint32_t CPUType;
const uint32_t CPUSubtype;
@@ -43,6 +43,11 @@
public:
virtual ~MCMachObjectTargetWriter();
+ virtual Triple::ObjectFormatType getFormat() const { return Triple::MachO; }
+ static bool classof(const MCObjectTargetWriter *W) {
+ return W->getFormat() == Triple::MachO;
+ }
+
/// \name Lifetime Management
/// @{
@@ -116,11 +121,15 @@
MachSymbolData *findSymbolData(const MCSymbol &Sym);
+ void writeWithPadding(StringRef Str, uint64_t Size);
+
public:
MachObjectWriter(std::unique_ptr<MCMachObjectTargetWriter> MOTW,
raw_pwrite_stream &OS, bool IsLittleEndian)
- : MCObjectWriter(OS, IsLittleEndian),
- TargetObjectWriter(std::move(MOTW)) {}
+ : TargetObjectWriter(std::move(MOTW)),
+ W(OS, IsLittleEndian ? support::little : support::big) {}
+
+ support::endian::Writer W;
const MCSymbol &findAliasedSymbol(const MCSymbol &Sym) const;
@@ -260,7 +269,7 @@
const MCFragment &FB, bool InSet,
bool IsPCRel) const override;
- void writeObject(MCAssembler &Asm, const MCAsmLayout &Layout) override;
+ uint64_t writeObject(MCAssembler &Asm, const MCAsmLayout &Layout) override;
};
/// Construct a new Mach-O writer instance.
diff --git a/linux-x64/clang/include/llvm/MC/MCObjectFileInfo.h b/linux-x64/clang/include/llvm/MC/MCObjectFileInfo.h
index c99f252..8cf9e1c 100644
--- a/linux-x64/clang/include/llvm/MC/MCObjectFileInfo.h
+++ b/linux-x64/clang/include/llvm/MC/MCObjectFileInfo.h
@@ -14,7 +14,9 @@
#ifndef LLVM_MC_MCOBJECTFILEINFO_H
#define LLVM_MC_MCOBJECTFILEINFO_H
+#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/Triple.h"
+#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/CodeGen.h"
namespace llvm {
@@ -40,12 +42,11 @@
/// dwarf unwind.
bool OmitDwarfIfHaveCompactUnwind;
- /// PersonalityEncoding, LSDAEncoding, TTypeEncoding - Some encoding values
- /// for EH.
- unsigned PersonalityEncoding;
- unsigned LSDAEncoding;
- unsigned FDECFIEncoding;
- unsigned TTypeEncoding;
+ /// FDE CFI encoding. Controls the encoding of the begin label in the
+ /// .eh_frame section. Unlike the LSDA encoding, personality encoding, and
+ /// type encodings, this is something that the assembler just "knows" about
+ /// its target
+ unsigned FDECFIEncoding = 0;
/// Compact unwind encoding indicating that we should emit only an EH frame.
unsigned CompactUnwindDwarfEHFrameOnly;
@@ -92,11 +93,11 @@
// can be enabled by a compiler flag.
MCSection *DwarfPubNamesSection;
- /// DWARF5 Experimental Debug Info Sections
- /// DwarfAccelNamesSection, DwarfAccelObjCSection,
- /// DwarfAccelNamespaceSection, DwarfAccelTypesSection -
- /// If we use the DWARF accelerated hash tables then we want to emit these
- /// sections.
+ /// Accelerator table sections. DwarfDebugNamesSection is the DWARF v5
+ /// accelerator table, while DwarfAccelNamesSection, DwarfAccelObjCSection,
+ /// DwarfAccelNamespaceSection, DwarfAccelTypesSection are pre-DWARF v5
+ /// extensions.
+ MCSection *DwarfDebugNamesSection;
MCSection *DwarfAccelNamesSection;
MCSection *DwarfAccelObjCSection;
MCSection *DwarfAccelNamespaceSection;
@@ -114,6 +115,11 @@
/// The DWARF v5 string offset and address table sections.
MCSection *DwarfStrOffSection;
MCSection *DwarfAddrSection;
+ /// The DWARF v5 range list section.
+ MCSection *DwarfRnglistsSection;
+
+ /// The DWARF v5 range list section for fission.
+ MCSection *DwarfRnglistsDWOSection;
// These are for Fission DWP files.
MCSection *DwarfCUIndexSection;
@@ -158,6 +164,7 @@
/// Section containing metadata on function stack sizes.
MCSection *StackSizesSection;
+ mutable DenseMap<const MCSymbol *, unsigned> StackSizesUniquing;
// ELF specific sections.
MCSection *DataRelROSection;
@@ -183,6 +190,7 @@
MCSection *ConstTextCoalSection;
MCSection *ConstDataSection;
MCSection *DataCoalSection;
+ MCSection *ConstDataCoalSection;
MCSection *DataCommonSection;
MCSection *DataBSSSection;
MCSection *FourByteConstantSection;
@@ -217,10 +225,7 @@
return CommDirectiveSupportsAlignment;
}
- unsigned getPersonalityEncoding() const { return PersonalityEncoding; }
- unsigned getLSDAEncoding() const { return LSDAEncoding; }
unsigned getFDEEncoding() const { return FDECFIEncoding; }
- unsigned getTTypeEncoding() const { return TTypeEncoding; }
unsigned getCompactUnwindDwarfEHFrameOnly() const {
return CompactUnwindDwarfEHFrameOnly;
@@ -252,9 +257,12 @@
MCSection *getDwarfLocSection() const { return DwarfLocSection; }
MCSection *getDwarfARangesSection() const { return DwarfARangesSection; }
MCSection *getDwarfRangesSection() const { return DwarfRangesSection; }
+ MCSection *getDwarfRnglistsSection() const { return DwarfRnglistsSection; }
MCSection *getDwarfMacinfoSection() const { return DwarfMacinfoSection; }
- // DWARF5 Experimental Debug Info Sections
+ MCSection *getDwarfDebugNamesSection() const {
+ return DwarfDebugNamesSection;
+ }
MCSection *getDwarfAccelNamesSection() const {
return DwarfAccelNamesSection;
}
@@ -275,6 +283,9 @@
MCSection *getDwarfStrOffDWOSection() const { return DwarfStrOffDWOSection; }
MCSection *getDwarfStrOffSection() const { return DwarfStrOffSection; }
MCSection *getDwarfAddrSection() const { return DwarfAddrSection; }
+ MCSection *getDwarfRnglistsDWOSection() const {
+ return DwarfRnglistsDWOSection;
+ }
MCSection *getDwarfCUIndexSection() const { return DwarfCUIndexSection; }
MCSection *getDwarfTUIndexSection() const { return DwarfTUIndexSection; }
MCSection *getDwarfSwiftASTSection() const { return DwarfSwiftASTSection; }
@@ -296,7 +307,7 @@
MCSection *getStackMapSection() const { return StackMapSection; }
MCSection *getFaultMapSection() const { return FaultMapSection; }
- MCSection *getStackSizesSection() const { return StackSizesSection; }
+ MCSection *getStackSizesSection(const MCSection &TextSec) const;
// ELF specific sections.
MCSection *getDataRelROSection() const { return DataRelROSection; }
@@ -326,6 +337,9 @@
}
const MCSection *getConstDataSection() const { return ConstDataSection; }
const MCSection *getDataCoalSection() const { return DataCoalSection; }
+ const MCSection *getConstDataCoalSection() const {
+ return ConstDataCoalSection;
+ }
const MCSection *getDataCommonSection() const { return DataCommonSection; }
MCSection *getDataBSSSection() const { return DataBSSSection; }
const MCSection *getFourByteConstantSection() const {
diff --git a/linux-x64/clang/include/llvm/MC/MCObjectStreamer.h b/linux-x64/clang/include/llvm/MC/MCObjectStreamer.h
index 8e9b4ac..035206d 100644
--- a/linux-x64/clang/include/llvm/MC/MCObjectStreamer.h
+++ b/linux-x64/clang/include/llvm/MC/MCObjectStreamer.h
@@ -26,7 +26,7 @@
class raw_ostream;
class raw_pwrite_stream;
-/// \brief Streaming object file generation interface.
+/// Streaming object file generation interface.
///
/// This class provides an implementation of the MCStreamer interface which is
/// suitable for use with the assembler backend. Specific object file formats
@@ -34,9 +34,6 @@
/// to that file format or custom semantics expected by the object writer
/// implementation.
class MCObjectStreamer : public MCStreamer {
- std::unique_ptr<MCObjectWriter> ObjectWriter;
- std::unique_ptr<MCAsmBackend> TAB;
- std::unique_ptr<MCCodeEmitter> Emitter;
std::unique_ptr<MCAssembler> Assembler;
MCSection::iterator CurInsertionPoint;
bool EmitEHFrame;
@@ -51,7 +48,7 @@
protected:
MCObjectStreamer(MCContext &Context, std::unique_ptr<MCAsmBackend> TAB,
- raw_pwrite_stream &OS,
+ std::unique_ptr<MCObjectWriter> OW,
std::unique_ptr<MCCodeEmitter> Emitter);
~MCObjectStreamer();
@@ -76,7 +73,9 @@
/// Get a data fragment to write into, creating a new one if the current
/// fragment is not a data fragment.
- MCDataFragment *getOrCreateDataFragment();
+ /// Optionally a \p STI can be passed in so that a new fragment is created
+ /// if the Subtarget differs from the current fragment.
+ MCDataFragment *getOrCreateDataFragment(const MCSubtargetInfo* STI = nullptr);
MCPaddingFragment *getOrCreatePaddingFragment();
protected:
@@ -91,8 +90,11 @@
public:
void visitUsedSymbol(const MCSymbol &Sym) override;
- MCAssembler &getAssembler() { return *Assembler; }
+ /// Create a dummy fragment to assign any pending labels.
+ void flushPendingLabels() { flushPendingLabels(nullptr); }
+ MCAssembler &getAssembler() { return *Assembler; }
+ MCAssembler *getAssemblerPtr() override;
/// \name MCStreamer Interface
/// @{
@@ -108,7 +110,7 @@
void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
bool = false) override;
- /// \brief Emit an instruction to a special fragment, because this instruction
+ /// Emit an instruction to a special fragment, because this instruction
/// can change its size during relaxation.
virtual void EmitInstToFragment(const MCInst &Inst, const MCSubtargetInfo &);
@@ -159,7 +161,8 @@
void EmitGPRel32Value(const MCExpr *Value) override;
void EmitGPRel64Value(const MCExpr *Value) override;
bool EmitRelocDirective(const MCExpr &Offset, StringRef Name,
- const MCExpr *Expr, SMLoc Loc) override;
+ const MCExpr *Expr, SMLoc Loc,
+ const MCSubtargetInfo &STI) override;
using MCStreamer::emitFill;
void emitFill(const MCExpr &NumBytes, uint64_t FillValue,
SMLoc Loc = SMLoc()) override;
@@ -167,6 +170,9 @@
SMLoc Loc = SMLoc()) override;
void EmitFileDirective(StringRef Filename) override;
+ void EmitAddrsig() override;
+ void EmitAddrsigSym(const MCSymbol *Sym) override;
+
void FinishImpl() override;
/// Emit the absolute difference between two symbols if possible.
diff --git a/linux-x64/clang/include/llvm/MC/MCObjectWriter.h b/linux-x64/clang/include/llvm/MC/MCObjectWriter.h
index cd90690..8bae2bf 100644
--- a/linux-x64/clang/include/llvm/MC/MCObjectWriter.h
+++ b/linux-x64/clang/include/llvm/MC/MCObjectWriter.h
@@ -12,6 +12,7 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/Triple.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/raw_ostream.h"
@@ -36,22 +37,9 @@
/// points. Once assembly is complete, the object writer is given the
/// MCAssembler instance, which contains all the symbol and section data which
/// should be emitted as part of writeObject().
-///
-/// The object writer also contains a number of helper methods for writing
-/// binary data to the output stream.
class MCObjectWriter {
- raw_pwrite_stream *OS;
-
protected:
- unsigned IsLittleEndian : 1;
-
- // Can only create subclasses.
- MCObjectWriter(raw_pwrite_stream &OS, bool IsLittleEndian)
- : OS(&OS), IsLittleEndian(IsLittleEndian) {}
-
- unsigned getInitialOffset() {
- return OS->tell();
- }
+ MCObjectWriter() = default;
public:
MCObjectWriter(const MCObjectWriter &) = delete;
@@ -61,11 +49,6 @@
/// lifetime management
virtual void reset() {}
- bool isLittleEndian() const { return IsLittleEndian; }
-
- raw_pwrite_stream &getStream() { return *OS; }
- void setStream(raw_pwrite_stream &NewOS) { OS = &NewOS; }
-
/// \name High-Level API
/// @{
@@ -109,90 +92,31 @@
bool InSet,
bool IsPCRel) const;
- /// Write the object file.
+ /// Tell the object writer to emit an address-significance table during
+ /// writeObject(). If this function is not called, all symbols are treated as
+ /// address-significant.
+ virtual void emitAddrsigSection() {}
+
+ /// Record the given symbol in the address-significance table to be written
+ /// diring writeObject().
+ virtual void addAddrsigSymbol(const MCSymbol *Sym) {}
+
+ /// Write the object file and returns the number of bytes written.
///
/// This routine is called by the assembler after layout and relaxation is
/// complete, fixups have been evaluated and applied, and relocations
/// generated.
- virtual void writeObject(MCAssembler &Asm, const MCAsmLayout &Layout) = 0;
+ virtual uint64_t writeObject(MCAssembler &Asm, const MCAsmLayout &Layout) = 0;
/// @}
- /// \name Binary Output
- /// @{
+};
- void write8(uint8_t Value) { *OS << char(Value); }
-
- void writeLE16(uint16_t Value) {
- support::endian::Writer<support::little>(*OS).write(Value);
- }
-
- void writeLE32(uint32_t Value) {
- support::endian::Writer<support::little>(*OS).write(Value);
- }
-
- void writeLE64(uint64_t Value) {
- support::endian::Writer<support::little>(*OS).write(Value);
- }
-
- void writeBE16(uint16_t Value) {
- support::endian::Writer<support::big>(*OS).write(Value);
- }
-
- void writeBE32(uint32_t Value) {
- support::endian::Writer<support::big>(*OS).write(Value);
- }
-
- void writeBE64(uint64_t Value) {
- support::endian::Writer<support::big>(*OS).write(Value);
- }
-
- void write16(uint16_t Value) {
- if (IsLittleEndian)
- writeLE16(Value);
- else
- writeBE16(Value);
- }
-
- void write32(uint32_t Value) {
- if (IsLittleEndian)
- writeLE32(Value);
- else
- writeBE32(Value);
- }
-
- void write64(uint64_t Value) {
- if (IsLittleEndian)
- writeLE64(Value);
- else
- writeBE64(Value);
- }
-
- void WriteZeros(unsigned N) {
- const char Zeros[16] = {0};
-
- for (unsigned i = 0, e = N / 16; i != e; ++i)
- *OS << StringRef(Zeros, 16);
-
- *OS << StringRef(Zeros, N % 16);
- }
-
- void writeBytes(const SmallVectorImpl<char> &ByteVec,
- unsigned ZeroFillSize = 0) {
- writeBytes(StringRef(ByteVec.data(), ByteVec.size()), ZeroFillSize);
- }
-
- void writeBytes(StringRef Str, unsigned ZeroFillSize = 0) {
- // TODO: this version may need to go away once all fragment contents are
- // converted to SmallVector<char, N>
- assert(
- (ZeroFillSize == 0 || Str.size() <= ZeroFillSize) &&
- "data size greater than fill size, unexpected large write will occur");
- *OS << Str;
- if (ZeroFillSize)
- WriteZeros(ZeroFillSize - Str.size());
- }
-
- /// @}
+/// Base class for classes that define behaviour that is specific to both the
+/// target and the object format.
+class MCObjectTargetWriter {
+public:
+ virtual ~MCObjectTargetWriter() = default;
+ virtual Triple::ObjectFormatType getFormat() const = 0;
};
} // end namespace llvm
diff --git a/linux-x64/clang/include/llvm/MC/MCParser/AsmCond.h b/linux-x64/clang/include/llvm/MC/MCParser/AsmCond.h
index 8e7bfc5..a6e0fbd 100644
--- a/linux-x64/clang/include/llvm/MC/MCParser/AsmCond.h
+++ b/linux-x64/clang/include/llvm/MC/MCParser/AsmCond.h
@@ -15,7 +15,7 @@
/// AsmCond - Class to support conditional assembly
///
/// The conditional assembly feature (.if, .else, .elseif and .endif) is
-/// implemented with AsmCond that tells us what we are in the middle of
+/// implemented with AsmCond that tells us what we are in the middle of
/// processing. Ignore can be either true or false. When true we are ignoring
/// the block of code in the middle of a conditional.
diff --git a/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParser.h b/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParser.h
index 0f79c47..0d56f36 100644
--- a/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParser.h
+++ b/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParser.h
@@ -91,7 +91,7 @@
IdKind Kind;
};
-/// \brief Generic Sema callback for assembly parser.
+/// Generic Sema callback for assembly parser.
class MCAsmParserSemaCallback {
public:
virtual ~MCAsmParserSemaCallback();
@@ -105,7 +105,7 @@
unsigned &Offset) = 0;
};
-/// \brief Generic assembler parser interface, for use by target specific
+/// Generic assembler parser interface, for use by target specific
/// assembly parsers.
class MCAsmParser {
public:
@@ -153,7 +153,7 @@
virtual MCContext &getContext() = 0;
- /// \brief Return the output streamer for the assembler.
+ /// Return the output streamer for the assembler.
virtual MCStreamer &getStreamer() = 0;
MCTargetAsmParser &getTargetParser() const { return *TargetParser; }
@@ -168,13 +168,13 @@
void setEnablePrintSchedInfo(bool Value) { EnablePrintSchedInfo = Value; }
bool shouldPrintSchedInfo() { return EnablePrintSchedInfo; }
- /// \brief Run the parser on the input source buffer.
+ /// Run the parser on the input source buffer.
virtual bool Run(bool NoInitialTextSection, bool NoFinalize = false) = 0;
virtual void setParsingInlineAsm(bool V) = 0;
virtual bool isParsingInlineAsm() = 0;
- /// \brief Parse MS-style inline assembly.
+ /// Parse MS-style inline assembly.
virtual bool parseMSInlineAsm(
void *AsmLoc, std::string &AsmString, unsigned &NumOutputs,
unsigned &NumInputs, SmallVectorImpl<std::pair<void *, bool>> &OpDecls,
@@ -182,22 +182,22 @@
SmallVectorImpl<std::string> &Clobbers, const MCInstrInfo *MII,
const MCInstPrinter *IP, MCAsmParserSemaCallback &SI) = 0;
- /// \brief Emit a note at the location \p L, with the message \p Msg.
+ /// Emit a note at the location \p L, with the message \p Msg.
virtual void Note(SMLoc L, const Twine &Msg, SMRange Range = None) = 0;
- /// \brief Emit a warning at the location \p L, with the message \p Msg.
+ /// Emit a warning at the location \p L, with the message \p Msg.
///
/// \return The return value is true, if warnings are fatal.
virtual bool Warning(SMLoc L, const Twine &Msg, SMRange Range = None) = 0;
- /// \brief Return an error at the location \p L, with the message \p Msg. This
+ /// Return an error at the location \p L, with the message \p Msg. This
/// may be modified before being emitted.
///
/// \return The return value is always true, as an idiomatic convenience to
/// clients.
bool Error(SMLoc L, const Twine &Msg, SMRange Range = None);
- /// \brief Emit an error at the location \p L, with the message \p Msg.
+ /// Emit an error at the location \p L, with the message \p Msg.
///
/// \return The return value is always true, as an idiomatic convenience to
/// clients.
@@ -214,21 +214,23 @@
return rv;
}
+ void clearPendingErrors() { PendingErrors.clear(); }
+
bool addErrorSuffix(const Twine &Suffix);
- /// \brief Get the next AsmToken in the stream, possibly handling file
+ /// Get the next AsmToken in the stream, possibly handling file
/// inclusion first.
virtual const AsmToken &Lex() = 0;
- /// \brief Get the current AsmToken from the stream.
+ /// Get the current AsmToken from the stream.
const AsmToken &getTok() const;
- /// \brief Report an error at the current lexer location.
+ /// Report an error at the current lexer location.
bool TokError(const Twine &Msg, SMRange Range = None);
bool parseTokenLoc(SMLoc &Loc);
bool parseToken(AsmToken::TokenKind T, const Twine &Msg = "unexpected token");
- /// \brief Attempt to parse and consume token, returning true on
+ /// Attempt to parse and consume token, returning true on
/// success.
bool parseOptionalToken(AsmToken::TokenKind T);
@@ -241,23 +243,23 @@
bool check(bool P, const Twine &Msg);
bool check(bool P, SMLoc Loc, const Twine &Msg);
- /// \brief Parse an identifier or string (as a quoted identifier) and set \p
+ /// Parse an identifier or string (as a quoted identifier) and set \p
/// Res to the identifier contents.
virtual bool parseIdentifier(StringRef &Res) = 0;
- /// \brief Parse up to the end of statement and return the contents from the
+ /// Parse up to the end of statement and return the contents from the
/// current token until the end of the statement; the current token on exit
/// will be either the EndOfStatement or EOF.
virtual StringRef parseStringToEndOfStatement() = 0;
- /// \brief Parse the current token as a string which may include escaped
+ /// Parse the current token as a string which may include escaped
/// characters and return the string contents.
virtual bool parseEscapedString(std::string &Data) = 0;
- /// \brief Skip to the end of the current statement, for error recovery.
+ /// Skip to the end of the current statement, for error recovery.
virtual void eatToEndOfStatement() = 0;
- /// \brief Parse an arbitrary expression.
+ /// Parse an arbitrary expression.
///
/// \param Res - The value of the expression. The result is undefined
/// on error.
@@ -265,14 +267,14 @@
virtual bool parseExpression(const MCExpr *&Res, SMLoc &EndLoc) = 0;
bool parseExpression(const MCExpr *&Res);
- /// \brief Parse a primary expression.
+ /// Parse a primary expression.
///
/// \param Res - The value of the expression. The result is undefined
/// on error.
/// \return - False on success.
virtual bool parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) = 0;
- /// \brief Parse an arbitrary expression, assuming that an initial '(' has
+ /// Parse an arbitrary expression, assuming that an initial '(' has
/// already been consumed.
///
/// \param Res - The value of the expression. The result is undefined
@@ -280,19 +282,19 @@
/// \return - False on success.
virtual bool parseParenExpression(const MCExpr *&Res, SMLoc &EndLoc) = 0;
- /// \brief Parse an expression which must evaluate to an absolute value.
+ /// Parse an expression which must evaluate to an absolute value.
///
/// \param Res - The value of the absolute expression. The result is undefined
/// on error.
/// \return - False on success.
virtual bool parseAbsoluteExpression(int64_t &Res) = 0;
- /// \brief Ensure that we have a valid section set in the streamer. Otherwise,
+ /// Ensure that we have a valid section set in the streamer. Otherwise,
/// report an error and switch to .text.
/// \return - False on success.
virtual bool checkForValidSection() = 0;
- /// \brief Parse an arbitrary expression of a specified parenthesis depth,
+ /// Parse an arbitrary expression of a specified parenthesis depth,
/// assuming that the initial '(' characters have already been consumed.
///
/// \param ParenDepth - Specifies how many trailing expressions outside the
@@ -304,7 +306,7 @@
SMLoc &EndLoc) = 0;
};
-/// \brief Create an MCAsmParser instance.
+/// Create an MCAsmParser instance.
MCAsmParser *createMCAsmParser(SourceMgr &, MCContext &, MCStreamer &,
const MCAsmInfo &, unsigned CB = 0);
diff --git a/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParserExtension.h b/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParserExtension.h
index ffb8d7a..1a132bc 100644
--- a/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParserExtension.h
+++ b/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParserExtension.h
@@ -20,7 +20,7 @@
class Twine;
-/// \brief Generic interface for extending the MCAsmParser,
+/// Generic interface for extending the MCAsmParser,
/// which is implemented by target and object file assembly parser
/// implementations.
class MCAsmParserExtension {
@@ -45,7 +45,7 @@
MCAsmParserExtension &operator=(const MCAsmParserExtension &) = delete;
virtual ~MCAsmParserExtension();
- /// \brief Initialize the extension for parsing using the given \p Parser.
+ /// Initialize the extension for parsing using the given \p Parser.
/// The extension should use the AsmParser interfaces to register its
/// parsing routines.
virtual void Initialize(MCAsmParser &Parser);
diff --git a/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParserUtils.h b/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParserUtils.h
index 84173bb..259113b 100644
--- a/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParserUtils.h
+++ b/linux-x64/clang/include/llvm/MC/MCParser/MCAsmParserUtils.h
@@ -25,7 +25,7 @@
/// On success, returns false and sets the Symbol and Value output parameters.
bool parseAssignmentExpression(StringRef Name, bool allow_redef,
MCAsmParser &Parser, MCSymbol *&Symbol,
- const MCExpr *&Value);
+ const MCExpr *&Value, bool AllowExtendedExpr = false);
} // namespace MCParserUtils
diff --git a/linux-x64/clang/include/llvm/MC/MCParser/MCTargetAsmParser.h b/linux-x64/clang/include/llvm/MC/MCParser/MCTargetAsmParser.h
index d628794..2d188a6 100644
--- a/linux-x64/clang/include/llvm/MC/MCParser/MCTargetAsmParser.h
+++ b/linux-x64/clang/include/llvm/MC/MCParser/MCTargetAsmParser.h
@@ -14,6 +14,7 @@
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCParser/MCAsmLexer.h"
+#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
#include "llvm/MC/MCParser/MCAsmParserExtension.h"
#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/SMLoc.h"
@@ -133,6 +134,53 @@
MatchOperand_ParseFail // operand matched but had errors
};
+enum class DiagnosticPredicateTy {
+ Match,
+ NearMatch,
+ NoMatch,
+};
+
+// When an operand is parsed, the assembler will try to iterate through a set of
+// possible operand classes that the operand might match and call the
+// corresponding PredicateMethod to determine that.
+//
+// If there are two AsmOperands that would give a specific diagnostic if there
+// is no match, there is currently no mechanism to distinguish which operand is
+// a closer match. The DiagnosticPredicate distinguishes between 'completely
+// no match' and 'near match', so the assembler can decide whether to give a
+// specific diagnostic, or use 'InvalidOperand' and continue to find a
+// 'better matching' diagnostic.
+//
+// For example:
+// opcode opnd0, onpd1, opnd2
+//
+// where:
+// opnd2 could be an 'immediate of range [-8, 7]'
+// opnd2 could be a 'register + shift/extend'.
+//
+// If opnd2 is a valid register, but with a wrong shift/extend suffix, it makes
+// little sense to give a diagnostic that the operand should be an immediate
+// in range [-8, 7].
+//
+// This is a light-weight alternative to the 'NearMissInfo' approach
+// below which collects *all* possible diagnostics. This alternative
+// is optional and fully backward compatible with existing
+// PredicateMethods that return a 'bool' (match or no match).
+struct DiagnosticPredicate {
+ DiagnosticPredicateTy Type;
+
+ explicit DiagnosticPredicate(bool Match)
+ : Type(Match ? DiagnosticPredicateTy::Match
+ : DiagnosticPredicateTy::NearMatch) {}
+ DiagnosticPredicate(DiagnosticPredicateTy T) : Type(T) {}
+ DiagnosticPredicate(const DiagnosticPredicate &) = default;
+
+ operator bool() const { return Type == DiagnosticPredicateTy::Match; }
+ bool isMatch() const { return Type == DiagnosticPredicateTy::Match; }
+ bool isNearMatch() const { return Type == DiagnosticPredicateTy::NearMatch; }
+ bool isNoMatch() const { return Type == DiagnosticPredicateTy::NoMatch; }
+};
+
// When matching of an assembly instruction fails, there may be multiple
// encodings that are close to being a match. It's often ambiguous which one
// the programmer intended to use, so we want to report an error which mentions
@@ -324,6 +372,11 @@
SemaCallback = Callback;
}
+ // Target-specific parsing of assembler-level variable assignment.
+ virtual bool parseAssignmentExpression(const MCExpr *&Res, SMLoc &EndLoc) {
+ return getParser().parseExpression(Res, EndLoc);
+ }
+
virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
SMLoc &EndLoc) = 0;
@@ -401,6 +454,15 @@
virtual void convertToMapAndConstraints(unsigned Kind,
const OperandVector &Operands) = 0;
+ /// Returns whether two registers are equal and is used by the tied-operands
+ /// checks in the AsmMatcher. This method can be overridden allow e.g. a
+ /// sub- or super-register as the tied operand.
+ virtual bool regsEqual(const MCParsedAsmOperand &Op1,
+ const MCParsedAsmOperand &Op2) const {
+ assert(Op1.isReg() && Op2.isReg() && "Operands not all regs");
+ return Op1.getReg() == Op2.getReg();
+ }
+
// Return whether this parser uses assignment statements with equals tokens
virtual bool equalIsAsmAssignment() { return true; };
// Return whether this start of statement identifier is a label
diff --git a/linux-x64/clang/include/llvm/MC/MCRegisterInfo.h b/linux-x64/clang/include/llvm/MC/MCRegisterInfo.h
index c57c9ef..8d8c677 100644
--- a/linux-x64/clang/include/llvm/MC/MCRegisterInfo.h
+++ b/linux-x64/clang/include/llvm/MC/MCRegisterInfo.h
@@ -41,7 +41,6 @@
const uint16_t RegsSize;
const uint16_t RegSetSize;
const uint16_t ID;
- const uint16_t PhysRegSize;
const int8_t CopyCost;
const bool Allocatable;
@@ -80,11 +79,6 @@
return contains(Reg1) && contains(Reg2);
}
- /// Return the size of the physical register in bytes.
- unsigned getPhysRegSize() const { return PhysRegSize; }
- /// Temporary function to allow out-of-tree targets to switch.
- unsigned getSize() const { return getPhysRegSize(); }
-
/// getCopyCost - Return the cost of copying a value between two registers in
/// this class. A negative number means the register class is very expensive
/// to copy e.g. status flag register classes.
@@ -240,7 +234,7 @@
friend class MCRegUnitMaskIterator;
friend class MCRegUnitRootIterator;
- /// \brief Initialize MCRegisterInfo, called by TableGen
+ /// Initialize MCRegisterInfo, called by TableGen
/// auto-generated routines. *DO NOT USE*.
void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA,
unsigned PC,
@@ -283,7 +277,7 @@
Dwarf2LRegsSize = 0;
}
- /// \brief Used to initialize LLVM register to Dwarf
+ /// Used to initialize LLVM register to Dwarf
/// register number mapping. Called by TableGen auto-generated routines.
/// *DO NOT USE*.
void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size,
@@ -297,7 +291,7 @@
}
}
- /// \brief Used to initialize Dwarf register to LLVM
+ /// Used to initialize Dwarf register to LLVM
/// register number mapping. Called by TableGen auto-generated routines.
/// *DO NOT USE*.
void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size,
@@ -324,7 +318,7 @@
L2CVRegs[LLVMReg] = CVReg;
}
- /// \brief This method should return the register where the return
+ /// This method should return the register where the return
/// address can be found.
unsigned getRARegister() const {
return RAReg;
@@ -341,86 +335,86 @@
return Desc[RegNo];
}
- /// \brief Provide a get method, equivalent to [], but more useful with a
+ /// Provide a get method, equivalent to [], but more useful with a
/// pointer to this object.
const MCRegisterDesc &get(unsigned RegNo) const {
return operator[](RegNo);
}
- /// \brief Returns the physical register number of sub-register "Index"
+ /// Returns the physical register number of sub-register "Index"
/// for physical register RegNo. Return zero if the sub-register does not
/// exist.
unsigned getSubReg(unsigned Reg, unsigned Idx) const;
- /// \brief Return a super-register of the specified register
+ /// Return a super-register of the specified register
/// Reg so its sub-register of index SubIdx is Reg.
unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
const MCRegisterClass *RC) const;
- /// \brief For a given register pair, return the sub-register index
+ /// For a given register pair, return the sub-register index
/// if the second register is a sub-register of the first. Return zero
/// otherwise.
unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;
- /// \brief Get the size of the bit range covered by a sub-register index.
+ /// Get the size of the bit range covered by a sub-register index.
/// If the index isn't continuous, return the sum of the sizes of its parts.
/// If the index is used to access subregisters of different sizes, return -1.
unsigned getSubRegIdxSize(unsigned Idx) const;
- /// \brief Get the offset of the bit range covered by a sub-register index.
+ /// Get the offset of the bit range covered by a sub-register index.
/// If an Offset doesn't make sense (the index isn't continuous, or is used to
/// access sub-registers at different offsets), return -1.
unsigned getSubRegIdxOffset(unsigned Idx) const;
- /// \brief Return the human-readable symbolic target-specific name for the
+ /// Return the human-readable symbolic target-specific name for the
/// specified physical register.
const char *getName(unsigned RegNo) const {
return RegStrings + get(RegNo).Name;
}
- /// \brief Return the number of registers this target has (useful for
+ /// Return the number of registers this target has (useful for
/// sizing arrays holding per register information)
unsigned getNumRegs() const {
return NumRegs;
}
- /// \brief Return the number of sub-register indices
+ /// Return the number of sub-register indices
/// understood by the target. Index 0 is reserved for the no-op sub-register,
/// while 1 to getNumSubRegIndices() - 1 represent real sub-registers.
unsigned getNumSubRegIndices() const {
return NumSubRegIndices;
}
- /// \brief Return the number of (native) register units in the
+ /// Return the number of (native) register units in the
/// target. Register units are numbered from 0 to getNumRegUnits() - 1. They
/// can be accessed through MCRegUnitIterator defined below.
unsigned getNumRegUnits() const {
return NumRegUnits;
}
- /// \brief Map a target register to an equivalent dwarf register
+ /// Map a target register to an equivalent dwarf register
/// number. Returns -1 if there is no equivalent value. The second
/// parameter allows targets to use different numberings for EH info and
/// debugging info.
int getDwarfRegNum(unsigned RegNum, bool isEH) const;
- /// \brief Map a dwarf register back to a target register.
+ /// Map a dwarf register back to a target register.
int getLLVMRegNum(unsigned RegNum, bool isEH) const;
- /// \brief Map a DWARF EH register back to a target register (same as
+ /// Map a DWARF EH register back to a target register (same as
/// getLLVMRegNum(RegNum, true)) but return -1 if there is no mapping,
/// rather than asserting that there must be one.
int getLLVMRegNumFromEH(unsigned RegNum) const;
- /// \brief Map a target EH register number to an equivalent DWARF register
+ /// Map a target EH register number to an equivalent DWARF register
/// number.
int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const;
- /// \brief Map a target register to an equivalent SEH register
+ /// Map a target register to an equivalent SEH register
/// number. Returns LLVM register number if there is no equivalent value.
int getSEHRegNum(unsigned RegNum) const;
- /// \brief Map a target register to an equivalent CodeView register
+ /// Map a target register to an equivalent CodeView register
/// number.
int getCodeViewRegNum(unsigned RegNum) const;
@@ -434,7 +428,7 @@
return (unsigned)(regclass_end()-regclass_begin());
}
- /// \brief Returns the register class associated with the enumeration
+ /// Returns the register class associated with the enumeration
/// value. See class MCOperandInfo.
const MCRegisterClass& getRegClass(unsigned i) const {
assert(i < getNumRegClasses() && "Register Class ID out of range");
@@ -445,33 +439,33 @@
return RegClassStrings + Class->NameIdx;
}
- /// \brief Returns the encoding for RegNo
+ /// Returns the encoding for RegNo
uint16_t getEncodingValue(unsigned RegNo) const {
assert(RegNo < NumRegs &&
"Attempting to get encoding for invalid register number!");
return RegEncodingTable[RegNo];
}
- /// \brief Returns true if RegB is a sub-register of RegA.
+ /// Returns true if RegB is a sub-register of RegA.
bool isSubRegister(unsigned RegA, unsigned RegB) const {
return isSuperRegister(RegB, RegA);
}
- /// \brief Returns true if RegB is a super-register of RegA.
+ /// Returns true if RegB is a super-register of RegA.
bool isSuperRegister(unsigned RegA, unsigned RegB) const;
- /// \brief Returns true if RegB is a sub-register of RegA or if RegB == RegA.
+ /// Returns true if RegB is a sub-register of RegA or if RegB == RegA.
bool isSubRegisterEq(unsigned RegA, unsigned RegB) const {
return isSuperRegisterEq(RegB, RegA);
}
- /// \brief Returns true if RegB is a super-register of RegA or if
+ /// Returns true if RegB is a super-register of RegA or if
/// RegB == RegA.
bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const {
return RegA == RegB || isSuperRegister(RegA, RegB);
}
- /// \brief Returns true if RegB is a super-register or sub-register of RegA
+ /// Returns true if RegB is a super-register or sub-register of RegA
/// or if RegB == RegA.
bool isSuperOrSubRegisterEq(unsigned RegA, unsigned RegB) const {
return isSubRegisterEq(RegA, RegB) || isSuperRegister(RegA, RegB);
@@ -651,17 +645,17 @@
Reg1 = MCRI->RegUnitRoots[RegUnit][1];
}
- /// \brief Dereference to get the current root register.
+ /// Dereference to get the current root register.
unsigned operator*() const {
return Reg0;
}
- /// \brief Check if the iterator is at the end of the list.
+ /// Check if the iterator is at the end of the list.
bool isValid() const {
return Reg0;
}
- /// \brief Preincrement to move to the next root register.
+ /// Preincrement to move to the next root register.
void operator++() {
assert(isValid() && "Cannot move off the end of the list.");
Reg0 = Reg1;
diff --git a/linux-x64/clang/include/llvm/MC/MCSchedule.h b/linux-x64/clang/include/llvm/MC/MCSchedule.h
index 62f8efd..f2f1dfb 100644
--- a/linux-x64/clang/include/llvm/MC/MCSchedule.h
+++ b/linux-x64/clang/include/llvm/MC/MCSchedule.h
@@ -16,6 +16,7 @@
#define LLVM_MC_MCSCHEDULE_H
#include "llvm/ADT/Optional.h"
+#include "llvm/Config/llvm-config.h"
#include "llvm/Support/DataTypes.h"
#include <cassert>
@@ -23,6 +24,9 @@
struct InstrItinerary;
class MCSubtargetInfo;
+class MCInstrInfo;
+class MCInst;
+class InstrItineraryData;
/// Define a kind of processor resource that will be modeled by the scheduler.
struct MCProcResourceDesc {
@@ -128,6 +132,64 @@
}
};
+/// Specify the cost of a register definition in terms of number of physical
+/// register allocated at register renaming stage. For example, AMD Jaguar.
+/// natively supports 128-bit data types, and operations on 256-bit registers
+/// (i.e. YMM registers) are internally split into two COPs (complex operations)
+/// and each COP updates a physical register. Basically, on Jaguar, a YMM
+/// register write effectively consumes two physical registers. That means,
+/// the cost of a YMM write in the BtVer2 model is 2.
+struct MCRegisterCostEntry {
+ unsigned RegisterClassID;
+ unsigned Cost;
+};
+
+/// A register file descriptor.
+///
+/// This struct allows to describe processor register files. In particular, it
+/// helps describing the size of the register file, as well as the cost of
+/// allocating a register file at register renaming stage.
+/// FIXME: this struct can be extended to provide information about the number
+/// of read/write ports to the register file. A value of zero for field
+/// 'NumPhysRegs' means: this register file has an unbounded number of physical
+/// registers.
+struct MCRegisterFileDesc {
+ const char *Name;
+ uint16_t NumPhysRegs;
+ uint16_t NumRegisterCostEntries;
+ // Index of the first cost entry in MCExtraProcessorInfo::RegisterCostTable.
+ uint16_t RegisterCostEntryIdx;
+};
+
+/// Provide extra details about the machine processor.
+///
+/// This is a collection of "optional" processor information that is not
+/// normally used by the LLVM machine schedulers, but that can be consumed by
+/// external tools like llvm-mca to improve the quality of the peformance
+/// analysis.
+struct MCExtraProcessorInfo {
+ // Actual size of the reorder buffer in hardware.
+ unsigned ReorderBufferSize;
+ // Number of instructions retired per cycle.
+ unsigned MaxRetirePerCycle;
+ const MCRegisterFileDesc *RegisterFiles;
+ unsigned NumRegisterFiles;
+ const MCRegisterCostEntry *RegisterCostTable;
+ unsigned NumRegisterCostEntries;
+
+ struct PfmCountersInfo {
+ // An optional name of a performance counter that can be used to measure
+ // cycles.
+ const char *CycleCounter;
+
+ // For each MCProcResourceDesc defined by the processor, an optional list of
+ // names of performance counters that can be used to measure the resource
+ // utilization.
+ const char **IssueCounters;
+ };
+ PfmCountersInfo PfmCounters;
+};
+
/// Machine model for scheduling, bundling, and heuristics.
///
/// The machine model directly provides basic information about the
@@ -138,9 +200,62 @@
/// provides a detailed reservation table describing each cycle of instruction
/// execution. Subtargets may define any or all of the above categories of data
/// depending on the type of CPU and selected scheduler.
+///
+/// The machine independent properties defined here are used by the scheduler as
+/// an abstract machine model. A real micro-architecture has a number of
+/// buffers, queues, and stages. Declaring that a given machine-independent
+/// abstract property corresponds to a specific physical property across all
+/// subtargets can't be done. Nonetheless, the abstract model is
+/// useful. Futhermore, subtargets typically extend this model with processor
+/// specific resources to model any hardware features that can be exploited by
+/// sceduling heuristics and aren't sufficiently represented in the abstract.
+///
+/// The abstract pipeline is built around the notion of an "issue point". This
+/// is merely a reference point for counting machine cycles. The physical
+/// machine will have pipeline stages that delay execution. The scheduler does
+/// not model those delays because they are irrelevant as long as they are
+/// consistent. Inaccuracies arise when instructions have different execution
+/// delays relative to each other, in addition to their intrinsic latency. Those
+/// special cases can be handled by TableGen constructs such as, ReadAdvance,
+/// which reduces latency when reading data, and ResourceCycles, which consumes
+/// a processor resource when writing data for a number of abstract
+/// cycles.
+///
+/// TODO: One tool currently missing is the ability to add a delay to
+/// ResourceCycles. That would be easy to add and would likely cover all cases
+/// currently handled by the legacy itinerary tables.
+///
+/// A note on out-of-order execution and, more generally, instruction
+/// buffers. Part of the CPU pipeline is always in-order. The issue point, which
+/// is the point of reference for counting cycles, only makes sense as an
+/// in-order part of the pipeline. Other parts of the pipeline are sometimes
+/// falling behind and sometimes catching up. It's only interesting to model
+/// those other, decoupled parts of the pipeline if they may be predictably
+/// resource constrained in a way that the scheduler can exploit.
+///
+/// The LLVM machine model distinguishes between in-order constraints and
+/// out-of-order constraints so that the target's scheduling strategy can apply
+/// appropriate heuristics. For a well-balanced CPU pipeline, out-of-order
+/// resources would not typically be treated as a hard scheduling
+/// constraint. For example, in the GenericScheduler, a delay caused by limited
+/// out-of-order resources is not directly reflected in the number of cycles
+/// that the scheduler sees between issuing an instruction and its dependent
+/// instructions. In other words, out-of-order resources don't directly increase
+/// the latency between pairs of instructions. However, they can still be used
+/// to detect potential bottlenecks across a sequence of instructions and bias
+/// the scheduling heuristics appropriately.
struct MCSchedModel {
// IssueWidth is the maximum number of instructions that may be scheduled in
- // the same per-cycle group.
+ // the same per-cycle group. This is meant to be a hard in-order constraint
+ // (a.k.a. "hazard"). In the GenericScheduler strategy, no more than
+ // IssueWidth micro-ops can ever be scheduled in a particular cycle.
+ //
+ // In practice, IssueWidth is useful to model any bottleneck between the
+ // decoder (after micro-op expansion) and the out-of-order reservation
+ // stations or the decoder bandwidth itself. If the total number of
+ // reservation stations is also a bottleneck, or if any other pipeline stage
+ // has a bandwidth limitation, then that can be naturally modeled by adding an
+ // out-of-order processor resource.
unsigned IssueWidth;
static const unsigned DefaultIssueWidth = 1;
@@ -198,11 +313,21 @@
friend class InstrItineraryData;
const InstrItinerary *InstrItineraries;
+ const MCExtraProcessorInfo *ExtraProcessorInfo;
+
+ bool hasExtraProcessorInfo() const { return ExtraProcessorInfo; }
+
unsigned getProcessorID() const { return ProcID; }
/// Does this machine model include instruction-level scheduling.
bool hasInstrSchedModel() const { return SchedClassTable; }
+ const MCExtraProcessorInfo &getExtraProcessorInfo() const {
+ assert(hasExtraProcessorInfo() &&
+ "No extra information available for this model");
+ return *ExtraProcessorInfo;
+ }
+
/// Return true if this machine model data for all instructions with a
/// scheduling class (itinerary class or SchedRW list).
bool isComplete() const { return CompleteModel; }
@@ -232,16 +357,27 @@
static int computeInstrLatency(const MCSubtargetInfo &STI,
const MCSchedClassDesc &SCDesc);
- /// Returns the reciprocal throughput information from a MCSchedClassDesc.
- static Optional<double>
+ int computeInstrLatency(const MCSubtargetInfo &STI, unsigned SClass) const;
+ int computeInstrLatency(const MCSubtargetInfo &STI, const MCInstrInfo &MCII,
+ const MCInst &Inst) const;
+
+ // Returns the reciprocal throughput information from a MCSchedClassDesc.
+ static double
getReciprocalThroughput(const MCSubtargetInfo &STI,
const MCSchedClassDesc &SCDesc);
+ static double
+ getReciprocalThroughput(unsigned SchedClass, const InstrItineraryData &IID);
+
+ double
+ getReciprocalThroughput(const MCSubtargetInfo &STI, const MCInstrInfo &MCII,
+ const MCInst &Inst) const;
+
/// Returns the default initialized model.
static const MCSchedModel &GetDefaultSchedModel() { return Default; }
static const MCSchedModel Default;
};
-} // End llvm namespace
+} // namespace llvm
#endif
diff --git a/linux-x64/clang/include/llvm/MC/MCSection.h b/linux-x64/clang/include/llvm/MC/MCSection.h
index 2771b1e..eb210b4 100644
--- a/linux-x64/clang/include/llvm/MC/MCSection.h
+++ b/linux-x64/clang/include/llvm/MC/MCSection.h
@@ -40,7 +40,7 @@
public:
enum SectionVariant { SV_COFF = 0, SV_ELF, SV_MachO, SV_Wasm };
- /// \brief Express the state of bundle locked groups while emitting code.
+ /// Express the state of bundle locked groups while emitting code.
enum BundleLockStateType {
NotBundleLocked,
BundleLocked,
@@ -65,19 +65,23 @@
/// The index of this section in the layout order.
unsigned LayoutOrder;
- /// \brief Keeping track of bundle-locked state.
+ /// Keeping track of bundle-locked state.
BundleLockStateType BundleLockState = NotBundleLocked;
- /// \brief Current nesting depth of bundle_lock directives.
+ /// Current nesting depth of bundle_lock directives.
unsigned BundleLockNestingDepth = 0;
- /// \brief We've seen a bundle_lock directive but not its first instruction
+ /// We've seen a bundle_lock directive but not its first instruction
/// yet.
bool BundleGroupBeforeFirstInst : 1;
/// Whether this section has had instructions emitted into it.
bool HasInstructions : 1;
+ /// Whether this section has had data emitted into it.
+ /// Right now this is only used by the ARM backend.
+ bool HasData : 1;
+
bool IsRegistered : 1;
MCDummyFragment DummyFragment;
@@ -137,6 +141,9 @@
bool hasInstructions() const { return HasInstructions; }
void setHasInstructions(bool Value) { HasInstructions = Value; }
+ bool hasData() const { return HasData; }
+ void setHasData(bool Value) { HasData = Value; }
+
bool isRegistered() const { return IsRegistered; }
void setIsRegistered(bool Value) { IsRegistered = Value; }
diff --git a/linux-x64/clang/include/llvm/MC/MCStreamer.h b/linux-x64/clang/include/llvm/MC/MCStreamer.h
index 582a836..e4d0dc0 100644
--- a/linux-x64/clang/include/llvm/MC/MCStreamer.h
+++ b/linux-x64/clang/include/llvm/MC/MCStreamer.h
@@ -170,7 +170,7 @@
std::unique_ptr<AssemblerConstantPools> ConstantPools;
};
-/// \brief Streaming machine code generation interface.
+/// Streaming machine code generation interface.
///
/// This interface is intended to provide a programatic interface that is very
/// similar to the level that an assembler .s file provides. It has callbacks
@@ -197,11 +197,11 @@
/// closed. Otherwise, issue an error and return null.
WinEH::FrameInfo *EnsureValidWinFrameInfo(SMLoc Loc);
- /// \brief Tracks an index to represent the order a symbol was emitted in.
+ /// Tracks an index to represent the order a symbol was emitted in.
/// Zero means we did not emit that symbol.
DenseMap<const MCSymbol *, unsigned> SymbolOrdering;
- /// \brief This is stack of current and previous section values saved by
+ /// This is stack of current and previous section values saved by
/// PushSection.
SmallVector<std::pair<MCSectionSubPair, MCSectionSubPair>, 4> SectionStack;
@@ -211,6 +211,8 @@
/// requires.
unsigned NextWinCFIID = 0;
+ bool UseAssemblerInfoForParsing;
+
protected:
MCStreamer(MCContext &Ctx);
@@ -247,6 +249,11 @@
MCContext &getContext() const { return Context; }
+ virtual MCAssembler *getAssemblerPtr() { return nullptr; }
+
+ void setUseAssemblerInfoForParsing(bool v) { UseAssemblerInfoForParsing = v; }
+ bool getUseAssemblerInfoForParsing() { return UseAssemblerInfoForParsing; }
+
MCTargetStreamer *getTargetStreamer() {
return TargetStreamer.get();
}
@@ -268,19 +275,19 @@
/// \name Assembly File Formatting.
/// @{
- /// \brief Return true if this streamer supports verbose assembly and if it is
+ /// Return true if this streamer supports verbose assembly and if it is
/// enabled.
virtual bool isVerboseAsm() const { return false; }
- /// \brief Return true if this asm streamer supports emitting unformatted text
+ /// Return true if this asm streamer supports emitting unformatted text
/// to the .s file with EmitRawText.
virtual bool hasRawTextSupport() const { return false; }
- /// \brief Is the integrated assembler required for this streamer to function
+ /// Is the integrated assembler required for this streamer to function
/// correctly?
virtual bool isIntegratedAssemblerRequired() const { return false; }
- /// \brief Add a textual comment.
+ /// Add a textual comment.
///
/// Typically for comments that can be emitted to the generated .s
/// file if applicable as a QoI issue to make the output of the compiler
@@ -290,27 +297,27 @@
/// If the comment includes embedded \n's, they will each get the comment
/// prefix as appropriate. The added comment should not end with a \n.
/// By default, each comment is terminated with an end of line, i.e. the
- /// EOL param is set to true by default. If one prefers not to end the
- /// comment with a new line then the EOL param should be passed
+ /// EOL param is set to true by default. If one prefers not to end the
+ /// comment with a new line then the EOL param should be passed
/// with a false value.
virtual void AddComment(const Twine &T, bool EOL = true) {}
- /// \brief Return a raw_ostream that comments can be written to. Unlike
+ /// Return a raw_ostream that comments can be written to. Unlike
/// AddComment, you are required to terminate comments with \n if you use this
/// method.
virtual raw_ostream &GetCommentOS();
- /// \brief Print T and prefix it with the comment string (normally #) and
+ /// Print T and prefix it with the comment string (normally #) and
/// optionally a tab. This prints the comment immediately, not at the end of
/// the current line. It is basically a safe version of EmitRawText: since it
/// only prints comments, the object streamer ignores it instead of asserting.
virtual void emitRawComment(const Twine &T, bool TabPrefix = true);
- /// \brief Add explicit comment T. T is required to be a valid
+ /// Add explicit comment T. T is required to be a valid
/// comment in the output and does not need to be escaped.
virtual void addExplicitComment(const Twine &T);
- /// \brief Emit added explicit comments.
+ /// Emit added explicit comments.
virtual void emitExplicitComments();
/// AddBlankLine - Emit a blank line to a .s file to pretty it up.
@@ -321,7 +328,7 @@
/// \name Symbol & Section Management
/// @{
- /// \brief Return the current section that the streamer is emitting code to.
+ /// Return the current section that the streamer is emitting code to.
MCSectionSubPair getCurrentSection() const {
if (!SectionStack.empty())
return SectionStack.back().first;
@@ -329,32 +336,32 @@
}
MCSection *getCurrentSectionOnly() const { return getCurrentSection().first; }
- /// \brief Return the previous section that the streamer is emitting code to.
+ /// Return the previous section that the streamer is emitting code to.
MCSectionSubPair getPreviousSection() const {
if (!SectionStack.empty())
return SectionStack.back().second;
return MCSectionSubPair();
}
- /// \brief Returns an index to represent the order a symbol was emitted in.
+ /// Returns an index to represent the order a symbol was emitted in.
/// (zero if we did not emit that symbol)
unsigned GetSymbolOrder(const MCSymbol *Sym) const {
return SymbolOrdering.lookup(Sym);
}
- /// \brief Update streamer for a new active section.
+ /// Update streamer for a new active section.
///
/// This is called by PopSection and SwitchSection, if the current
/// section changes.
virtual void ChangeSection(MCSection *, const MCExpr *);
- /// \brief Save the current and previous section on the section stack.
+ /// Save the current and previous section on the section stack.
void PushSection() {
SectionStack.push_back(
std::make_pair(getCurrentSection(), getPreviousSection()));
}
- /// \brief Restore the current and previous section from the section stack.
+ /// Restore the current and previous section from the section stack.
/// Calls ChangeSection as needed.
///
/// Returns false if the stack was empty.
@@ -388,7 +395,7 @@
virtual void SwitchSection(MCSection *Section,
const MCExpr *Subsection = nullptr);
- /// \brief Set the current section where code is being emitted to \p Section.
+ /// Set the current section where code is being emitted to \p Section.
/// This is required to update CurSection. This version does not call
/// ChangeSection.
void SwitchSectionNoChange(MCSection *Section,
@@ -400,18 +407,18 @@
SectionStack.back().first = MCSectionSubPair(Section, Subsection);
}
- /// \brief Create the default sections and set the initial one.
+ /// Create the default sections and set the initial one.
virtual void InitSections(bool NoExecStack);
MCSymbol *endSection(MCSection *Section);
- /// \brief Sets the symbol's section.
+ /// Sets the symbol's section.
///
/// Each emitted symbol will be tracked in the ordering table,
/// so we can sort on them later.
void AssignFragment(MCSymbol *Symbol, MCFragment *Fragment);
- /// \brief Emit a label for \p Symbol into the current section.
+ /// Emit a label for \p Symbol into the current section.
///
/// This corresponds to an assembler statement such as:
/// foo:
@@ -425,17 +432,17 @@
virtual void EmitEHSymAttributes(const MCSymbol *Symbol, MCSymbol *EHSymbol);
- /// \brief Note in the output the specified \p Flag.
+ /// Note in the output the specified \p Flag.
virtual void EmitAssemblerFlag(MCAssemblerFlag Flag);
- /// \brief Emit the given list \p Options of strings as linker
+ /// Emit the given list \p Options of strings as linker
/// options into the output.
virtual void EmitLinkerOptions(ArrayRef<std::string> Kind) {}
- /// \brief Note in the output the specified region \p Kind.
+ /// Note in the output the specified region \p Kind.
virtual void EmitDataRegion(MCDataRegionType Kind) {}
- /// \brief Specify the Mach-O minimum deployment target version.
+ /// Specify the Mach-O minimum deployment target version.
virtual void EmitVersionMin(MCVersionMinType Type, unsigned Major,
unsigned Minor, unsigned Update) {}
@@ -446,11 +453,11 @@
void EmitVersionForTarget(const Triple &Target);
- /// \brief Note in the output that the specified \p Func is a Thumb mode
+ /// Note in the output that the specified \p Func is a Thumb mode
/// function (ARM target only).
virtual void EmitThumbFunc(MCSymbol *Func);
- /// \brief Emit an assignment of \p Value to \p Symbol.
+ /// Emit an assignment of \p Value to \p Symbol.
///
/// This corresponds to an assembler statement such as:
/// symbol = value
@@ -463,7 +470,7 @@
/// \param Value - The value for the symbol.
virtual void EmitAssignment(MCSymbol *Symbol, const MCExpr *Value);
- /// \brief Emit an weak reference from \p Alias to \p Symbol.
+ /// Emit an weak reference from \p Alias to \p Symbol.
///
/// This corresponds to an assembler statement such as:
/// .weakref alias, symbol
@@ -472,56 +479,61 @@
/// \param Symbol - The symbol being aliased.
virtual void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol);
- /// \brief Add the given \p Attribute to \p Symbol.
+ /// Add the given \p Attribute to \p Symbol.
virtual bool EmitSymbolAttribute(MCSymbol *Symbol,
MCSymbolAttr Attribute) = 0;
- /// \brief Set the \p DescValue for the \p Symbol.
+ /// Set the \p DescValue for the \p Symbol.
///
/// \param Symbol - The symbol to have its n_desc field set.
/// \param DescValue - The value to set into the n_desc field.
virtual void EmitSymbolDesc(MCSymbol *Symbol, unsigned DescValue);
- /// \brief Start emitting COFF symbol definition
+ /// Start emitting COFF symbol definition
///
/// \param Symbol - The symbol to have its External & Type fields set.
virtual void BeginCOFFSymbolDef(const MCSymbol *Symbol);
- /// \brief Emit the storage class of the symbol.
+ /// Emit the storage class of the symbol.
///
/// \param StorageClass - The storage class the symbol should have.
virtual void EmitCOFFSymbolStorageClass(int StorageClass);
- /// \brief Emit the type of the symbol.
+ /// Emit the type of the symbol.
///
/// \param Type - A COFF type identifier (see COFF::SymbolType in X86COFF.h)
virtual void EmitCOFFSymbolType(int Type);
- /// \brief Marks the end of the symbol definition.
+ /// Marks the end of the symbol definition.
virtual void EndCOFFSymbolDef();
virtual void EmitCOFFSafeSEH(MCSymbol const *Symbol);
- /// \brief Emits the symbol table index of a Symbol into the current section.
+ /// Emits the symbol table index of a Symbol into the current section.
virtual void EmitCOFFSymbolIndex(MCSymbol const *Symbol);
- /// \brief Emits a COFF section index.
+ /// Emits a COFF section index.
///
/// \param Symbol - Symbol the section number relocation should point to.
virtual void EmitCOFFSectionIndex(MCSymbol const *Symbol);
- /// \brief Emits a COFF section relative relocation.
+ /// Emits a COFF section relative relocation.
///
/// \param Symbol - Symbol the section relative relocation should point to.
virtual void EmitCOFFSecRel32(MCSymbol const *Symbol, uint64_t Offset);
- /// \brief Emit an ELF .size directive.
+ /// Emits a COFF image relative relocation.
+ ///
+ /// \param Symbol - Symbol the image relative relocation should point to.
+ virtual void EmitCOFFImgRel32(MCSymbol const *Symbol, int64_t Offset);
+
+ /// Emit an ELF .size directive.
///
/// This corresponds to an assembler statement such as:
/// .size symbol, expression
virtual void emitELFSize(MCSymbol *Symbol, const MCExpr *Value);
- /// \brief Emit an ELF .symver directive.
+ /// Emit an ELF .symver directive.
///
/// This corresponds to an assembler statement such as:
/// .symver _start, foo@@SOME_VERSION
@@ -530,11 +542,11 @@
virtual void emitELFSymverDirective(StringRef AliasName,
const MCSymbol *Aliasee);
- /// \brief Emit a Linker Optimization Hint (LOH) directive.
+ /// Emit a Linker Optimization Hint (LOH) directive.
/// \param Args - Arguments of the LOH.
virtual void EmitLOHDirective(MCLOHType Kind, const MCLOHArgs &Args) {}
- /// \brief Emit a common symbol.
+ /// Emit a common symbol.
///
/// \param Symbol - The common symbol to emit.
/// \param Size - The size of the common symbol.
@@ -543,7 +555,7 @@
virtual void EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
unsigned ByteAlignment) = 0;
- /// \brief Emit a local common (.lcomm) symbol.
+ /// Emit a local common (.lcomm) symbol.
///
/// \param Symbol - The common symbol to emit.
/// \param Size - The size of the common symbol.
@@ -551,7 +563,7 @@
virtual void EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size,
unsigned ByteAlignment);
- /// \brief Emit the zerofill section and an optional symbol.
+ /// Emit the zerofill section and an optional symbol.
///
/// \param Section - The zerofill section to create and or to put the symbol
/// \param Symbol - The zerofill symbol to emit, if non-NULL.
@@ -559,9 +571,10 @@
/// \param ByteAlignment - The alignment of the zerofill symbol if
/// non-zero. This must be a power of 2 on some targets.
virtual void EmitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr,
- uint64_t Size = 0, unsigned ByteAlignment = 0) = 0;
+ uint64_t Size = 0, unsigned ByteAlignment = 0,
+ SMLoc Loc = SMLoc()) = 0;
- /// \brief Emit a thread local bss (.tbss) symbol.
+ /// Emit a thread local bss (.tbss) symbol.
///
/// \param Section - The thread local common section.
/// \param Symbol - The thread local common symbol to emit.
@@ -575,7 +588,7 @@
/// \name Generating Data
/// @{
- /// \brief Emit the bytes in \p Data into the output.
+ /// Emit the bytes in \p Data into the output.
///
/// This is used to implement assembler directives such as .byte, .ascii,
/// etc.
@@ -585,7 +598,7 @@
/// method uses .byte directives instead of .ascii or .asciz for readability.
virtual void EmitBinaryData(StringRef Data);
- /// \brief Emit the expression \p Value into the output as a native
+ /// Emit the expression \p Value into the output as a native
/// integer of the given \p Size bytes.
///
/// This is used to implement assembler directives such as .word, .quad,
@@ -600,7 +613,7 @@
void EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc = SMLoc());
- /// \brief Special case of EmitValue that avoids the client having
+ /// Special case of EmitValue that avoids the client having
/// to pass in a MCExpr for constant integers.
virtual void EmitIntValue(uint64_t Value, unsigned Size);
@@ -608,66 +621,66 @@
virtual void EmitSLEB128Value(const MCExpr *Value);
- /// \brief Special case of EmitULEB128Value that avoids the client having to
+ /// Special case of EmitULEB128Value that avoids the client having to
/// pass in a MCExpr for constant integers.
void EmitULEB128IntValue(uint64_t Value);
- /// \brief Special case of EmitSLEB128Value that avoids the client having to
+ /// Special case of EmitSLEB128Value that avoids the client having to
/// pass in a MCExpr for constant integers.
void EmitSLEB128IntValue(int64_t Value);
- /// \brief Special case of EmitValue that avoids the client having to pass in
+ /// Special case of EmitValue that avoids the client having to pass in
/// a MCExpr for MCSymbols.
void EmitSymbolValue(const MCSymbol *Sym, unsigned Size,
bool IsSectionRelative = false);
- /// \brief Emit the expression \p Value into the output as a dtprel
+ /// Emit the expression \p Value into the output as a dtprel
/// (64-bit DTP relative) value.
///
/// This is used to implement assembler directives such as .dtpreldword on
/// targets that support them.
virtual void EmitDTPRel64Value(const MCExpr *Value);
- /// \brief Emit the expression \p Value into the output as a dtprel
+ /// Emit the expression \p Value into the output as a dtprel
/// (32-bit DTP relative) value.
///
/// This is used to implement assembler directives such as .dtprelword on
/// targets that support them.
virtual void EmitDTPRel32Value(const MCExpr *Value);
- /// \brief Emit the expression \p Value into the output as a tprel
+ /// Emit the expression \p Value into the output as a tprel
/// (64-bit TP relative) value.
///
/// This is used to implement assembler directives such as .tpreldword on
/// targets that support them.
virtual void EmitTPRel64Value(const MCExpr *Value);
- /// \brief Emit the expression \p Value into the output as a tprel
+ /// Emit the expression \p Value into the output as a tprel
/// (32-bit TP relative) value.
///
/// This is used to implement assembler directives such as .tprelword on
/// targets that support them.
virtual void EmitTPRel32Value(const MCExpr *Value);
- /// \brief Emit the expression \p Value into the output as a gprel64 (64-bit
+ /// Emit the expression \p Value into the output as a gprel64 (64-bit
/// GP relative) value.
///
/// This is used to implement assembler directives such as .gpdword on
/// targets that support them.
virtual void EmitGPRel64Value(const MCExpr *Value);
- /// \brief Emit the expression \p Value into the output as a gprel32 (32-bit
+ /// Emit the expression \p Value into the output as a gprel32 (32-bit
/// GP relative) value.
///
/// This is used to implement assembler directives such as .gprel32 on
/// targets that support them.
virtual void EmitGPRel32Value(const MCExpr *Value);
- /// \brief Emit NumBytes bytes worth of the value specified by FillValue.
+ /// Emit NumBytes bytes worth of the value specified by FillValue.
/// This implements directives such as '.space'.
void emitFill(uint64_t NumBytes, uint8_t FillValue);
- /// \brief Emit \p Size bytes worth of the value specified by \p FillValue.
+ /// Emit \p Size bytes worth of the value specified by \p FillValue.
///
/// This is used to implement assembler directives such as .space or .skip.
///
@@ -677,7 +690,7 @@
virtual void emitFill(const MCExpr &NumBytes, uint64_t FillValue,
SMLoc Loc = SMLoc());
- /// \brief Emit \p NumValues copies of \p Size bytes. Each \p Size bytes is
+ /// Emit \p NumValues copies of \p Size bytes. Each \p Size bytes is
/// taken from the lowest order 4 bytes of \p Expr expression.
///
/// This is used to implement assembler directives such as .fill.
@@ -688,11 +701,11 @@
virtual void emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
SMLoc Loc = SMLoc());
- /// \brief Emit NumBytes worth of zeros.
+ /// Emit NumBytes worth of zeros.
/// This function properly handles data in virtual sections.
void EmitZeros(uint64_t NumBytes);
- /// \brief Emit some number of copies of \p Value until the byte alignment \p
+ /// Emit some number of copies of \p Value until the byte alignment \p
/// ByteAlignment is reached.
///
/// If the number of bytes need to emit for the alignment is not a multiple
@@ -713,7 +726,7 @@
unsigned ValueSize = 1,
unsigned MaxBytesToEmit = 0);
- /// \brief Emit nops until the byte alignment \p ByteAlignment is reached.
+ /// Emit nops until the byte alignment \p ByteAlignment is reached.
///
/// This used to align code where the alignment bytes may be executed. This
/// can emit different bytes for different sizes to optimize execution.
@@ -726,7 +739,7 @@
virtual void EmitCodeAlignment(unsigned ByteAlignment,
unsigned MaxBytesToEmit = 0);
- /// \brief Emit some number of copies of \p Value until the byte offset \p
+ /// Emit some number of copies of \p Value until the byte offset \p
/// Offset is reached.
///
/// This is used to implement assembler directives such as .org.
@@ -745,15 +758,15 @@
/// @}
- /// \brief Switch to a new logical file. This is used to implement the '.file
+ /// Switch to a new logical file. This is used to implement the '.file
/// "foo.c"' assembler directive.
virtual void EmitFileDirective(StringRef Filename);
- /// \brief Emit the "identifiers" directive. This implements the
+ /// Emit the "identifiers" directive. This implements the
/// '.ident "version foo"' assembler directive.
virtual void EmitIdent(StringRef IdentString) {}
- /// \brief Associate a filename with a specified logical file number. This
+ /// Associate a filename with a specified logical file number. This
/// implements the DWARF2 '.file 4 "foo.c"' assembler directive.
unsigned EmitDwarfFileDirective(unsigned FileNo, StringRef Directory,
StringRef Filename,
@@ -781,7 +794,7 @@
Optional<StringRef> Source,
unsigned CUID = 0);
- /// \brief This implements the DWARF2 '.loc fileno lineno ...' assembler
+ /// This implements the DWARF2 '.loc fileno lineno ...' assembler
/// directive.
virtual void EmitDwarfLocDirective(unsigned FileNo, unsigned Line,
unsigned Column, unsigned Flags,
@@ -795,27 +808,27 @@
ArrayRef<uint8_t> Checksum,
unsigned ChecksumKind);
- /// \brief Introduces a function id for use with .cv_loc.
+ /// Introduces a function id for use with .cv_loc.
virtual bool EmitCVFuncIdDirective(unsigned FunctionId);
- /// \brief Introduces an inline call site id for use with .cv_loc. Includes
+ /// Introduces an inline call site id for use with .cv_loc. Includes
/// extra information for inline line table generation.
virtual bool EmitCVInlineSiteIdDirective(unsigned FunctionId, unsigned IAFunc,
unsigned IAFile, unsigned IALine,
unsigned IACol, SMLoc Loc);
- /// \brief This implements the CodeView '.cv_loc' assembler directive.
+ /// This implements the CodeView '.cv_loc' assembler directive.
virtual void EmitCVLocDirective(unsigned FunctionId, unsigned FileNo,
unsigned Line, unsigned Column,
bool PrologueEnd, bool IsStmt,
StringRef FileName, SMLoc Loc);
- /// \brief This implements the CodeView '.cv_linetable' assembler directive.
+ /// This implements the CodeView '.cv_linetable' assembler directive.
virtual void EmitCVLinetableDirective(unsigned FunctionId,
const MCSymbol *FnStart,
const MCSymbol *FnEnd);
- /// \brief This implements the CodeView '.cv_inline_linetable' assembler
+ /// This implements the CodeView '.cv_inline_linetable' assembler
/// directive.
virtual void EmitCVInlineLinetableDirective(unsigned PrimaryFunctionId,
unsigned SourceFileId,
@@ -823,16 +836,16 @@
const MCSymbol *FnStartSym,
const MCSymbol *FnEndSym);
- /// \brief This implements the CodeView '.cv_def_range' assembler
+ /// This implements the CodeView '.cv_def_range' assembler
/// directive.
virtual void EmitCVDefRangeDirective(
ArrayRef<std::pair<const MCSymbol *, const MCSymbol *>> Ranges,
StringRef FixedSizePortion);
- /// \brief This implements the CodeView '.cv_stringtable' assembler directive.
+ /// This implements the CodeView '.cv_stringtable' assembler directive.
virtual void EmitCVStringTableDirective() {}
- /// \brief This implements the CodeView '.cv_filechecksums' assembler directive.
+ /// This implements the CodeView '.cv_filechecksums' assembler directive.
virtual void EmitCVFileChecksumsDirective() {}
/// This implements the CodeView '.cv_filechecksumoffset' assembler
@@ -894,6 +907,9 @@
SMLoc Loc = SMLoc());
virtual void EmitWinEHHandlerData(SMLoc Loc = SMLoc());
+ virtual void emitCGProfileEntry(const MCSymbolRefExpr *From,
+ const MCSymbolRefExpr *To, uint64_t Count);
+
/// Get the .pdata section used for the given section. Typically the given
/// section is either the main .text section or some other COMDAT .text
/// section, but it may be any section containing code.
@@ -904,41 +920,45 @@
virtual void EmitSyntaxDirective();
- /// \brief Emit a .reloc directive.
+ /// Emit a .reloc directive.
/// Returns true if the relocation could not be emitted because Name is not
/// known.
virtual bool EmitRelocDirective(const MCExpr &Offset, StringRef Name,
- const MCExpr *Expr, SMLoc Loc) {
+ const MCExpr *Expr, SMLoc Loc,
+ const MCSubtargetInfo &STI) {
return true;
}
- /// \brief Emit the given \p Instruction into the current section.
+ virtual void EmitAddrsig() {}
+ virtual void EmitAddrsigSym(const MCSymbol *Sym) {}
+
+ /// Emit the given \p Instruction into the current section.
/// PrintSchedInfo == true then schedul comment should be added to output
virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
bool PrintSchedInfo = false);
- /// \brief Set the bundle alignment mode from now on in the section.
+ /// Set the bundle alignment mode from now on in the section.
/// The argument is the power of 2 to which the alignment is set. The
/// value 0 means turn the bundle alignment off.
virtual void EmitBundleAlignMode(unsigned AlignPow2);
- /// \brief The following instructions are a bundle-locked group.
+ /// The following instructions are a bundle-locked group.
///
/// \param AlignToEnd - If true, the bundle-locked group will be aligned to
/// the end of a bundle.
virtual void EmitBundleLock(bool AlignToEnd);
- /// \brief Ends a bundle-locked group.
+ /// Ends a bundle-locked group.
virtual void EmitBundleUnlock();
- /// \brief If this file is backed by a assembly streamer, this dumps the
+ /// If this file is backed by a assembly streamer, this dumps the
/// specified string in the output .s file. This capability is indicated by
/// the hasRawTextSupport() predicate. By default this aborts.
void EmitRawText(const Twine &String);
- /// \brief Streamer specific finalization.
+ /// Streamer specific finalization.
virtual void FinishImpl();
- /// \brief Finish emission of machine code.
+ /// Finish emission of machine code.
void Finish();
virtual bool mayHaveInstructions(MCSection &Sec) const { return true; }
diff --git a/linux-x64/clang/include/llvm/MC/MCSubtargetInfo.h b/linux-x64/clang/include/llvm/MC/MCSubtargetInfo.h
index 0a2b247..b3ce523 100644
--- a/linux-x64/clang/include/llvm/MC/MCSubtargetInfo.h
+++ b/linux-x64/clang/include/llvm/MC/MCSubtargetInfo.h
@@ -27,7 +27,6 @@
namespace llvm {
-class MachineInstr;
class MCInst;
//===----------------------------------------------------------------------===//
@@ -160,6 +159,13 @@
/// Initialize an InstrItineraryData instance.
void initInstrItins(InstrItineraryData &InstrItins) const;
+ /// Resolve a variant scheduling class for the given MCInst and CPU.
+ virtual unsigned
+ resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI,
+ unsigned CPUID) const {
+ return 0;
+ }
+
/// Check whether the CPU string is valid.
bool isCPUStringValid(StringRef CPU) const {
auto Found = std::lower_bound(ProcDesc.begin(), ProcDesc.end(), CPU);
@@ -167,10 +173,6 @@
}
/// Returns string representation of scheduler comment
- virtual std::string getSchedInfoStr(const MachineInstr &MI) const {
- return {};
- }
-
virtual std::string getSchedInfoStr(MCInst const &MCI) const {
return {};
}
diff --git a/linux-x64/clang/include/llvm/MC/MCSymbol.h b/linux-x64/clang/include/llvm/MC/MCSymbol.h
index cc8fc02..4681a1b 100644
--- a/linux-x64/clang/include/llvm/MC/MCSymbol.h
+++ b/linux-x64/clang/include/llvm/MC/MCSymbol.h
@@ -85,7 +85,7 @@
/// "Lfoo" or ".foo".
unsigned IsTemporary : 1;
- /// \brief True if this symbol can be redefined.
+ /// True if this symbol can be redefined.
unsigned IsRedefinable : 1;
/// IsUsed - True if this symbol has been used.
@@ -141,7 +141,7 @@
friend class MCExpr;
friend class MCContext;
- /// \brief The name for a symbol.
+ /// The name for a symbol.
/// MCSymbol contains a uint64_t so is probably aligned to 8. On a 32-bit
/// system, the name is a pointer so isn't going to satisfy the 8 byte
/// alignment of uint64_t. Account for that here.
@@ -168,11 +168,11 @@
private:
void operator delete(void *);
- /// \brief Placement delete - required by std, but never called.
+ /// Placement delete - required by std, but never called.
void operator delete(void*, unsigned) {
llvm_unreachable("Constructor throws?");
}
- /// \brief Placement delete - required by std, but never called.
+ /// Placement delete - required by std, but never called.
void operator delete(void*, unsigned, bool) {
llvm_unreachable("Constructor throws?");
}
@@ -185,7 +185,7 @@
return nullptr;
}
- /// \brief Get a reference to the name field. Requires that we have a name
+ /// Get a reference to the name field. Requires that we have a name
const StringMapEntry<bool> *&getNameEntryPtr() {
assert(FragmentAndHasName.getInt() && "Name is required");
NameEntryStorageTy *Name = reinterpret_cast<NameEntryStorageTy *>(this);
@@ -222,11 +222,11 @@
/// isUsed - Check if this is used.
bool isUsed() const { return IsUsed; }
- /// \brief Check if this symbol is redefinable.
+ /// Check if this symbol is redefinable.
bool isRedefinable() const { return IsRedefinable; }
- /// \brief Mark this symbol as redefinable.
+ /// Mark this symbol as redefinable.
void setRedefinable(bool Value) { IsRedefinable = Value; }
- /// \brief Prepare this symbol to be redefined.
+ /// Prepare this symbol to be redefined.
void redefineIfPossible() {
if (IsRedefinable) {
if (SymbolContents == SymContentsVariable) {
@@ -316,6 +316,8 @@
Index = Value;
}
+ bool isUnset() const { return SymbolContents == SymContentsUnset; }
+
uint64_t getOffset() const {
assert((SymbolContents == SymContentsUnset ||
SymbolContents == SymContentsOffset) &&
diff --git a/linux-x64/clang/include/llvm/MC/MCSymbolMachO.h b/linux-x64/clang/include/llvm/MC/MCSymbolMachO.h
index 25220e4..6125c20 100644
--- a/linux-x64/clang/include/llvm/MC/MCSymbolMachO.h
+++ b/linux-x64/clang/include/llvm/MC/MCSymbolMachO.h
@@ -14,7 +14,7 @@
namespace llvm {
class MCSymbolMachO : public MCSymbol {
- /// \brief We store the value for the 'desc' symbol field in the
+ /// We store the value for the 'desc' symbol field in the
/// lowest 16 bits of the implementation defined flags.
enum MachOSymbolFlags : uint16_t { // See <mach-o/nlist.h>.
SF_DescFlagsMask = 0xFFFF,
@@ -104,7 +104,7 @@
setFlags(Value & SF_DescFlagsMask);
}
- /// \brief Get the encoded value of the flags as they will be emitted in to
+ /// Get the encoded value of the flags as they will be emitted in to
/// the MachO binary
uint16_t getEncodedFlags(bool EncodeAsAltEntry) const {
uint16_t Flags = getFlags();
diff --git a/linux-x64/clang/include/llvm/MC/MCSymbolWasm.h b/linux-x64/clang/include/llvm/MC/MCSymbolWasm.h
index 10eadb0..e043453 100644
--- a/linux-x64/clang/include/llvm/MC/MCSymbolWasm.h
+++ b/linux-x64/clang/include/llvm/MC/MCSymbolWasm.h
@@ -45,6 +45,7 @@
bool isFunction() const { return Type == wasm::WASM_SYMBOL_TYPE_FUNCTION; }
bool isData() const { return Type == wasm::WASM_SYMBOL_TYPE_DATA; }
bool isGlobal() const { return Type == wasm::WASM_SYMBOL_TYPE_GLOBAL; }
+ bool isSection() const { return Type == wasm::WASM_SYMBOL_TYPE_SECTION; }
wasm::WasmSymbolType getType() const { return Type; }
void setType(wasm::WasmSymbolType type) { Type = type; }
diff --git a/linux-x64/clang/include/llvm/MC/MCTargetOptionsCommandFlags.def b/linux-x64/clang/include/llvm/MC/MCTargetOptionsCommandFlags.inc
similarity index 100%
rename from linux-x64/clang/include/llvm/MC/MCTargetOptionsCommandFlags.def
rename to linux-x64/clang/include/llvm/MC/MCTargetOptionsCommandFlags.inc
diff --git a/linux-x64/clang/include/llvm/MC/MCValue.h b/linux-x64/clang/include/llvm/MC/MCValue.h
index ff223f7..11f5082 100644
--- a/linux-x64/clang/include/llvm/MC/MCValue.h
+++ b/linux-x64/clang/include/llvm/MC/MCValue.h
@@ -23,7 +23,7 @@
class MCAsmInfo;
class raw_ostream;
-/// \brief This represents an "assembler immediate".
+/// This represents an "assembler immediate".
///
/// In its most general form, this can hold ":Kind:(SymbolA - SymbolB +
/// imm64)". Not all targets supports relocations of this general form, but we
@@ -49,13 +49,13 @@
const MCSymbolRefExpr *getSymB() const { return SymB; }
uint32_t getRefKind() const { return RefKind; }
- /// \brief Is this an absolute (as opposed to relocatable) value.
+ /// Is this an absolute (as opposed to relocatable) value.
bool isAbsolute() const { return !SymA && !SymB; }
- /// \brief Print the value to the stream \p OS.
+ /// Print the value to the stream \p OS.
void print(raw_ostream &OS) const;
- /// \brief Print the value to stderr.
+ /// Print the value to stderr.
void dump() const;
MCSymbolRefExpr::VariantKind getAccessVariant() const;
diff --git a/linux-x64/clang/include/llvm/MC/MCWasmObjectWriter.h b/linux-x64/clang/include/llvm/MC/MCWasmObjectWriter.h
index a4d5eb8..e45030f 100644
--- a/linux-x64/clang/include/llvm/MC/MCWasmObjectWriter.h
+++ b/linux-x64/clang/include/llvm/MC/MCWasmObjectWriter.h
@@ -10,18 +10,16 @@
#ifndef LLVM_MC_MCWASMOBJECTWRITER_H
#define LLVM_MC_MCWASMOBJECTWRITER_H
-#include "llvm/ADT/Triple.h"
-#include "llvm/BinaryFormat/Wasm.h"
-#include "llvm/Support/DataTypes.h"
+#include "llvm/MC/MCObjectWriter.h"
+#include <memory>
namespace llvm {
class MCFixup;
-class MCObjectWriter;
class MCValue;
class raw_pwrite_stream;
-class MCWasmObjectTargetWriter {
+class MCWasmObjectTargetWriter : public MCObjectTargetWriter {
const unsigned Is64Bit : 1;
protected:
@@ -30,6 +28,11 @@
public:
virtual ~MCWasmObjectTargetWriter();
+ virtual Triple::ObjectFormatType getFormat() const { return Triple::Wasm; }
+ static bool classof(const MCObjectTargetWriter *W) {
+ return W->getFormat() == Triple::Wasm;
+ }
+
virtual unsigned getRelocType(const MCValue &Target,
const MCFixup &Fixup) const = 0;
@@ -39,7 +42,7 @@
/// @}
};
-/// \brief Construct a new Wasm writer instance.
+/// Construct a new Wasm writer instance.
///
/// \param MOTW - The target specific Wasm writer subclass.
/// \param OS - The stream to write to.
diff --git a/linux-x64/clang/include/llvm/MC/MCWasmStreamer.h b/linux-x64/clang/include/llvm/MC/MCWasmStreamer.h
index c0d4545..01e6a43 100644
--- a/linux-x64/clang/include/llvm/MC/MCWasmStreamer.h
+++ b/linux-x64/clang/include/llvm/MC/MCWasmStreamer.h
@@ -15,6 +15,7 @@
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/MC/MCDirectives.h"
#include "llvm/MC/MCObjectStreamer.h"
+#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/SectionKind.h"
#include "llvm/Support/DataTypes.h"
@@ -27,8 +28,10 @@
class MCWasmStreamer : public MCObjectStreamer {
public:
MCWasmStreamer(MCContext &Context, std::unique_ptr<MCAsmBackend> TAB,
- raw_pwrite_stream &OS, std::unique_ptr<MCCodeEmitter> Emitter)
- : MCObjectStreamer(Context, std::move(TAB), OS, std::move(Emitter)),
+ std::unique_ptr<MCObjectWriter> OW,
+ std::unique_ptr<MCCodeEmitter> Emitter)
+ : MCObjectStreamer(Context, std::move(TAB), std::move(OW),
+ std::move(Emitter)),
SeenIdent(false) {}
~MCWasmStreamer() override;
@@ -57,7 +60,8 @@
unsigned ByteAlignment) override;
void EmitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr,
- uint64_t Size = 0, unsigned ByteAlignment = 0) override;
+ uint64_t Size = 0, unsigned ByteAlignment = 0,
+ SMLoc Loc = SMLoc()) override;
void EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol, uint64_t Size,
unsigned ByteAlignment = 0) override;
void EmitValueImpl(const MCExpr *Value, unsigned Size,
@@ -73,7 +77,7 @@
void EmitInstToFragment(const MCInst &Inst, const MCSubtargetInfo &) override;
void EmitInstToData(const MCInst &Inst, const MCSubtargetInfo &) override;
- /// \brief Merge the content of the fragment \p EF into the fragment \p DF.
+ /// Merge the content of the fragment \p EF into the fragment \p DF.
void mergeFragment(MCDataFragment *, MCDataFragment *);
bool SeenIdent;
diff --git a/linux-x64/clang/include/llvm/MC/MCWinCOFFObjectWriter.h b/linux-x64/clang/include/llvm/MC/MCWinCOFFObjectWriter.h
index 3234bd9..c1d35ea 100644
--- a/linux-x64/clang/include/llvm/MC/MCWinCOFFObjectWriter.h
+++ b/linux-x64/clang/include/llvm/MC/MCWinCOFFObjectWriter.h
@@ -10,6 +10,7 @@
#ifndef LLVM_MC_MCWINCOFFOBJECTWRITER_H
#define LLVM_MC_MCWINCOFFOBJECTWRITER_H
+#include "llvm/MC/MCObjectWriter.h"
#include <memory>
namespace llvm {
@@ -17,11 +18,10 @@
class MCAsmBackend;
class MCContext;
class MCFixup;
-class MCObjectWriter;
class MCValue;
class raw_pwrite_stream;
- class MCWinCOFFObjectTargetWriter {
+ class MCWinCOFFObjectTargetWriter : public MCObjectTargetWriter {
virtual void anchor();
const unsigned Machine;
@@ -32,6 +32,11 @@
public:
virtual ~MCWinCOFFObjectTargetWriter() = default;
+ virtual Triple::ObjectFormatType getFormat() const { return Triple::COFF; }
+ static bool classof(const MCObjectTargetWriter *W) {
+ return W->getFormat() == Triple::COFF;
+ }
+
unsigned getMachine() const { return Machine; }
virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
const MCFixup &Fixup, bool IsCrossSection,
@@ -39,7 +44,7 @@
virtual bool recordRelocation(const MCFixup &) const { return true; }
};
- /// \brief Construct a new Win COFF writer instance.
+ /// Construct a new Win COFF writer instance.
///
/// \param MOTW - The target specific WinCOFF writer subclass.
/// \param OS - The stream to write to.
diff --git a/linux-x64/clang/include/llvm/MC/MCWinCOFFStreamer.h b/linux-x64/clang/include/llvm/MC/MCWinCOFFStreamer.h
index 60c17ca..0049d04 100644
--- a/linux-x64/clang/include/llvm/MC/MCWinCOFFStreamer.h
+++ b/linux-x64/clang/include/llvm/MC/MCWinCOFFStreamer.h
@@ -28,7 +28,8 @@
class MCWinCOFFStreamer : public MCObjectStreamer {
public:
MCWinCOFFStreamer(MCContext &Context, std::unique_ptr<MCAsmBackend> MAB,
- std::unique_ptr<MCCodeEmitter> CE, raw_pwrite_stream &OS);
+ std::unique_ptr<MCCodeEmitter> CE,
+ std::unique_ptr<MCObjectWriter> OW);
/// state management
void reset() override {
@@ -53,12 +54,13 @@
void EmitCOFFSymbolIndex(MCSymbol const *Symbol) override;
void EmitCOFFSectionIndex(MCSymbol const *Symbol) override;
void EmitCOFFSecRel32(MCSymbol const *Symbol, uint64_t Offset) override;
+ void EmitCOFFImgRel32(MCSymbol const *Symbol, int64_t Offset) override;
void EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
unsigned ByteAlignment) override;
void EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size,
unsigned ByteAlignment) override;
void EmitZerofill(MCSection *Section, MCSymbol *Symbol, uint64_t Size,
- unsigned ByteAlignment) override;
+ unsigned ByteAlignment, SMLoc Loc = SMLoc()) override;
void EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol, uint64_t Size,
unsigned ByteAlignment) override;
void EmitIdent(StringRef IdentString) override;
diff --git a/linux-x64/clang/include/llvm/MC/StringTableBuilder.h b/linux-x64/clang/include/llvm/MC/StringTableBuilder.h
index 89bc55a..265260f 100644
--- a/linux-x64/clang/include/llvm/MC/StringTableBuilder.h
+++ b/linux-x64/clang/include/llvm/MC/StringTableBuilder.h
@@ -20,7 +20,7 @@
class raw_ostream;
-/// \brief Utility for building string tables with deduplicated suffixes.
+/// Utility for building string tables with deduplicated suffixes.
class StringTableBuilder {
public:
enum Kind { ELF, WinCOFF, MachO, RAW, DWARF };
@@ -39,13 +39,13 @@
StringTableBuilder(Kind K, unsigned Alignment = 1);
~StringTableBuilder();
- /// \brief Add a string to the builder. Returns the position of S in the
+ /// Add a string to the builder. Returns the position of S in the
/// table. The position will be changed if finalize is used.
/// Can only be used before the table is finalized.
size_t add(CachedHashStringRef S);
size_t add(StringRef S) { return add(CachedHashStringRef(S)); }
- /// \brief Analyze the strings and build the final table. No more strings can
+ /// Analyze the strings and build the final table. No more strings can
/// be added after this point.
void finalize();
@@ -53,7 +53,7 @@
/// returned by add will still be valid.
void finalizeInOrder();
- /// \brief Get the offest of a string in the string table. Can only be used
+ /// Get the offest of a string in the string table. Can only be used
/// after the table is finalized.
size_t getOffset(CachedHashStringRef S) const;
size_t getOffset(StringRef S) const {