Update prebuilt Clang to match Android kernel.
Bug: 132428451
Change-Id: I8f6e2cb23f381fc0c02ddea99b867e58e925e5be
diff --git a/linux-x64/clang/include/llvm/MC/MCSchedule.h b/linux-x64/clang/include/llvm/MC/MCSchedule.h
index 9f53a46..df3248e 100644
--- a/linux-x64/clang/include/llvm/MC/MCSchedule.h
+++ b/linux-x64/clang/include/llvm/MC/MCSchedule.h
@@ -1,9 +1,8 @@
//===-- llvm/MC/MCSchedule.h - Scheduling -----------------------*- C++ -*-===//
//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
@@ -15,6 +14,7 @@
#ifndef LLVM_MC_MCSCHEDULE_H
#define LLVM_MC_MCSCHEDULE_H
+#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/Optional.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/Support/DataTypes.h"
@@ -142,6 +142,7 @@
struct MCRegisterCostEntry {
unsigned RegisterClassID;
unsigned Cost;
+ bool AllowMoveElimination;
};
/// A register file descriptor.
@@ -159,6 +160,12 @@
uint16_t NumRegisterCostEntries;
// Index of the first cost entry in MCExtraProcessorInfo::RegisterCostTable.
uint16_t RegisterCostEntryIdx;
+ // A value of zero means: there is no limit in the number of moves that can be
+ // eliminated every cycle.
+ uint16_t MaxMovesEliminatedPerCycle;
+ // Ture if this register file only knows how to optimize register moves from
+ // known zero registers.
+ bool AllowZeroMoveEliminationOnly;
};
/// Provide extra details about the machine processor.
@@ -176,22 +183,8 @@
unsigned NumRegisterFiles;
const MCRegisterCostEntry *RegisterCostTable;
unsigned NumRegisterCostEntries;
-
- struct PfmCountersInfo {
- // An optional name of a performance counter that can be used to measure
- // cycles.
- const char *CycleCounter;
-
- // An optional name of a performance counter that can be used to measure
- // uops.
- const char *UopsCounter;
-
- // For each MCProcResourceDesc defined by the processor, an optional list of
- // names of performance counters that can be used to measure the resource
- // utilization.
- const char **IssueCounters;
- };
- PfmCountersInfo PfmCounters;
+ unsigned LoadQueueID;
+ unsigned StoreQueueID;
};
/// Machine model for scheduling, bundling, and heuristics.
@@ -377,6 +370,11 @@
getReciprocalThroughput(const MCSubtargetInfo &STI, const MCInstrInfo &MCII,
const MCInst &Inst) const;
+ /// Returns the maximum forwarding delay for register reads dependent on
+ /// writes of scheduling class WriteResourceIdx.
+ static unsigned getForwardingDelayCycles(ArrayRef<MCReadAdvanceEntry> Entries,
+ unsigned WriteResourceIdx = 0);
+
/// Returns the default initialized model.
static const MCSchedModel &GetDefaultSchedModel() { return Default; }
static const MCSchedModel Default;