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Olivier Deprez62405ad2020-10-26 18:51:49 +01001# Change log
2
3## v2.4
4
5This is the first drop to implement the TrustZone secure side S-EL2 firmware
Olivier Deprez410a3ac2020-11-04 13:54:15 +01006(SPM Core component) complying with FF-A v1.0.
Olivier Deprez62405ad2020-10-26 18:51:49 +01007It is a companion to the broader TF-A v2.4 release.
8The normal world Hypervisor is maintained functional along with the
9Hafnium CI test suite.
10
11* FF-A v1.0 Setup and discovery interface
12 * Hypervisor implementation re-used and extended to the SPMC and SPs.
13 * Added partition info get ABI and appropriate properties response depending
14 on partition capabilities (PVM, Secondary VM or Secure Partitions).
15 * FF-A device-tree manifest parsing.
16 * FF-A partitions can declare memory/device regions, and RX/TX buffers that
17 the SPMC sets up in the SP EL1&0 Stage-2 translation regime at boot time.
18 * FF-A IDs normal and secure world split ranges.
19 * The SPMC maps the Hypervisor (or OS kernel) RX/TX buffers as non-secure
20 buffers in its EL2 Stage-1 translation regime on FFA_RXTX_MAP ABI
21 invocation from the non-secure physical FF-A instance.
22* FF-A v1.0 Direct message interface
23 * Added implementation for the normal world Hypervisor and test cases.
24 * Implementation extended to the SPMC and SPs.
25 * Direct message requests emitted from the PVM to a Secondary VM or a
26 Secure Partition (or OS Kernel to a Secure Partition). Direct message
27 responses emitted from Secondary VMs and Secure Partitions to the PVM.
28 * The secure world represents the "other world" (normal world Hypervisor
29 or OS kernel) vCPUs in an abstract "Hypervisor VM".
30* FF-A v1.0 memory sharing
31 * Hypervisor implementation re-used and extended to the SPMC and SPs.
32 * A NS buffer can be shared/lent/donated by a VM to a SP (or OS Kernel
33 to a SP).
34 * The secure world configures Stage-1 NS IPA output to access the NS PA
35 space.
36 * The secure world represents the "other world" (normal world Hypervisor
37 or OS kernel) memory pages in an abstract "Hypervisor VM" and tracks
38 memory sharing permissions from incoming normal world requests.
39* Secure world enablement
Olivier Deprez410a3ac2020-11-04 13:54:15 +010040 * Secure Partitions booted in sequence on their primary execution context,
41 according to the boot order field in their partition manifest.
42 This happens during the secure boot process before the normal world
43 actually runs.
Olivier Deprez62405ad2020-10-26 18:51:49 +010044 * The SPMC implements the logic to receive FF-A messages through the EL3
45 SPMD, process them, and either return to the SPMD (and normal world) or
46 resume a Secure Partition.
47 * Extract NS bit from HPFAR_EL2 on Stage-2 page fault.
48 * Prevent setup of LOR regions in SWd.
49 * Avoid direct PSCI calls down to EL3.
50* Platforms
51 * Added Arm FVP secure Hafnium build support.
52 * Added Arm TC0 "Total Compute" secure Hafnium build support.
53* Other improvements
54 * Re-hosting to trustedfirmware.org
55 * busy_secondary timer increased to improve CI stability.
56 * Removed legacy Hypervisor calls.
57 * Fix CPTR_EL2 TTA bit position.
58 * Report FAR_EL2 on injecting EL1 exception.
59* Known limitations:
60 * Not all fields of the FF-A manifest are actually processed by the Hafnium
61 device-tree parser.
62 * SP to SP communication not supported.
63 * SP to SP memory sharing not supported.
Olivier Deprez410a3ac2020-11-04 13:54:15 +010064 * S-EL1 and SIMD contexts shall be saved/restored by EL3.
65 * Multi-endpoint memory sharing not supported.
Olivier Deprez62405ad2020-10-26 18:51:49 +010066 * Interrupt management limited to trapping physical interrupts to
67 the first S-EL1 SP. Physical interrupt trapping at S-EL2 planned as
68 next release improvement.
69 * Validation mostly performed using first SP Execution Context (vCPU0). More
70 comprehensive multicore enablement planned as next release improvement.