Fuad Tabba | f1d6dc5 | 2019-09-18 17:33:14 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2019 The Hafnium Authors. |
| 3 | * |
Andrew Walbran | e959ec1 | 2020-06-17 15:01:09 +0100 | [diff] [blame] | 4 | * Use of this source code is governed by a BSD-style |
| 5 | * license that can be found in the LICENSE file or at |
| 6 | * https://opensource.org/licenses/BSD-3-Clause. |
Fuad Tabba | f1d6dc5 | 2019-09-18 17:33:14 +0100 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #pragma once |
| 10 | |
| 11 | #include "hf/arch/types.h" |
| 12 | |
| 13 | #include "hf/cpu.h" |
| 14 | |
Andrew Walbran | b5ab43c | 2020-04-30 11:32:54 +0100 | [diff] [blame] | 15 | #include "vmapi/hf/ffa.h" |
Fuad Tabba | f1d6dc5 | 2019-09-18 17:33:14 +0100 | [diff] [blame] | 16 | |
| 17 | /** |
Fuad Tabba | f1d6dc5 | 2019-09-18 17:33:14 +0100 | [diff] [blame] | 18 | * Set to disable cycle counting when event counting is prohibited. |
| 19 | */ |
| 20 | #define PMCR_EL0_DP 0x10 |
| 21 | |
| 22 | /** |
| 23 | * Set to enable export of events where not prohibited. |
| 24 | */ |
| 25 | #define PMCR_EL0_X 0x8 |
| 26 | |
| 27 | /** |
| 28 | * Set to enable event counting. |
| 29 | */ |
| 30 | #define PMCR_EL0_E 0x1 |
| 31 | |
| 32 | /** |
| 33 | * Set to disable cycle counting in EL1. |
| 34 | */ |
| 35 | #define PMCCFILTR_EL0_P 0x80000000 |
| 36 | |
| 37 | /** |
| 38 | * Set to disable cycle counting in EL0. |
| 39 | */ |
| 40 | #define PMCCFILTR_EL0_U 0x40000000 |
| 41 | |
| 42 | /** |
| 43 | * Cycle counting in non-secure EL1 is enabled if NSK == P. |
| 44 | */ |
| 45 | #define PMCCFILTR_EL0_NSK 0x20000000 |
| 46 | |
| 47 | /** |
| 48 | * Cycle counting in non-secure EL0 is enabled if NSU == U. |
| 49 | */ |
| 50 | #define PMCCFILTR_EL0_NSU 0x10000000 |
| 51 | |
| 52 | /** |
| 53 | * Set to enable cycle counting in EL2. |
| 54 | */ |
| 55 | #define PMCCFILTR_EL0_NSH 0x8000000 |
| 56 | |
| 57 | /** |
| 58 | * Cycle counting in EL3 is enabled if M == P. |
| 59 | */ |
| 60 | #define PMCCFILTR_EL0_M 0x4000000 |
| 61 | |
| 62 | /** |
| 63 | * Cycle counting in Secutre EL2 is enabled if SH != NSH. |
| 64 | */ |
| 65 | #define PMCCFILTR_EL0_SH 0x1000000 |
| 66 | |
| 67 | bool perfmon_is_register_access(uintreg_t esr_el2); |
| 68 | |
Andrew Walbran | b5ab43c | 2020-04-30 11:32:54 +0100 | [diff] [blame] | 69 | bool perfmon_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id, |
Fuad Tabba | f1d6dc5 | 2019-09-18 17:33:14 +0100 | [diff] [blame] | 70 | uintreg_t esr_el2); |
| 71 | |
Andrew Walbran | b5ab43c | 2020-04-30 11:32:54 +0100 | [diff] [blame] | 72 | uintreg_t perfmon_get_pmccfiltr_el0_init_value(ffa_vm_id_t vm_id); |