Fix warnings from new version of clang tidy.

Change-Id: I2c85c8addd2bec83fa3796bb3ca8e87f5523a6fc
diff --git a/src/api.c b/src/api.c
index c16a808..e7c2d01 100644
--- a/src/api.c
+++ b/src/api.c
@@ -296,7 +296,7 @@
 					 struct vcpu **next)
 {
 	uint32_t intid_index = intid / INTERRUPT_REGISTER_BITS;
-	uint32_t intid_mask = 1u << (intid % INTERRUPT_REGISTER_BITS);
+	uint32_t intid_mask = 1U << (intid % INTERRUPT_REGISTER_BITS);
 	int64_t ret = 0;
 
 	sl_lock(&target_vcpu->lock);
@@ -1253,7 +1253,7 @@
 int64_t api_interrupt_enable(uint32_t intid, bool enable, struct vcpu *current)
 {
 	uint32_t intid_index = intid / INTERRUPT_REGISTER_BITS;
-	uint32_t intid_mask = 1u << (intid % INTERRUPT_REGISTER_BITS);
+	uint32_t intid_mask = 1U << (intid % INTERRUPT_REGISTER_BITS);
 
 	if (intid >= HF_NUM_INTIDS) {
 		return -1;
@@ -1315,7 +1315,7 @@
 			 * Mark it as no longer pending and decrement the count.
 			 */
 			current->interrupts.interrupt_pending[i] &=
-				~(1u << bit_index);
+				~(1U << bit_index);
 			current->interrupts.enabled_and_pending_count--;
 			first_interrupt =
 				i * INTERRUPT_REGISTER_BITS + bit_index;
diff --git a/src/arch/aarch64/cpu.c b/src/arch/aarch64/cpu.c
index 42400e5f..5e434f2 100644
--- a/src/arch/aarch64/cpu.c
+++ b/src/arch/aarch64/cpu.c
@@ -42,15 +42,15 @@
 #if GIC_VERSION == 3 || GIC_VERSION == 4
 	uint32_t ich_hcr = 0;
 	uint32_t icc_sre_el2 =
-		(1u << 0) | /* SRE, enable ICH_* and ICC_* at EL2. */
+		(1U << 0) | /* SRE, enable ICH_* and ICC_* at EL2. */
 		(0x3 << 1); /* DIB and DFB, disable IRQ/FIQ bypass. */
 
 	if (is_primary) {
-		icc_sre_el2 |= 1u << 3; /* Enable EL1 access to ICC_SRE_EL1. */
+		icc_sre_el2 |= 1U << 3; /* Enable EL1 access to ICC_SRE_EL1. */
 	} else {
 		/* Trap EL1 access to GICv3 system registers. */
 		ich_hcr =
-			(0x1fu << 10); /* TDIR, TSEI, TALL1, TALL0, TC bits. */
+			(0x1fU << 10); /* TDIR, TSEI, TALL1, TALL0, TC bits. */
 	}
 	r->gic.ich_hcr_el2 = ich_hcr;
 	r->gic.icc_sre_el2 = icc_sre_el2;
@@ -75,8 +75,8 @@
 
 	if (is_primary) {
 		cnthctl |=
-			(1u << 0) | /* EL1PCTEN, don't trap phys cnt access. */
-			(1u << 1);  /* EL1PCEN, don't trap phys timer access. */
+			(1U << 0) | /* EL1PCTEN, don't trap phys cnt access. */
+			(1U << 1);  /* EL1PCEN, don't trap phys timer access. */
 	}
 
 	r->lazy.hcr_el2 = get_hcr_el2_value(vm_id);
@@ -98,7 +98,7 @@
 	 * save/restore EL1 debug register state that either might change, or
 	 * that needs to be protected.
 	 */
-	r->lazy.mdscr_el1 = 0x0u & ~(0x1u << 15);
+	r->lazy.mdscr_el1 = 0x0U & ~(0x1U << 15);
 
 	/* Disable cycle counting on initialization. */
 	r->lazy.pmccfiltr_el0 = perfmon_get_pmccfiltr_el0_init_value(vm_id);
diff --git a/src/arch/aarch64/hftest/interrupts_gicv3.c b/src/arch/aarch64/hftest/interrupts_gicv3.c
index e418546..a5df6ff 100644
--- a/src/arch/aarch64/hftest/interrupts_gicv3.c
+++ b/src/arch/aarch64/hftest/interrupts_gicv3.c
@@ -45,16 +45,16 @@
 
 void interrupt_gic_setup(void)
 {
-	uint32_t ctlr = 1u << 4    /* Enable affinity routing. */
-			| 1u << 1; /* Enable group 1 non-secure interrupts. */
+	uint32_t ctlr = 1U << 4    /* Enable affinity routing. */
+			| 1U << 1; /* Enable group 1 non-secure interrupts. */
 
 	write_msr(ICC_CTLR_EL1, 0);
 
 	io_write32(GICD_CTLR, ctlr);
 
 	/* Mark CPU as awake. */
-	io_write32(GICR_WAKER, io_read32(GICR_WAKER) & ~(1u << 1));
-	while ((io_read32(GICR_WAKER) & (1u << 2)) != 0) {
+	io_write32(GICR_WAKER, io_read32(GICR_WAKER) & ~(1U << 1));
+	while ((io_read32(GICR_WAKER) & (1U << 2)) != 0) {
 		dlog("Waiting for ChildrenAsleep==0\n");
 	}
 
@@ -72,7 +72,7 @@
 void interrupt_enable(uint32_t intid, bool enable)
 {
 	uint32_t index = intid / 32;
-	uint32_t bit = 1u << (intid % 32);
+	uint32_t bit = 1U << (intid % 32);
 
 	if (enable) {
 		io_write32_array(GICD_ISENABLER, index, bit);
@@ -117,7 +117,7 @@
 void interrupt_set_edge_triggered(uint32_t intid, bool edge_triggered)
 {
 	uint32_t index = intid / 16;
-	uint32_t bit = 1u << (((intid % 16) * 2) + 1);
+	uint32_t bit = 1U << (((intid % 16) * 2) + 1);
 
 	if (intid < 32) {
 		uint32_t v = io_read32_array(GICR_ICFGR, index);
@@ -166,7 +166,7 @@
 	case 0x25: /* EC = 100101, Data abort. */
 		dlog("Data abort: pc=%#x, esr=%#x, ec=%#x", elr, esr,
 		     esr >> 26);
-		if (!(esr & (1u << 10))) { /* Check FnV bit. */
+		if (!(esr & (1U << 10))) { /* Check FnV bit. */
 			dlog(", far=%#x", read_msr(far_el1));
 		} else {
 			dlog(", far=invalid");
diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c
index 33bde5e..8132406 100644
--- a/src/arch/aarch64/hypervisor/handler.c
+++ b/src/arch/aarch64/hypervisor/handler.c
@@ -207,7 +207,7 @@
 	switch (ec) {
 	case 0x25: /* EC = 100101, Data abort. */
 		dlog("Data abort: pc=%#x, esr=%#x, ec=%#x", elr, esr, ec);
-		if (!(esr & (1u << 10))) { /* Check FnV bit. */
+		if (!(esr & (1U << 10))) { /* Check FnV bit. */
 			dlog(", far=%#x", read_msr(far_el2));
 		} else {
 			dlog(", far=invalid");
@@ -540,7 +540,7 @@
 	 * Check the FnV bit, which is only valid if dfsc/ifsc is 010000. It
 	 * indicates that we cannot rely on far_el2.
 	 */
-	if (fsc == 0x10 && esr & (1u << 10)) {
+	if (fsc == 0x10 && esr & (1U << 10)) {
 		r.vaddr = va_init(0);
 		r.ipaddr = ipa_init(read_msr(hpfar_el2) << 8);
 	} else {
@@ -578,7 +578,7 @@
 
 	case 0x24: /* EC = 100100, Data abort. */
 		info = fault_info_init(
-			esr, vcpu, (esr & (1u << 6)) ? MM_MODE_W : MM_MODE_R);
+			esr, vcpu, (esr & (1U << 6)) ? MM_MODE_W : MM_MODE_R);
 		if (vcpu_handle_page_fault(vcpu, &info)) {
 			return NULL;
 		}
diff --git a/src/arch/aarch64/mm.c b/src/arch/aarch64/mm.c
index 65fcef4..d8dda85 100644
--- a/src/arch/aarch64/mm.c
+++ b/src/arch/aarch64/mm.c
@@ -650,7 +650,7 @@
 		.ttbr0_el2 = pa_addr(table),
 
 		.vtcr_el2 =
-			(1u << 31) |		   /* RES1. */
+			(1U << 31) |		   /* RES1. */
 			((features & 0xf) << 16) | /* PS, matching features. */
 			(0 << 14) |		   /* TG0: 4 KB granule. */
 			(3 << 12) |		   /* SH0: inner shareable. */
diff --git a/src/arch/aarch64/std.c b/src/arch/aarch64/std.c
index 3534702..c7f109d 100644
--- a/src/arch/aarch64/std.c
+++ b/src/arch/aarch64/std.c
@@ -47,7 +47,16 @@
 	const char *y;
 
 	if (dst < src) {
+		/*
+		 * Clang analyzer doesn't like us calling unsafe memory
+		 * functions, so make it ignore this while still knowing that
+		 * the function returns.
+		 */
+#ifdef __clang_analyzer__
+		return dst;
+#else
 		return memcpy(dst, src, n);
+#endif
 	}
 
 	x = (char *)dst + n - 1;
diff --git a/src/std.c b/src/std.c
index 84806e2..4576118 100644
--- a/src/std.c
+++ b/src/std.c
@@ -49,7 +49,13 @@
 	CHECK_OR_FILL(destsz <= RSIZE_MAX, dest, destsz, ch);
 	CHECK_OR_FILL(count <= destsz, dest, destsz, ch);
 
+	/*
+	 * Clang analyzer doesn't like us calling unsafe memory functions, so
+	 * make it ignore this call.
+	 */
+#ifndef __clang_analyzer__
 	memset(dest, ch, count);
+#endif
 }
 
 void memcpy_s(void *dest, rsize_t destsz, const void *src, rsize_t count)
@@ -73,7 +79,9 @@
 	CHECK_OR_ZERO_FILL(d < s || d >= (s + count), dest, destsz);
 	CHECK_OR_ZERO_FILL(d > s || s >= (d + count), dest, destsz);
 
+#ifndef __clang_analyzer__
 	memcpy(dest, src, count);
+#endif
 }
 
 void memmove_s(void *dest, rsize_t destsz, const void *src, rsize_t count)
@@ -85,7 +93,9 @@
 	CHECK_OR_ZERO_FILL(destsz <= RSIZE_MAX, dest, destsz);
 	CHECK_OR_ZERO_FILL(count <= destsz, dest, destsz);
 
+#ifndef __clang_analyzer__
 	memmove(dest, src, count);
+#endif
 }
 
 /**