aarch64: enable secure EL1/EL0 stage-1 translation regime
VSTTBR_EL2 set to the the value of VTTBR_EL2
VSTCR_EL2 set to the the value of VTCR_EL2
Change-Id: I6a893a690650f73412a0c238ad231c572aba16ad
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
diff --git a/src/arch/aarch64/hypervisor/exceptions.S b/src/arch/aarch64/hypervisor/exceptions.S
index 6253ab6..beecc64 100644
--- a/src/arch/aarch64/hypervisor/exceptions.S
+++ b/src/arch/aarch64/hypervisor/exceptions.S
@@ -7,6 +7,7 @@
*/
#include "hf/arch/offsets.h"
+#include "msr.h"
#include "exception_macros.S"
/**
@@ -430,6 +431,10 @@
msr cnthctl_el2, x26
msr vttbr_el2, x27
+#if SECURE_WORLD == 1
+ msr MSR_VSTTBR_EL2, x27
+#endif
+
ldp x4, x5, [x28], #16
msr mdcr_el2, x4
msr mdscr_el1, x5