FF-A: Register SPMC secondary core entry point.
When the primary physical core boots, the SPMC registers
the entry point (FFA_SECONDARY_EP_REGISTER at physical
FF-A instance) used for secondary core cold boot to the
SPMD. All Secure Partitions are then initialized on their
primary Execution Context. When the NWd (Hypervisor or OS
Kernel) boots, it calls PSCI_CPU_ON (into EL3) for waking
up physical cores. The PSCI layer calls into SPMD PM hooks,
then the SPMD calls into the SPMC by an exception return to
the registered secondary entry point. The target secondary
core then reaches vcpu_main. As follow-up to 56a62c96, PSCI
service calls from within the SWd are prevented.
Change-Id: I2bd42ea54e1a7feebff20e878345ec196ff352e9
Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
diff --git a/src/cpu.c b/src/cpu.c
index 11eb0a3..42c2428 100644
--- a/src/cpu.c
+++ b/src/cpu.c
@@ -10,6 +10,8 @@
#include <stdalign.h>
+#include "hf/arch/cache.h"
+
#include "hf/api.h"
#include "hf/check.h"
#include "hf/dlog.h"
@@ -70,7 +72,7 @@
},
};
-static uint32_t cpu_count = 1;
+uint32_t cpu_count = 1;
void cpu_module_init(const cpu_id_t *cpu_ids, size_t count)
{
@@ -111,6 +113,15 @@
dlog_warning("Boot CPU's ID not found in config.\n");
cpus[0].id = boot_cpu_id;
}
+
+ /*
+ * Clean the cache for the cpus array such that secondary cores
+ * hitting the entry point can read the cpus array consistently
+ * with MMU off (hence data cache off).
+ */
+ arch_cache_clean_range(va_from_ptr(cpus), sizeof(cpus));
+
+ arch_cache_clean_range(va_from_ptr(&cpu_count), sizeof(cpu_count));
}
size_t cpu_index(struct cpu *c)