Hide switch to primary logic.
This should not be called directly by arch code.
Change-Id: I8a83179d66565e571ff4a4b254020af4a06a937b
diff --git a/src/api.c b/src/api.c
index b28cd59..6b9e37c 100644
--- a/src/api.c
+++ b/src/api.c
@@ -14,8 +14,8 @@
/**
* Switches the physical CPU back to the corresponding vcpu of the primary VM.
*/
-struct vcpu *api_switch_to_primary(size_t primary_retval,
- enum vcpu_state secondary_state)
+static struct vcpu *api_switch_to_primary(size_t primary_retval,
+ enum vcpu_state secondary_state)
{
struct vcpu *vcpu = cpu()->current;
struct vm *primary = vm_get(HF_PRIMARY_VM_ID);
@@ -116,17 +116,6 @@
}
/**
- * Puts the current vcpu in wait for interrupt mode, and returns to the primary
- * vm.
- */
-struct vcpu *api_wait_for_interrupt(void)
-{
- return api_switch_to_primary(
- HF_VCPU_RUN_RESPONSE(HF_VCPU_RUN_WAIT_FOR_INTERRUPT, 0),
- vcpu_state_blocked_interrupt);
-}
-
-/**
* Configures the VM to send/receive data through the specified pages. The pages
* must not be shared.
*/
@@ -435,3 +424,24 @@
return ret;
}
+
+/**
+ * Returns to the primary vm leaving the current vcpu ready to be scheduled
+ * again.
+ */
+struct vcpu *api_yield(void)
+{
+ return api_switch_to_primary(HF_VCPU_RUN_RESPONSE(HF_VCPU_RUN_YIELD, 0),
+ vcpu_state_ready);
+}
+
+/**
+ * Puts the current vcpu in wait for interrupt mode, and returns to the primary
+ * vm.
+ */
+struct vcpu *api_wait_for_interrupt(void)
+{
+ return api_switch_to_primary(
+ HF_VCPU_RUN_RESPONSE(HF_VCPU_RUN_WAIT_FOR_INTERRUPT, 0),
+ vcpu_state_blocked_interrupt);
+}
diff --git a/src/arch/aarch64/handler.c b/src/arch/aarch64/handler.c
index 538c3b3..88aaf38 100644
--- a/src/arch/aarch64/handler.c
+++ b/src/arch/aarch64/handler.c
@@ -214,8 +214,7 @@
/* TODO: Only switch if we know the interrupt was not for the secondary
* VM. */
/* Switch back to primary VM, interrupts will be handled there. */
- return api_switch_to_primary(HF_VCPU_RUN_RESPONSE(HF_VCPU_RUN_YIELD, 0),
- vcpu_state_ready);
+ return api_yield();
}
struct vcpu *sync_lower_exception(uint64_t esr)