VHE: Update cpu code to allow for el0 partition execution
To run a el0 partitions vcpu the following changes are required:
1) HCR_EL2.TGE bit always needs to be set.
2) SPSR needs to be set to EL0t mode.
3) ttbr0_el2 needs to switched to the appropriate table. To do this a
new vcpu field for ttbr0_el2 is added. For normal VM's, ttbr0_el2 is the
same as the hypervisor page tables and for el0 partition's, the
appropriate page table and asid are used. ttbr0_el2 is now loaded on
every exit from el2.
Change-Id: I92a44874d820080a8e9a66dc0b6a628bf94d0b9d
Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com>
diff --git a/src/arch/aarch64/hypervisor/exceptions.S b/src/arch/aarch64/hypervisor/exceptions.S
index fb57960..2482d92 100644
--- a/src/arch/aarch64/hypervisor/exceptions.S
+++ b/src/arch/aarch64/hypervisor/exceptions.S
@@ -805,6 +805,11 @@
ldr x1, [x0, #VCPU_REGS + 8 * 33]
msr hcr_el2, x1
+ isb
+
+ ldr x1, [x0, #VCPU_REGS + 8 * 34]
+ msr ttbr0_el2, x1
+ isb
/* Restore x0..x3, which we have used as scratch before. */
ldp x2, x3, [x0, #VCPU_REGS + 8 * 2]