refactor: add `GET_ESR_FNV`

Add a macro for getting the `FAR not Valid` bit from the ESR for data
aborts, and replace manual bit-shifts with `GET_ESR_FNV.

Change-Id: Ia0dd830550fd411dd9d8e63aacc0fcf30626015e
Signed-off-by: Karl Meakin <karl.meakin@arm.com>
diff --git a/src/arch/aarch64/hftest/interrupts.c b/src/arch/aarch64/hftest/interrupts.c
index 3ce0c55..5a11e67 100644
--- a/src/arch/aarch64/hftest/interrupts.c
+++ b/src/arch/aarch64/hftest/interrupts.c
@@ -13,6 +13,7 @@
 #include "hf/dlog.h"
 
 #include "msr.h"
+#include "sysregs_defs.h"
 #include "test/hftest.h"
 
 extern uint8_t vector_table_el1;
@@ -42,10 +43,10 @@
 	uintreg_t elr = read_msr(elr_el1);
 
 	switch (esr >> 26) {
-	case 0x25: /* EC = 100101, Data abort. */
+	case EC_DATA_ABORT_SAME_EL: /* EC = 100101, Data abort. */
 		dlog("Data abort: pc=%#lx, esr=%#lx, ec=%#lx", elr, esr,
 		     esr >> 26);
-		if (!(esr & (1U << 10))) { /* Check FnV bit. */
+		if (!GET_ESR_FNV(esr)) {
 			dlog(", far=%#lx", read_msr(far_el1));
 		} else {
 			dlog(", far=invalid");
diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c
index c4cb02b..cc6cfea 100644
--- a/src/arch/aarch64/hypervisor/handler.c
+++ b/src/arch/aarch64/hypervisor/handler.c
@@ -36,6 +36,7 @@
 #include "psci_handler.h"
 #include "smc.h"
 #include "sysregs.h"
+#include "sysregs_defs.h"
 
 /**
  * Hypervisor Fault Address Register Non-Secure.
@@ -280,7 +281,7 @@
 			}
 		}
 
-		if (!(esr & (1U << 10))) { /* Check FnV bit. */
+		if (!GET_ESR_FNV(esr)) {
 			dlog_error(
 				"Data abort: pc=%#lx, esr=%#lx, ec=%#lx, "
 				"far=%#lx\n",
@@ -1303,7 +1304,7 @@
 	 * Check the FnV bit, which is only valid if dfsc/ifsc is 010000. It
 	 * indicates that we cannot rely on far_el2.
 	 */
-	if (fsc == 0x10 && esr & (1U << 10)) {
+	if (fsc == 0x10 && GET_ESR_FNV(esr)) {
 		r.vaddr = va_init(0);
 		r.ipaddr = ipa_init(hpfar_el2_fipa);
 	} else {
diff --git a/src/arch/aarch64/sysregs_defs.h b/src/arch/aarch64/sysregs_defs.h
index 68a8321..06036c6 100644
--- a/src/arch/aarch64/sysregs_defs.h
+++ b/src/arch/aarch64/sysregs_defs.h
@@ -109,6 +109,11 @@
 #define GET_ESR_ISS_DFSC(iss) ((iss) & (0x3FU))
 
 /**
+ * Gets the FAR not Valid bit
+ */
+#define GET_ESR_FNV(esr) ((esr) & (1 << 10U))
+
+/**
  * Define DFSC due to Granule protection fault if this is an RME
  * enabled platform.
  */