feat: boot secondary vCPU of SP upon CPU_ON pwr mgmt event
When a secondary CPU is turned on, SPMC receives the PSCI CPU_ON
power management message from SPMD. Currently, SPMC only resumes
the pinned vCPU of the first SP (based on boot order) to allow
it to initialize itself. Once the vCPU has initialized, SPMC
relinquishes CPU cycles to the normal world.
This patch implements the support for secondary boot protocol. Each
pinned execution context of every MP SP is woken up by SPMC, thereby
giving an opportunity to the SP's vCPU on secondary CPU to initialize
itself.
Note that if a system does not have MP SPs, then there are no pinned
execution contexts on secondary CPUs.
Change-Id: I395d0456595dd904bcb63a6d62447f07e044b812
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
diff --git a/inc/hf/cpu.h b/inc/hf/cpu.h
index ad82e9f..cd384fc 100644
--- a/inc/hf/cpu.h
+++ b/inc/hf/cpu.h
@@ -16,6 +16,8 @@
#include "hf/timer_mgmt.h"
+#define PRIMARY_CPU_IDX 0U
+
/* TODO: Fix alignment such that `cpu` structs are in different cache lines. */
/* NOLINTNEXTLINE(clang-analyzer-optin.performance.Padding) */
struct cpu {
@@ -42,6 +44,12 @@
/* Head of the list of vcpus with pending IPIs. */
struct list_entry pending_ipis;
+
+ /**
+ * Denotes if the last MP SP's execution context, pinned on this CPU,
+ * has been initialized.
+ */
+ bool last_sp_initialized;
};
void cpu_module_init(const cpu_id_t *cpu_ids, size_t count);