smc wrapper function conformance
smc wrapper function accepts all arguments and returns all four result
registers.
Bug: 132421503
Change-Id: If3030df8ffe77f26a89d73959d9e05c3bd269c05
diff --git a/src/arch/aarch64/hypervisor/psci_handler.c b/src/arch/aarch64/hypervisor/psci_handler.c
index 5f5f211..ad3447f 100644
--- a/src/arch/aarch64/hypervisor/psci_handler.c
+++ b/src/arch/aarch64/hypervisor/psci_handler.c
@@ -37,7 +37,9 @@
/* Performs arch specific boot time initialisation. */
void arch_one_time_init(void)
{
- el3_psci_version = smc32(PSCI_VERSION, 0, 0, 0);
+ smc_res_t smc_res = smc32(PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0);
+
+ el3_psci_version = smc_res.res0;
/* Check there's nothing unexpected about PSCI. */
switch (el3_psci_version) {
@@ -69,6 +71,7 @@
uintreg_t arg1, uintreg_t arg2, uintreg_t *ret)
{
struct cpu *c;
+ smc_res_t smc_res;
/*
* If there's a problem with the EL3 PSCI, block standard secure service
@@ -100,7 +103,8 @@
*ret = 0;
} else {
/* PSCI 1.x only defines two feature bits. */
- *ret = smc32(func, arg0, 0, 0) & 0x3;
+ smc_res = smc32(func, arg0, 0, 0, 0, 0, 0, 0);
+ *ret = smc_res.res0 & 0x3;
}
break;
@@ -123,12 +127,12 @@
break;
case PSCI_SYSTEM_OFF:
- smc32(PSCI_SYSTEM_OFF, 0, 0, 0);
+ smc32(PSCI_SYSTEM_OFF, 0, 0, 0, 0, 0, 0, 0);
panic("System off failed");
break;
case PSCI_SYSTEM_RESET:
- smc32(PSCI_SYSTEM_RESET, 0, 0, 0);
+ smc32(PSCI_SYSTEM_RESET, 0, 0, 0, 0, 0, 0, 0);
panic("System reset failed");
break;
@@ -161,14 +165,15 @@
* vcpu registers will be ignored.
*/
arch_regs_set_pc_arg(&vcpu->regs, ipa_init(arg1), arg2);
- *ret = smc64(PSCI_CPU_SUSPEND, arg0, (uintreg_t)&cpu_entry,
- (uintreg_t)vcpu->cpu);
+ smc_res = smc64(PSCI_CPU_SUSPEND, arg0, (uintreg_t)&cpu_entry,
+ (uintreg_t)vcpu->cpu, 0, 0, 0, 0);
+ *ret = smc_res.res0;
break;
}
case PSCI_CPU_OFF:
cpu_off(vcpu->cpu);
- smc32(PSCI_CPU_OFF, 0, 0, 0);
+ smc32(PSCI_CPU_OFF, 0, 0, 0, 0, 0, 0, 0);
panic("CPU off failed");
break;
@@ -191,8 +196,10 @@
* itself off).
*/
do {
- *ret = smc64(PSCI_CPU_ON, arg0, (uintreg_t)&cpu_entry,
- (uintreg_t)c);
+ smc_res =
+ smc64(PSCI_CPU_ON, arg0, (uintreg_t)&cpu_entry,
+ (uintreg_t)c, 0, 0, 0, 0);
+ *ret = smc_res.res0;
} while (*ret == PSCI_ERROR_ALREADY_ON);
if (*ret != PSCI_RETURN_SUCCESS) {