RSE: Add BL1_1 tests with PCI mode
Add a new configuration which specifies that the BL1_1 tests should be
run in PCI mode (instead of the default which is TCI). Jobs are then
added with this configuration in per-patch and nightly for TC4.
Change-Id: Ieb85387d5a3441562e9333c55113775193edf85f
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
diff --git a/build_helper/build_helper_config_maps.py b/build_helper/build_helper_config_maps.py
index dcffcde..64ebfdb 100644
--- a/build_helper/build_helper_config_maps.py
+++ b/build_helper/build_helper_config_maps.py
@@ -162,6 +162,9 @@
# RSE ROM Relocation
"RSE_SUPPORT_ROM_LIB_RELOCATION_OFF" : ("-DRSE_SUPPORT_ROM_LIB_RELOCATION=OFF"),
+
+ # RSE test suite configuration
+ "RSE_RUN_BL1_1_TESTS_IN_PCI" : ("-DRSE_TESTS_TP_MODE=PCI")
}
mapTfmExtrasExamplePaths = {
diff --git a/build_helper/build_helper_configs.py b/build_helper/build_helper_configs.py
index 31a1c0e..29585de 100755
--- a/build_helper/build_helper_configs.py
+++ b/build_helper/build_helper_configs.py
@@ -375,6 +375,9 @@
# RSE_TC4_GCC_2_RegBL1_1_Debug_BL2
("arm/rse/tc/tc4", "GCC_13_2", "2",
"RegBL1_1", "OFF", "Debug", True, "", ""),
+ # RSE_TC4_GCC_2_RegBL1_1_Debug_BL2
+ ("arm/rse/tc/tc4", "GCC_13_2", "2",
+ "RegBL1_1", "OFF", "Debug", True, "", "RSE_RUN_BL1_1_TESTS_IN_PCI"),
# RSE_TC4_GCC_2_Release_BL2_ATTESTATION_SCHEME_CCA
("arm/rse/tc/tc4", "GCC_13_2", "2",
"OFF", "OFF", "Release", True, "", "ATTESTATION_SCHEME_CCA"),
@@ -1100,6 +1103,9 @@
"valid": [
("arm/rse/tc/tc4", "*", "*", "*", "*",
"MinSizeRel", True, "*", "RSE_COPY_USE_ROM_LIB_IN_SRAM"),
+ # RSE_RUN_BL1_1_TESTS_IN_PCI only relevant when running BL1_1 tests
+ ("arm/rse/tc/tc4", "*", "*", "RegBL1_1", "*",
+ "*", True, "*", "RSE_RUN_BL1_1_TESTS_IN_PCI"),
]
}