diff --git a/build_helper/build_helper_config_maps.py b/build_helper/build_helper_config_maps.py
index ca7670a..3bce28f 100644
--- a/build_helper/build_helper_config_maps.py
+++ b/build_helper/build_helper_config_maps.py
@@ -27,6 +27,7 @@
     "arm/mps4/corstone320"               : "corstone320",
     "arm/mps3/corstone310/fvp"           : "corstone310",
     "arm/rse/tc/tc3"                     : "RSE_TC3",
+    "arm/rse/tc/tc4"                     : "RSE_TC4",
     "arm/rse/neoverse_rd/rdv3"           : "RSE_RDV3",
     "arm/rse/automotive_rd/rd1ae"        : "RSE_RD1AE",
     "cypress/psoc64"                     : "psoc64",
diff --git a/build_helper/build_helper_configs.py b/build_helper/build_helper_configs.py
index c5bd3a1..9beaad6 100755
--- a/build_helper/build_helper_configs.py
+++ b/build_helper/build_helper_configs.py
@@ -138,6 +138,30 @@
                                    "--align 8192 --rse-sic-tables-ns %(ci_build_root_dir)s/nspe/bin/tfm_ns_sic_tables_signed.bin "
                                    "--out %(ci_build_root_dir)s/spe/bin/host_flash.bin "
                                    "fip.bin"),
+                    "arm/rse/tc/tc4": ("if [ -f \"%(ci_build_root_dir)s/spe/bin/rse_bl1_tests.bin\" ]; then "
+                                   "srec_cat "
+                                   "%(ci_build_root_dir)s/spe/bin/bl1_1.bin -Binary -offset 0x0 "
+                                   "%(ci_build_root_dir)s/spe/bin/rse_bl1_tests.bin -Binary -offset 0x10000 "
+                                   "%(ci_build_root_dir)s/spe/bin/rom_dma_ics.bin -Binary -offset 0x1F000 "
+                                   "-o %(ci_build_root_dir)s/spe/bin/rom.bin -Binary;"
+                                   "else "
+                                   "srec_cat "
+                                   "%(ci_build_root_dir)s/spe/bin/bl1_1.bin -Binary -offset 0x0 "
+                                   "%(ci_build_root_dir)s/spe/bin/rom_dma_ics.bin -Binary -offset 0x1F000 "
+                                   "-o %(ci_build_root_dir)s/spe/bin/rom.bin -Binary;"
+                                   "fi;"
+                                   # fiptool in tc3 directory also compatible with tc4 fip.bin
+                                   "curl --fail --no-progress-meter --connect-timeout 10 --retry 6 -LS -o fiptool https://downloads.trustedfirmware.org/tf-m/rse/tc/tc3/fiptool;"
+                                   "chmod 755 fiptool;"
+                                   "curl --fail --no-progress-meter --connect-timeout 10 --retry 6 -LS -o fip.bin https://downloads.trustedfirmware.org/tf-m/rse/tc/tc4/4806a3a08/fip.bin;"
+                                   "./fiptool update "
+                                   "--align 8192 --rse-bl2 %(ci_build_root_dir)s/spe/bin/bl2_signed.bin "
+                                   "--align 8192 --rse-s %(ci_build_root_dir)s/spe/bin/tfm_s_encrypted.bin "
+                                   "--align 8192 --rse-ns %(ci_build_root_dir)s/nspe/bin/tfm_ns_encrypted.bin "
+                                   "--align 8192 --rse-sic-tables-s %(ci_build_root_dir)s/spe/bin/tfm_s_sic_tables_signed.bin "
+                                   "--align 8192 --rse-sic-tables-ns %(ci_build_root_dir)s/nspe/bin/tfm_ns_sic_tables_signed.bin "
+                                   "--out %(ci_build_root_dir)s/spe/bin/host_flash.bin "
+                                   "fip.bin"),
                    "stm/stm32l562e_dk": ("echo 'STM32L562E-DK board post process';"
                                           "%(ci_build_root_dir)s/spe/api_ns/postbuild.sh;"
                                           "pushd %(ci_build_root_dir)s/spe/api_ns;"
@@ -237,6 +261,11 @@
                            "%(ci_build_root_dir)s/spe/bin/rom.bin",
                            "%(ci_build_root_dir)s/spe/bin/encrypted_cm_provisioning_bundle_0.bin",
                            "%(ci_build_root_dir)s/spe/bin/encrypted_dm_provisioning_bundle_0.bin",
+                           "%(ci_build_root_dir)s/spe/bin/host_flash.bin"],
+                           "arm/rse/tc/tc4": [
+                           "%(ci_build_root_dir)s/spe/bin/rom.bin",
+                           "%(ci_build_root_dir)s/spe/bin/encrypted_cm_provisioning_bundle_0.bin",
+                           "%(ci_build_root_dir)s/spe/bin/encrypted_dm_provisioning_bundle_0.bin",
                            "%(ci_build_root_dir)s/spe/bin/host_flash.bin"]
                            }
 }
@@ -366,6 +395,15 @@
                     # RSE_TC3_GCC_2_Release_BL2_ATTESTATION_SCHEME_CCA
                     ("arm/rse/tc/tc3", "GCC_10_3", "2",
                      "OFF", "OFF", "Release", True, "", "ATTESTATION_SCHEME_CCA"),
+                    # RSE_TC4_GCC_3_RegS_RegNS_Release_BL2_ATTESTATION_SCHEME_DPE
+                    ("arm/rse/tc/tc4", "GCC_10_3", "3",
+                     "RegS, RegNS", "OFF", "Release", True, "", "ATTESTATION_SCHEME_DPE"),
+                    # RSE_TC4_GCC_2_RegBL1_1_Debug_BL2
+                    ("arm/rse/tc/tc4", "GCC_10_3", "2",
+                     "RegBL1_1", "OFF", "Debug", True, "", ""),
+                    # RSE_TC4_GCC_2_Release_BL2_ATTESTATION_SCHEME_CCA
+                    ("arm/rse/tc/tc4", "GCC_10_3", "2",
+                     "OFF", "OFF", "Release", True, "", "ATTESTATION_SCHEME_CCA"),
                     # RSE_RDV3_GCC_2_Release_BL2_NSOFF_CFG0
                     ("arm/rse/neoverse_rd/rdv3", "GCC_10_3", "2",
                      "OFF", "OFF", "Release", True, "", "NSOFF, CFG0"),
@@ -960,6 +998,25 @@
                 ]
                 }
 
+config_rse_tc4 = {"seed_params": {
+                "tfm_platform":     ["arm/rse/tc/tc4"],
+                "compiler":         ["GCC_10_3"],
+                "isolation_level":  ["1", "2", "3"],
+                "test_regression":  ["OFF", "RegS, RegNS"],
+                "test_psa_api":     ["OFF"],
+                "cmake_build_type": ["Debug", "Release"],
+                "with_bl2":         [True],
+                "profile":          [""],
+                "extra_params":     ["ATTESTATION_SCHEME_DPE"]
+                },
+                "common_params": _common_tfm_builder_cfg,
+                "invalid": _common_tfm_invalid_configs + [
+                    # BL2 is too large for RSE in Debug builds with tests
+                    ("arm/rse/tc/tc4", "GCC_10_3", "*", "RegBL2, RegS, RegNS", "*",
+                     "Debug", True, "*", "*"),
+                ]
+                }
+
 config_rse_rdv3 = {"seed_params": {
                 "tfm_platform":     ["arm/rse/neoverse_rd/rdv3"],
                 "compiler":         ["GCC_10_3"],
@@ -1309,6 +1366,7 @@
                     "nightly_corstone320": config_corstone320,
                     "nightly_corstone1000": config_corstone1000,
                     "nightly_rse_tc3": config_rse_tc3,
+                    "nightly_rse_tc4": config_rse_tc4,
                     "nightly_rse_rdv3": config_rse_rdv3,
                     "nightly_rse_rd1ae": config_rse_rd1ae,
                     "nightly_psoc64": config_psoc64,
@@ -1337,6 +1395,7 @@
                     "release_corstone315": config_corstone315,
                     "release_corstone320": config_corstone320,
                     "release_rse_tc3": config_rse_tc3,
+                    "release_rse_tc4": config_rse_tc4,
                     "release_rse_rdv3": config_rse_rdv3,
                     "release_rse_rd1ae": config_rse_rd1ae,
                     "release_psoc64": config_psoc64,
@@ -1372,6 +1431,7 @@
                     "corstone315": config_corstone315,
                     "corstone320": config_corstone320,
                     "rse_tc3": config_rse_tc3,
+                    "rse_tc4": config_rse_tc4,
                     "rse_rdv3": config_rse_rdv3,
                     "rse_rd1ae": config_rse_rd1ae,
                     "cypress_psoc64": config_psoc64,
diff --git a/lava_helper/jinja2_templates/fvp_rse_tc4.jinja2 b/lava_helper/jinja2_templates/fvp_rse_tc4.jinja2
new file mode 100644
index 0000000..0ca7814
--- /dev/null
+++ b/lava_helper/jinja2_templates/fvp_rse_tc4.jinja2
@@ -0,0 +1,72 @@
+{#------------------------------------------------------------------------------
+# Copyright (c) 2018-2025, Arm Limited and Contributors. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+#-----------------------------------------------------------------------------#}
+{% extends 'jinja2_templates/base.jinja2' %}
+{% block metadata %}
+{{ super() }}
+{% endblock %}
+{% block base %}
+{{ super() }}
+{% endblock %}
+{% block actions %}
+context:
+  kernel_start_message: ''
+
+actions:
+- deploy:
+    to: fvp
+    images:
+{% for name, img in binaries.items() %}
+      {{ name }}:
+        url: {{ data_url_prefix }}/{{ img.data }}
+{% endfor %}
+- boot:
+    failure_retry: 3
+    method: fvp
+    docker:
+      name: {{ docker_prefix }}/fvp:fvp_tc4_0.0_8404
+      local: true
+    prompts:
+    - 'root@lava '
+    image: /opt/model/FVP_TC4/models/Linux64_GCC-9.3/FVP_TC4
+    timeout:
+      minutes: 10
+    console_string: 'rse_terminal_uart: Listening for serial connection on port (?P<PORT>\d+)'
+    license_variable: '{{ license_variable }}'
+    use_telnet: True
+    arguments:
+    -  "--simlimit 900"
+    -  "-C css.sms.rse.rom.raw_image={ROM}"
+    -  "--data css.sms.rse.sram0={CM_PROVISIONING_BUNDLE}@0x400"
+    -  "--data css.sms.rse.sram1={DM_PROVISIONING_BUNDLE}@0x0"
+    -  "-C board.flashloader0.fname={FLASH}"
+    -  "-C displayController=2"
+    -  "-C css.sms.rse.sic.SIC_AUTH_ENABLE=1"
+    -  "-C css.sms.rse.sic.SIC_DECRYPT_ENABLE=1"
+    -  "-C css.sms.rse.VMADDRWIDTH=16"
+    -  "-C css.sms.rse.intchecker.ICBC_RESET_VALUE=0x0000011B"
+    -  "-C soc.pl011_uart1.shutdown_on_eot=1"
+    -  "-C disable_visualisation=1"
+
+    prompts:
+    - '(.*)'
+
+- test:
+    monitors:
+    {%- for monitor in monitors %}
+    - name: "{{monitor.name}}"
+      start: "{{monitor.start}}"
+      end: "{{monitor.end}}"
+      pattern: "{{monitor.pattern}}"
+      fixupdict:
+         '{{monitor.fixup.pass}}': pass
+         '{{monitor.fixup.fail}}': fail
+         {%- if monitor.fixup.skip %}
+         '{{monitor.fixup.skip}}': skip
+         {%- endif %}
+    {%- endfor %}
+
+{% endblock %}
diff --git a/lava_helper/lava_helper_configs.py b/lava_helper/lava_helper_configs.py
index 6d7264e..65b7aa0 100644
--- a/lava_helper/lava_helper_configs.py
+++ b/lava_helper/lava_helper_configs.py
@@ -360,6 +360,36 @@
     }
 }
 
+# RSE on TC4 FVP
+fvp_rse_tc4 = {
+    "templ": "fvp_rse_tc4.jinja2",
+    "job_name": "fvp_rse_tc4",
+    "device_type": "fvp",
+    "job_timeout": 15,
+    "action_timeout": 10,
+    "monitor_timeout": 15,
+    "poweroff_timeout": 1,
+    "platforms": {"arm/rse/tc/tc4": ""},
+    "binaries": {
+        "rom": {
+            "data": "spe/bin/rom.bin"
+        },
+        "cm_provisioning_bundle": {
+            "data": "spe/bin/encrypted_cm_provisioning_bundle_0.bin"
+        },
+        "dm_provisioning_bundle": {
+            "data": "spe/bin/encrypted_dm_provisioning_bundle_0.bin"
+        },
+        "flash": {
+            "data": "spe/bin/host_flash.bin"
+        }
+    },
+    "monitors": {
+        'no_reg_tests': no_reg_tests_monitors,
+        'reg_tests': reg_tests_monitors,
+    }
+}
+
 # QEMU for AN521 with BL2 bootloader
 qemu_mps2_bl2 = {
     "templ": "qemu_mps2_bl2.jinja2",
@@ -532,6 +562,7 @@
     "fvp_mps4_cs320_bl1_bl2": fvp_mps4_cs320_bl1_bl2,
     "fvp_corstone1000": fvp_corstone1000,
     "fvp_rse_tc3": fvp_rse_tc3,
+    "fvp_rse_tc4": fvp_rse_tc4,
     "qemu_mps2_bl2": qemu_mps2_bl2,
     "musca_b1": musca_b1_bl2,
     "stm32l562e_dk": stm32l562e_dk,