commit 28948407410a216eb2ec72dd5940fa1545355c49
author Raef Coles <raef.coles@arm.com> Mon Jul 28 10:34:50 2025 +0100
committer Raef Coles <raef.coles@arm.com> Mon Aug 18 10:57:59 2025 +0100
tree 225119bd0b7c7eff5a6901b875799110feb9a2bb
parent e1214baf40aa72e50004c2e7853bf910f9dcb715

Lava: Update FVP parameters for RSE

Update to match the required addresses in
Ib27ceef3ed0402f447b25b5debbb8d2991ad97aeY, where the message loading
address is moved into the reset-persistent part of the SRAM and the
cookie for the persistent data area is moved into the GRETREG.

Change-Id: I7a78d26b521017ab527cd769f92e0bc305a56926
Signed-off-by: Raef Coles <raef.coles@arm.com>
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>

build_helper/build_helper_configs.py

diff --git a/build_helper/build_helper_configs.py b/build_helper/build_helper_configs.py
index 519efc7..5bcb225 100755
--- a/build_helper/build_helper_configs.py
+++ b/build_helper/build_helper_configs.py
@@ -107,7 +107,8 @@
                     "arm/rse/tc/tc3": ("if [ -f \"%(ci_build_root_dir)s/spe/bin/rse_bl1_tests.bin\" ]; then "
                                    "cp %(ci_build_root_dir)s/spe/bin/rse_bl1_tests.bin %(ci_build_root_dir)s/spe/bin/sram.bin;"
                                    "else "
-                                   "cp %(ci_build_root_dir)s/spe/bin/provisioning/combined_provisioning_message.bin %(ci_build_root_dir)s/spe/bin/sram.bin;"
+                                   # dummy file with no data to keep the FVP happy
+                                   "touch %(ci_build_root_dir)s/spe/bin/sram.bin;"
                                    "fi;"
                                    "srec_cat "
                                    "%(ci_build_root_dir)s/spe/bin/bl1_1.bin -Binary -offset 0x0 "
@@ -127,7 +128,8 @@
                     "arm/rse/tc/tc4": ("if [ -f \"%(ci_build_root_dir)s/spe/bin/rse_bl1_tests.bin\" ]; then "
                                    "cp %(ci_build_root_dir)s/spe/bin/rse_bl1_tests.bin %(ci_build_root_dir)s/spe/bin/sram.bin;"
                                    "else "
-                                   "cp %(ci_build_root_dir)s/spe/bin/provisioning/combined_provisioning_message.bin %(ci_build_root_dir)s/spe/bin/sram.bin;"
+                                   # dummy file with no data to keep the FVP happy
+                                   "touch %(ci_build_root_dir)s/spe/bin/sram.bin;"
                                    "fi;"
                                    "srec_cat "
                                    "%(ci_build_root_dir)s/spe/bin/bl1_1.bin -Binary -offset 0x0 "
@@ -236,10 +238,12 @@
                                "tfm_sign.bin"],
                            "arm/rse/tc/tc3": [
                                "%(ci_build_root_dir)s/spe/bin/rom.bin",
+                               "%(ci_build_root_dir)s/spe/bin/provisioning/combined_provisioning_message.bin",
                                "%(ci_build_root_dir)s/spe/bin/sram.bin",
                                "%(ci_build_root_dir)s/spe/bin/host_flash.bin"],
                            "arm/rse/tc/tc4": [
                                "%(ci_build_root_dir)s/spe/bin/rom.bin",
+                               "%(ci_build_root_dir)s/spe/bin/provisioning/combined_provisioning_message.bin",
                                "%(ci_build_root_dir)s/spe/bin/sram.bin",
                                "%(ci_build_root_dir)s/spe/bin/host_flash.bin"]
                            }