ci(cm): add test_config to validate EL1 ctx with TSP
* This patch adds tfa and tftf build configs and the appropriate
run_config fragments required to enable the features, which
are covered until v8.9.
* TSP is the secure world software component and TFTF is the Normal
world component, which exercises EL1 context registers in this test.
* Build configs ensures most of the EL1 context registers are getting
involved in the test environment.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: I96e52af3eb6a4d06937ece2e7ca32a9828647880
diff --git a/run_config/fvp-aemv8a.ctx b/run_config/fvp-aemv8a.ctx
new file mode 100644
index 0000000..2eccefa
--- /dev/null
+++ b/run_config/fvp-aemv8a.ctx
@@ -0,0 +1,35 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+generate_lava_job() {
+ local model="base-aemv8a"
+
+ uart="0" file="tftf.exp" track_expect
+ uart="1" file="hold_uart.exp" track_expect
+
+ model="$model" \
+ arch_version="8.9" \
+ accelerator_support_level="1" \
+ ete_plugin="1" \
+ etm_plugin="1" \
+ etm_present="1" \
+ has_csv2_2="1" \
+ has_sve="1" \
+ has_s1pie="1" \
+ has_s1poe="1" \
+ has_s2poe="1" \
+ has_tcr2="1" \
+ has_gcs="1" \
+ has_v8_9_debug_extension="1" \
+ memory_tagging_support_level="3" \
+ supports_trace_buffer_control_regs="1" \
+ supports_trace_filter_regs="2" \
+ supports_system_trace_filter_regs="1" \
+ gen_model_params
+
+ model="$model" gen_fvp_yaml
+}