feat(amu): add configs to test AMU with MPMM
This patch adds the proper config files and group in order to test
the AMU counters restriction on TC2 by using SVE instructions and
counting the MPMM gear shifting.
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
Change-Id: I9508f9192bcf364c314b3b7ee30f01073e940198
diff --git a/group/tf-l2-boot-tests-misc/fvp-tc2-sve,fvp-tc2-cpu-extensions+sve:fvp-fip.tc.tftf-tc2+sve b/group/tf-l2-boot-tests-misc/fvp-tc2-sve,fvp-tc2-cpu-extensions+sve:fvp-fip.tc.tftf-tc2+sve
new file mode 100644
index 0000000..19363ec
--- /dev/null
+++ b/group/tf-l2-boot-tests-misc/fvp-tc2-sve,fvp-tc2-cpu-extensions+sve:fvp-fip.tc.tftf-tc2+sve
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2024 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/model/tc2.sh b/model/tc2.sh
index 812044a..afed830 100644
--- a/model/tc2.sh
+++ b/model/tc2.sh
@@ -4,7 +4,26 @@
#
# SPDX-License-Identifier: BSD-3-Clause
#
+
set_model_path "$warehouse/SysGen/SubSystemModels/11.23/17/models/$model_flavour/FVP_TC2"
+
+if is_arm_jenkins_env || upon "$local_ci"; then
+ default_var sve_plugin_path "$warehouse/SysGen/PVModelLib/11.23/17/external/plugins/$model_flavour/sve2-HEAD/ScalableVectorExtension.so"
+else
+ # OpenCI enviroment
+ source "$ci_root/fvp_utils.sh"
+
+ # fvp_models variable contains the information for FVP paths, where 2nd field
+ # points to the /opt/model/*/models/${model_flavour}
+ models_dir="$(echo ${fvp_models[$model]} | awk -F ';' '{print $2}')"
+ set_model_path "$models_dir"
+
+ # ScalableVectorExtension is located at /opt/model/*/plugins/${model_flavour}
+ default_var sve_plugin_path "${models_dir/models/plugins}/ScalableVectorExtension.so"
+fi
+
+reset_var sve_plugin
+
cat <<EOF >"$model_param_file"
-C css.terminal_uart_ap.start_port=5000
-C css.terminal_uart1_ap.start_port=5001
@@ -21,4 +40,8 @@
-C css.rss.CMU1_NUM_DB_CH=16
${rse_encrypted_cm_provisioning_bundle_0_bin+--data css.rss.sram0=${rse_encrypted_cm_provisioning_bundle_0_bin}@0x400}
${rse_encrypted_dm_provisioning_bundle_bin+--data css.rss.sram1=${rse_encrypted_dm_provisioning_bundle_bin}@0x80000}
+
+${sve_plugin+--plugin=$sve_plugin_path}
+${sve_plugin+-C SVE.ScalableVectorExtension.enable_at_reset=0}
+${sve_plugin+-C SVE.ScalableVectorExtension.veclen=$((128 / 8))}
EOF
diff --git a/run_config/fvp-fip.tc.tftf b/run_config/fvp-fip.tc.tftf
new file mode 100644
index 0000000..6bc2831
--- /dev/null
+++ b/run_config/fvp-fip.tc.tftf
@@ -0,0 +1,44 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+source "$ci_root/run_config/tc_rse_utils.sh"
+
+post_tf_build() {
+ # Use SCP binary from SCP build if it exists, or fetch pre-built ones.
+ if [ ! -f "$archive/scp_ram.bin" ]; then
+ url="$scp_mcp_downloads/totalcompute/tc$plat_variant/platform_variant_0/release/tc$plat_variant-bl2.bin" saveas="scp_ram.bin" fetch_file
+ archive_file "scp_ram.bin"
+ fi
+
+ build_fip BL33="$archive/tftf.bin" SCP_BL2="$archive/scp_ram.bin"
+}
+
+fetch_tf_resource() {
+ # RSE output is printed to UART 2 so track it.
+ uart="1" port="5003" file="hold_uart.exp" track_expect
+
+ get_rse_prov_bins
+
+ # sign AP bl1
+ sign_image bl1.bin $ap_bl1_flash_load_addr $ap_bl1_flash_size
+
+ # Update FIP with pre-built RSS binaries and signed AP BL1 to create host flash fip image
+ update_fip
+
+ # Create GPT image
+ gen_gpt_bin $archive/host_flash_fip.bin 12582912 16
+}
+
+generate_lava_job_template() {
+ uart="2" port="5000" set_primary="1" file="tftf-non-primary.exp" track_expect
+
+ set_uart_port "${archive:?}" 0 5002
+ set_uart_port "${archive:?}" 1 5003
+ set_uart_port "${archive:?}" 2 5000
+ set_uart_port "${archive:?}" 3 5001
+
+ payload_type="tftf" memory_tagging_support_level="2" gen_yaml_template
+}
diff --git a/run_config/fvp-tc2+sve b/run_config/fvp-tc2+sve
new file mode 100644
index 0000000..2f51b21
--- /dev/null
+++ b/run_config/fvp-tc2+sve
@@ -0,0 +1,20 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2022-2024, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+generate_lava_job() {
+ local model="tc2"
+
+ uart="1" set_expect_variable "num_cpus" "8"
+
+ set_run_env "ports_script" "$ci_root/model/tc-ports.awk"
+ set_run_env "num_uarts" "4"
+
+ model="$model" \
+ sve_plugin="1" \
+ gen_model_params
+ model="$model" gen_fvp_yaml
+}
diff --git a/tf_config/fvp-tc2-sve b/tf_config/fvp-tc2-sve
new file mode 100644
index 0000000..e56c524
--- /dev/null
+++ b/tf_config/fvp-tc2-sve
@@ -0,0 +1,13 @@
+CROSS_COMPILE=aarch64-none-elf-
+ARM_ARCH_MINOR=6
+PLAT=tc
+TARGET_PLATFORM=2
+ENABLE_FEAT_AMU=1
+ENABLE_FEAT_AMUv1p1=1
+ENABLE_AMU_AUXILIARY_COUNTERS=1
+ENABLE_MPMM=1
+ENABLE_SVE_FOR_NS=1
+ENABLE_SVE_FOR_SWD=1
+ARM_ARCH_FEATURE=sve
+ARM_GPT_SUPPORT=1
+SCP_BL2=/dev/null
diff --git a/tftf_config/fvp-tc2-cpu-extensions+sve b/tftf_config/fvp-tc2-cpu-extensions+sve
new file mode 100644
index 0000000..633e396
--- /dev/null
+++ b/tftf_config/fvp-tc2-cpu-extensions+sve
@@ -0,0 +1,7 @@
+ARM_ARCH_FEATURE=memtag+sve
+ARM_ARCH_MINOR=5
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=tc
+TARGET_PLATFORM=2
+TESTS=cpu-extensions
+PLAT_AMU_GROUP1_COUNTERS_MASK=4