Initial implementation of the Arm TZ-ASC driver
Adds the `Tzc` struct, which uses `safe_mmio` to manipulate the
registers of the Arm TZ-ASC component. The structure directly exposes
general purposes registers, and other wrappers for failure and region
registers.
Signed-off-by: Ludovic Mermod <ludovic.mermod@arm.com>
Change-Id: Ife2757e62634c634da0d4efabe3171a29245f386
diff --git a/src/utils.rs b/src/utils.rs
new file mode 100644
index 0000000..408c8ee
--- /dev/null
+++ b/src/utils.rs
@@ -0,0 +1,38 @@
+// SPDX-FileCopyrightText: Copyright The arm-tzc Contributors.
+// SPDX-License-Identifier: MIT OR Apache-2.0
+
+#[inline(always)]
+/// Extracts from `value` the bits in the range `lsb..=end`.
+pub(crate) const fn extract_bits(value: u32, msb: u32, lsb: u32) -> u32 {
+ (value >> lsb) & ((1 << (msb - lsb + 1)) - 1)
+}
+
+#[inline(always)]
+/// Extracts the bit at the given position. Equivalent to `extract_bits(value, position, position)`.
+pub(crate) const fn get_bit(value: u32, position: usize) -> bool {
+ value >> position & 0b1 == 1
+}
+
+#[inline(always)]
+/// Sets the bit at `position` to the given state.
+pub(crate) const fn set_bit(value: &mut u32, position: usize, bit: bool) {
+ if bit {
+ *value |= 1 << position;
+ } else {
+ *value &= !(1 << position);
+ }
+}
+
+#[inline(always)]
+/// Performs a bitwise concatenation of two `u32` into a single `u64`. This is the opposite
+/// operation of [`split_address`].
+pub(crate) const fn concatenate_address_parts(low: u32, high: u32) -> u64 {
+ (high as u64) << 32 | low as u64
+}
+
+#[inline(always)]
+/// Perform a bitwise split of a `u64` into two `u32`. This is the opposite operation of
+/// [`concatenate_address_parts`].
+pub(crate) fn split_address(address: u64) -> (u32, u32) {
+ ((address & u32::MAX as u64) as u32, (address >> 32) as u32)
+}