Driver implementation for the memory mapped and system register based Generic Timer peripheral of the Arm A-profile architecture. The implementation is based on the following sections of the Arm Architecture Reference Manual for A-profile architecture.
CNTControlBaseCNTCTLBaseCNTReadBaseCNTBaseNCNTEL0BaseNel1: Enables system register based timers which relies on EL1 system registers.el2: Enables system register based timers which relies on EL2 system registers.fakes: Accesses fake system registers rather than the real ones, for running tests on the host.The project is MIT and Apache-2.0 dual licensed, see LICENSE-APACHE and LICENSE-MIT.
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