| Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * SPDX-License-Identifier: BSD-3-Clause |
| 3 | * SPDX-FileCopyrightText: Copyright TF-RMM Contributors. |
| 4 | */ |
| 5 | |
| 6 | #ifndef PSCI_H |
| 7 | #define PSCI_H |
| 8 | |
| 9 | #include <smc.h> |
| 10 | #include <status.h> |
| 11 | #include <stdbool.h> |
| 12 | |
| 13 | #define SMC32_PSCI_FID(_offset) SMC32_STD_FID(PSCI, _offset) |
| 14 | #define SMC64_PSCI_FID(_offset) SMC64_STD_FID(PSCI, _offset) |
| 15 | |
| 16 | #define IS_SMC32_PSCI_FID(_fid) IS_SMC32_STD_FAST_IN_RANGE(PSCI, _fid) |
| 17 | #define IS_SMC64_PSCI_FID(_fid) IS_SMC64_STD_FAST_IN_RANGE(PSCI, _fid) |
| 18 | |
| 19 | #define SMC32_PSCI_FID_MIN SMC32_PSCI_FID(SMC32_PSCI_FNUM_MIN) |
| 20 | #define SMC32_PSCI_FID_MAX SMC32_PSCI_FID(SMC32_PSCI_FNUM_MAX) |
| 21 | |
| 22 | #define SMC64_PSCI_FID_MIN SMC64_PSCI_FID(SMC64_PSCI_FNUM_MIN) |
| 23 | #define SMC64_PSCI_FID_MAX SMC64_PSCI_FID(SMC64_PSCI_FNUM_MAX) |
| 24 | |
| 25 | #define SMC32_PSCI_VERSION SMC32_PSCI_FID(0x0U) |
| 26 | |
| 27 | #define SMC32_PSCI_CPU_SUSPEND SMC32_PSCI_FID(0x1U) |
| 28 | #define SMC64_PSCI_CPU_SUSPEND SMC64_PSCI_FID(0x1U) |
| 29 | |
| 30 | #define SMC32_PSCI_CPU_OFF SMC32_PSCI_FID(0x2U) |
| 31 | |
| 32 | #define SMC32_PSCI_CPU_ON SMC32_PSCI_FID(0x3U) |
| 33 | #define SMC64_PSCI_CPU_ON SMC64_PSCI_FID(0x3U) |
| 34 | |
| 35 | #define SMC32_PSCI_AFFINITY_INFO SMC32_PSCI_FID(0x4U) |
| 36 | #define SMC64_PSCI_AFFINITY_INFO SMC64_PSCI_FID(0x4U) |
| 37 | |
| 38 | #define SMC32_PSCI_MIGRATE SMC32_PSCI_FID(0x5U) |
| 39 | #define SMC64_PSCI_MIGRATE SMC64_PSCI_FID(0x5U) |
| 40 | |
| 41 | #define SMC32_PSCI_MIGRATE_INFO_TYPE SMC32_PSCI_FID(0x6U) |
| 42 | |
| 43 | #define SMC32_PSCI_MIGRATE_INFO_UP_CPU SMC32_PSCI_FID(0x7U) |
| 44 | #define SMC64_PSCI_MIGRATE_INFO_UP_CPU SMC64_PSCI_FID(0x7U) |
| 45 | |
| 46 | #define SMC32_PSCI_SYSTEM_OFF SMC32_PSCI_FID(0x8U) |
| 47 | |
| 48 | #define SMC32_PSCI_SYSTEM_RESET SMC32_PSCI_FID(0x9U) |
| 49 | |
| 50 | #define SMC32_PSCI_FEATURES SMC32_PSCI_FID(0xAU) |
| 51 | |
| 52 | #define SMC32_PSCI_CPU_FREEZE SMC32_PSCI_FID(0xBU) |
| 53 | |
| 54 | #define SMC32_PSCI_CPU_DEFAULT_SUSPEND SMC32_PSCI_FID(0xCU) |
| 55 | #define SMC64_PSCI_CPU_DEFAULT_SUSPEND SMC64_PSCI_FID(0xCU) |
| 56 | |
| 57 | #define SMC32_PSCI_NODE_HW_STATE SMC32_PSCI_FID(0xDU) |
| 58 | #define SMC64_PSCI_NODE_HW_STATE SMC64_PSCI_FID(0xDU) |
| 59 | |
| 60 | #define SMC32_PSCI_SYSTEM_SUSPEND SMC32_PSCI_FID(0xEU) |
| 61 | #define SMC64_PSCI_SYSTEM_SUSPEND SMC64_PSCI_FID(0xEU) |
| 62 | |
| 63 | #define SMC32_PSCI_SET_SUSPEND_MODE SMC32_PSCI_FID(0xFU) |
| 64 | |
| 65 | #define SMC32_PSCI_STAT_RESIDENCY SMC32_PSCI_FID(0x10U) |
| 66 | #define SMC64_PSCI_STAT_RESIDENCY SMC64_PSCI_FID(0x10U) |
| 67 | |
| 68 | #define SMC32_PSCI_STAT_COUNT SMC32_PSCI_FID(0x11U) |
| 69 | #define SMC64_PSCI_STAT_COUNT SMC64_PSCI_FID(0x11U) |
| 70 | |
| 71 | #define SMC32_PSCI_SYSTEM_RESET2 SMC32_PSCI_FID(0x12U) |
| 72 | #define SMC64_PSCI_SYSTEM_RESET2 SMC64_PSCI_FID(0x12U) |
| 73 | |
| 74 | #define SMC32_PSCI_MEM_PROTECT SMC32_PSCI_FID(0x13U) |
| 75 | |
| 76 | #define SMC32_PSCI_MEM_PROTECT_CHECK_RANGE SMC32_PSCI_FID(0x14U) |
| 77 | #define SMC64_PSCI_MEM_PROTECT_CHECK_RANGE SMC64_PSCI_FID(0x14U) |
| 78 | |
| 79 | #define PSCI_RETURN_SUCCESS UL(0) |
| 80 | #define PSCI_RETURN_NOT_SUPPORTED UL(-1) |
| 81 | #define PSCI_RETURN_INVALID_PARAMS UL(-2) |
| 82 | #define PSCI_RETURN_DENIED UL(-3) |
| 83 | #define PSCI_RETURN_ALREADY_ON UL(-4) |
| 84 | #define PSCI_RETURN_ON_PENDING UL(-5) |
| 85 | #define PSCI_RETURN_INTERNAL_FAILURE UL(-6) |
| 86 | #define PSCI_RETURN_NOT_PRESENT UL(-7) |
| 87 | #define PSCI_RETURN_DISABLED UL(-8) |
| 88 | #define PSCI_RETURN_INVALID_ADDRESS UL(-9) |
| 89 | |
| 90 | #define PSCI_AFFINITY_INFO_ON UL(0) |
| 91 | #define PSCI_AFFINITY_INFO_OFF UL(1) |
| 92 | #define PSCI_AFFINITY_INFO_ON_PENDING UL(2) |
| 93 | |
| 94 | #define PSCI_NODE_HW_ON UL(0) |
| 95 | #define PSCI_NODE_HW_OFF UL(1) |
| 96 | #define PSCI_NODE_HW_STANDBY UL(2) |
| 97 | |
| 98 | struct rec; |
| 99 | |
| Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 100 | unsigned long psci_complete_request(struct rec *calling_rec, |
| 101 | struct rec *target_rec); |
| 102 | |
| 103 | #endif /* PSCI_H */ |