blob: 1804d03f7f7945a521205fc2a58b52a454bc4340 [file] [log] [blame]
Soby Mathewb4c6df42022-11-09 11:13:29 +00001/*
2 * SPDX-License-Identifier: BSD-3-Clause
3 * SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
4 */
5
6#ifndef SVE_H
7#define SVE_H
8
9#include <arch.h>
10#include <utils_def.h>
11
12/*
13 * SVE vector length in bytes and derived values
14 */
15#define SVE_VLA_ZCR_LEN_BITS UL(4)
16#define SVE_VLA_LEN_MAX (UL(1) << SVE_VLA_ZCR_LEN_BITS)
17#define SVE_VLA_ZCR_LEN_MAX (SVE_VLA_LEN_MAX - UL(1))
18#define SVE_VLA_VL_MIN UL(16)
19#define SVE_VLA_VL_MAX (SVE_VLA_VL_MIN * SVE_VLA_LEN_MAX)
20#define SVE_VLA_Z_REGS_MAX UL(32)
21#define SVE_VLA_P_REGS_MAX UL(16)
22#define SVE_VLA_FFR_REGS_MAX UL(1)
23#define SVE_VLA_Z_LEN_MAX (SVE_VLA_VL_MAX * SVE_VLA_Z_REGS_MAX)
24#define SVE_VLA_P_LEN_MAX ((SVE_VLA_VL_MAX * SVE_VLA_P_REGS_MAX) >> UL(3))
25#define SVE_VLA_FFR_LEN_MAX ((SVE_VLA_VL_MAX * SVE_VLA_FFR_REGS_MAX) >> \
26 UL(3))
27#define SVE_ZCR_FP_REGS_NUM UL(4)
28
29#ifndef __ASSEMBLER__
30
31/*
32 * SVE context structure. Align on cache writeback granule to minimise cache line
33 * thashing when allocated as an array for use by each CPU.
34 */
35struct sve_state {
36 unsigned long zcr_fpu[SVE_ZCR_FP_REGS_NUM];
37 unsigned char z[SVE_VLA_Z_LEN_MAX];
38 unsigned char p_ffr[SVE_VLA_P_LEN_MAX + SVE_VLA_FFR_LEN_MAX];
39} __attribute__((aligned(CACHE_WRITEBACK_GRANULE)));
40
41void save_sve_zcr_fpu_state(unsigned long *data);
42void save_sve_z_state(unsigned char *data);
43void save_sve_p_ffr_state(unsigned char *data);
44
45void restore_sve_zcr_fpu_state(unsigned long *data);
46void restore_sve_z_state(unsigned char *data);
47void restore_sve_p_ffr_state(unsigned char *data);
48
49void save_sve_state(struct sve_state *sve);
50void restore_sve_state(struct sve_state *sve);
51
52#endif /* __ASSEMBLER__ */
53
54#endif /* __SVE_H_ */