blob: 195cf6130b75e50af8d38d6c274191abb09dea17 [file] [log] [blame]
Soby Mathewb4c6df42022-11-09 11:13:29 +00001/*
2 * SPDX-License-Identifier: BSD-3-Clause
3 * SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
4 */
5
6#include <arch.h>
7#include <asm_macros.S>
8
9 .globl flush_dcache_range
10 .globl clean_dcache_range
11 .globl inv_dcache_range
12
13/*
14 * This macro can be used for implementing various data cache operations `op`
15 */
16.macro do_dcache_maintenance_by_mva op
17 /* Exit early if size is zero */
18 cbz x1, exit_loop_\op
19 dcache_line_size x2, x3
20 add x1, x0, x1
21 sub x3, x2, #1
22 bic x0, x0, x3
23loop_\op:
24 dc \op, x0
25 add x0, x0, x2
26 cmp x0, x1
27 b.lo loop_\op
28 dsb sy
29exit_loop_\op:
30 ret
31.endm
32 /* ------------------------------------------
33 * Clean+Invalidate from base address till
34 * size. 'x0' = addr, 'x1' = size
35 * ------------------------------------------
36 */
37func flush_dcache_range
38 do_dcache_maintenance_by_mva civac
39endfunc flush_dcache_range
40
41 /* ------------------------------------------
42 * Clean from base address till size.
43 * 'x0' = addr, 'x1' = size
44 * ------------------------------------------
45 */
46func clean_dcache_range
47 do_dcache_maintenance_by_mva cvac
48endfunc clean_dcache_range
49
50 /* ------------------------------------------
51 * Invalidate from base address till
52 * size. 'x0' = addr, 'x1' = size
53 * ------------------------------------------
54 */
55func inv_dcache_range
56 do_dcache_maintenance_by_mva ivac
57endfunc inv_dcache_range