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Soby Mathewb4c6df42022-11-09 11:13:29 +00001/*
2 * SPDX-License-Identifier: BSD-3-Clause
3 * SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
4 */
5
6#ifndef REC_H
7#define REC_H
8
9#ifndef __ASSEMBLER__
10
11#include <arch.h>
12#include <attestation_token.h>
Soby Mathewb4c6df42022-11-09 11:13:29 +000013#include <gic.h>
14#include <memory_alloc.h>
Arvind Ram Prakashbd36a1b2022-12-15 12:16:36 -060015#include <pauth.h>
AlexeiFedoroveaec0c42023-02-01 18:13:32 +000016#include <pmu.h>
Soby Mathewb4c6df42022-11-09 11:13:29 +000017#include <ripas.h>
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +000018#include <simd.h>
Soby Mathewb4c6df42022-11-09 11:13:29 +000019#include <sizes.h>
20#include <smc-rmi.h>
21#include <utils_def.h>
22
23struct granule;
24
25/*
26 * System registers whose contents are specific to a REC.
27 */
28struct sysreg_state {
29 unsigned long sp_el0;
30 unsigned long sp_el1;
31 unsigned long elr_el1;
32 unsigned long spsr_el1;
33 unsigned long pmcr_el0;
Soby Mathewb4c6df42022-11-09 11:13:29 +000034 unsigned long tpidrro_el0;
35 unsigned long tpidr_el0;
36 unsigned long csselr_el1;
37 unsigned long sctlr_el1;
38 unsigned long actlr_el1;
39 unsigned long cpacr_el1;
40 unsigned long zcr_el1;
41 unsigned long ttbr0_el1;
42 unsigned long ttbr1_el1;
43 unsigned long tcr_el1;
44 unsigned long esr_el1;
45 unsigned long afsr0_el1;
46 unsigned long afsr1_el1;
47 unsigned long far_el1;
48 unsigned long mair_el1;
49 unsigned long vbar_el1;
50 unsigned long contextidr_el1;
51 unsigned long tpidr_el1;
52 unsigned long amair_el1;
53 unsigned long cntkctl_el1;
54 unsigned long par_el1;
55 unsigned long mdscr_el1;
56 unsigned long mdccint_el1;
57 unsigned long disr_el1;
58 unsigned long mpam0_el1;
59
60 /* Timer Registers */
61 unsigned long cnthctl_el2;
62 unsigned long cntvoff_el2;
63 unsigned long cntpoff_el2;
64 unsigned long cntp_ctl_el0;
65 unsigned long cntp_cval_el0;
66 unsigned long cntv_ctl_el0;
67 unsigned long cntv_cval_el0;
68
69 /* GIC Registers */
70 struct gic_cpu_state gicstate;
71
72 /* TODO MPAM */
73 /* TODO Performance Monitor Registers */
74 /* TODO Pointer Authentication Registers */
75
76 unsigned long vmpidr_el2; /* restored only */
77 unsigned long hcr_el2; /* restored only */
78};
79
80/*
81 * System registers whose contents are
82 * common across all RECs in a Realm.
83 */
84struct common_sysreg_state {
85 unsigned long vttbr_el2;
86 unsigned long vtcr_el2;
87 unsigned long hcr_el2;
AlexeiFedoroveaec0c42023-02-01 18:13:32 +000088 unsigned long mdcr_el2;
Soby Mathewb4c6df42022-11-09 11:13:29 +000089};
90
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +000091/* This structure is used for storing FPU or SVE context for realm. */
92struct rec_simd_state {
93 struct simd_state *simd; /* Pointer to SIMD context in AUX page */
94 bool simd_allowed; /* Set when REC is allowed to use SIMD */
95 bool init_done; /* flag used to check if SIMD state initialized */
96};
97
Soby Mathewb4c6df42022-11-09 11:13:29 +000098/*
99 * This structure is aligned on cache line size to avoid cache line trashing
100 * when allocated as an array for N CPUs.
101 */
102struct ns_state {
103 struct sysreg_state sysregs;
104 unsigned long sp_el0;
105 unsigned long icc_sre_el2;
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000106 struct pmu_state *pmu;
Soby Mathewb4c6df42022-11-09 11:13:29 +0000107} __attribute__((aligned(CACHE_WRITEBACK_GRANULE)));
108
109/*
AlexeiFedorovec35c542023-04-27 17:52:02 +0100110 * Data used when handling attestation requests
111 */
112struct rec_attest_data {
113 unsigned char rmm_realm_token_buf[SZ_1K];
114 size_t rmm_realm_token_len;
115
116 struct token_sign_ctx token_sign_ctx;
117
118 /* Buffer allocation info used for heap init and management */
119 struct {
120 struct buffer_alloc_ctx ctx;
121 bool ctx_initialised;
122 } alloc_info;
123};
124COMPILER_ASSERT(sizeof(struct rec_attest_data) <= GRANULE_SIZE);
125
126/*
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000127 * This structure contains pointers to data that are allocated
128 * in auxilary granules for a REC.
Soby Mathewb4c6df42022-11-09 11:13:29 +0000129 */
130struct rec_aux_data {
AlexeiFedorovec35c542023-04-27 17:52:02 +0100131 /* Pointer to the heap buffer */
132 uint8_t *attest_heap_buf;
133
134 /* Pointer to PMU state */
135 struct pmu_state *pmu;
136
137 /* SIMD context region */
138 struct rec_simd_state rec_simd;
139
140 /* Pointer to attestation-related data */
141 struct rec_attest_data *attest_data;
Soby Mathewb4c6df42022-11-09 11:13:29 +0000142};
143
144struct rec {
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000145 struct granule *g_rec; /* the granule in which this REC lives */
146 unsigned long rec_idx; /* which REC is this */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000147 bool runnable;
148
149 unsigned long regs[31];
Arvind Ram Prakashbd36a1b2022-12-15 12:16:36 -0600150
151 /*
152 * PAuth state of Realm.
153 * Note that we do not need to save NS state as EL3 will save this as part of world switch.
154 */
155 struct pauth_state pauth;
156
Soby Mathewb4c6df42022-11-09 11:13:29 +0000157 unsigned long pc;
158 unsigned long pstate;
159
160 struct sysreg_state sysregs;
161 struct common_sysreg_state common_sysregs;
162
AlexeiFedorov5cf35ba2023-04-25 10:02:20 +0100163 /* Populated when the REC issues a RIPAS change request */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000164 struct {
AlexeiFedorov5cf35ba2023-04-25 10:02:20 +0100165 unsigned long base;
166 unsigned long top;
Soby Mathewb4c6df42022-11-09 11:13:29 +0000167 unsigned long addr;
AlexeiFedorov0fb44552023-04-14 15:37:58 +0100168 enum ripas ripas_val;
AlexeiFedorov63614ea2023-07-14 17:07:20 +0100169 enum ripas_change_destroyed change_destroyed;
Soby Mathewb4c6df42022-11-09 11:13:29 +0000170 } set_ripas;
171
172 /*
173 * Common values across all RECs in a Realm.
174 */
175 struct {
176 unsigned long ipa_bits;
177 int s2_starting_level;
178 struct granule *g_rtt;
179 struct granule *g_rd;
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000180 bool pmu_enabled;
AlexeiFedorov18002922023-04-06 10:19:51 +0100181 unsigned int pmu_num_ctrs;
AlexeiFedorov531b5272023-06-13 15:36:32 +0100182 enum hash_algo hash_algo;
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +0000183 bool sve_enabled;
184 uint8_t sve_vq;
Soby Mathewb4c6df42022-11-09 11:13:29 +0000185 } realm_info;
186
187 struct {
188 /*
189 * The contents of the *_EL2 system registers at the last time
190 * the REC exited to the host due to a synchronous exception.
191 * These are the unsanitized register values which may differ
192 * from the value returned to the host in rec_exit structure.
193 */
194 unsigned long esr;
195 unsigned long hpfar;
196 unsigned long far;
197 } last_run_info;
198
Soby Mathewb4c6df42022-11-09 11:13:29 +0000199 /* Pointer to per-cpu non-secure state */
200 struct ns_state *ns;
201
202 struct {
203 /*
204 * Set to 'true' when there is a pending PSCI
205 * command that must be resolved by the host.
206 * The command is encoded in rec->regs[0].
207 *
208 * A REC with pending PSCI is not schedulable.
209 */
210 bool pending;
211 } psci_info;
212
213 /* Number of auxiliary granules */
214 unsigned int num_rec_aux;
215
216 /* Addresses of auxiliary granules */
217 struct granule *g_aux[MAX_REC_AUX_GRANULES];
218 struct rec_aux_data aux_data;
Soby Mathewb4c6df42022-11-09 11:13:29 +0000219 struct {
220 unsigned long vsesr_el2;
221 bool inject;
222 } serror_info;
223
224 /* True if host call is pending */
225 bool host_call;
226};
227COMPILER_ASSERT(sizeof(struct rec) <= GRANULE_SIZE);
228
229/*
230 * Check that mpidr has a valid value with all fields except
231 * Aff3[39:32]:Aff2[23:16]:Aff1[15:8]:Aff0[3:0] set to 0.
232 */
233static inline bool mpidr_is_valid(unsigned long mpidr)
234{
235 return (mpidr & ~(MASK(MPIDR_EL2_AFF0) |
236 MASK(MPIDR_EL2_AFF1) |
237 MASK(MPIDR_EL2_AFF2) |
238 MASK(MPIDR_EL2_AFF3))) == 0ULL;
239}
240
241/*
242 * Calculate REC index from mpidr value.
243 * index = Aff3[39:32]:Aff2[23:16]:Aff1[15:8]:Aff0[3:0]
244 */
245static inline unsigned long mpidr_to_rec_idx(unsigned long mpidr)
246{
247 return (MPIDR_EL2_AFF(0, mpidr) +
248 MPIDR_EL2_AFF(1, mpidr) +
249 MPIDR_EL2_AFF(2, mpidr) +
250 MPIDR_EL2_AFF(3, mpidr));
251}
252
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +0000253static inline simd_t rec_simd_type(struct rec *rec)
254{
255 if (rec->realm_info.sve_enabled) {
256 return SIMD_SVE;
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +0000257 }
AlexeiFedorov18002922023-04-06 10:19:51 +0100258 return SIMD_FPU;
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +0000259}
260
261static inline bool rec_is_simd_allowed(struct rec *rec)
262{
263 assert(rec != NULL);
264 return rec->aux_data.rec_simd.simd_allowed;
265}
266
Soby Mathewb4c6df42022-11-09 11:13:29 +0000267void rec_run_loop(struct rec *rec, struct rmi_rec_exit *rec_exit);
Soby Mathewb4c6df42022-11-09 11:13:29 +0000268void inject_serror(struct rec *rec, unsigned long vsesr);
Soby Mathewb4c6df42022-11-09 11:13:29 +0000269void emulate_stage2_data_abort(struct rec *rec, struct rmi_rec_exit *exit,
270 unsigned long rtt_level);
271
272#endif /* __ASSEMBLER__ */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000273#endif /* REC_H */