blob: 15391b7d9a93cb71970babf5b89573463c4bbdd8 [file] [log] [blame]
Soby Mathewb4c6df42022-11-09 11:13:29 +00001/*
2 * SPDX-License-Identifier: BSD-3-Clause
3 * SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
4 */
5
6/* TODO: This file will need clean up */
7
8#ifndef ARCH_HELPERS_H
9#define ARCH_HELPERS_H
10
11#include <arch.h>
12#include <instr_helpers.h>
13#include <stdbool.h>
14#include <stddef.h>
15
16/* Define read function for system register */
17#define DEFINE_SYSREG_READ_FUNC(_name) \
18 DEFINE_SYSREG_READ_FUNC_(_name, _name)
19
20/* Define read & write function for system register */
21#define DEFINE_SYSREG_RW_FUNCS(_name) \
22 DEFINE_SYSREG_READ_FUNC_(_name, _name) \
23 DEFINE_SYSREG_WRITE_FUNC_(_name, _name)
24
25/* Define read & write function for renamed system register */
26#define DEFINE_RENAME_SYSREG_RW_FUNCS(_name, _reg_name) \
27 DEFINE_SYSREG_READ_FUNC_(_name, _reg_name) \
28 DEFINE_SYSREG_WRITE_FUNC_(_name, _reg_name)
29
30/* Define read function for renamed system register */
31#define DEFINE_RENAME_SYSREG_READ_FUNC(_name, _reg_name) \
32 DEFINE_SYSREG_READ_FUNC_(_name, _reg_name)
33
34/* Define write function for renamed system register */
35#define DEFINE_RENAME_SYSREG_WRITE_FUNC(_name, _reg_name) \
36 DEFINE_SYSREG_WRITE_FUNC_(_name, _reg_name)
37
38/*******************************************************************************
39 * TLB maintenance accessor prototypes
40 ******************************************************************************/
41DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1)
42DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is)
43DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2)
44DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is)
45DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1)
46DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1is)
47DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalls12e1)
48
49DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaae1is)
50DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaale1is)
Raghu Krishnamurthy0e15c3b2024-07-15 19:07:10 -070051DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2)
Soby Mathewb4c6df42022-11-09 11:13:29 +000052DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2is)
53DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale2is)
54DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, ipas2e1is)
55
56/*******************************************************************************
57 * Cache maintenance accessor prototypes
58 ******************************************************************************/
59DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, isw)
60DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cisw)
61DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, csw)
62DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvac)
63DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, ivac)
64DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, civac)
65DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvau)
AlexeiFedorov862f96c2024-03-01 16:26:48 +000066DEFINE_SYSOP_DCZVA
Soby Mathewb4c6df42022-11-09 11:13:29 +000067
68/*******************************************************************************
69 * Address translation accessor prototypes
70 ******************************************************************************/
71DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1r)
72DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1w)
73DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0r)
74DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0w)
75DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s1e1r)
76DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s1e2r)
77
78/*******************************************************************************
79 * Strip Pointer Authentication Code
80 ******************************************************************************/
81DEFINE_SYSOP_PARAM_FUNC(xpaci)
82
83/*******************************************************************************
84 * Cache management
85 ******************************************************************************/
86void flush_dcache_range(uintptr_t addr, size_t size);
87void clean_dcache_range(uintptr_t addr, size_t size);
88void inv_dcache_range(uintptr_t addr, size_t size);
89
Arvind Ram Prakashbd36a1b2022-12-15 12:16:36 -060090#define is_dcache_enabled() ((read_sctlr_el2() & SCTLR_ELx_C_BIT) != 0UL)
Soby Mathewb4c6df42022-11-09 11:13:29 +000091
92/*******************************************************************************
93 * MMU management
94 ******************************************************************************/
Arvind Ram Prakashbd36a1b2022-12-15 12:16:36 -060095#define is_mmu_enabled() ((read_sctlr_el2() & SCTLR_ELx_M_BIT) != 0UL)
Soby Mathewb4c6df42022-11-09 11:13:29 +000096
97/*******************************************************************************
98 * FPU management
99 ******************************************************************************/
Arunachalam Ganapathy9ade18b2023-06-12 14:07:21 +0100100#define is_fpen_enabled() (EXTRACT(CPTR_EL2_VHE_FPEN, read_cptr_el2()) == \
101 CPTR_EL2_VHE_FPEN_NO_TRAP_11)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000102
103/*******************************************************************************
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +0000104 * SVE management
105 ******************************************************************************/
Arunachalam Ganapathy9ade18b2023-06-12 14:07:21 +0100106#define is_zen_enabled() (EXTRACT(CPTR_EL2_VHE_ZEN, read_cptr_el2()) == \
107 CPTR_EL2_VHE_ZEN_NO_TRAP_11)
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +0000108
109/*******************************************************************************
Arunachalam Ganapathy83f46ca2023-08-15 18:13:27 +0100110 * SME management
111 ******************************************************************************/
112#define is_smen_enabled() (EXTRACT(CPTR_EL2_SMEN, read_cptr_el2()) == \
113 CPTR_EL2_SMEN_NO_TRAP_11)
114
115/*******************************************************************************
Soby Mathewb4c6df42022-11-09 11:13:29 +0000116 * Misc. accessor prototypes
117 ******************************************************************************/
Soby Mathewb4c6df42022-11-09 11:13:29 +0000118#define write_daifclr(val) SYSREG_WRITE_CONST(daifclr, val)
119#define write_daifset(val) SYSREG_WRITE_CONST(daifset, val)
120
121DEFINE_SYSOP_FUNC(wfi)
122DEFINE_SYSOP_FUNC(wfe)
123DEFINE_SYSOP_FUNC(sev)
124DEFINE_SYSOP_FUNC(isb)
125
AlexeiFedorov4c7d4852024-01-25 14:37:34 +0000126/*******************************************************************************
127 * Stack Pointer Select
128 ******************************************************************************/
129#define write_spsel(val) SYSREG_WRITE_CONST(spsel, val)
130
131/*******************************************************************************
132 * Read Stack Pointer
133 ******************************************************************************/
134#define read_sp(var) READ_REGISTER(var, sp)
135
Soby Mathewb4c6df42022-11-09 11:13:29 +0000136static inline void enable_irq(void)
137{
138 /*
139 * The compiler memory barrier will prevent the compiler from
140 * scheduling non-volatile memory access after the write to the
141 * register.
142 *
143 * This could happen if some initialization code issues non-volatile
144 * accesses to an area used by an interrupt handler, in the assumption
145 * that it is safe as the interrupts are disabled at the time it does
146 * that (according to program order). However, non-volatile accesses
147 * are not necessarily in program order relatively with volatile inline
148 * assembly statements (and volatile accesses).
149 */
150 COMPILER_BARRIER();
151 write_daifclr(DAIF_IRQ_BIT);
152 isb();
153}
154
155static inline void enable_fiq(void)
156{
157 COMPILER_BARRIER();
158 write_daifclr(DAIF_FIQ_BIT);
159 isb();
160}
161
162static inline void enable_serror(void)
163{
164 COMPILER_BARRIER();
165 write_daifclr(DAIF_ABT_BIT);
166 isb();
167}
168
169static inline void enable_debug_exceptions(void)
170{
171 COMPILER_BARRIER();
172 write_daifclr(DAIF_DBG_BIT);
173 isb();
174}
175
176static inline void disable_irq(void)
177{
178 COMPILER_BARRIER();
179 write_daifset(DAIF_IRQ_BIT);
180 isb();
181}
182
183static inline void disable_fiq(void)
184{
185 COMPILER_BARRIER();
186 write_daifset(DAIF_FIQ_BIT);
187 isb();
188}
189
190static inline void disable_serror(void)
191{
192 COMPILER_BARRIER();
193 write_daifset(DAIF_ABT_BIT);
194 isb();
195}
196
197static inline void disable_debug_exceptions(void)
198{
199 COMPILER_BARRIER();
200 write_daifset(DAIF_DBG_BIT);
201 isb();
202}
203
204/*******************************************************************************
205 * System register accessor prototypes
206 ******************************************************************************/
207DEFINE_SYSREG_RW_FUNCS(sp_el0)
208DEFINE_SYSREG_RW_FUNCS(sp_el1)
209DEFINE_SYSREG_RW_FUNCS(elr_el12)
210DEFINE_SYSREG_RW_FUNCS(spsr_el12)
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000211
212DEFINE_SYSREG_RW_FUNCS(pmccfiltr_el0)
213DEFINE_SYSREG_RW_FUNCS(pmccntr_el0)
214DEFINE_SYSREG_RW_FUNCS(pmcntenclr_el0)
215DEFINE_SYSREG_RW_FUNCS(pmcntenset_el0)
216DEFINE_SYSREG_RW_FUNCS(pmcr_el0)
217DEFINE_SYSREG_RW_FUNCS(pmintenclr_el1)
218DEFINE_SYSREG_RW_FUNCS(pmintenset_el1)
219DEFINE_SYSREG_RW_FUNCS(pmovsclr_el0)
220DEFINE_SYSREG_RW_FUNCS(pmovsset_el0)
221DEFINE_SYSREG_RW_FUNCS(pmselr_el0)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000222DEFINE_SYSREG_RW_FUNCS(pmuserenr_el0)
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000223DEFINE_SYSREG_RW_FUNCS(pmxevcntr_el0)
224DEFINE_SYSREG_RW_FUNCS(pmxevtyper_el0)
225
226DEFINE_SYSREG_RW_FUNCS(pmevcntr0_el0)
227DEFINE_SYSREG_RW_FUNCS(pmevcntr1_el0)
228DEFINE_SYSREG_RW_FUNCS(pmevcntr2_el0)
229DEFINE_SYSREG_RW_FUNCS(pmevcntr3_el0)
230DEFINE_SYSREG_RW_FUNCS(pmevcntr4_el0)
231DEFINE_SYSREG_RW_FUNCS(pmevcntr5_el0)
232DEFINE_SYSREG_RW_FUNCS(pmevcntr6_el0)
233DEFINE_SYSREG_RW_FUNCS(pmevcntr7_el0)
234DEFINE_SYSREG_RW_FUNCS(pmevcntr8_el0)
235DEFINE_SYSREG_RW_FUNCS(pmevcntr9_el0)
236DEFINE_SYSREG_RW_FUNCS(pmevcntr10_el0)
237DEFINE_SYSREG_RW_FUNCS(pmevcntr11_el0)
238DEFINE_SYSREG_RW_FUNCS(pmevcntr12_el0)
239DEFINE_SYSREG_RW_FUNCS(pmevcntr13_el0)
240DEFINE_SYSREG_RW_FUNCS(pmevcntr14_el0)
241DEFINE_SYSREG_RW_FUNCS(pmevcntr15_el0)
242DEFINE_SYSREG_RW_FUNCS(pmevcntr16_el0)
243DEFINE_SYSREG_RW_FUNCS(pmevcntr17_el0)
244DEFINE_SYSREG_RW_FUNCS(pmevcntr18_el0)
245DEFINE_SYSREG_RW_FUNCS(pmevcntr19_el0)
246DEFINE_SYSREG_RW_FUNCS(pmevcntr20_el0)
247DEFINE_SYSREG_RW_FUNCS(pmevcntr21_el0)
248DEFINE_SYSREG_RW_FUNCS(pmevcntr22_el0)
249DEFINE_SYSREG_RW_FUNCS(pmevcntr23_el0)
250DEFINE_SYSREG_RW_FUNCS(pmevcntr24_el0)
251DEFINE_SYSREG_RW_FUNCS(pmevcntr25_el0)
252DEFINE_SYSREG_RW_FUNCS(pmevcntr26_el0)
253DEFINE_SYSREG_RW_FUNCS(pmevcntr27_el0)
254DEFINE_SYSREG_RW_FUNCS(pmevcntr28_el0)
255DEFINE_SYSREG_RW_FUNCS(pmevcntr29_el0)
256DEFINE_SYSREG_RW_FUNCS(pmevcntr30_el0)
257
258DEFINE_SYSREG_RW_FUNCS(pmevtyper0_el0)
259DEFINE_SYSREG_RW_FUNCS(pmevtyper1_el0)
260DEFINE_SYSREG_RW_FUNCS(pmevtyper2_el0)
261DEFINE_SYSREG_RW_FUNCS(pmevtyper3_el0)
262DEFINE_SYSREG_RW_FUNCS(pmevtyper4_el0)
263DEFINE_SYSREG_RW_FUNCS(pmevtyper5_el0)
264DEFINE_SYSREG_RW_FUNCS(pmevtyper6_el0)
265DEFINE_SYSREG_RW_FUNCS(pmevtyper7_el0)
266DEFINE_SYSREG_RW_FUNCS(pmevtyper8_el0)
267DEFINE_SYSREG_RW_FUNCS(pmevtyper9_el0)
268DEFINE_SYSREG_RW_FUNCS(pmevtyper10_el0)
269DEFINE_SYSREG_RW_FUNCS(pmevtyper11_el0)
270DEFINE_SYSREG_RW_FUNCS(pmevtyper12_el0)
271DEFINE_SYSREG_RW_FUNCS(pmevtyper13_el0)
272DEFINE_SYSREG_RW_FUNCS(pmevtyper14_el0)
273DEFINE_SYSREG_RW_FUNCS(pmevtyper15_el0)
274DEFINE_SYSREG_RW_FUNCS(pmevtyper16_el0)
275DEFINE_SYSREG_RW_FUNCS(pmevtyper17_el0)
276DEFINE_SYSREG_RW_FUNCS(pmevtyper18_el0)
277DEFINE_SYSREG_RW_FUNCS(pmevtyper19_el0)
278DEFINE_SYSREG_RW_FUNCS(pmevtyper20_el0)
279DEFINE_SYSREG_RW_FUNCS(pmevtyper21_el0)
280DEFINE_SYSREG_RW_FUNCS(pmevtyper22_el0)
281DEFINE_SYSREG_RW_FUNCS(pmevtyper23_el0)
282DEFINE_SYSREG_RW_FUNCS(pmevtyper24_el0)
283DEFINE_SYSREG_RW_FUNCS(pmevtyper25_el0)
284DEFINE_SYSREG_RW_FUNCS(pmevtyper26_el0)
285DEFINE_SYSREG_RW_FUNCS(pmevtyper27_el0)
286DEFINE_SYSREG_RW_FUNCS(pmevtyper28_el0)
287DEFINE_SYSREG_RW_FUNCS(pmevtyper29_el0)
288DEFINE_SYSREG_RW_FUNCS(pmevtyper30_el0)
289
Soby Mathewb4c6df42022-11-09 11:13:29 +0000290DEFINE_SYSREG_RW_FUNCS(tpidrro_el0)
291DEFINE_SYSREG_RW_FUNCS(tpidr_el0)
292DEFINE_SYSREG_RW_FUNCS(tpidr_el2)
293DEFINE_SYSREG_RW_FUNCS(csselr_el1)
294DEFINE_SYSREG_RW_FUNCS(sctlr_el12)
295DEFINE_SYSREG_RW_FUNCS(cpacr_el12)
Tushar Khandelwal59f673a2024-05-08 14:42:10 +0100296DEFINE_RENAME_SYSREG_RW_FUNCS(tcr2_el2, TCR2_EL2)
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +0000297DEFINE_RENAME_SYSREG_RW_FUNCS(zcr_el2, ZCR_EL2)
Arunachalam Ganapathy4f601e72023-05-22 11:49:29 +0100298DEFINE_RENAME_SYSREG_RW_FUNCS(zcr_el12, ZCR_EL12)
Arunachalam Ganapathy83f46ca2023-08-15 18:13:27 +0100299DEFINE_RENAME_SYSREG_RW_FUNCS(smcr_el2, SMCR_EL2)
300DEFINE_RENAME_SYSREG_RW_FUNCS(svcr, SVCR)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000301DEFINE_SYSREG_RW_FUNCS(ttbr0_el12)
302DEFINE_SYSREG_RW_FUNCS(ttbr1_el12)
303DEFINE_SYSREG_RW_FUNCS(tcr_el12)
304DEFINE_SYSREG_RW_FUNCS(esr_el12)
305DEFINE_SYSREG_RW_FUNCS(afsr0_el12)
306DEFINE_SYSREG_RW_FUNCS(afsr1_el12)
307DEFINE_SYSREG_RW_FUNCS(far_el12)
308DEFINE_SYSREG_RW_FUNCS(mair_el12)
309DEFINE_SYSREG_RW_FUNCS(vbar_el12)
310DEFINE_SYSREG_RW_FUNCS(contextidr_el12)
311DEFINE_SYSREG_RW_FUNCS(tpidr_el1)
312DEFINE_SYSREG_RW_FUNCS(amair_el12)
313DEFINE_SYSREG_RW_FUNCS(cntkctl_el12)
314DEFINE_SYSREG_RW_FUNCS(mdscr_el1)
315DEFINE_SYSREG_RW_FUNCS(mdccint_el1)
316DEFINE_SYSREG_RW_FUNCS(disr_el1)
317DEFINE_SYSREG_RW_FUNCS(cnrv_ctl_el02)
318DEFINE_SYSREG_RW_FUNCS(vtcr_el2)
319DEFINE_SYSREG_RW_FUNCS(vsesr_el2)
320DEFINE_SYSREG_RW_FUNCS(par_el1)
321DEFINE_SYSREG_READ_FUNC(id_pfr1_el1)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000322DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64AFR0_EL1, id_aa64afr0_el1)
323DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64AFR1_EL1, id_aa64afr1_el1)
AlexeiFedorov537bee02023-02-02 13:38:23 +0000324DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64DFR0_EL1, id_aa64dfr0_el1)
325DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64DFR1_EL1, id_aa64dfr1_el1)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000326DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64ISAR0_EL1, id_aa64isar0_el1)
327DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64ISAR1_EL1, id_aa64isar1_el1)
328DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR0_EL1, id_aa64mmfr0_el1)
329DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR1_EL1, id_aa64mmfr1_el1)
AlexeiFedorov537bee02023-02-02 13:38:23 +0000330DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR2_EL1, id_aa64mmfr2_el1)
Javier Almansa Sobrinocfd32542024-10-09 19:38:56 +0100331DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR3_EL1, ID_AA64MMFR3)
332DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64mmfr3_el1, ID_AA64MMFR3)
AlexeiFedorov537bee02023-02-02 13:38:23 +0000333DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64PFR0_EL1, id_aa64pfr0_el1)
334DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64PFR1_EL1, id_aa64pfr1_el1)
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000335DEFINE_SYSREG_READ_FUNC(id_aa64afr0_el1)
336DEFINE_SYSREG_READ_FUNC(id_aa64afr1_el1)
337DEFINE_SYSREG_READ_FUNC(id_aa64dfr0_el1)
338DEFINE_SYSREG_READ_FUNC(id_aa64dfr1_el1)
Arunachalam Ganapathyf6491212023-02-23 16:04:34 +0000339DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64zfr0_el1, ID_AA64ZFR0_EL1)
Arunachalam Ganapathy83f46ca2023-08-15 18:13:27 +0100340DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64smfr0_el1, ID_AA64SMFR0_EL1)
AlexeiFedorov537bee02023-02-02 13:38:23 +0000341DEFINE_SYSREG_READ_FUNC(id_aa64isar0_el1)
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000342DEFINE_SYSREG_READ_FUNC(id_aa64isar1_el1)
AlexeiFedorov537bee02023-02-02 13:38:23 +0000343DEFINE_SYSREG_READ_FUNC(id_aa64mmfr0_el1)
344DEFINE_SYSREG_READ_FUNC(id_aa64mmfr1_el1)
345DEFINE_SYSREG_READ_FUNC(id_aa64mmfr2_el1)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000346DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1)
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000347DEFINE_SYSREG_READ_FUNC(id_aa64pfr1_el1)
AlexeiFedorov537bee02023-02-02 13:38:23 +0000348DEFINE_RENAME_SYSREG_RW_FUNCS(mpam0_el1, MPAM0_EL1)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000349DEFINE_SYSREG_READ_FUNC(id_afr0_el1)
350DEFINE_SYSREG_READ_FUNC(CurrentEl)
351DEFINE_SYSREG_READ_FUNC(ctr_el0)
352DEFINE_SYSREG_RW_FUNCS(daif)
353DEFINE_SYSREG_RW_FUNCS(spsr_el1)
354DEFINE_SYSREG_RW_FUNCS(spsr_el2)
355DEFINE_SYSREG_RW_FUNCS(elr_el1)
356DEFINE_SYSREG_RW_FUNCS(elr_el2)
357
358DEFINE_SYSREG_READ_FUNC(midr_el1)
359DEFINE_SYSREG_READ_FUNC(mpidr_el1)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000360
361DEFINE_SYSREG_RW_FUNCS(hcr_el2)
Javier Almansa Sobrinocfd32542024-10-09 19:38:56 +0100362DEFINE_RENAME_SYSREG_RW_FUNCS(hcrx_el2, HCRX_EL2)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000363
364DEFINE_SYSREG_RW_FUNCS(vbar_el1)
365DEFINE_SYSREG_RW_FUNCS(vbar_el2)
366
367DEFINE_SYSREG_RW_FUNCS(sctlr_el1)
368DEFINE_SYSREG_RW_FUNCS(sctlr_el2)
Javier Almansa Sobrinocfd32542024-10-09 19:38:56 +0100369DEFINE_RENAME_SYSREG_RW_FUNCS(sctlr2_el12, SCTLR2_EL12)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000370
371DEFINE_SYSREG_RW_FUNCS(actlr_el1)
372DEFINE_SYSREG_RW_FUNCS(actlr_el2)
373
374DEFINE_SYSREG_RW_FUNCS(esr_el1)
375DEFINE_SYSREG_RW_FUNCS(esr_el2)
376
377DEFINE_SYSREG_RW_FUNCS(afsr0_el1)
378DEFINE_SYSREG_RW_FUNCS(afsr0_el2)
379
380DEFINE_SYSREG_RW_FUNCS(afsr1_el1)
381DEFINE_SYSREG_RW_FUNCS(afsr1_el2)
382
383DEFINE_SYSREG_RW_FUNCS(far_el1)
384DEFINE_SYSREG_RW_FUNCS(far_el2)
385DEFINE_SYSREG_RW_FUNCS(hpfar_el2)
386
387DEFINE_SYSREG_RW_FUNCS(mair_el1)
388DEFINE_SYSREG_RW_FUNCS(mair_el2)
389
390DEFINE_SYSREG_RW_FUNCS(amair_el1)
391DEFINE_SYSREG_RW_FUNCS(amair_el2)
392
393DEFINE_SYSREG_READ_FUNC(rvbar_el1)
394DEFINE_SYSREG_READ_FUNC(rvbar_el2)
395
396DEFINE_SYSREG_RW_FUNCS(rmr_el1)
397DEFINE_SYSREG_RW_FUNCS(rmr_el2)
398
399DEFINE_SYSREG_RW_FUNCS(tcr_el1)
400DEFINE_SYSREG_RW_FUNCS(tcr_el2)
401
402DEFINE_SYSREG_RW_FUNCS(ttbr0_el1)
403DEFINE_SYSREG_RW_FUNCS(ttbr0_el2)
404DEFINE_SYSREG_RW_FUNCS(ttbr1_el2)
405
406DEFINE_SYSREG_RW_FUNCS(ttbr1_el1)
407
408DEFINE_SYSREG_RW_FUNCS(vttbr_el2)
409
410DEFINE_SYSREG_RW_FUNCS(cptr_el2)
411
412DEFINE_SYSREG_RW_FUNCS(cpacr_el1)
413
414DEFINE_SYSREG_RW_FUNCS(vpidr_el2)
415DEFINE_SYSREG_RW_FUNCS(vmpidr_el2)
416
417DEFINE_SYSREG_READ_FUNC(isr_el1)
418
419DEFINE_SYSREG_RW_FUNCS(mdcr_el2)
420DEFINE_SYSREG_RW_FUNCS(hstr_el2)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000421DEFINE_SYSREG_RW_FUNCS(mpam2_el2)
422DEFINE_SYSREG_RW_FUNCS(mpamhcr_el2)
423DEFINE_SYSREG_RW_FUNCS(pmscr_el2)
424
Arunachalam Ganapathy4f601e72023-05-22 11:49:29 +0100425DEFINE_RENAME_SYSREG_RW_FUNCS(fpcr, FPCR)
426DEFINE_RENAME_SYSREG_RW_FUNCS(fpsr, FPSR)
427
AlexeiFedorov862f96c2024-03-01 16:26:48 +0000428DEFINE_SYSREG_READ_FUNC(dczid_el0)
429
Rustam Ismayilovb643b752024-09-27 16:29:46 +0200430DEFINE_RENAME_SYSREG_RW_FUNCS(dit, DIT)
431
Javier Almansa Sobrino34005b92024-10-11 17:53:41 +0100432DEFINE_RENAME_SYSREG_READ_FUNC(gcscr_el12, ID_GCSCR_EL12)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000433/*******************************************************************************
434 * Timer register accessor prototypes
435 ******************************************************************************/
436DEFINE_SYSREG_RW_FUNCS(cntfrq_el0)
437DEFINE_SYSREG_RW_FUNCS(cnthp_ctl_el2)
438DEFINE_SYSREG_RW_FUNCS(cnthp_tval_el2)
439DEFINE_SYSREG_RW_FUNCS(cnthp_cval_el2)
440DEFINE_SYSREG_RW_FUNCS(cntps_ctl_el1)
441DEFINE_SYSREG_RW_FUNCS(cntps_tval_el1)
442DEFINE_SYSREG_RW_FUNCS(cntps_cval_el1)
443DEFINE_SYSREG_RW_FUNCS(cntp_ctl_el0)
444DEFINE_SYSREG_RW_FUNCS(cntp_tval_el0)
445DEFINE_SYSREG_RW_FUNCS(cntp_cval_el0)
446DEFINE_SYSREG_READ_FUNC(cntpct_el0)
447DEFINE_SYSREG_RW_FUNCS(cnthctl_el2)
448DEFINE_SYSREG_RW_FUNCS(cntp_ctl_el02)
449DEFINE_SYSREG_RW_FUNCS(cntp_cval_el02)
450DEFINE_SYSREG_RW_FUNCS(cntv_ctl_el02)
451DEFINE_SYSREG_RW_FUNCS(cntv_cval_el02)
452DEFINE_SYSREG_RW_FUNCS(cntvoff_el2)
453DEFINE_RENAME_SYSREG_RW_FUNCS(cntpoff_el2, CNTPOFF_EL2)
454
455/*******************************************************************************
456 * Interrupt Controller register accessor prototypes
457 ******************************************************************************/
458DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el2, ICC_SRE_EL2)
459DEFINE_RENAME_SYSREG_RW_FUNCS(icc_ctrl_el1, ICC_CTLR_EL1)
AlexeiFedoroveaec0c42023-02-01 18:13:32 +0000460DEFINE_RENAME_SYSREG_RW_FUNCS(icc_hppir1_el1, ICC_HPPIR1_EL1)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000461
462/*******************************************************************************
463 * Virtual GIC register accessor prototypes
464 ******************************************************************************/
465DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r0_el2, ICH_AP0R0_EL2)
466DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r1_el2, ICH_AP0R1_EL2)
467DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r2_el2, ICH_AP0R2_EL2)
468DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r3_el2, ICH_AP0R3_EL2)
469DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r0_el2, ICH_AP1R0_EL2)
470DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r1_el2, ICH_AP1R1_EL2)
471DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r2_el2, ICH_AP1R2_EL2)
472DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r3_el2, ICH_AP1R3_EL2)
473
474DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr0_el2, ICH_LR0_EL2)
475DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr1_el2, ICH_LR1_EL2)
476DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr2_el2, ICH_LR2_EL2)
477DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr3_el2, ICH_LR3_EL2)
478DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr4_el2, ICH_LR4_EL2)
479DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr5_el2, ICH_LR5_EL2)
480DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr6_el2, ICH_LR6_EL2)
481DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr7_el2, ICH_LR7_EL2)
482DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr8_el2, ICH_LR8_EL2)
483DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr9_el2, ICH_LR9_EL2)
484DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr10_el2, ICH_LR10_EL2)
485DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr11_el2, ICH_LR11_EL2)
486DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr12_el2, ICH_LR12_EL2)
487DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr13_el2, ICH_LR13_EL2)
488DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr14_el2, ICH_LR14_EL2)
489DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr15_el2, ICH_LR15_EL2)
490
491DEFINE_RENAME_SYSREG_RW_FUNCS(ich_hcr_el2, ICH_HCR_EL2)
492DEFINE_RENAME_SYSREG_RW_FUNCS(ich_vmcr_el2, ICH_VMCR_EL2)
493DEFINE_RENAME_SYSREG_READ_FUNC(ich_vtr_el2, ICH_VTR_EL2)
494DEFINE_RENAME_SYSREG_READ_FUNC(ich_misr_el2, ICH_MISR_EL2)
495
Soby Mathewb4c6df42022-11-09 11:13:29 +0000496/* Armv8.3 Pointer Authentication Registers */
497DEFINE_RENAME_SYSREG_RW_FUNCS(apiakeyhi_el1, APIAKeyHi_EL1)
498DEFINE_RENAME_SYSREG_RW_FUNCS(apiakeylo_el1, APIAKeyLo_EL1)
Arvind Ram Prakashbd36a1b2022-12-15 12:16:36 -0600499DEFINE_RENAME_SYSREG_RW_FUNCS(apibkeyhi_el1, APIBKeyHi_EL1)
500DEFINE_RENAME_SYSREG_RW_FUNCS(apibkeylo_el1, APIBKeyLo_EL1)
501DEFINE_RENAME_SYSREG_RW_FUNCS(apdakeyhi_el1, APDAKeyHi_EL1)
502DEFINE_RENAME_SYSREG_RW_FUNCS(apdakeylo_el1, APDAKeyLo_EL1)
503DEFINE_RENAME_SYSREG_RW_FUNCS(apdbkeyhi_el1, APDBKeyHi_EL1)
504DEFINE_RENAME_SYSREG_RW_FUNCS(apdbkeylo_el1, APDBKeyLo_EL1)
505DEFINE_RENAME_SYSREG_RW_FUNCS(apgakeyhi_el1, APGAKeyHi_EL1)
506DEFINE_RENAME_SYSREG_RW_FUNCS(apgakeylo_el1, APGAKeyLo_EL1)
Soby Mathewb4c6df42022-11-09 11:13:29 +0000507
508/* Armv8.5 MTE Registers */
509DEFINE_RENAME_SYSREG_RW_FUNCS(tfsre0_el1, TFSRE0_EL1)
510DEFINE_RENAME_SYSREG_RW_FUNCS(tfsr_el1, TFSR_EL1)
511DEFINE_RENAME_SYSREG_RW_FUNCS(rgsr_el1, RGSR_EL1)
512DEFINE_RENAME_SYSREG_RW_FUNCS(gcr_el1, GCR_EL1)
513
Arvind Ram Prakashbd36a1b2022-12-15 12:16:36 -0600514/* Armv8.5 Random Number Register */
515DEFINE_RENAME_SYSREG_READ_FUNC(rndr, RNDR)
516
Tushar Khandelwal59f673a2024-05-08 14:42:10 +0100517/* MEC Registers */
518DEFINE_RENAME_SYSREG_READ_FUNC(mecidr_el2, MECIDR_EL2)
519DEFINE_RENAME_SYSREG_RW_FUNCS(mecid_p0_el2, MECID_P0_EL2)
520DEFINE_RENAME_SYSREG_RW_FUNCS(mecid_a0_el2, MECID_A0_EL2)
521
522DEFINE_RENAME_SYSREG_RW_FUNCS(mecid_p1_el2, MECID_P1_EL2)
523DEFINE_RENAME_SYSREG_RW_FUNCS(mecid_a1_el2, MECID_A1_EL2)
524
525DEFINE_RENAME_SYSREG_RW_FUNCS(vmecid_p_el2, VMECID_P_EL2)
526DEFINE_RENAME_SYSREG_RW_FUNCS(vmecid_a_el2, VMECID_P_EL2)
527
528DEFINE_RENAME_SYSREG_RW_FUNCS(sctlr2_el2, SCTLR2_EL2)
529
Soby Mathewb4c6df42022-11-09 11:13:29 +0000530#endif /* ARCH_HELPERS_H */