Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * SPDX-License-Identifier: BSD-3-Clause |
| 3 | * SPDX-FileCopyrightText: Copyright TF-RMM Contributors. |
| 4 | */ |
| 5 | |
| 6 | /* TODO: This file will need clean up */ |
| 7 | |
| 8 | #ifndef ARCH_HELPERS_H |
| 9 | #define ARCH_HELPERS_H |
| 10 | |
| 11 | #include <arch.h> |
| 12 | #include <instr_helpers.h> |
| 13 | #include <stdbool.h> |
| 14 | #include <stddef.h> |
| 15 | |
| 16 | /* Define read function for system register */ |
| 17 | #define DEFINE_SYSREG_READ_FUNC(_name) \ |
| 18 | DEFINE_SYSREG_READ_FUNC_(_name, _name) |
| 19 | |
| 20 | /* Define read & write function for system register */ |
| 21 | #define DEFINE_SYSREG_RW_FUNCS(_name) \ |
| 22 | DEFINE_SYSREG_READ_FUNC_(_name, _name) \ |
| 23 | DEFINE_SYSREG_WRITE_FUNC_(_name, _name) |
| 24 | |
| 25 | /* Define read & write function for renamed system register */ |
| 26 | #define DEFINE_RENAME_SYSREG_RW_FUNCS(_name, _reg_name) \ |
| 27 | DEFINE_SYSREG_READ_FUNC_(_name, _reg_name) \ |
| 28 | DEFINE_SYSREG_WRITE_FUNC_(_name, _reg_name) |
| 29 | |
| 30 | /* Define read function for renamed system register */ |
| 31 | #define DEFINE_RENAME_SYSREG_READ_FUNC(_name, _reg_name) \ |
| 32 | DEFINE_SYSREG_READ_FUNC_(_name, _reg_name) |
| 33 | |
| 34 | /* Define write function for renamed system register */ |
| 35 | #define DEFINE_RENAME_SYSREG_WRITE_FUNC(_name, _reg_name) \ |
| 36 | DEFINE_SYSREG_WRITE_FUNC_(_name, _reg_name) |
| 37 | |
| 38 | /******************************************************************************* |
| 39 | * TLB maintenance accessor prototypes |
| 40 | ******************************************************************************/ |
| 41 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1) |
| 42 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is) |
| 43 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2) |
| 44 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is) |
| 45 | DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1) |
| 46 | DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1is) |
| 47 | DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalls12e1) |
| 48 | |
| 49 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaae1is) |
| 50 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaale1is) |
Raghu Krishnamurthy | 0e15c3b | 2024-07-15 19:07:10 -0700 | [diff] [blame] | 51 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 52 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2is) |
| 53 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale2is) |
| 54 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, ipas2e1is) |
| 55 | |
| 56 | /******************************************************************************* |
| 57 | * Cache maintenance accessor prototypes |
| 58 | ******************************************************************************/ |
| 59 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, isw) |
| 60 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cisw) |
| 61 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, csw) |
| 62 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvac) |
| 63 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, ivac) |
| 64 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, civac) |
| 65 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvau) |
Jean-Philippe Brucker | 6cfd008 | 2025-01-22 17:15:56 +0000 | [diff] [blame^] | 66 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cipae) |
AlexeiFedorov | 862f96c | 2024-03-01 16:26:48 +0000 | [diff] [blame] | 67 | DEFINE_SYSOP_DCZVA |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 68 | |
| 69 | /******************************************************************************* |
| 70 | * Address translation accessor prototypes |
| 71 | ******************************************************************************/ |
| 72 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1r) |
| 73 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1w) |
| 74 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0r) |
| 75 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0w) |
| 76 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s1e1r) |
| 77 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s1e2r) |
| 78 | |
| 79 | /******************************************************************************* |
| 80 | * Strip Pointer Authentication Code |
| 81 | ******************************************************************************/ |
| 82 | DEFINE_SYSOP_PARAM_FUNC(xpaci) |
| 83 | |
| 84 | /******************************************************************************* |
| 85 | * Cache management |
| 86 | ******************************************************************************/ |
| 87 | void flush_dcache_range(uintptr_t addr, size_t size); |
| 88 | void clean_dcache_range(uintptr_t addr, size_t size); |
| 89 | void inv_dcache_range(uintptr_t addr, size_t size); |
Jean-Philippe Brucker | 6cfd008 | 2025-01-22 17:15:56 +0000 | [diff] [blame^] | 90 | void flush_dcache_range_to_poe(uintptr_t paddr, size_t size); |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 91 | |
Arvind Ram Prakash | bd36a1b | 2022-12-15 12:16:36 -0600 | [diff] [blame] | 92 | #define is_dcache_enabled() ((read_sctlr_el2() & SCTLR_ELx_C_BIT) != 0UL) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 93 | |
| 94 | /******************************************************************************* |
| 95 | * MMU management |
| 96 | ******************************************************************************/ |
Arvind Ram Prakash | bd36a1b | 2022-12-15 12:16:36 -0600 | [diff] [blame] | 97 | #define is_mmu_enabled() ((read_sctlr_el2() & SCTLR_ELx_M_BIT) != 0UL) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 98 | |
| 99 | /******************************************************************************* |
| 100 | * FPU management |
| 101 | ******************************************************************************/ |
Arunachalam Ganapathy | 9ade18b | 2023-06-12 14:07:21 +0100 | [diff] [blame] | 102 | #define is_fpen_enabled() (EXTRACT(CPTR_EL2_VHE_FPEN, read_cptr_el2()) == \ |
| 103 | CPTR_EL2_VHE_FPEN_NO_TRAP_11) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 104 | |
| 105 | /******************************************************************************* |
Arunachalam Ganapathy | f649121 | 2023-02-23 16:04:34 +0000 | [diff] [blame] | 106 | * SVE management |
| 107 | ******************************************************************************/ |
Arunachalam Ganapathy | 9ade18b | 2023-06-12 14:07:21 +0100 | [diff] [blame] | 108 | #define is_zen_enabled() (EXTRACT(CPTR_EL2_VHE_ZEN, read_cptr_el2()) == \ |
| 109 | CPTR_EL2_VHE_ZEN_NO_TRAP_11) |
Arunachalam Ganapathy | f649121 | 2023-02-23 16:04:34 +0000 | [diff] [blame] | 110 | |
| 111 | /******************************************************************************* |
Arunachalam Ganapathy | 83f46ca | 2023-08-15 18:13:27 +0100 | [diff] [blame] | 112 | * SME management |
| 113 | ******************************************************************************/ |
| 114 | #define is_smen_enabled() (EXTRACT(CPTR_EL2_SMEN, read_cptr_el2()) == \ |
| 115 | CPTR_EL2_SMEN_NO_TRAP_11) |
| 116 | |
| 117 | /******************************************************************************* |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 118 | * Misc. accessor prototypes |
| 119 | ******************************************************************************/ |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 120 | #define write_daifclr(val) SYSREG_WRITE_CONST(daifclr, val) |
| 121 | #define write_daifset(val) SYSREG_WRITE_CONST(daifset, val) |
| 122 | |
| 123 | DEFINE_SYSOP_FUNC(wfi) |
| 124 | DEFINE_SYSOP_FUNC(wfe) |
| 125 | DEFINE_SYSOP_FUNC(sev) |
| 126 | DEFINE_SYSOP_FUNC(isb) |
| 127 | |
AlexeiFedorov | 4c7d485 | 2024-01-25 14:37:34 +0000 | [diff] [blame] | 128 | /******************************************************************************* |
| 129 | * Stack Pointer Select |
| 130 | ******************************************************************************/ |
| 131 | #define write_spsel(val) SYSREG_WRITE_CONST(spsel, val) |
| 132 | |
| 133 | /******************************************************************************* |
| 134 | * Read Stack Pointer |
| 135 | ******************************************************************************/ |
| 136 | #define read_sp(var) READ_REGISTER(var, sp) |
| 137 | |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 138 | static inline void enable_irq(void) |
| 139 | { |
| 140 | /* |
| 141 | * The compiler memory barrier will prevent the compiler from |
| 142 | * scheduling non-volatile memory access after the write to the |
| 143 | * register. |
| 144 | * |
| 145 | * This could happen if some initialization code issues non-volatile |
| 146 | * accesses to an area used by an interrupt handler, in the assumption |
| 147 | * that it is safe as the interrupts are disabled at the time it does |
| 148 | * that (according to program order). However, non-volatile accesses |
| 149 | * are not necessarily in program order relatively with volatile inline |
| 150 | * assembly statements (and volatile accesses). |
| 151 | */ |
| 152 | COMPILER_BARRIER(); |
| 153 | write_daifclr(DAIF_IRQ_BIT); |
| 154 | isb(); |
| 155 | } |
| 156 | |
| 157 | static inline void enable_fiq(void) |
| 158 | { |
| 159 | COMPILER_BARRIER(); |
| 160 | write_daifclr(DAIF_FIQ_BIT); |
| 161 | isb(); |
| 162 | } |
| 163 | |
| 164 | static inline void enable_serror(void) |
| 165 | { |
| 166 | COMPILER_BARRIER(); |
| 167 | write_daifclr(DAIF_ABT_BIT); |
| 168 | isb(); |
| 169 | } |
| 170 | |
| 171 | static inline void enable_debug_exceptions(void) |
| 172 | { |
| 173 | COMPILER_BARRIER(); |
| 174 | write_daifclr(DAIF_DBG_BIT); |
| 175 | isb(); |
| 176 | } |
| 177 | |
| 178 | static inline void disable_irq(void) |
| 179 | { |
| 180 | COMPILER_BARRIER(); |
| 181 | write_daifset(DAIF_IRQ_BIT); |
| 182 | isb(); |
| 183 | } |
| 184 | |
| 185 | static inline void disable_fiq(void) |
| 186 | { |
| 187 | COMPILER_BARRIER(); |
| 188 | write_daifset(DAIF_FIQ_BIT); |
| 189 | isb(); |
| 190 | } |
| 191 | |
| 192 | static inline void disable_serror(void) |
| 193 | { |
| 194 | COMPILER_BARRIER(); |
| 195 | write_daifset(DAIF_ABT_BIT); |
| 196 | isb(); |
| 197 | } |
| 198 | |
| 199 | static inline void disable_debug_exceptions(void) |
| 200 | { |
| 201 | COMPILER_BARRIER(); |
| 202 | write_daifset(DAIF_DBG_BIT); |
| 203 | isb(); |
| 204 | } |
| 205 | |
| 206 | /******************************************************************************* |
| 207 | * System register accessor prototypes |
| 208 | ******************************************************************************/ |
| 209 | DEFINE_SYSREG_RW_FUNCS(sp_el0) |
| 210 | DEFINE_SYSREG_RW_FUNCS(sp_el1) |
| 211 | DEFINE_SYSREG_RW_FUNCS(elr_el12) |
| 212 | DEFINE_SYSREG_RW_FUNCS(spsr_el12) |
AlexeiFedorov | eaec0c4 | 2023-02-01 18:13:32 +0000 | [diff] [blame] | 213 | |
| 214 | DEFINE_SYSREG_RW_FUNCS(pmccfiltr_el0) |
| 215 | DEFINE_SYSREG_RW_FUNCS(pmccntr_el0) |
| 216 | DEFINE_SYSREG_RW_FUNCS(pmcntenclr_el0) |
| 217 | DEFINE_SYSREG_RW_FUNCS(pmcntenset_el0) |
| 218 | DEFINE_SYSREG_RW_FUNCS(pmcr_el0) |
| 219 | DEFINE_SYSREG_RW_FUNCS(pmintenclr_el1) |
| 220 | DEFINE_SYSREG_RW_FUNCS(pmintenset_el1) |
| 221 | DEFINE_SYSREG_RW_FUNCS(pmovsclr_el0) |
| 222 | DEFINE_SYSREG_RW_FUNCS(pmovsset_el0) |
| 223 | DEFINE_SYSREG_RW_FUNCS(pmselr_el0) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 224 | DEFINE_SYSREG_RW_FUNCS(pmuserenr_el0) |
AlexeiFedorov | eaec0c4 | 2023-02-01 18:13:32 +0000 | [diff] [blame] | 225 | DEFINE_SYSREG_RW_FUNCS(pmxevcntr_el0) |
| 226 | DEFINE_SYSREG_RW_FUNCS(pmxevtyper_el0) |
| 227 | |
| 228 | DEFINE_SYSREG_RW_FUNCS(pmevcntr0_el0) |
| 229 | DEFINE_SYSREG_RW_FUNCS(pmevcntr1_el0) |
| 230 | DEFINE_SYSREG_RW_FUNCS(pmevcntr2_el0) |
| 231 | DEFINE_SYSREG_RW_FUNCS(pmevcntr3_el0) |
| 232 | DEFINE_SYSREG_RW_FUNCS(pmevcntr4_el0) |
| 233 | DEFINE_SYSREG_RW_FUNCS(pmevcntr5_el0) |
| 234 | DEFINE_SYSREG_RW_FUNCS(pmevcntr6_el0) |
| 235 | DEFINE_SYSREG_RW_FUNCS(pmevcntr7_el0) |
| 236 | DEFINE_SYSREG_RW_FUNCS(pmevcntr8_el0) |
| 237 | DEFINE_SYSREG_RW_FUNCS(pmevcntr9_el0) |
| 238 | DEFINE_SYSREG_RW_FUNCS(pmevcntr10_el0) |
| 239 | DEFINE_SYSREG_RW_FUNCS(pmevcntr11_el0) |
| 240 | DEFINE_SYSREG_RW_FUNCS(pmevcntr12_el0) |
| 241 | DEFINE_SYSREG_RW_FUNCS(pmevcntr13_el0) |
| 242 | DEFINE_SYSREG_RW_FUNCS(pmevcntr14_el0) |
| 243 | DEFINE_SYSREG_RW_FUNCS(pmevcntr15_el0) |
| 244 | DEFINE_SYSREG_RW_FUNCS(pmevcntr16_el0) |
| 245 | DEFINE_SYSREG_RW_FUNCS(pmevcntr17_el0) |
| 246 | DEFINE_SYSREG_RW_FUNCS(pmevcntr18_el0) |
| 247 | DEFINE_SYSREG_RW_FUNCS(pmevcntr19_el0) |
| 248 | DEFINE_SYSREG_RW_FUNCS(pmevcntr20_el0) |
| 249 | DEFINE_SYSREG_RW_FUNCS(pmevcntr21_el0) |
| 250 | DEFINE_SYSREG_RW_FUNCS(pmevcntr22_el0) |
| 251 | DEFINE_SYSREG_RW_FUNCS(pmevcntr23_el0) |
| 252 | DEFINE_SYSREG_RW_FUNCS(pmevcntr24_el0) |
| 253 | DEFINE_SYSREG_RW_FUNCS(pmevcntr25_el0) |
| 254 | DEFINE_SYSREG_RW_FUNCS(pmevcntr26_el0) |
| 255 | DEFINE_SYSREG_RW_FUNCS(pmevcntr27_el0) |
| 256 | DEFINE_SYSREG_RW_FUNCS(pmevcntr28_el0) |
| 257 | DEFINE_SYSREG_RW_FUNCS(pmevcntr29_el0) |
| 258 | DEFINE_SYSREG_RW_FUNCS(pmevcntr30_el0) |
| 259 | |
| 260 | DEFINE_SYSREG_RW_FUNCS(pmevtyper0_el0) |
| 261 | DEFINE_SYSREG_RW_FUNCS(pmevtyper1_el0) |
| 262 | DEFINE_SYSREG_RW_FUNCS(pmevtyper2_el0) |
| 263 | DEFINE_SYSREG_RW_FUNCS(pmevtyper3_el0) |
| 264 | DEFINE_SYSREG_RW_FUNCS(pmevtyper4_el0) |
| 265 | DEFINE_SYSREG_RW_FUNCS(pmevtyper5_el0) |
| 266 | DEFINE_SYSREG_RW_FUNCS(pmevtyper6_el0) |
| 267 | DEFINE_SYSREG_RW_FUNCS(pmevtyper7_el0) |
| 268 | DEFINE_SYSREG_RW_FUNCS(pmevtyper8_el0) |
| 269 | DEFINE_SYSREG_RW_FUNCS(pmevtyper9_el0) |
| 270 | DEFINE_SYSREG_RW_FUNCS(pmevtyper10_el0) |
| 271 | DEFINE_SYSREG_RW_FUNCS(pmevtyper11_el0) |
| 272 | DEFINE_SYSREG_RW_FUNCS(pmevtyper12_el0) |
| 273 | DEFINE_SYSREG_RW_FUNCS(pmevtyper13_el0) |
| 274 | DEFINE_SYSREG_RW_FUNCS(pmevtyper14_el0) |
| 275 | DEFINE_SYSREG_RW_FUNCS(pmevtyper15_el0) |
| 276 | DEFINE_SYSREG_RW_FUNCS(pmevtyper16_el0) |
| 277 | DEFINE_SYSREG_RW_FUNCS(pmevtyper17_el0) |
| 278 | DEFINE_SYSREG_RW_FUNCS(pmevtyper18_el0) |
| 279 | DEFINE_SYSREG_RW_FUNCS(pmevtyper19_el0) |
| 280 | DEFINE_SYSREG_RW_FUNCS(pmevtyper20_el0) |
| 281 | DEFINE_SYSREG_RW_FUNCS(pmevtyper21_el0) |
| 282 | DEFINE_SYSREG_RW_FUNCS(pmevtyper22_el0) |
| 283 | DEFINE_SYSREG_RW_FUNCS(pmevtyper23_el0) |
| 284 | DEFINE_SYSREG_RW_FUNCS(pmevtyper24_el0) |
| 285 | DEFINE_SYSREG_RW_FUNCS(pmevtyper25_el0) |
| 286 | DEFINE_SYSREG_RW_FUNCS(pmevtyper26_el0) |
| 287 | DEFINE_SYSREG_RW_FUNCS(pmevtyper27_el0) |
| 288 | DEFINE_SYSREG_RW_FUNCS(pmevtyper28_el0) |
| 289 | DEFINE_SYSREG_RW_FUNCS(pmevtyper29_el0) |
| 290 | DEFINE_SYSREG_RW_FUNCS(pmevtyper30_el0) |
| 291 | |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 292 | DEFINE_SYSREG_RW_FUNCS(tpidrro_el0) |
| 293 | DEFINE_SYSREG_RW_FUNCS(tpidr_el0) |
| 294 | DEFINE_SYSREG_RW_FUNCS(tpidr_el2) |
| 295 | DEFINE_SYSREG_RW_FUNCS(csselr_el1) |
| 296 | DEFINE_SYSREG_RW_FUNCS(sctlr_el12) |
| 297 | DEFINE_SYSREG_RW_FUNCS(cpacr_el12) |
Tushar Khandelwal | 59f673a | 2024-05-08 14:42:10 +0100 | [diff] [blame] | 298 | DEFINE_RENAME_SYSREG_RW_FUNCS(tcr2_el2, TCR2_EL2) |
Arunachalam Ganapathy | f649121 | 2023-02-23 16:04:34 +0000 | [diff] [blame] | 299 | DEFINE_RENAME_SYSREG_RW_FUNCS(zcr_el2, ZCR_EL2) |
Arunachalam Ganapathy | 4f601e7 | 2023-05-22 11:49:29 +0100 | [diff] [blame] | 300 | DEFINE_RENAME_SYSREG_RW_FUNCS(zcr_el12, ZCR_EL12) |
Arunachalam Ganapathy | 83f46ca | 2023-08-15 18:13:27 +0100 | [diff] [blame] | 301 | DEFINE_RENAME_SYSREG_RW_FUNCS(smcr_el2, SMCR_EL2) |
| 302 | DEFINE_RENAME_SYSREG_RW_FUNCS(svcr, SVCR) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 303 | DEFINE_SYSREG_RW_FUNCS(ttbr0_el12) |
| 304 | DEFINE_SYSREG_RW_FUNCS(ttbr1_el12) |
| 305 | DEFINE_SYSREG_RW_FUNCS(tcr_el12) |
| 306 | DEFINE_SYSREG_RW_FUNCS(esr_el12) |
| 307 | DEFINE_SYSREG_RW_FUNCS(afsr0_el12) |
| 308 | DEFINE_SYSREG_RW_FUNCS(afsr1_el12) |
| 309 | DEFINE_SYSREG_RW_FUNCS(far_el12) |
| 310 | DEFINE_SYSREG_RW_FUNCS(mair_el12) |
| 311 | DEFINE_SYSREG_RW_FUNCS(vbar_el12) |
| 312 | DEFINE_SYSREG_RW_FUNCS(contextidr_el12) |
| 313 | DEFINE_SYSREG_RW_FUNCS(tpidr_el1) |
| 314 | DEFINE_SYSREG_RW_FUNCS(amair_el12) |
| 315 | DEFINE_SYSREG_RW_FUNCS(cntkctl_el12) |
| 316 | DEFINE_SYSREG_RW_FUNCS(mdscr_el1) |
| 317 | DEFINE_SYSREG_RW_FUNCS(mdccint_el1) |
| 318 | DEFINE_SYSREG_RW_FUNCS(disr_el1) |
| 319 | DEFINE_SYSREG_RW_FUNCS(cnrv_ctl_el02) |
| 320 | DEFINE_SYSREG_RW_FUNCS(vtcr_el2) |
| 321 | DEFINE_SYSREG_RW_FUNCS(vsesr_el2) |
| 322 | DEFINE_SYSREG_RW_FUNCS(par_el1) |
| 323 | DEFINE_SYSREG_READ_FUNC(id_pfr1_el1) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 324 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64AFR0_EL1, id_aa64afr0_el1) |
| 325 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64AFR1_EL1, id_aa64afr1_el1) |
AlexeiFedorov | 537bee0 | 2023-02-02 13:38:23 +0000 | [diff] [blame] | 326 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64DFR0_EL1, id_aa64dfr0_el1) |
| 327 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64DFR1_EL1, id_aa64dfr1_el1) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 328 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64ISAR0_EL1, id_aa64isar0_el1) |
| 329 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64ISAR1_EL1, id_aa64isar1_el1) |
| 330 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR0_EL1, id_aa64mmfr0_el1) |
| 331 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR1_EL1, id_aa64mmfr1_el1) |
AlexeiFedorov | 537bee0 | 2023-02-02 13:38:23 +0000 | [diff] [blame] | 332 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR2_EL1, id_aa64mmfr2_el1) |
Javier Almansa Sobrino | cfd3254 | 2024-10-09 19:38:56 +0100 | [diff] [blame] | 333 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64MMFR3_EL1, ID_AA64MMFR3) |
| 334 | DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64mmfr3_el1, ID_AA64MMFR3) |
AlexeiFedorov | 537bee0 | 2023-02-02 13:38:23 +0000 | [diff] [blame] | 335 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64PFR0_EL1, id_aa64pfr0_el1) |
| 336 | DEFINE_RENAME_SYSREG_READ_FUNC(ID_AA64PFR1_EL1, id_aa64pfr1_el1) |
AlexeiFedorov | eaec0c4 | 2023-02-01 18:13:32 +0000 | [diff] [blame] | 337 | DEFINE_SYSREG_READ_FUNC(id_aa64afr0_el1) |
| 338 | DEFINE_SYSREG_READ_FUNC(id_aa64afr1_el1) |
| 339 | DEFINE_SYSREG_READ_FUNC(id_aa64dfr0_el1) |
| 340 | DEFINE_SYSREG_READ_FUNC(id_aa64dfr1_el1) |
Arunachalam Ganapathy | f649121 | 2023-02-23 16:04:34 +0000 | [diff] [blame] | 341 | DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64zfr0_el1, ID_AA64ZFR0_EL1) |
Arunachalam Ganapathy | 83f46ca | 2023-08-15 18:13:27 +0100 | [diff] [blame] | 342 | DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64smfr0_el1, ID_AA64SMFR0_EL1) |
AlexeiFedorov | 537bee0 | 2023-02-02 13:38:23 +0000 | [diff] [blame] | 343 | DEFINE_SYSREG_READ_FUNC(id_aa64isar0_el1) |
AlexeiFedorov | eaec0c4 | 2023-02-01 18:13:32 +0000 | [diff] [blame] | 344 | DEFINE_SYSREG_READ_FUNC(id_aa64isar1_el1) |
AlexeiFedorov | 537bee0 | 2023-02-02 13:38:23 +0000 | [diff] [blame] | 345 | DEFINE_SYSREG_READ_FUNC(id_aa64mmfr0_el1) |
| 346 | DEFINE_SYSREG_READ_FUNC(id_aa64mmfr1_el1) |
| 347 | DEFINE_SYSREG_READ_FUNC(id_aa64mmfr2_el1) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 348 | DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1) |
AlexeiFedorov | eaec0c4 | 2023-02-01 18:13:32 +0000 | [diff] [blame] | 349 | DEFINE_SYSREG_READ_FUNC(id_aa64pfr1_el1) |
AlexeiFedorov | 537bee0 | 2023-02-02 13:38:23 +0000 | [diff] [blame] | 350 | DEFINE_RENAME_SYSREG_RW_FUNCS(mpam0_el1, MPAM0_EL1) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 351 | DEFINE_SYSREG_READ_FUNC(id_afr0_el1) |
| 352 | DEFINE_SYSREG_READ_FUNC(CurrentEl) |
| 353 | DEFINE_SYSREG_READ_FUNC(ctr_el0) |
| 354 | DEFINE_SYSREG_RW_FUNCS(daif) |
| 355 | DEFINE_SYSREG_RW_FUNCS(spsr_el1) |
| 356 | DEFINE_SYSREG_RW_FUNCS(spsr_el2) |
| 357 | DEFINE_SYSREG_RW_FUNCS(elr_el1) |
| 358 | DEFINE_SYSREG_RW_FUNCS(elr_el2) |
| 359 | |
| 360 | DEFINE_SYSREG_READ_FUNC(midr_el1) |
| 361 | DEFINE_SYSREG_READ_FUNC(mpidr_el1) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 362 | |
| 363 | DEFINE_SYSREG_RW_FUNCS(hcr_el2) |
Javier Almansa Sobrino | cfd3254 | 2024-10-09 19:38:56 +0100 | [diff] [blame] | 364 | DEFINE_RENAME_SYSREG_RW_FUNCS(hcrx_el2, HCRX_EL2) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 365 | |
| 366 | DEFINE_SYSREG_RW_FUNCS(vbar_el1) |
| 367 | DEFINE_SYSREG_RW_FUNCS(vbar_el2) |
| 368 | |
| 369 | DEFINE_SYSREG_RW_FUNCS(sctlr_el1) |
| 370 | DEFINE_SYSREG_RW_FUNCS(sctlr_el2) |
Javier Almansa Sobrino | cfd3254 | 2024-10-09 19:38:56 +0100 | [diff] [blame] | 371 | DEFINE_RENAME_SYSREG_RW_FUNCS(sctlr2_el12, SCTLR2_EL12) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 372 | |
| 373 | DEFINE_SYSREG_RW_FUNCS(actlr_el1) |
| 374 | DEFINE_SYSREG_RW_FUNCS(actlr_el2) |
| 375 | |
| 376 | DEFINE_SYSREG_RW_FUNCS(esr_el1) |
| 377 | DEFINE_SYSREG_RW_FUNCS(esr_el2) |
| 378 | |
| 379 | DEFINE_SYSREG_RW_FUNCS(afsr0_el1) |
| 380 | DEFINE_SYSREG_RW_FUNCS(afsr0_el2) |
| 381 | |
| 382 | DEFINE_SYSREG_RW_FUNCS(afsr1_el1) |
| 383 | DEFINE_SYSREG_RW_FUNCS(afsr1_el2) |
| 384 | |
| 385 | DEFINE_SYSREG_RW_FUNCS(far_el1) |
| 386 | DEFINE_SYSREG_RW_FUNCS(far_el2) |
| 387 | DEFINE_SYSREG_RW_FUNCS(hpfar_el2) |
| 388 | |
| 389 | DEFINE_SYSREG_RW_FUNCS(mair_el1) |
| 390 | DEFINE_SYSREG_RW_FUNCS(mair_el2) |
| 391 | |
| 392 | DEFINE_SYSREG_RW_FUNCS(amair_el1) |
| 393 | DEFINE_SYSREG_RW_FUNCS(amair_el2) |
| 394 | |
| 395 | DEFINE_SYSREG_READ_FUNC(rvbar_el1) |
| 396 | DEFINE_SYSREG_READ_FUNC(rvbar_el2) |
| 397 | |
| 398 | DEFINE_SYSREG_RW_FUNCS(rmr_el1) |
| 399 | DEFINE_SYSREG_RW_FUNCS(rmr_el2) |
| 400 | |
| 401 | DEFINE_SYSREG_RW_FUNCS(tcr_el1) |
| 402 | DEFINE_SYSREG_RW_FUNCS(tcr_el2) |
| 403 | |
| 404 | DEFINE_SYSREG_RW_FUNCS(ttbr0_el1) |
| 405 | DEFINE_SYSREG_RW_FUNCS(ttbr0_el2) |
| 406 | DEFINE_SYSREG_RW_FUNCS(ttbr1_el2) |
| 407 | |
| 408 | DEFINE_SYSREG_RW_FUNCS(ttbr1_el1) |
| 409 | |
| 410 | DEFINE_SYSREG_RW_FUNCS(vttbr_el2) |
| 411 | |
| 412 | DEFINE_SYSREG_RW_FUNCS(cptr_el2) |
| 413 | |
| 414 | DEFINE_SYSREG_RW_FUNCS(cpacr_el1) |
| 415 | |
| 416 | DEFINE_SYSREG_RW_FUNCS(vpidr_el2) |
| 417 | DEFINE_SYSREG_RW_FUNCS(vmpidr_el2) |
| 418 | |
| 419 | DEFINE_SYSREG_READ_FUNC(isr_el1) |
| 420 | |
| 421 | DEFINE_SYSREG_RW_FUNCS(mdcr_el2) |
| 422 | DEFINE_SYSREG_RW_FUNCS(hstr_el2) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 423 | DEFINE_SYSREG_RW_FUNCS(mpam2_el2) |
| 424 | DEFINE_SYSREG_RW_FUNCS(mpamhcr_el2) |
| 425 | DEFINE_SYSREG_RW_FUNCS(pmscr_el2) |
| 426 | |
Arunachalam Ganapathy | 4f601e7 | 2023-05-22 11:49:29 +0100 | [diff] [blame] | 427 | DEFINE_RENAME_SYSREG_RW_FUNCS(fpcr, FPCR) |
| 428 | DEFINE_RENAME_SYSREG_RW_FUNCS(fpsr, FPSR) |
| 429 | |
AlexeiFedorov | 862f96c | 2024-03-01 16:26:48 +0000 | [diff] [blame] | 430 | DEFINE_SYSREG_READ_FUNC(dczid_el0) |
| 431 | |
Rustam Ismayilov | b643b75 | 2024-09-27 16:29:46 +0200 | [diff] [blame] | 432 | DEFINE_RENAME_SYSREG_RW_FUNCS(dit, DIT) |
| 433 | |
Javier Almansa Sobrino | 34005b9 | 2024-10-11 17:53:41 +0100 | [diff] [blame] | 434 | DEFINE_RENAME_SYSREG_READ_FUNC(gcscr_el12, ID_GCSCR_EL12) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 435 | /******************************************************************************* |
| 436 | * Timer register accessor prototypes |
| 437 | ******************************************************************************/ |
| 438 | DEFINE_SYSREG_RW_FUNCS(cntfrq_el0) |
| 439 | DEFINE_SYSREG_RW_FUNCS(cnthp_ctl_el2) |
| 440 | DEFINE_SYSREG_RW_FUNCS(cnthp_tval_el2) |
| 441 | DEFINE_SYSREG_RW_FUNCS(cnthp_cval_el2) |
| 442 | DEFINE_SYSREG_RW_FUNCS(cntps_ctl_el1) |
| 443 | DEFINE_SYSREG_RW_FUNCS(cntps_tval_el1) |
| 444 | DEFINE_SYSREG_RW_FUNCS(cntps_cval_el1) |
| 445 | DEFINE_SYSREG_RW_FUNCS(cntp_ctl_el0) |
| 446 | DEFINE_SYSREG_RW_FUNCS(cntp_tval_el0) |
| 447 | DEFINE_SYSREG_RW_FUNCS(cntp_cval_el0) |
| 448 | DEFINE_SYSREG_READ_FUNC(cntpct_el0) |
| 449 | DEFINE_SYSREG_RW_FUNCS(cnthctl_el2) |
| 450 | DEFINE_SYSREG_RW_FUNCS(cntp_ctl_el02) |
| 451 | DEFINE_SYSREG_RW_FUNCS(cntp_cval_el02) |
| 452 | DEFINE_SYSREG_RW_FUNCS(cntv_ctl_el02) |
| 453 | DEFINE_SYSREG_RW_FUNCS(cntv_cval_el02) |
| 454 | DEFINE_SYSREG_RW_FUNCS(cntvoff_el2) |
| 455 | DEFINE_RENAME_SYSREG_RW_FUNCS(cntpoff_el2, CNTPOFF_EL2) |
| 456 | |
| 457 | /******************************************************************************* |
| 458 | * Interrupt Controller register accessor prototypes |
| 459 | ******************************************************************************/ |
| 460 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el2, ICC_SRE_EL2) |
| 461 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_ctrl_el1, ICC_CTLR_EL1) |
AlexeiFedorov | eaec0c4 | 2023-02-01 18:13:32 +0000 | [diff] [blame] | 462 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_hppir1_el1, ICC_HPPIR1_EL1) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 463 | |
| 464 | /******************************************************************************* |
| 465 | * Virtual GIC register accessor prototypes |
| 466 | ******************************************************************************/ |
| 467 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r0_el2, ICH_AP0R0_EL2) |
| 468 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r1_el2, ICH_AP0R1_EL2) |
| 469 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r2_el2, ICH_AP0R2_EL2) |
| 470 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap0r3_el2, ICH_AP0R3_EL2) |
| 471 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r0_el2, ICH_AP1R0_EL2) |
| 472 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r1_el2, ICH_AP1R1_EL2) |
| 473 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r2_el2, ICH_AP1R2_EL2) |
| 474 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_ap1r3_el2, ICH_AP1R3_EL2) |
| 475 | |
| 476 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr0_el2, ICH_LR0_EL2) |
| 477 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr1_el2, ICH_LR1_EL2) |
| 478 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr2_el2, ICH_LR2_EL2) |
| 479 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr3_el2, ICH_LR3_EL2) |
| 480 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr4_el2, ICH_LR4_EL2) |
| 481 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr5_el2, ICH_LR5_EL2) |
| 482 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr6_el2, ICH_LR6_EL2) |
| 483 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr7_el2, ICH_LR7_EL2) |
| 484 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr8_el2, ICH_LR8_EL2) |
| 485 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr9_el2, ICH_LR9_EL2) |
| 486 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr10_el2, ICH_LR10_EL2) |
| 487 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr11_el2, ICH_LR11_EL2) |
| 488 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr12_el2, ICH_LR12_EL2) |
| 489 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr13_el2, ICH_LR13_EL2) |
| 490 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr14_el2, ICH_LR14_EL2) |
| 491 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_lr15_el2, ICH_LR15_EL2) |
| 492 | |
| 493 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_hcr_el2, ICH_HCR_EL2) |
| 494 | DEFINE_RENAME_SYSREG_RW_FUNCS(ich_vmcr_el2, ICH_VMCR_EL2) |
| 495 | DEFINE_RENAME_SYSREG_READ_FUNC(ich_vtr_el2, ICH_VTR_EL2) |
| 496 | DEFINE_RENAME_SYSREG_READ_FUNC(ich_misr_el2, ICH_MISR_EL2) |
| 497 | |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 498 | /* Armv8.3 Pointer Authentication Registers */ |
| 499 | DEFINE_RENAME_SYSREG_RW_FUNCS(apiakeyhi_el1, APIAKeyHi_EL1) |
| 500 | DEFINE_RENAME_SYSREG_RW_FUNCS(apiakeylo_el1, APIAKeyLo_EL1) |
Arvind Ram Prakash | bd36a1b | 2022-12-15 12:16:36 -0600 | [diff] [blame] | 501 | DEFINE_RENAME_SYSREG_RW_FUNCS(apibkeyhi_el1, APIBKeyHi_EL1) |
| 502 | DEFINE_RENAME_SYSREG_RW_FUNCS(apibkeylo_el1, APIBKeyLo_EL1) |
| 503 | DEFINE_RENAME_SYSREG_RW_FUNCS(apdakeyhi_el1, APDAKeyHi_EL1) |
| 504 | DEFINE_RENAME_SYSREG_RW_FUNCS(apdakeylo_el1, APDAKeyLo_EL1) |
| 505 | DEFINE_RENAME_SYSREG_RW_FUNCS(apdbkeyhi_el1, APDBKeyHi_EL1) |
| 506 | DEFINE_RENAME_SYSREG_RW_FUNCS(apdbkeylo_el1, APDBKeyLo_EL1) |
| 507 | DEFINE_RENAME_SYSREG_RW_FUNCS(apgakeyhi_el1, APGAKeyHi_EL1) |
| 508 | DEFINE_RENAME_SYSREG_RW_FUNCS(apgakeylo_el1, APGAKeyLo_EL1) |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 509 | |
| 510 | /* Armv8.5 MTE Registers */ |
| 511 | DEFINE_RENAME_SYSREG_RW_FUNCS(tfsre0_el1, TFSRE0_EL1) |
| 512 | DEFINE_RENAME_SYSREG_RW_FUNCS(tfsr_el1, TFSR_EL1) |
| 513 | DEFINE_RENAME_SYSREG_RW_FUNCS(rgsr_el1, RGSR_EL1) |
| 514 | DEFINE_RENAME_SYSREG_RW_FUNCS(gcr_el1, GCR_EL1) |
| 515 | |
Arvind Ram Prakash | bd36a1b | 2022-12-15 12:16:36 -0600 | [diff] [blame] | 516 | /* Armv8.5 Random Number Register */ |
| 517 | DEFINE_RENAME_SYSREG_READ_FUNC(rndr, RNDR) |
| 518 | |
Tushar Khandelwal | 59f673a | 2024-05-08 14:42:10 +0100 | [diff] [blame] | 519 | /* MEC Registers */ |
| 520 | DEFINE_RENAME_SYSREG_READ_FUNC(mecidr_el2, MECIDR_EL2) |
| 521 | DEFINE_RENAME_SYSREG_RW_FUNCS(mecid_p0_el2, MECID_P0_EL2) |
| 522 | DEFINE_RENAME_SYSREG_RW_FUNCS(mecid_a0_el2, MECID_A0_EL2) |
| 523 | |
| 524 | DEFINE_RENAME_SYSREG_RW_FUNCS(mecid_p1_el2, MECID_P1_EL2) |
| 525 | DEFINE_RENAME_SYSREG_RW_FUNCS(mecid_a1_el2, MECID_A1_EL2) |
| 526 | |
| 527 | DEFINE_RENAME_SYSREG_RW_FUNCS(vmecid_p_el2, VMECID_P_EL2) |
| 528 | DEFINE_RENAME_SYSREG_RW_FUNCS(vmecid_a_el2, VMECID_P_EL2) |
| 529 | |
| 530 | DEFINE_RENAME_SYSREG_RW_FUNCS(sctlr2_el2, SCTLR2_EL2) |
| 531 | |
Soby Mathew | b4c6df4 | 2022-11-09 11:13:29 +0000 | [diff] [blame] | 532 | #endif /* ARCH_HELPERS_H */ |