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AlexeiFedorov7c5001a2022-12-14 13:22:33 +00001/*
2 * SPDX-License-Identifier: BSD-3-Clause
3 * SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
4 */
5
6#include <arch_helpers.h>
AlexeiFedorovffef39a2024-10-28 16:35:21 +00007#include <arm_memory.h>
AlexeiFedorov7c5001a2022-12-14 13:22:33 +00008#include <assert.h>
AlexeiFedorov7c5001a2022-12-14 13:22:33 +00009#include <rmm_el3_ifc.h>
10
AlexeiFedorovffef39a2024-10-28 16:35:21 +000011static void arm_set_memory_layout(struct memory_info *plat_info,
12 struct arm_memory_layout *memory_ptr)
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000013{
AlexeiFedorovffef39a2024-10-28 16:35:21 +000014 struct memory_bank *bank_ptr;
15 uint64_t num_banks, num_granules = 0UL;
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000016
AlexeiFedorovffef39a2024-10-28 16:35:21 +000017 assert((plat_info != NULL) && (memory_ptr != NULL));
Soby Mathew4714e232023-10-04 07:03:08 +010018 assert(!is_mmu_enabled());
19
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000020 /* Number of banks */
AlexeiFedorovffef39a2024-10-28 16:35:21 +000021 num_banks = plat_info->num_banks;
Harry Moulton1c9c7b92024-03-07 16:33:59 +000022 assert(num_banks > 0UL);
AlexeiFedorovffef39a2024-10-28 16:35:21 +000023 assert(num_banks <= PLAT_ARM_MAX_MEM_BANKS);
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000024
AlexeiFedorovffef39a2024-10-28 16:35:21 +000025 /* Pointer to memory_bank[] array */
26 bank_ptr = plat_info->banks;
Harry Moulton1c9c7b92024-03-07 16:33:59 +000027
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000028 for (unsigned long i = 0UL; i < num_banks; i++) {
Harry Moulton1c9c7b92024-03-07 16:33:59 +000029 uint64_t base = bank_ptr->base;
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000030 uint64_t size = bank_ptr->size;
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000031
AlexeiFedorovffef39a2024-10-28 16:35:21 +000032 memory_ptr->bank[i].base = base;
33 memory_ptr->bank[i].size = size;
34 memory_ptr->bank[i].start_gran_idx = num_granules;
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000035
Harry Moulton1c9c7b92024-03-07 16:33:59 +000036 num_granules += (size >> GRANULE_SHIFT);
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000037 bank_ptr++;
38 }
39
AlexeiFedorovffef39a2024-10-28 16:35:21 +000040 memory_ptr->num_banks = num_banks;
41 memory_ptr->num_granules = num_granules;
Harry Moulton1c9c7b92024-03-07 16:33:59 +000042
AlexeiFedorovffef39a2024-10-28 16:35:21 +000043 inv_dcache_range((uintptr_t)memory_ptr,
44 sizeof(struct arm_memory_layout));
45}
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000046
AlexeiFedorovffef39a2024-10-28 16:35:21 +000047void arm_set_dram_layout(struct memory_info *plat_dram)
48{
49 assert(plat_dram != NULL);
50 arm_set_memory_layout(plat_dram, arm_get_dram_layout());
51}
52
53void arm_set_dev_layout(struct memory_info *plat_dev, enum range_type type)
54{
55 struct arm_memory_layout *memory_ptr;
56
57 assert(plat_dev != NULL);
58 assert(type < DEV_RANGE_MAX);
59
60 switch (type) {
61 case DEV_RANGE_COHERENT:
62 memory_ptr = arm_get_dev_coh_layout();
63 break;
64 default:
65 /* DEV_RANGE_NON_COHERENT */
66 memory_ptr = arm_get_dev_ncoh_layout();
67 }
68
69 arm_set_memory_layout(plat_dev, memory_ptr);
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000070}