fix(rmm): replace ARRAY_READ/WRITE macros with direct read/write
In sysregs.c 'rt' index of reads/writes from/to 'rec->regs[rt]'
is being checked for maximum possible value of 31 corresonding
to XZR and all these cases are handled safely, so there is no
need for using ARRAY_READ/WRITE macros which cause performance
deterioration.
This patch replaces usage of ARRAY_READ/WRITE macros with direct
read and writes commands and renames those macros to
SAFE_ARRAY_READ/WRITE.
The patch removes 'esr_sysreg_rt()' inline function
defined in esr.h and replaces calls to it with modified
ESR_EL2_SYSREG_ISS_RT macro.
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: Ib2d9996ef380ffb9cdcafa320ded9fa991d9a378
diff --git a/runtime/core/sysregs.c b/runtime/core/sysregs.c
index 55fac96..af263ba 100644
--- a/runtime/core/sysregs.c
+++ b/runtime/core/sysregs.c
@@ -60,6 +60,7 @@
/*
* Read Rt value from the issued instruction,
* the general-purpose register used for the transfer.
+ * Rt bits [9:5] of ISS field cannot exceed 0b11111.
*/
rt = ESR_EL2_SYSREG_ISS_RT(esr);
@@ -93,8 +94,7 @@
mask = 0UL;
}
- ARRAY_WRITE(rec->regs, rt, read_idreg(idreg) & ~mask);
-
+ rec->regs[rt] = read_idreg(idreg) & ~mask;
return true;
}
@@ -145,16 +145,15 @@
static unsigned long get_sysreg_write_value(struct rec *rec, unsigned long esr)
{
- unsigned int rt = esr_sysreg_rt(esr);
- unsigned long val;
+ /* Rt bits [9:5] of ISS field cannot exceed 0b11111 */
+ unsigned int rt = ESR_EL2_SYSREG_ISS_RT(esr);
/* Handle reads from XZR register */
if (rt == 31U) {
return 0UL;
}
- ARRAY_READ(rec->regs, rt, val);
- return val;
+ return rec->regs[rt];
}
static void emulate_sysreg_access_ns(struct rec *rec, struct rmi_rec_exit *rec_exit,
@@ -175,6 +174,7 @@
/*
* Read Rt value from the issued instruction,
* the general-purpose register used for the transfer.
+ * Rt bits [9:5] of ISS field cannot exceed 0b11111.
*/
unsigned int rt = ESR_EL2_SYSREG_ISS_RT(esr);
unsigned int i;
@@ -202,7 +202,7 @@
* Handle writes to XZR register.
*/
if (!ESR_EL2_SYSREG_IS_WRITE(esr) && (rt != 31U)) {
- ARRAY_WRITE(rec->regs, rt, 0UL);
+ rec->regs[rt] = 0UL;
}
sysreg = esr & ESR_EL2_SYSREG_MASK;