feat(s2tt): add support for FEAT_LPA2 to the s2tte library
During realm creation, RMM verifies the IPA size and start level
against LPA2 settings setup by the Host.
This patch also checks that the memory banks specified in the
Boot Manifest are within the platform address space.
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I2c42b7cb9ce40cd17a7426bafa15f0a2fbee0dac
diff --git a/lib/arch/include/arch.h b/lib/arch/include/arch.h
index 701bcd8..745bb43 100644
--- a/lib/arch/include/arch.h
+++ b/lib/arch/include/arch.h
@@ -254,6 +254,11 @@
#define TTBRx_EL2_BADDR_SHIFT 1
#define TTBRx_EL2_BADDR_WIDTH U(47)
+#define TTBRx_EL2_BADDR_MSB_LPA2_SHIFT 2
+#define TTBRx_EL2_BADDR_MSB_LPA2_WIDTH U(4)
+#define EL2_BADDR_MSB_LPA2_SHIFT 48
+#define EL2_BADDR_MSB_LPA2_WIDTH TTBRx_EL2_BADDR_MSB_LPA2_WIDTH
+
#define TTBRx_EL2_ASID_SHIFT 48
#define TTBRx_EL2_ASID_WIDTH U(16)
@@ -639,6 +644,15 @@
#define VTCR_SL0_4K_L1 INPLACE(VTCR_SL0, UL(1))
#define VTCR_SL0_4K_L0 INPLACE(VTCR_SL0, UL(2))
#define VTCR_SL0_4K_L3 INPLACE(VTCR_SL0, UL(3))
+#define VTCR_SL0_4K_LM1 VTCR_SL0_4K_L2
+
+#define VTCR_SL2_SHIFT 33
+#define VTCR_SL2_WIDTH U(1)
+#define VCTR_SL2_4K_LM1 INPLACE(VTCR_SL2, UL(1))
+
+#define VTCR_DS_SHIFT 32
+#define VTCR_DS_WIDTH U(1)
+#define VTCR_DS_52BIT INPLACE(VTCR_DS, UL(1))
#define VTCR_IRGN0_SHIFT 8
#define VTCR_IRGN0_WIDTH U(2)