refactor(lib/arch): add macro to update SIMD related trap fields
Add macro SIMD_ENABLE_CPTR_FLAGS, SIMD_DISABLE_ALL_CPTR_FLAGS to update
SIMD related fields in the value used to write CPTR_EL2 register.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: Ib820dd94cc5e294ec3a2f5c269bd473f4441903b
diff --git a/lib/arch/include/arch.h b/lib/arch/include/arch.h
index 8d0ed42..c236e15 100644
--- a/lib/arch/include/arch.h
+++ b/lib/arch/include/arch.h
@@ -780,6 +780,10 @@
#define CPTR_EL2_VHE_SMEN_TRAP_ALL_00 UL(0x0)
#define CPTR_EL2_VHE_SMEN_NO_TRAP_11 UL(0x3)
+#define CPTR_EL2_VHE_SIMD_MASK (MASK(CPTR_EL2_VHE_FPEN) | \
+ MASK(CPTR_EL2_VHE_ZEN) | \
+ MASK(CPTR_EL2_VHE_SMEN))
+
/* Trap all AMU, trace, FPU, SVE, SME accesses */
#define CPTR_EL2_VHE_INIT ((CPTR_EL2_VHE_ZEN_TRAP_ALL_00 << \
CPTR_EL2_VHE_ZEN_SHIFT) | \
diff --git a/lib/arch/include/simd.h b/lib/arch/include/simd.h
index 4b7bb41..c3c7a02 100644
--- a/lib/arch/include/simd.h
+++ b/lib/arch/include/simd.h
@@ -218,6 +218,41 @@
}
/*
+ * Enable SIMD related flags like FPEN, ZEN, SMEN in 'cptr_val' based on SIMD
+ * configuration.
+ */
+#define SIMD_ENABLE_CPTR_FLAGS(simd_cfg, cptr_val) \
+ do { \
+ (cptr_val) &= ~(CPTR_EL2_VHE_SIMD_MASK); \
+ \
+ (cptr_val) |= INPLACE(CPTR_EL2_VHE_FPEN, \
+ CPTR_EL2_VHE_FPEN_NO_TRAP_11); \
+ \
+ if ((simd_cfg)->sve_en) { \
+ (cptr_val) |= INPLACE(CPTR_EL2_VHE_ZEN, \
+ CPTR_EL2_VHE_ZEN_NO_TRAP_11); \
+ } \
+ \
+ if ((simd_cfg)->sme_en) { \
+ (cptr_val) |= INPLACE(CPTR_EL2_VHE_SMEN, \
+ CPTR_EL2_VHE_SMEN_NO_TRAP_11); \
+ } \
+ } while (false)
+
+/* Disable all SIMD related flags like FPEN, ZEN, SMEN in 'cptr_val' */
+#define SIMD_DISABLE_ALL_CPTR_FLAGS(cptr_val) \
+ do { \
+ (cptr_val) &= ~(CPTR_EL2_VHE_SIMD_MASK); \
+ \
+ (cptr_val) |= INPLACE(CPTR_EL2_VHE_FPEN, \
+ CPTR_EL2_VHE_FPEN_TRAP_ALL_00) | \
+ INPLACE(CPTR_EL2_VHE_ZEN, \
+ CPTR_EL2_VHE_ZEN_TRAP_ALL_00) | \
+ INPLACE(CPTR_EL2_VHE_SMEN, \
+ CPTR_EL2_VHE_SMEN_TRAP_ALL_00); \
+ } while (false)
+
+/*
* RMM support to use SIMD (FPU) at REL2
*/
#ifdef RMM_FPU_USE_AT_REL2
diff --git a/lib/arch/src/simd.c b/lib/arch/src/simd.c
index 624443b..9ac0db3 100644
--- a/lib/arch/src/simd.c
+++ b/lib/arch/src/simd.c
@@ -336,13 +336,9 @@
simd_ctx->sflags &= ~SIMD_SFLAG_SAVED;
}
- /*
- * Construct the cptr_el2 to be used when this context needs to be
- * saved and used by the owner.
- */
+ /* Construct the cptr_el2 for this context */
simd_ctx->cptr_el2 = CPTR_EL2_VHE_INIT;
- simd_ctx->cptr_el2 |= INPLACE(CPTR_EL2_VHE_FPEN,
- CPTR_EL2_VHE_FPEN_NO_TRAP_11);
+ SIMD_ENABLE_CPTR_FLAGS(simd_cfg, simd_ctx->cptr_el2);
/* Initialize SVE related fields and config registers */
if (simd_cfg->sve_en) {
@@ -351,18 +347,12 @@
simd_ctx->el2_regs.zcr_el2 = 0UL;
simd_ctx->el2_regs.zcr_el2 |= INPLACE(ZCR_EL2_LEN,
simd_cfg->sve_vq);
-
- simd_ctx->cptr_el2 |= INPLACE(CPTR_EL2_VHE_ZEN,
- CPTR_EL2_VHE_ZEN_NO_TRAP_11);
}
/* Initialize SME related fields */
if (simd_cfg->sme_en) {
simd_ctx->tflags |= SIMD_TFLAG_SME;
simd_ctx->svcr = 0UL;
-
- simd_ctx->cptr_el2 |= INPLACE(CPTR_EL2_VHE_SMEN,
- CPTR_EL2_VHE_SMEN_NO_TRAP_11);
}
simd_ctx->sflags |= SIMD_SFLAG_INIT_DONE;