fix(lib/arch): remove CPTR_EL2_RES1 and rename cptr_el2 fields
Remove CPTR_EL2_RES1 fields as it applies to CPTR_EL2 when HCR_EL2.E2H
is set to 0 but RMM runs with HCR_EL2.E2H=1.
Rename cptr_el2 register fields by prefixing it with CPTR_EL2_VHE to
explicitly refer to the config HCR_EL2.E2H == 1.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I26f508fd66385017d0f39d67fad2bb3519398150
diff --git a/lib/arch/include/arch.h b/lib/arch/include/arch.h
index 6146bec..ebb5112 100644
--- a/lib/arch/include/arch.h
+++ b/lib/arch/include/arch.h
@@ -725,31 +725,29 @@
#define SCTLR_EL2_RUNTIME (SCTLR_EL2_INIT | \
SCTLR_ELx_M_BIT /* MMU enabled */)
-/* CPTR_EL2 definitions */
-#define CPTR_EL2_RES1 ((UL(1) << 13) | (UL(1) << 12) | (UL(1) << 9) | 0xff)
-#define CPTR_EL2_TTA (UL(1) << 28)
-#define CPTR_EL2_TAM (UL(1) << 30)
+/* RMM sets HCR_EL2.E2H to 1. CPTR_EL2 definitions when HCR_EL2.E2H == 1 */
+#define CPTR_EL2_VHE_TTA (UL(1) << 28)
+#define CPTR_EL2_VHE_TAM (UL(1) << 30)
-#define CPTR_EL2_FPEN_SHIFT UL(20)
-#define CPTR_EL2_FPEN_WIDTH UL(2)
-#define CPTR_EL2_FPEN_TRAP_ALL_00 UL(0)
-#define CPTR_EL2_FPEN_TRAP_TGE_01 UL(1)
-#define CPTR_EL2_FPEN_TRAP_ALL_10 UL(2)
-#define CPTR_EL2_FPEN_NO_TRAP_11 UL(3)
+#define CPTR_EL2_VHE_FPEN_SHIFT UL(20)
+#define CPTR_EL2_VHE_FPEN_WIDTH UL(2)
+#define CPTR_EL2_VHE_FPEN_TRAP_ALL_00 UL(0)
+#define CPTR_EL2_VHE_FPEN_TRAP_TGE_01 UL(1)
+#define CPTR_EL2_VHE_FPEN_TRAP_ALL_10 UL(2)
+#define CPTR_EL2_VHE_FPEN_NO_TRAP_11 UL(3)
-#define CPTR_EL2_ZEN_SHIFT UL(16)
-#define CPTR_EL2_ZEN_WIDTH UL(2)
-#define CPTR_EL2_ZEN_TRAP_ALL_00 UL(0)
-#define CPTR_EL2_ZEN_NO_TRAP_11 UL(3)
+#define CPTR_EL2_VHE_ZEN_SHIFT UL(16)
+#define CPTR_EL2_VHE_ZEN_WIDTH UL(2)
+#define CPTR_EL2_VHE_ZEN_TRAP_ALL_00 UL(0x0)
+#define CPTR_EL2_VHE_ZEN_NO_TRAP_11 UL(0x3)
- /* Trap all FPU/SVE accesses */
-#define CPTR_EL2_INIT ((CPTR_EL2_ZEN_TRAP_ALL_00 << \
- CPTR_EL2_ZEN_SHIFT) | \
- (CPTR_EL2_FPEN_TRAP_ALL_00 << \
- CPTR_EL2_FPEN_SHIFT) | \
- CPTR_EL2_TTA /* trap trace access */ | \
- CPTR_EL2_TAM /* trap AMU access */ | \
- CPTR_EL2_RES1)
+/* Trap all AMU, trace, FPU, SVE accesses */
+#define CPTR_EL2_VHE_INIT ((CPTR_EL2_VHE_ZEN_TRAP_ALL_00 << \
+ CPTR_EL2_VHE_ZEN_SHIFT) | \
+ (CPTR_EL2_VHE_FPEN_TRAP_ALL_00 << \
+ CPTR_EL2_VHE_FPEN_SHIFT) | \
+ CPTR_EL2_VHE_TTA | \
+ CPTR_EL2_VHE_TAM)
/* MDCR_EL2 definitions */
#define MDCR_EL2_HPMFZS (UL(1) << 36)
diff --git a/lib/arch/include/arch_helpers.h b/lib/arch/include/arch_helpers.h
index 3fbf66d..d072cd7 100644
--- a/lib/arch/include/arch_helpers.h
+++ b/lib/arch/include/arch_helpers.h
@@ -96,14 +96,14 @@
/*******************************************************************************
* FPU management
******************************************************************************/
-#define is_fpen_enabled() (EXTRACT(CPTR_EL2_FPEN, read_cptr_el2()) == \
- CPTR_EL2_FPEN_NO_TRAP_11)
+#define is_fpen_enabled() (EXTRACT(CPTR_EL2_VHE_FPEN, read_cptr_el2()) == \
+ CPTR_EL2_VHE_FPEN_NO_TRAP_11)
/*******************************************************************************
* SVE management
******************************************************************************/
-#define is_zen_enabled() (EXTRACT(CPTR_EL2_ZEN, read_cptr_el2()) == \
- CPTR_EL2_ZEN_NO_TRAP_11)
+#define is_zen_enabled() (EXTRACT(CPTR_EL2_VHE_ZEN, read_cptr_el2()) == \
+ CPTR_EL2_VHE_ZEN_NO_TRAP_11)
/*******************************************************************************
* Misc. accessor prototypes
diff --git a/lib/arch/include/simd.h b/lib/arch/include/simd.h
index 4ee631b..d2c3da1 100644
--- a/lib/arch/include/simd.h
+++ b/lib/arch/include/simd.h
@@ -158,18 +158,18 @@
unsigned long cptr;
cptr = read_cptr_el2();
- cptr &= ~(MASK(CPTR_EL2_FPEN) | MASK(CPTR_EL2_ZEN));
+ cptr &= ~(MASK(CPTR_EL2_VHE_FPEN) | MASK(CPTR_EL2_VHE_ZEN));
switch (type) {
case SIMD_SVE:
assert(is_feat_sve_present());
- cptr |= INPLACE(CPTR_EL2_ZEN, CPTR_EL2_ZEN_NO_TRAP_11);
- cptr |= INPLACE(CPTR_EL2_FPEN, CPTR_EL2_FPEN_NO_TRAP_11);
+ cptr |= INPLACE(CPTR_EL2_VHE_ZEN, CPTR_EL2_VHE_ZEN_NO_TRAP_11);
+ cptr |= INPLACE(CPTR_EL2_VHE_FPEN, CPTR_EL2_VHE_FPEN_NO_TRAP_11);
break;
case SIMD_FPU:
- cptr |= INPLACE(CPTR_EL2_ZEN, CPTR_EL2_ZEN_TRAP_ALL_00);
- cptr |= INPLACE(CPTR_EL2_FPEN, CPTR_EL2_FPEN_NO_TRAP_11);
+ cptr |= INPLACE(CPTR_EL2_VHE_ZEN, CPTR_EL2_VHE_ZEN_TRAP_ALL_00);
+ cptr |= INPLACE(CPTR_EL2_VHE_FPEN, CPTR_EL2_VHE_FPEN_NO_TRAP_11);
break;
default:
assert(false);
@@ -185,10 +185,10 @@
unsigned long cptr;
cptr = read_cptr_el2();
- cptr &= ~(MASK(CPTR_EL2_FPEN) | MASK(CPTR_EL2_ZEN));
+ cptr &= ~(MASK(CPTR_EL2_VHE_FPEN) | MASK(CPTR_EL2_VHE_ZEN));
- cptr |= INPLACE(CPTR_EL2_ZEN, CPTR_EL2_ZEN_TRAP_ALL_00);
- cptr |= INPLACE(CPTR_EL2_FPEN, CPTR_EL2_FPEN_TRAP_ALL_00);
+ cptr |= INPLACE(CPTR_EL2_VHE_ZEN, CPTR_EL2_VHE_ZEN_TRAP_ALL_00);
+ cptr |= INPLACE(CPTR_EL2_VHE_FPEN, CPTR_EL2_VHE_FPEN_TRAP_ALL_00);
write_cptr_el2(cptr);
isb();