feat(xlat): add support for FEAT_LPA2 to the stage 1 xlat library
The xlat library is able to work with and without FEAT_LPA2 supported
by the architecture.
This patch also hardcodes the shareability attribute for all
memory as ISH.
In order to maintain simplicity and make the review process
easier, this patch does not update the unittests nor any of the
host variants, hence they will not work on the current patch.
Unittests as well as the host variants will be fixed on a separate
patch.
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I5501371c602f358a650b005eda2c2f9d076a4b33
diff --git a/lib/arch/include/arch.h b/lib/arch/include/arch.h
index 4d41aac..64752d1 100644
--- a/lib/arch/include/arch.h
+++ b/lib/arch/include/arch.h
@@ -126,13 +126,11 @@
#define TCR_PS_BITS_4TB INPLACE(TCR_EL2_IPS, UL(3))
#define TCR_PS_BITS_16TB INPLACE(TCR_EL2_IPS, UL(4))
#define TCR_PS_BITS_256TB INPLACE(TCR_EL2_IPS, UL(5))
+#define TCR_PS_BITS_4PB INPLACE(TCR_EL2_IPS, UL(6))
-#define ADDR_MASK_48_TO_63 ULL(0xFFFF000000000000)
-#define ADDR_MASK_44_TO_47 ULL(0x0000F00000000000)
-#define ADDR_MASK_42_TO_43 ULL(0x00000C0000000000)
-#define ADDR_MASK_40_TO_41 ULL(0x0000030000000000)
-#define ADDR_MASK_36_TO_39 ULL(0x000000F000000000)
-#define ADDR_MASK_32_TO_35 ULL(0x0000000F00000000)
+#define TCR_EL2_DS_SHIFT UL(59)
+#define TCR_EL2_DS_WIDTH UL(1)
+#define TCR_EL2_DS_LPA2_EN INPLACE(TCR_EL2_DS, UL(1))
#define TCR_EL2_AS (UL(1) << 36)
#define TCR_EL2_HPD0 (UL(1) << 41)
@@ -140,6 +138,7 @@
#define TCR_EL2_E0PD1 (UL(1) << 56) /* TODO: ARMv8.5-E0PD, otherwise RES0 */
#define TCR_TxSZ_MIN UL(16)
+#define TCR_TxSZ_MIN_LPA2 UL(12)
#define TCR_TxSZ_MAX UL(48)
/* HCR definitions */