fix(mask): remove system registers XXX_MASK definitions
This patch removes XXX_MASK definitions for system registers
bit fields which are replaced by MASK(XXX) macro used directly.
Masking and shifting operations are replaced with
INPLACE() and EXTRACT() macros.
XXX_BIT macros which were defined via INPLACE(XX, 1) are
replaced with (UL(1) << N) definitions, and their XXX_SHIFT
and XXX_WIDTH macros are removed to improve readability
and reduce code size.
This patch also fixes bug in duplicated declaration for
read_ID_AA64MMFR2_EL1() function in arch_helpers.c.
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: Ife64413c45711ba39b043cdc3510cf90fca0cfb6
diff --git a/runtime/core/exit.c b/runtime/core/exit.c
index e0324d7..4012f6b 100644
--- a/runtime/core/exit.c
+++ b/runtime/core/exit.c
@@ -147,8 +147,8 @@
struct rmi_rec_exit *rec_exit,
unsigned long esr)
{
- unsigned long fsc = esr & ESR_EL2_ABORT_FSC_MASK;
- unsigned long set = esr & ESR_EL2_ABORT_SET_MASK;
+ unsigned long fsc = esr & MASK(ESR_EL2_ABORT_FSC);
+ unsigned long set = esr & MASK(ESR_EL2_ABORT_SET);
if (!fsc_is_external_abort(fsc)) {
return false;
@@ -223,7 +223,7 @@
{
unsigned long far = 0UL;
unsigned long hpfar = read_hpfar_el2();
- unsigned long fipa = (hpfar & HPFAR_EL2_FIPA_MASK) << HPFAR_EL2_FIPA_OFFSET;
+ unsigned long fipa = (hpfar & MASK(HPFAR_EL2_FIPA)) << HPFAR_EL2_FIPA_OFFSET;
unsigned long write_val = 0UL;
if (handle_sync_external_abort(rec, rec_exit, esr)) {
@@ -273,10 +273,10 @@
static bool handle_instruction_abort(struct rec *rec, struct rmi_rec_exit *rec_exit,
unsigned long esr)
{
- unsigned long fsc = esr & ESR_EL2_ABORT_FSC_MASK;
- unsigned long fsc_type = fsc & ~ESR_EL2_ABORT_FSC_LEVEL_MASK;
+ unsigned long fsc = esr & MASK(ESR_EL2_ABORT_FSC);
+ unsigned long fsc_type = fsc & ~MASK(ESR_EL2_ABORT_FSC_LEVEL);
unsigned long hpfar = read_hpfar_el2();
- unsigned long fipa = (hpfar & HPFAR_EL2_FIPA_MASK) << HPFAR_EL2_FIPA_OFFSET;
+ unsigned long fipa = (hpfar & MASK(HPFAR_EL2_FIPA)) << HPFAR_EL2_FIPA_OFFSET;
if (handle_sync_external_abort(rec, rec_exit, esr)) {
/*
@@ -544,9 +544,9 @@
{
const unsigned long esr = read_esr_el2();
- switch (esr & ESR_EL2_EC_MASK) {
+ switch (esr & MASK(ESR_EL2_EC)) {
case ESR_EL2_EC_WFX:
- rec_exit->esr = esr & (ESR_EL2_EC_MASK | ESR_EL2_WFx_TI_BIT);
+ rec_exit->esr = esr & (MASK(ESR_EL2_EC) | ESR_EL2_WFx_TI_BIT);
advance_pc();
return false;
case ESR_EL2_EC_HVC:
@@ -584,10 +584,9 @@
* the NS state and load the realm state.
*/
cptr = read_cptr_el2();
- cptr &= ~(CPTR_EL2_FPEN_MASK << CPTR_EL2_FPEN_SHIFT);
- cptr |= (CPTR_EL2_FPEN_NO_TRAP_11 << CPTR_EL2_FPEN_SHIFT);
- cptr &= ~(CPTR_EL2_ZEN_MASK << CPTR_EL2_ZEN_SHIFT);
- cptr |= (CPTR_EL2_ZEN_NO_TRAP_11 << CPTR_EL2_ZEN_SHIFT);
+ cptr &= ~(MASK(CPTR_EL2_FPEN) | MASK(CPTR_EL2_ZEN));
+ cptr |= INPLACE(CPTR_EL2_FPEN, CPTR_EL2_FPEN_NO_TRAP_11) |
+ INPLACE(CPTR_EL2_ZEN, CPTR_EL2_ZEN_NO_TRAP_11);
write_cptr_el2(cptr);
/*
@@ -609,8 +608,8 @@
* implemented
*/
cptr = read_cptr_el2();
- cptr &= ~(CPTR_EL2_ZEN_MASK << CPTR_EL2_ZEN_SHIFT);
- cptr |= (CPTR_EL2_ZEN_TRAP_ALL_00 << CPTR_EL2_ZEN_SHIFT);
+ cptr &= ~MASK(CPTR_EL2_ZEN);
+ cptr |= INPLACE(CPTR_EL2_ZEN, CPTR_EL2_ZEN_TRAP_ALL_00);
write_cptr_el2(cptr);
/*
@@ -628,9 +627,7 @@
}
VERBOSE("Unhandled sync exit ESR: %08lx (EC: %lx ISS: %lx)\n",
- esr,
- (esr & ESR_EL2_EC_MASK) >> ESR_EL2_EC_SHIFT,
- (esr & ESR_EL2_ISS_MASK) >> ESR_EL2_ISS_SHIFT);
+ esr, EXTRACT(ESR_EL2_EC, esr), EXTRACT(ESR_EL2_ISS, esr));
/*
* Zero values in esr, far & hpfar of 'rec_exit' structure
@@ -656,14 +653,14 @@
system_abort();
}
- if ((esr & ESR_EL2_SERROR_DFSC_MASK) != ESR_EL2_SERROR_DFSC_ASYNC) {
+ if ((esr & MASK(ESR_EL2_SERROR_DFSC)) != ESR_EL2_SERROR_DFSC_ASYNC) {
/*
* Either Uncategorized or Reserved fault status code.
*/
system_abort();
}
- switch (esr & ESR_EL2_SERROR_AET_MASK) {
+ switch (esr & MASK(ESR_EL2_SERROR_AET)) {
case ESR_EL2_SERROR_AET_UEU: /* Unrecoverable RAS Error */
case ESR_EL2_SERROR_AET_UER: /* Recoverable RAS Error */
/*