blob: ac7ccf706196c6ad049ecdb2881dc1f0f4c86473 [file] [log] [blame]
Edison Ai5bf0bfc2019-06-10 13:42:43 +08001/*
2 * Copyright (c) 2019, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8/*********** WARNING: This is an auto-generated file. Do not edit! ***********/
9
10#ifndef __PSA_MANIFEST_SID_H__
11#define __PSA_MANIFEST_SID_H__
12
13#ifdef __cplusplus
14extern "C" {
15#endif
16
17/******** TFM_SP_STORAGE ********/
18#define TFM_SST_SET_SID (0x00000060U)
19#define TFM_SST_SET_VERSION (1U)
20#define TFM_SST_GET_SID (0x00000061U)
21#define TFM_SST_GET_VERSION (1U)
22#define TFM_SST_GET_INFO_SID (0x00000062U)
23#define TFM_SST_GET_INFO_VERSION (1U)
24#define TFM_SST_REMOVE_SID (0x00000063U)
25#define TFM_SST_REMOVE_VERSION (1U)
26#define TFM_SST_GET_SUPPORT_SID (0x00000064U)
27#define TFM_SST_GET_SUPPORT_VERSION (1U)
28
TudorCretufb182bc2019-07-05 17:34:12 +010029/******** TFM_SP_ITS ********/
30#define TFM_ITS_SET_SID (0x00000070U)
31#define TFM_ITS_SET_VERSION (1U)
32#define TFM_ITS_GET_SID (0x00000071U)
33#define TFM_ITS_GET_VERSION (1U)
34#define TFM_ITS_GET_INFO_SID (0x00000072U)
35#define TFM_ITS_GET_INFO_VERSION (1U)
36#define TFM_ITS_REMOVE_SID (0x00000073U)
37#define TFM_ITS_REMOVE_VERSION (1U)
38
Edison Ai5bf0bfc2019-06-10 13:42:43 +080039/******** TFM_SP_CRYPTO ********/
40#define TFM_CRYPTO_SID (0x00000080U)
41#define TFM_CRYPTO_VERSION (1U)
42
43/******** TFM_SP_INITIAL_ATTESTATION ********/
44#define TFM_ATTEST_GET_TOKEN_SID (0x00000020U)
45#define TFM_ATTEST_GET_TOKEN_VERSION (1U)
46#define TFM_ATTEST_GET_TOKEN_SIZE_SID (0x00000021U)
47#define TFM_ATTEST_GET_TOKEN_SIZE_VERSION (1U)
48
49#ifdef TFM_PARTITION_TEST_CORE
50/******** TFM_SP_CORE_TEST ********/
51#define SPM_CORE_TEST_INIT_SUCCESS_SID (0x0000F020U)
52#define SPM_CORE_TEST_INIT_SUCCESS_VERSION (1U)
53#define SPM_CORE_TEST_DIRECT_RECURSION_SID (0x0000F021U)
54#define SPM_CORE_TEST_DIRECT_RECURSION_VERSION (1U)
55#define SPM_CORE_TEST_MPU_ACCESS_SID (0x0000F022U)
56#define SPM_CORE_TEST_MPU_ACCESS_VERSION (1U)
57#define SPM_CORE_TEST_MEMORY_PERMISSIONS_SID (0x0000F023U)
58#define SPM_CORE_TEST_MEMORY_PERMISSIONS_VERSION (1U)
Shawn Shancfd7c1c2019-09-02 17:50:52 +080059#define SPM_CORE_TEST_SS_TO_SS_SID (0x0000F024U)
Edison Ai5bf0bfc2019-06-10 13:42:43 +080060#define SPM_CORE_TEST_SS_TO_SS_VERSION (1U)
Shawn Shancfd7c1c2019-09-02 17:50:52 +080061#define SPM_CORE_TEST_SS_TO_SS_BUFFER_SID (0x0000F025U)
Edison Ai5bf0bfc2019-06-10 13:42:43 +080062#define SPM_CORE_TEST_SS_TO_SS_BUFFER_VERSION (1U)
Shawn Shancfd7c1c2019-09-02 17:50:52 +080063#define SPM_CORE_TEST_OUTVEC_WRITE_SID (0x0000F026U)
Edison Ai5bf0bfc2019-06-10 13:42:43 +080064#define SPM_CORE_TEST_OUTVEC_WRITE_VERSION (1U)
Shawn Shancfd7c1c2019-09-02 17:50:52 +080065#define SPM_CORE_TEST_PERIPHERAL_ACCESS_SID (0x0000F027U)
Edison Ai5bf0bfc2019-06-10 13:42:43 +080066#define SPM_CORE_TEST_PERIPHERAL_ACCESS_VERSION (1U)
Shawn Shancfd7c1c2019-09-02 17:50:52 +080067#define SPM_CORE_TEST_GET_CALLER_CLIENT_ID_SID (0x0000F028U)
Edison Ai5bf0bfc2019-06-10 13:42:43 +080068#define SPM_CORE_TEST_GET_CALLER_CLIENT_ID_VERSION (1U)
Shawn Shancfd7c1c2019-09-02 17:50:52 +080069#define SPM_CORE_TEST_SPM_REQUEST_SID (0x0000F029U)
Edison Ai5bf0bfc2019-06-10 13:42:43 +080070#define SPM_CORE_TEST_SPM_REQUEST_VERSION (1U)
Shawn Shancfd7c1c2019-09-02 17:50:52 +080071#define SPM_CORE_TEST_BLOCK_SID (0x0000F02AU)
Edison Ai5bf0bfc2019-06-10 13:42:43 +080072#define SPM_CORE_TEST_BLOCK_VERSION (1U)
Shawn Shancfd7c1c2019-09-02 17:50:52 +080073#define SPM_CORE_TEST_NS_THREAD_SID (0x0000F02BU)
Edison Ai5bf0bfc2019-06-10 13:42:43 +080074#define SPM_CORE_TEST_NS_THREAD_VERSION (1U)
75#endif /* TFM_PARTITION_TEST_CORE */
76
77#ifdef TFM_PARTITION_TEST_CORE
78/******** TFM_SP_CORE_TEST_2 ********/
79#define SPM_CORE_TEST_2_SLAVE_SERVICE_SID (0x0000F040U)
80#define SPM_CORE_TEST_2_SLAVE_SERVICE_VERSION (1U)
81#define SPM_CORE_TEST_2_CHECK_CALLER_CLIENT_ID_SID (0x0000F041U)
82#define SPM_CORE_TEST_2_CHECK_CALLER_CLIENT_ID_VERSION (1U)
83#define SPM_CORE_TEST_2_GET_EVERY_SECOND_BYTE_SID (0x0000F042U)
84#define SPM_CORE_TEST_2_GET_EVERY_SECOND_BYTE_VERSION (1U)
85#define SPM_CORE_TEST_2_INVERT_SID (0x0000F043U)
86#define SPM_CORE_TEST_2_INVERT_VERSION (1U)
87#define SPM_CORE_TEST_2_PREPARE_TEST_SCENARIO_SID (0x0000F044U)
88#define SPM_CORE_TEST_2_PREPARE_TEST_SCENARIO_VERSION (1U)
89#define SPM_CORE_TEST_2_EXECUTE_TEST_SCENARIO_SID (0x0000F045U)
90#define SPM_CORE_TEST_2_EXECUTE_TEST_SCENARIO_VERSION (1U)
91#endif /* TFM_PARTITION_TEST_CORE */
92
93#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
94/******** TFM_SP_SECURE_TEST_PARTITION ********/
95#define TFM_SECURE_CLIENT_SFN_RUN_TESTS_SID (0x0000F000U)
96#define TFM_SECURE_CLIENT_SFN_RUN_TESTS_VERSION (1U)
97#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
98
99#ifdef TFM_PARTITION_TEST_CORE_IPC
100/******** TFM_SP_IPC_SERVICE_TEST ********/
101#define IPC_SERVICE_TEST_BASIC_SID (0x0000F080U)
102#define IPC_SERVICE_TEST_BASIC_VERSION (1U)
103#define IPC_SERVICE_TEST_PSA_ACCESS_APP_MEM_SID (0x0000F081U)
104#define IPC_SERVICE_TEST_PSA_ACCESS_APP_MEM_VERSION (1U)
105#define IPC_SERVICE_TEST_PSA_ACCESS_APP_READ_ONLY_MEM_SID (0x0000F082U)
106#define IPC_SERVICE_TEST_PSA_ACCESS_APP_READ_ONLY_MEM_VERSION (1U)
107#define IPC_SERVICE_TEST_APP_ACCESS_PSA_MEM_SID (0x0000F083U)
108#define IPC_SERVICE_TEST_APP_ACCESS_PSA_MEM_VERSION (1U)
109#endif /* TFM_PARTITION_TEST_CORE_IPC */
110
111#ifdef TFM_PARTITION_TEST_CORE_IPC
112/******** TFM_SP_IPC_CLIENT_TEST ********/
113#define IPC_CLIENT_TEST_BASIC_SID (0x0000F060U)
114#define IPC_CLIENT_TEST_BASIC_VERSION (1U)
115#define IPC_CLIENT_TEST_PSA_ACCESS_APP_MEM_SID (0x0000F061U)
116#define IPC_CLIENT_TEST_PSA_ACCESS_APP_MEM_VERSION (1U)
117#define IPC_CLIENT_TEST_PSA_ACCESS_APP_READ_ONLY_MEM_SID (0x0000F062U)
118#define IPC_CLIENT_TEST_PSA_ACCESS_APP_READ_ONLY_MEM_VERSION (1U)
119#define IPC_CLIENT_TEST_APP_ACCESS_PSA_MEM_SID (0x0000F063U)
120#define IPC_CLIENT_TEST_APP_ACCESS_PSA_MEM_VERSION (1U)
121#define IPC_CLIENT_TEST_MEM_CHECK_SID (0x0000F064U)
122#define IPC_CLIENT_TEST_MEM_CHECK_VERSION (1U)
123#endif /* TFM_PARTITION_TEST_CORE_IPC */
124
David Hu33f2fd22019-08-16 15:32:39 +0800125#ifdef TFM_ENABLE_IRQ_TEST
Edison Ai5bf0bfc2019-06-10 13:42:43 +0800126/******** TFM_IRQ_TEST_1 ********/
127#define SPM_CORE_IRQ_TEST_1_PREPARE_TEST_SCENARIO_SID (0x0000F0A0U)
128#define SPM_CORE_IRQ_TEST_1_PREPARE_TEST_SCENARIO_VERSION (1U)
129#define SPM_CORE_IRQ_TEST_1_EXECUTE_TEST_SCENARIO_SID (0x0000F0A1U)
130#define SPM_CORE_IRQ_TEST_1_EXECUTE_TEST_SCENARIO_VERSION (1U)
David Hu33f2fd22019-08-16 15:32:39 +0800131#endif /* TFM_ENABLE_IRQ_TEST */
Edison Ai5bf0bfc2019-06-10 13:42:43 +0800132
133#ifdef __cplusplus
134}
135#endif
136
137#endif /* __PSA_MANIFEST_SID_H__ */