Mate Toth-Pal | 4341de0 | 2018-10-02 12:55:47 +0200 | [diff] [blame] | 1 | ################### |
| 2 | Secure IRQ handling |
| 3 | ################### |
| 4 | |
| 5 | The Armv8-M Architecture makes it possible to configure interrupts to target |
| 6 | secure state. |
| 7 | |
| 8 | TF-M makes it possible for secure partitions to get notified of secure |
| 9 | interrupts. |
| 10 | |
| 11 | By default TF-M sets up interrupts to target NS state. To configure an interrupt |
| 12 | to target secure state and assign a handler to it, the manifest of the partition |
| 13 | must be edited. |
| 14 | |
| 15 | See the following example: |
| 16 | |
| 17 | |
| 18 | .. code-block:: yaml |
| 19 | |
| 20 | { |
| 21 | "name": "...", |
| 22 | "type": "...", |
| 23 | "priority": "...", |
| 24 | |
| 25 | ... |
| 26 | |
| 27 | "irqs": [ |
| 28 | { |
Jaykumar Pitambarbhai Patel | b3799e1 | 2019-10-08 17:23:12 +0530 | [diff] [blame] | 29 | "source": "5", |
Mate Toth-Pal | 4341de0 | 2018-10-02 12:55:47 +0200 | [diff] [blame] | 30 | "signal": "DUAL_TIMER" |
| 31 | }, |
| 32 | { |
Jaykumar Pitambarbhai Patel | b3799e1 | 2019-10-08 17:23:12 +0530 | [diff] [blame] | 33 | "source": "TFM_IRQ_LINE_TIMER_1", |
Mate Toth-Pal | 4341de0 | 2018-10-02 12:55:47 +0200 | [diff] [blame] | 34 | "signal": "TIMER_1" |
| 35 | "tfm_irq_priority": 64, |
| 36 | } |
| 37 | ], |
| 38 | |
| 39 | ... |
| 40 | |
| 41 | } |
| 42 | |
| 43 | To set up a handler in a partition, the ``irqs`` node must be added. A single |
| 44 | secure partition can have handlers registered for multiple IRQs, in this case |
| 45 | the list ``irqs`` has multiple elements in it. |
| 46 | |
| 47 | An IRQ handler is defined by the following nodes: |
| 48 | |
Jaykumar Pitambarbhai Patel | b3799e1 | 2019-10-08 17:23:12 +0530 | [diff] [blame] | 49 | - ``source``: The IRQ number or the name IRQ line. With the name of the IRQ |
| 50 | line, there must be defined a macro in ``tfm_peripherals_def.h`` which is |
| 51 | substituted to the IRQ line num. |
Mate Toth-Pal | 4341de0 | 2018-10-02 12:55:47 +0200 | [diff] [blame] | 52 | - ``signal`` The name of the signal for this IRQ |
| 53 | - ``tfm_irq_priority``: The priority of the IRQ. This number must be in the |
| 54 | range [0-255] inclusive. Please note that some of the less significant bits of |
| 55 | this value might be dropped based on the number of priority bits implemented |
| 56 | in the platform. |
| 57 | |
| 58 | .. important:: |
| 59 | |
| 60 | The name of the privileged interrupt handler is derived from the node |
| 61 | specifying the IRQ line number. |
| 62 | |
Jaykumar Pitambarbhai Patel | b3799e1 | 2019-10-08 17:23:12 +0530 | [diff] [blame] | 63 | - In case ``source`` is IRQ number, the name of the handler becomes |
| 64 | ``void irq_<number>_Handler(void)``. |
| 65 | - In case ``source`` is defined IRQ macro, the name of the handler becomes |
| 66 | ``void <macro>_Handler(void)``. |
Mate Toth-Pal | 4341de0 | 2018-10-02 12:55:47 +0200 | [diff] [blame] | 67 | |
| 68 | This is important, because the derived name have to be present in the vector |
| 69 | table as the handler of the IRQ. |
| 70 | |
| 71 | .. Note:: |
| 72 | |
Jaykumar Pitambarbhai Patel | b3799e1 | 2019-10-08 17:23:12 +0530 | [diff] [blame] | 73 | ``signal`` and ``source`` are mandatory. |
Mate Toth-Pal | 4341de0 | 2018-10-02 12:55:47 +0200 | [diff] [blame] | 74 | |
| 75 | ``tfm_irq_priority`` is optional. If ``tfm_irq_priority`` is not set for an |
| 76 | IRQ, the default is value is ``TFM_DEFAULT_SECURE_IRQ_PRIOTITY``. |
| 77 | |
| 78 | If an IRQ handler is registered, TF-M will: |
| 79 | |
Jaykumar Pitambarbhai Patel | b3799e1 | 2019-10-08 17:23:12 +0530 | [diff] [blame] | 80 | - Set the IRQ with number or macro to target secure state |
| 81 | - Set the priority of IRQ with number or macro to ``tfm_irq_priority`` or to |
| 82 | the default. |
Mate Toth-Pal | 4341de0 | 2018-10-02 12:55:47 +0200 | [diff] [blame] | 83 | |
| 84 | TF-M configures the interrupt lines to be disabled by default. Interrupts for a |
| 85 | service can be enabled by the secure service by calling |
| 86 | ``void tfm_enable_irq(psa_signal_t irq_signal)``. The function can be called in |
| 87 | the service init function. |
| 88 | |
| 89 | ************* |
| 90 | Library model |
| 91 | ************* |
| 92 | |
| 93 | In Library model a function with the name derived from the value of the |
Jaykumar Pitambarbhai Patel | b3799e1 | 2019-10-08 17:23:12 +0530 | [diff] [blame] | 94 | ``source`` property is generated. This function will be put in the vector table |
| 95 | by the linker (as the handlers in the startup assembly are defined as weak |
| 96 | symbols). The code generated for this function will forward the call to the |
| 97 | function with the name of the value of the ``signal`` property post-fixed with |
| 98 | ``_isr``. |
Mate Toth-Pal | 4341de0 | 2018-10-02 12:55:47 +0200 | [diff] [blame] | 99 | |
| 100 | .. hint:: |
| 101 | |
| 102 | for a signal ``"signal": "DUAL_TIMER"`` the name of the handler function is |
| 103 | ``DUAL_TIMER_isr`` |
| 104 | |
| 105 | The signature of the IRQ handler in the partition must be the following: |
| 106 | |
| 107 | .. code-block:: c |
| 108 | |
| 109 | void partition_irq_handler(void); |
| 110 | |
| 111 | The detailed description on how secure interrupt handling works in the Library |
| 112 | model see |
| 113 | `Secure Partition Interrupt Handling design document <https://developer.trustedfirmware.org/w/tf_m/design/secure_partition_interrupt_handling/>`_. |
| 114 | |
| 115 | ********* |
| 116 | IPC model |
| 117 | ********* |
| 118 | |
| 119 | The detailed description on how secure interrupt handling works in the IPC |
| 120 | model, see the |
| 121 | `PSA Firmware Framework and RoT Services specification <https://pages.arm.com/psa-resources-ff.html>`_. |
| 122 | |
| 123 | ###################### |
| 124 | Implementation details |
| 125 | ###################### |
| 126 | |
| 127 | ************* |
| 128 | Library model |
| 129 | ************* |
| 130 | |
| 131 | As a result of the function call like behaviour of secure services in library |
| 132 | model, some information that is critical for the SPM to keep track of partition |
| 133 | states, is stored on the stack of the active partitions. When an interrupt |
| 134 | happens, and a handler partition is set to running state, it has access to its |
| 135 | whole stack, and could corrupt the data stacked by the SPM. To prevent this, a |
| 136 | separate Context stack is introduced for each secure partition, that is used by |
| 137 | the SPM to save this information before starting to execute secure partition |
| 138 | code. |
| 139 | |
| 140 | A stack frame to this context stack is pushed when the execution in the |
| 141 | partition is interrupted, and when a handler in the partition interrupts another |
| 142 | service. So the maximal stack usage can happen in the following situation: |
| 143 | |
| 144 | Consider secure partition 'A'. 'A' is running, and then it is interrupted by |
| 145 | an other partition. Then the lowest priority interrupt of 'A' is triggered. |
| 146 | Then before the handler returns, the partition is interrupted by another |
| 147 | partition's handler. Then before the running handler returns, the second |
| 148 | lowest interrupt of 'A' is triggered. This can go until the highest priority |
| 149 | interrupt of 'A' is triggered, and then this last handler is interrupted. At |
| 150 | this point the context stack looks like this: |
| 151 | |
| 152 | .. code-block:: |
| 153 | |
| 154 | +------------+ |
| 155 | | [intr_ctx] | |
| 156 | | [hndl_ctx] | |
| 157 | | . | |
| 158 | | . | |
| 159 | | . | |
| 160 | | [intr_ctx] | |
| 161 | | [hndl_ctx] | |
| 162 | | [intr_ctx] | |
| 163 | +------------+ |
| 164 | |
| 165 | Legend: |
| 166 | [intr_ctx]: Frame pushed when the partition is interrupted |
| 167 | [hndl_ctx]: Frame pushed when the partition is handling an interrupt |
| 168 | |
| 169 | So the max stack size can be calculated as a function of the IRQ count of 'A': |
| 170 | |
| 171 | .. code-block:: |
| 172 | |
| 173 | |
| 174 | max_stack_size = intr_ctx_size + (IRQ_CNT * (intr_ctx_size + hndl_ctx_size)) |
| 175 | |
| 176 | -------------- |
| 177 | |
| 178 | *Copyright (c) 2018-2019, Arm Limited. All rights reserved.* |