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Miklos Balint386b8b52017-11-29 13:12:32 +00001/*
Jaykumar Pitambarbhai Patel98e6ce42020-01-06 12:42:42 +05302 * Copyright (c) 2017-2020, Arm Limited. All rights reserved.
Miklos Balint386b8b52017-11-29 13:12:32 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
Summer Qin9c1fba12020-08-12 15:49:12 +08008#include "common/tfm_boot_data.h"
TTornblom83d96372019-11-19 12:53:16 +01009#include "region.h"
Summer Qinf993cd42020-08-12 16:55:17 +080010#include "spm_ipc.h"
Summer Qin0eb7c912020-08-19 16:08:50 +080011#include "tfm_hal_platform.h"
Summer Qin830c5542020-02-14 13:44:20 +080012#include "tfm_irq_list.h"
13#include "tfm_nspm.h"
14#include "tfm_spm_hal.h"
Shawn Shanf5471ba2020-09-17 17:34:50 +080015#include "tfm_spm_log.h"
Summer Qin830c5542020-02-14 13:44:20 +080016#include "tfm_version.h"
Miklos Balint386b8b52017-11-29 13:12:32 +000017
Miklos Balint386b8b52017-11-29 13:12:32 +000018/*
19 * Avoids the semihosting issue
20 * FixMe: describe 'semihosting issue'
21 */
22#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
23__asm(" .global __ARM_use_no_argv\n");
24#endif
25
26#ifndef TFM_LVL
27#error TFM_LVL is not defined!
Summer Qinf993cd42020-08-12 16:55:17 +080028#elif (TFM_LVL != 1) && (TFM_LVL != 2)
Edison Aicb0ecf62019-07-10 18:43:51 +080029#error Only TFM_LVL 1 and 2 are supported for IPC model!
30#endif
Miklos Balint386b8b52017-11-29 13:12:32 +000031
Shawn Shanf5471ba2020-09-17 17:34:50 +080032#define PRINT_TFM_VERSION SPMLOG_INFMSGVAL("Booting TFM v", VERSION_MAJOR); \
33 SPMLOG_INFMSGVAL(".", VERSION_MINOR); \
34 SPMLOG_INFMSG(" "); \
35 SPMLOG_INFMSG(VERSION_STRING); \
36 SPMLOG_INFMSG("\r\n")
37
Mate Toth-Pal6bb416a2019-05-07 16:23:55 +020038REGION_DECLARE(Image$$, ARM_LIB_STACK_MSP, $$ZI$$Base);
39
Summer Qin830c5542020-02-14 13:44:20 +080040static int32_t tfm_core_init(void)
Miklos Balint386b8b52017-11-29 13:12:32 +000041{
Mate Toth-Pal4341de02018-10-02 12:55:47 +020042 size_t i;
Summer Qin0eb7c912020-08-19 16:08:50 +080043 enum tfm_hal_status_t hal_status = TFM_HAL_ERROR_GENERIC;
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +020044 enum tfm_plat_err_t plat_err = TFM_PLAT_ERR_SYSTEM_ERR;
45 enum irq_target_state_t irq_target_state = TFM_IRQ_TARGET_STATE_SECURE;
Mate Toth-Pal4341de02018-10-02 12:55:47 +020046
Miklos Balint386b8b52017-11-29 13:12:32 +000047 /* Enables fault handlers */
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +020048 plat_err = tfm_spm_hal_enable_fault_handlers();
49 if (plat_err != TFM_PLAT_ERR_SUCCESS) {
50 return TFM_ERROR_GENERIC;
51 }
Miklos Balint386b8b52017-11-29 13:12:32 +000052
Marc Moreno Berengue8e0fa7a2018-10-04 18:25:13 +010053 /* Configures the system reset request properties */
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +020054 plat_err = tfm_spm_hal_system_reset_cfg();
55 if (plat_err != TFM_PLAT_ERR_SUCCESS) {
56 return TFM_ERROR_GENERIC;
57 }
Marc Moreno Berengue8e0fa7a2018-10-04 18:25:13 +010058
Marc Moreno Berengued584b612018-11-26 11:46:31 +000059 /* Configures debug authentication */
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +020060 plat_err = tfm_spm_hal_init_debug();
61 if (plat_err != TFM_PLAT_ERR_SUCCESS) {
62 return TFM_ERROR_GENERIC;
63 }
Miklos Balint386b8b52017-11-29 13:12:32 +000064
Jaykumar Pitambarbhai Patel98e6ce42020-01-06 12:42:42 +053065 /*
66 * Access to any peripheral should be performed after programming
67 * the necessary security components such as PPC/SAU.
68 */
69 plat_err = tfm_spm_hal_init_isolation_hw();
70 if (plat_err != TFM_PLAT_ERR_SUCCESS) {
71 return TFM_ERROR_GENERIC;
72 }
73
Andrei Narkevitch5bba54c2019-09-23 14:09:13 -070074 /* Performs platform specific initialization */
Summer Qin0eb7c912020-08-19 16:08:50 +080075 hal_status = tfm_hal_platform_init();
76 if (hal_status != TFM_HAL_SUCCESS) {
Andrei Narkevitch5bba54c2019-09-23 14:09:13 -070077 return TFM_ERROR_GENERIC;
78 }
Miklos Balint386b8b52017-11-29 13:12:32 +000079
Jamie Fox45587672020-08-17 18:31:14 +010080 /* Configures architecture-specific coprocessors */
81 tfm_arch_configure_coprocessors();
82
Shawn Shanf5471ba2020-09-17 17:34:50 +080083 SPMLOG_INFMSG("\033[1;34m[Sec Thread] Secure image initializing!\033[0m\r\n");
Miklos Balint6cbeba62018-04-12 17:31:34 +020084
Miklos Balint386b8b52017-11-29 13:12:32 +000085#ifdef TFM_CORE_DEBUG
Shawn Shanf5471ba2020-09-17 17:34:50 +080086 SPMLOG_DBGMSGVAL("TF-M isolation level is: ", TFM_LVL);
87 SPMLOG_DBGMSG("\r\n");
Miklos Balint386b8b52017-11-29 13:12:32 +000088#endif
89
Tamas Ban9ff535b2018-09-18 08:15:18 +010090 tfm_core_validate_boot_data();
91
Miklos Balint386b8b52017-11-29 13:12:32 +000092 configure_ns_code();
93
94 /* Configures all interrupts to retarget NS state, except for
95 * secure peripherals
96 */
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +020097 plat_err = tfm_spm_hal_nvic_interrupt_target_state_cfg();
98 if (plat_err != TFM_PLAT_ERR_SUCCESS) {
99 return TFM_ERROR_GENERIC;
100 }
Mate Toth-Pal4341de02018-10-02 12:55:47 +0200101
102 for (i = 0; i < tfm_core_irq_signals_count; ++i) {
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +0200103 plat_err = tfm_spm_hal_set_secure_irq_priority(
Mate Toth-Pal4341de02018-10-02 12:55:47 +0200104 tfm_core_irq_signals[i].irq_line,
105 tfm_core_irq_signals[i].irq_priority);
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +0200106 if (plat_err != TFM_PLAT_ERR_SUCCESS) {
107 return TFM_ERROR_GENERIC;
108 }
109 irq_target_state = tfm_spm_hal_set_irq_target_state(
110 tfm_core_irq_signals[i].irq_line,
111 TFM_IRQ_TARGET_STATE_SECURE);
112 if (irq_target_state != TFM_IRQ_TARGET_STATE_SECURE) {
113 return TFM_ERROR_GENERIC;
114 }
Mate Toth-Pal4341de02018-10-02 12:55:47 +0200115 }
116
Miklos Balint386b8b52017-11-29 13:12:32 +0000117 /* Enable secure peripherals interrupts */
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +0200118 plat_err = tfm_spm_hal_nvic_interrupt_enable();
119 if (plat_err != TFM_PLAT_ERR_SUCCESS) {
120 return TFM_ERROR_GENERIC;
121 }
Miklos Balint386b8b52017-11-29 13:12:32 +0000122
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +0200123 return TFM_SUCCESS;
Miklos Balint386b8b52017-11-29 13:12:32 +0000124}
125
126int main(void)
127{
Mate Toth-Pal6bb416a2019-05-07 16:23:55 +0200128 /* set Main Stack Pointer limit */
Ken Liu05e13ba2020-07-25 10:31:33 +0800129 tfm_arch_init_secure_msp((uint32_t)&REGION_NAME(Image$$, ARM_LIB_STACK_MSP,
David Huf363fe92019-07-02 13:03:30 +0800130 $$ZI$$Base));
Mate Toth-Pal6bb416a2019-05-07 16:23:55 +0200131
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +0200132 if (tfm_core_init() != TFM_SUCCESS) {
Edison Ai9059ea02019-11-28 13:46:14 +0800133 tfm_core_panic();
Hugues de Valon4bf875b2019-02-19 14:53:49 +0000134 }
Soby Mathewc64adbc2020-03-11 12:33:44 +0000135 /* Print the TF-M version */
Shawn Shanf5471ba2020-09-17 17:34:50 +0800136 PRINT_TFM_VERSION;
Miklos Balint386b8b52017-11-29 13:12:32 +0000137
Hugues de Valon4bf875b2019-02-19 14:53:49 +0000138 if (tfm_spm_db_init() != SPM_ERR_OK) {
Edison Ai9059ea02019-11-28 13:46:14 +0800139 tfm_core_panic();
Hugues de Valon4bf875b2019-02-19 14:53:49 +0000140 }
Mate Toth-Pal936c33b2018-04-10 14:02:07 +0200141
Edison Ai1dfd7b12020-02-23 14:16:08 +0800142#ifdef CONFIG_TFM_ENABLE_MEMORY_PROTECT
Edison Aic1b10902019-08-26 10:34:19 +0800143 if (tfm_spm_hal_setup_isolation_hw() != TFM_PLAT_ERR_SUCCESS) {
Edison Ai9059ea02019-11-28 13:46:14 +0800144 tfm_core_panic();
Mate Toth-Pal5d3ae082019-07-10 16:14:14 +0200145 }
Edison Ai1dfd7b12020-02-23 14:16:08 +0800146#endif /* CONFIG_TFM_ENABLE_MEMORY_PROTECT */
Mate Toth-Pal936c33b2018-04-10 14:02:07 +0200147
Edison Ai4d66dc32019-02-18 17:58:49 +0800148 /*
149 * Prioritise secure exceptions to avoid NS being able to pre-empt
150 * secure SVC or SecureFault. Do it before PSA API initialization.
151 */
Ken Liu50e21092020-10-14 16:42:15 +0800152 tfm_arch_set_secure_exception_priorities();
Ken Liu490281d2019-12-30 15:55:26 +0800153
154 /* Move to handler mode for further SPM initialization. */
155 tfm_core_handler_mode();
Miklos Balint386b8b52017-11-29 13:12:32 +0000156}