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Raef Coles1cb0ecc2020-07-10 09:56:01 +01001#-------------------------------------------------------------------------------
David Hu53d5bcb2022-01-14 14:10:50 +08002# Copyright (c) 2020-2022, Arm Limited. All rights reserved.
Chris Branddb228992022-05-31 15:05:09 -07003# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
4# or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
Raef Coles1cb0ecc2020-07-10 09:56:01 +01005#
6# SPDX-License-Identifier: BSD-3-Clause
7#
8#-------------------------------------------------------------------------------
Raef Coles69817322020-10-19 14:14:14 +01009cmake_minimum_required(VERSION 3.15)
Raef Coles1cb0ecc2020-07-10 09:56:01 +010010cmake_policy(SET CMP0076 NEW)
11cmake_policy(SET CMP0079 NEW)
12
Chris Branddb228992022-05-31 15:05:09 -070013add_subdirectory(ns)
14
Raef Coles1cb0ecc2020-07-10 09:56:01 +010015add_library(platform_s STATIC)
16add_library(platform_region_defs INTERFACE)
Raef Colesa8f1ddf2021-05-25 15:47:25 +010017add_library(platform_common_interface INTERFACE)
Raef Coles1cb0ecc2020-07-10 09:56:01 +010018
Raef Coles1cb0ecc2020-07-10 09:56:01 +010019if (BL2)
20 add_library(platform_bl2 STATIC)
21endif()
22
Raef Coles15a37f82021-12-07 15:59:14 +000023if (BL1 AND PLATFORM_DEFAULT_BL1)
24 add_library(platform_bl1 STATIC)
25 add_library(platform_bl1_interface INTERFACE)
26endif()
27
Raef Coles1cb0ecc2020-07-10 09:56:01 +010028set(PLATFORM_DIR ${CMAKE_CURRENT_LIST_DIR})
29
Øyvind Rønningstad1dab74b2020-12-01 15:26:39 +010030add_subdirectory(ext/target/${TFM_PLATFORM} target)
Raef Coles1cb0ecc2020-07-10 09:56:01 +010031
Raef Colesa8f1ddf2021-05-25 15:47:25 +010032#========================= Platform Common interface ==========================#
33
34target_include_directories(platform_common_interface
35 INTERFACE
36 ./ext
37 ./ext/cmsis
38 ./ext/common
39 ./ext/driver
40 ./include
41)
42
Raef Coles1cb0ecc2020-07-10 09:56:01 +010043#========================= Platform Secure ====================================#
44
45target_include_directories(platform_s
46 PUBLIC
Tamas Ban37aedb52020-10-01 10:54:48 +010047 $<$<BOOL:${CRYPTO_HW_ACCELERATOR}>:${CMAKE_CURRENT_SOURCE_DIR}/ext/accelerator/interface>
Raef Coles1cb0ecc2020-07-10 09:56:01 +010048)
49
50target_sources(platform_s
51 PRIVATE
Mark Horvathb9ac0d52020-09-09 10:48:22 +020052 $<$<BOOL:${TFM_PARTITION_PROTECTED_STORAGE}>:${CMAKE_CURRENT_SOURCE_DIR}/ext/common/tfm_hal_ps.c>
53 $<$<BOOL:${TFM_PARTITION_INTERNAL_TRUSTED_STORAGE}>:${CMAKE_CURRENT_SOURCE_DIR}/ext/common/tfm_hal_its.c>
Raef Coles1cb0ecc2020-07-10 09:56:01 +010054 ext/common/tfm_platform.c
Gabor Abonyi931622b2020-10-19 15:08:40 +020055 $<$<BOOL:${PLATFORM_DEFAULT_UART_STDOUT}>:${CMAKE_CURRENT_SOURCE_DIR}/ext/common/uart_stdout.c>
David Hu52ff16f2021-08-20 11:39:37 +080056 $<$<BOOL:${TFM_SPM_LOG_RAW_ENABLED}>:ext/common/tfm_hal_spm_logdev_peripheral.c>
Ken Liu2e434892022-02-16 12:10:16 +080057 $<$<BOOL:${TFM_EXCEPTION_INFO_DUMP}>:ext/common/exception_info.c>
58 ext/common/faults.c
Summer Qindf8716b2020-08-05 11:19:44 +080059 ext/common/tfm_hal_memory_symbols.c
Raef Coles33ff1532021-06-18 09:18:08 +010060 $<$<BOOL:${PLATFORM_DEFAULT_ATTEST_HAL}>:ext/common/template/attest_hal.c>
61 $<$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>:ext/common/template/nv_counters.c>
Raef Colesabf57442021-10-08 10:42:37 +010062 $<$<AND:$<BOOL:${TFM_PARTITION_CRYPTO}>,$<BOOL:${PLATFORM_DEFAULT_CRYPTO_KEYS}>>:ext/common/template/crypto_keys.c>
Raef Coles33ff1532021-06-18 09:18:08 +010063 $<$<BOOL:${PLATFORM_DEFAULT_ROTPK}>:ext/common/template/tfm_rotpk.c>
64 $<$<BOOL:${PLATFORM_DEFAULT_NV_SEED}>:ext/common/template/crypto_nv_seed.c>
David Hu0ed91d72022-03-14 21:08:49 +080065 $<$<AND:$<NOT:$<BOOL:${SYMMETRIC_INITIAL_ATTESTATION}>>,$<BOOL:${TEST_S_ATTESTATION}>>:ext/common/template/tfm_initial_attest_pub_key.c>
Raef Coles33ff1532021-06-18 09:18:08 +010066 $<$<OR:$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>,$<BOOL:${PLATFORM_DEFAULT_OTP}>>:ext/common/template/flash_otp_nv_counters_backend.c>
Raef Coles148b9472021-06-18 08:48:17 +010067 $<$<BOOL:${PLATFORM_DEFAULT_OTP}>:ext/common/template/otp_flash.c>
Raef Colesaefbe082021-06-18 08:53:43 +010068 $<$<BOOL:${PLATFORM_DEFAULT_PROVISIONING}>:ext/common/provisioning.c>
Raef Coles1cb0ecc2020-07-10 09:56:01 +010069)
70
71target_link_libraries(platform_s
72 PUBLIC
Raef Colesa8f1ddf2021-05-25 15:47:25 +010073 platform_common_interface
Raef Coles1cb0ecc2020-07-10 09:56:01 +010074 platform_region_defs
Raef Coles02a76002021-04-26 12:01:16 +010075 tfm_fih_headers
Raef Coles1cb0ecc2020-07-10 09:56:01 +010076 PRIVATE
77 psa_interface
78 tfm_secure_api
Raef Colesaefbe082021-06-18 08:53:43 +010079 tfm_partition_defs
Kevin Peng3f67b2e2021-10-18 17:47:27 +080080 tfm_spm
Shawn Shan7b49b8e2021-10-11 17:13:23 +080081 $<$<BOOL:${PLATFORM_DEFAULT_ATTEST_HAL}>:tfm_sprt>
Joakim Andersson15c16ab2022-01-20 15:06:55 +010082 $<$<BOOL:${TFM_PARTITION_CRYPTO}>:crypto_service_mbedcrypto>
Raef Coles1cb0ecc2020-07-10 09:56:01 +010083)
84
85target_compile_definitions(platform_s
Shawn Shan6f33aad2020-10-16 15:30:17 +080086 PUBLIC
87 TFM_SPM_LOG_LEVEL=${TFM_SPM_LOG_LEVEL}
Joakim Anderssond6bebe12021-12-10 10:48:50 +010088 $<$<BOOL:${TFM_SPM_LOG_RAW_ENABLED}>:TFM_SPM_LOG_RAW_ENABLED>
Raef Coles148b9472021-06-18 08:48:17 +010089 $<$<BOOL:${OTP_NV_COUNTERS_RAM_EMULATION}>:OTP_NV_COUNTERS_RAM_EMULATION>
Ken Liu2e434892022-02-16 12:10:16 +080090 $<$<BOOL:${TFM_EXCEPTION_INFO_DUMP}>:TFM_EXCEPTION_INFO_DUMP>
Feder Liang55194382021-11-22 16:45:33 +080091 # CONFIG_TFM_FP
92 $<$<STREQUAL:${CONFIG_TFM_FP},hard>:CONFIG_TFM_FP=2>
93 $<$<STREQUAL:${CONFIG_TFM_FP},soft>:CONFIG_TFM_FP=0>
94 $<$<BOOL:${CONFIG_TFM_LAZY_STACKING}>:CONFIG_TFM_LAZY_STACKING>
Lingkai Dong181c00c2022-04-25 11:36:34 +010095 $<$<BOOL:${CONFIG_TFM_ENABLE_FPU}>:CONFIG_TFM_ENABLE_FPU>
Raef Coles1cb0ecc2020-07-10 09:56:01 +010096 PRIVATE
97 $<$<BOOL:${SYMMETRIC_INITIAL_ATTESTATION}>:SYMMETRIC_INITIAL_ATTESTATION>
Mingyang Sun9763dee2020-12-07 10:45:17 +080098 $<$<OR:$<VERSION_GREATER:${TFM_ISOLATION_LEVEL},1>,$<STREQUAL:"${TEST_PSA_API}","IPC">>:CONFIG_TFM_ENABLE_MEMORY_PROTECT>
Gabor Abonyi866571c2021-10-07 13:56:19 +020099 $<$<AND:$<BOOL:${TFM_PXN_ENABLE}>,$<STREQUAL:${TFM_SYSTEM_ARCHITECTURE},armv8.1-m.main>>:TFM_PXN_ENABLE>
Raef Coles148b9472021-06-18 08:48:17 +0100100 $<$<BOOL:${PLATFORM_DEFAULT_OTP}>:PLATFORM_DEFAULT_OTP>
Raef Colesaefbe082021-06-18 08:53:43 +0100101 $<$<BOOL:${TFM_DUMMY_PROVISIONING}>:TFM_DUMMY_PROVISIONING>
102 $<$<BOOL:${ATTEST_INCLUDE_COSE_KEY_ID}>:ATTEST_INCLUDE_COSE_KEY_ID>
Raef Coles33ff1532021-06-18 09:18:08 +0100103 $<$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>:PLATFORM_DEFAULT_NV_COUNTERS>
Raef Coles91fadb92021-06-18 09:20:50 +0100104 $<$<BOOL:${PLATFORM_DEFAULT_OTP}>:PLATFORM_DEFAULT_OTP>
Michel Jaouend0fd8d92021-10-14 09:22:41 +0200105 $<$<BOOL:${PLATFORM_DEFAULT_OTP_WRITEABLE}>:OTP_WRITEABLE>
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100106)
107
Feder Liangd4dbaa92021-09-07 15:34:46 +0800108target_compile_options(platform_s
109 PUBLIC
110 ${COMPILER_CP_FLAG}
111)
112
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100113#========================= Platform BL2 =======================================#
114if(BL2)
115 #TODO import policy
116 target_include_directories(platform_bl2
117 PUBLIC
Tamas Ban37aedb52020-10-01 10:54:48 +0100118 $<$<BOOL:${CRYPTO_HW_ACCELERATOR}>:${CMAKE_CURRENT_SOURCE_DIR}/ext/accelerator/interface>
Raef Coles2f65d122022-04-05 14:37:40 +0100119 $<$<BOOL:${CRYPTO_HW_ACCELERATOR}>:${MCUBOOT_PATH}/boot/bootutil/include>
Jamie Fox0dea7a12022-06-08 11:08:10 +0100120 ${CMAKE_SOURCE_DIR}/bl2/ext/mcuboot/include
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100121 )
122
123 target_sources(platform_bl2
124 PRIVATE
Raef Coles630d0b82021-04-26 11:08:43 +0100125 ext/common/boot_hal_bl2.c
Gabor Abonyi931622b2020-10-19 15:08:40 +0200126 $<$<BOOL:${PLATFORM_DEFAULT_UART_STDOUT}>:${CMAKE_CURRENT_SOURCE_DIR}/ext/common/uart_stdout.c>
Raef Coles33ff1532021-06-18 09:18:08 +0100127 $<$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>:ext/common/template/nv_counters.c>
128 $<$<BOOL:${PLATFORM_DEFAULT_ROTPK}>:ext/common/template/tfm_rotpk.c>
129 $<$<OR:$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>,$<BOOL:${PLATFORM_DEFAULT_OTP}>>:ext/common/template/flash_otp_nv_counters_backend.c>
Raef Coles148b9472021-06-18 08:48:17 +0100130 $<$<BOOL:${PLATFORM_DEFAULT_OTP}>:ext/common/template/otp_flash.c>
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100131 )
132
133 target_link_libraries(platform_bl2
134 PUBLIC
Raef Colesa8f1ddf2021-05-25 15:47:25 +0100135 platform_common_interface
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100136 platform_region_defs
137 PRIVATE
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100138 bl2_hal
Raef Coles2f65d122022-04-05 14:37:40 +0100139 mcuboot_config
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100140 )
141
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100142 target_compile_definitions(platform_bl2
143 PUBLIC
144 BL2
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100145 MCUBOOT_${MCUBOOT_UPGRADE_STRATEGY}
Sherry Zhangc4d8e2c2021-05-31 15:22:05 +0800146 $<$<BOOL:${MCUBOOT_DIRECT_XIP_REVERT}>:MCUBOOT_DIRECT_XIP_REVERT>
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100147 $<$<BOOL:${SYMMETRIC_INITIAL_ATTESTATION}>:SYMMETRIC_INITIAL_ATTESTATION>
148 $<$<BOOL:${MCUBOOT_HW_KEY}>:MCUBOOT_HW_KEY>
Tamas Ban1bfc9da2020-07-09 13:55:38 +0100149 MCUBOOT_FIH_PROFILE_${MCUBOOT_FIH_PROFILE}
Raef Coles148b9472021-06-18 08:48:17 +0100150 $<$<BOOL:${PLATFORM_DEFAULT_OTP}>:PLATFORM_DEFAULT_OTP>
151 $<$<BOOL:${OTP_NV_COUNTERS_RAM_EMULATION}>:OTP_NV_COUNTERS_RAM_EMULATION>
Raef Colesaefbe082021-06-18 08:53:43 +0100152 $<$<BOOL:${TFM_DUMMY_PROVISIONING}>:TFM_DUMMY_PROVISIONING>
153 $<$<BOOL:${ATTEST_INCLUDE_COSE_KEY_ID}>:ATTEST_INCLUDE_COSE_KEY_ID>
Raef Coles33ff1532021-06-18 09:18:08 +0100154 $<$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>:PLATFORM_DEFAULT_NV_COUNTERS>
Michel Jaouend0fd8d92021-10-14 09:22:41 +0200155 $<$<BOOL:${PLATFORM_DEFAULT_OTP_WRITEABLE}>:OTP_WRITEABLE>
Satish Kumare945bc22021-07-31 08:26:27 +0100156 )
157
158 if (${PLATFORM_PSA_ADAC_SECURE_DEBUG})
159
160 target_link_libraries(platform_bl2
161 PRIVATE
162 trusted-firmware-m-psa-adac
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100163 )
Satish Kumare945bc22021-07-31 08:26:27 +0100164
165 target_compile_definitions(platform_bl2
166 PRIVATE
167 PLATFORM_PSA_ADAC_SECURE_DEBUG
168 )
169
170 endif()
171
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100172endif()
173
Raef Coles15a37f82021-12-07 15:59:14 +0000174#========================= Platform BL1_1 =====================================#
175
176if(BL1 AND PLATFORM_DEFAULT_BL1)
177 target_include_directories(platform_bl1_interface
178 INTERFACE
179 .
180 ./include
181 ./ext/cmsis
182 ./ext/driver
183 )
184
185 target_link_libraries(platform_bl1_interface
186 INTERFACE
187 platform_region_defs
188 platform_common_interface
189 )
190
191 target_compile_definitions(platform_bl1_interface
192 INTERFACE
193 $<$<BOOL:${CRYPTO_HW_ACCELERATOR}>:CRYPTO_HW_ACCELERATOR>
194 $<$<BOOL:${TFM_BL1_LOGGING}>:TFM_BL1_LOGGING>
195 $<$<BOOL:${PLATFORM_DEFAULT_OTP}>:PLATFORM_DEFAULT_OTP>
196 $<$<BOOL:${OTP_NV_COUNTERS_RAM_EMULATION}>:OTP_NV_COUNTERS_RAM_EMULATION>
197 $<$<BOOL:${TFM_DUMMY_PROVISIONING}>:TFM_DUMMY_PROVISIONING>
198 $<$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>:PLATFORM_DEFAULT_NV_COUNTERS>
199 $<$<BOOL:${PLATFORM_DEFAULT_OTP_WRITEABLE}>:OTP_WRITEABLE>
200 )
201
202 target_sources(platform_bl1
203 PRIVATE
204 ./ext/common/boot_hal_bl1.c
205 ./ext/common/uart_stdout.c
206 $<$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>:ext/common/template/nv_counters.c>
207 $<$<OR:$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>,$<BOOL:${PLATFORM_DEFAULT_OTP}>>:ext/common/template/flash_otp_nv_counters_backend.c>
208 $<$<BOOL:${PLATFORM_DEFAULT_OTP}>:ext/common/template/otp_flash.c>
209 )
210
211 target_link_libraries(platform_bl1
212 PUBLIC
213 platform_bl1_interface
214 PRIVATE
215 tfm_fih_implementation
216 tfm_fih_headers
217 $<$<BOOL:${CRYPTO_HW_ACCELERATOR}>:bl1_crypto_hw>
218 )
219
220endif()
221
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100222#========================= Platform region defs ===============================#
223
224#TODO maybe just link the other platforms to this
225target_compile_definitions(platform_region_defs
226 INTERFACE
Raef Coles12c642c2021-08-10 16:55:40 +0100227 $<$<BOOL:${BL1}>:BL1>
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100228 $<$<BOOL:${BL2}>:BL2>
Ludovic Barre5319ac02021-11-02 09:51:29 +0100229 BL2_HEADER_SIZE=${BL2_HEADER_SIZE}
Ludovic Barre6432c7f2021-11-08 11:17:33 +0100230 BL2_TRAILER_SIZE=${BL2_TRAILER_SIZE}
Raef Coles15a37f82021-12-07 15:59:14 +0000231 BL1_HEADER_SIZE=${BL1_HEADER_SIZE}
232 BL1_TRAILER_SIZE=${BL1_TRAILER_SIZE}
233 $<$<BOOL:${PLATFORM_DEFAULT_BL1}>:PLATFORM_DEFAULT_BL1>
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100234 $<$<BOOL:${SECURE_UART1}>:SECURE_UART1>
235 DAUTH_${DEBUG_AUTHENTICATION}
Sherry Zhang5846d2b2021-09-30 15:34:14 +0800236 $<$<BOOL:${MCUBOOT_IMAGE_NUMBER}>:MCUBOOT_IMAGE_NUMBER=${MCUBOOT_IMAGE_NUMBER}>
Michel Jaouen4dc24422020-09-25 14:24:45 +0200237 $<$<STREQUAL:${MCUBOOT_SIGNATURE_TYPE},RSA>:MCUBOOT_SIGN_RSA>
238 $<$<STREQUAL:${MCUBOOT_SIGNATURE_TYPE},RSA>:MCUBOOT_SIGN_RSA_LEN=${MCUBOOT_SIGNATURE_KEY_LEN}>
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100239 $<$<STREQUAL:${MCUBOOT_EXECUTION_SLOT},2>:LINK_TO_SECONDARY_PARTITION>
Soby Mathew5869e4c2020-10-09 18:07:30 +0100240 $<$<BOOL:${TEST_PSA_API}>:PSA_API_TEST_${TEST_PSA_API}>
Mark Horvathb9ac0d52020-09-09 10:48:22 +0200241 $<$<BOOL:${FORWARD_PROT_MSG}>:FORWARD_PROT_MSG=${FORWARD_PROT_MSG}>
Tamas Banec109ea2020-11-24 14:13:30 +0000242 $<$<BOOL:${TFM_CODE_SHARING}>:CODE_SHARING>
Raef Coles1cb0ecc2020-07-10 09:56:01 +0100243)