blob: 23b9e04b8c5133b8cd27798ae8feb171a67f7542 [file] [log] [blame]
Kevin Pengfc7b7712021-05-08 13:42:56 +08001/*
2 * Copyright (c) 2021, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8#ifndef __SVC_NUM_H__
9#define __SVC_NUM_H__
10
11#include "tfm_spm_log.h"
12
13/*
14 * SVC numbers for FF-M compliant implementations.
15 * 0x0 ~ 0x7F can be only called from Thread Mode, the rest from ISR only.
16 */
17
18/********************* SVC for Thread Mode ************************************/
19/* PSA Client APIs */
20#define TFM_SVC_PSA_FRAMEWORK_VERSION (0x0)
21#define TFM_SVC_PSA_VERSION (0x1)
22#define TFM_SVC_PSA_CONNECT (0x2)
23#define TFM_SVC_PSA_CALL (0x3)
24#define TFM_SVC_PSA_CLOSE (0x4)
25/* PSA Secure Partition APIs */
26#define TFM_SVC_PSA_WAIT (0x5)
27#define TFM_SVC_PSA_GET (0x6)
28#define TFM_SVC_PSA_SET_RHANDLE (0x7)
29#define TFM_SVC_PSA_READ (0x8)
30#define TFM_SVC_PSA_SKIP (0x9)
31#define TFM_SVC_PSA_WRITE (0xA)
32#define TFM_SVC_PSA_REPLY (0xB)
33#define TFM_SVC_PSA_NOTIFY (0xC)
34#define TFM_SVC_PSA_CLEAR (0xD)
35#define TFM_SVC_PSA_EOI (0xE)
36#define TFM_SVC_PSA_PANIC (0xF)
37#define TFM_SVC_PSA_LIFECYCLE (0x10)
38#define TFM_SVC_PSA_IRQ_ENABLE (0x11)
39#define TFM_SVC_PSA_IRQ_DISABLE (0x12)
40/* TF-M specific, starts from 0x40 */
41#define TFM_SVC_SPM_REQUEST (0x40)
42#define TFM_SVC_GET_BOOT_DATA (0x41)
Ken Liu2bedfcd2021-06-04 17:41:12 +080043#define TFM_SVC_SPM_INIT (0x42)
44#define TFM_SVC_THREAD_NUMBER_END (0x7F)
Kevin Pengfc7b7712021-05-08 13:42:56 +080045#if (TFM_SPM_LOG_LEVEL > TFM_SPM_LOG_LEVEL_SILENCE)
Ken Liu2bedfcd2021-06-04 17:41:12 +080046#define TFM_SVC_OUTPUT_UNPRIV_STRING (TFM_SVC_THREAD_NUMBER_END)
Kevin Pengfc7b7712021-05-08 13:42:56 +080047#endif
Ken Liu2bedfcd2021-06-04 17:41:12 +080048
49#define TFM_SVC_HANDLER_NUMBER_START (0x80)
50
Kevin Pengfc7b7712021-05-08 13:42:56 +080051/********************* SVC for interrupt handling *****************************/
52
53#endif /* __SVC_NUM_H__ */