Macros | |
| #define | CY_CTDAC_DRV_VERSION_MAJOR 2 |
| Driver major version. | |
| #define | CY_CTDAC_DRV_VERSION_MINOR 0 |
| Driver minor version. | |
| #define | CY_CTDAC_ID CY_PDL_DRV_ID(0x19u) |
| CTDAC driver identifier. | |
| #define | CY_CTDAC_DEINIT (0uL) |
| De-init value for CTDAC registers. | |
| #define | CY_CTDAC_UNSIGNED_MID_CODE_VALUE (0x800uL) |
| Middle code value for unsigned values. | |
| #define | CY_CTDAC_UNSIGNED_MAX_CODE_VALUE (0xFFFuL) |
| Maximum code value for unsigned values. | |
| #define | CY_CTDAC_FAST_CLKCFG_TYPE CY_SYSCLK_DIV_8_BIT |
| Clock divider type for quick clock setup. | |
| #define | CY_CTDAC_FAST_CLKCFG_NUM (0uL) |
| Clock divider number for quick clock setup. | |
| #define | CY_CTDAC_FAST_CLKCFG_DIV (99uL) |
| Clock divider integer value for quick clock setup. More... | |
| #define CY_CTDAC_FAST_CLKCFG_DIV (99uL) |
Clock divider integer value for quick clock setup.
Divides PERI clock by 100.