Core: separate IPC and veneer fn-based code
Improve separation of IPC and veneer function-based code in the
source tree for memory optimization and better readability of source:
- Do not compile unused SVC handler functions if using IPC messaging
- Avoid activation of MPU regions not needed in selected build
configuration
- Flag error if a service veneer function is called when running IPC
messaging
- Do not include memory bounds for partitions in SPM database if
level 1 isolation and veneer functions are used to save memory
Signed-off-by: Miklos Balint <miklos.balint@arm.com>
Change-Id: Iaef91e69061b639a71ec8cb638b6393762d10761
diff --git a/platform/ext/common/armclang/tfm_common_s.sct b/platform/ext/common/armclang/tfm_common_s.sct
index bef75d5..be87a0b 100644
--- a/platform/ext/common/armclang/tfm_common_s.sct
+++ b/platform/ext/common/armclang/tfm_common_s.sct
@@ -157,15 +157,10 @@
.ANY (+RW +ZI)
}
-#if TFM_LVL == 1
-#ifdef TFM_PSA_API
- TFM_SECURE_STACK +0 ALIGN 128 EMPTY 0x0200 {
- }
-#else
+#if (TFM_LVL == 1) && !defined(TFM_PSA_API)
TFM_SECURE_STACK +0 ALIGN 128 EMPTY 0x2000 {
}
-#endif /* TFM_PSA_API */
-#endif /* TFM_LVL == 1 */
+#endif /* (TFM_LVL == 1) && !defined(TFM_PSA_API) */
TFM_UNPRIV_DATA +0 ALIGN 32 {
tfm_spm_services.o (+RW +ZI)
@@ -177,10 +172,7 @@
device_definition.o (+RW +ZI)
}
-#ifdef TFM_PSA_API
- TFM_UNPRIV_SCRATCH +0 ALIGN 32 EMPTY 0x0 {
- }
-#else
+#if !defined(TFM_PSA_API)
TFM_UNPRIV_SCRATCH +0 ALIGN 32 EMPTY 0x400 {
}
#endif /* TFM_PSA_API */
@@ -197,36 +189,52 @@
*tfm_storage* (+RW +ZI)
}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
TFM_SP_STORAGE_STACK +0 ALIGN 128 EMPTY 0x1800 {
}
+#endif
TFM_SP_AUDIT_LOG_DATA +0 ALIGN 32 {
*tfm_audit* (+RW +ZI)
}
+#if defined (TFM_PSA_API)
+ TFM_SP_AUDIT_LOG_STACK +0 ALIGN 128 EMPTY 0 {
+ }
+#elif TFM_LVL != 1
TFM_SP_AUDIT_LOG_STACK +0 ALIGN 128 EMPTY 0x0200 {
}
+#endif
TFM_SP_CRYPTO_DATA +0 ALIGN 32 {
*tfm_crypto* (+RW +ZI)
}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
TFM_SP_CRYPTO_STACK +0 ALIGN 128 EMPTY 0x2000 {
}
+#endif
TFM_SP_PLATFORM_DATA +0 ALIGN 32 {
*tfm_platform* (+RW +ZI)
}
+#if defined (TFM_PSA_API)
+ TFM_SP_PLATFORM_STACK +0 ALIGN 128 EMPTY 0 {
+ }
+#elif TFM_LVL != 1
TFM_SP_PLATFORM_STACK +0 ALIGN 128 EMPTY 0x0400 {
}
+#endif
TFM_SP_INITIAL_ATTESTATION_DATA +0 ALIGN 32 {
*tfm_attest* (+RW +ZI)
}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
TFM_SP_INITIAL_ATTESTATION_STACK +0 ALIGN 128 EMPTY 0x0A00 {
}
+#endif
#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
TFM_SP_SECURE_TEST_PARTITION_DATA +0 ALIGN 32 {
@@ -240,8 +248,10 @@
*attestation_s_interface_testsuite.* (+RW +ZI)
}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
TFM_SP_SECURE_TEST_PARTITION_STACK +0 ALIGN 128 EMPTY 0x0C00 {
}
+#endif
#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
#ifdef TFM_PSA_API
@@ -249,8 +259,10 @@
*ipc_service_test.* (+RW +ZI)
}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
TFM_SP_IPC_SERVICE_TEST_STACK +0 ALIGN 128 EMPTY 0x0200 {
}
+#endif
#endif /* TFM_PSA_API */
/*
@@ -273,8 +285,10 @@
*tfm_ss_core_test.* (+RW +ZI)
}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
TFM_SP_CORE_TEST_STACK +0 ALIGN 128 EMPTY 0x0300 {
}
+#endif
#endif /* TFM_PARTITION_TEST_CORE */
#ifdef TFM_PARTITION_TEST_CORE
@@ -282,8 +296,10 @@
*tfm_ss_core_test_2.* (+RW +ZI)
}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
TFM_SP_CORE_TEST_2_STACK +0 ALIGN 128 EMPTY 0x0200 {
}
+#endif
#endif /* TFM_PARTITION_TEST_CORE */
#ifdef TFM_PSA_API
@@ -291,8 +307,10 @@
*ipc_client_test.* (+RW +ZI)
}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
TFM_SP_IPC_CLIENT_TEST_STACK +0 ALIGN 128 EMPTY 0x0200 {
}
+#endif
#endif /* TFM_PSA_API */
/*
diff --git a/platform/ext/common/armclang/tfm_common_s.sct.template b/platform/ext/common/armclang/tfm_common_s.sct.template
index 5ff6546..5b86230 100644
--- a/platform/ext/common/armclang/tfm_common_s.sct.template
+++ b/platform/ext/common/armclang/tfm_common_s.sct.template
@@ -138,15 +138,10 @@
.ANY (+RW +ZI)
}
-#if TFM_LVL == 1
-#ifdef TFM_PSA_API
- TFM_SECURE_STACK +0 ALIGN 128 EMPTY 0x0200 {
- }
-#else
+#if (TFM_LVL == 1) && !defined(TFM_PSA_API)
TFM_SECURE_STACK +0 ALIGN 128 EMPTY 0x2000 {
}
-#endif /* TFM_PSA_API */
-#endif /* TFM_LVL == 1 */
+#endif /* (TFM_LVL == 1) && !defined(TFM_PSA_API) */
TFM_UNPRIV_DATA +0 ALIGN 32 {
tfm_spm_services.o (+RW +ZI)
@@ -158,10 +153,7 @@
device_definition.o (+RW +ZI)
}
-#ifdef TFM_PSA_API
- TFM_UNPRIV_SCRATCH +0 ALIGN 32 EMPTY 0x0 {
- }
-#else
+#if !defined(TFM_PSA_API)
TFM_UNPRIV_SCRATCH +0 ALIGN 32 EMPTY 0x400 {
}
#endif /* TFM_PSA_API */
@@ -192,8 +184,20 @@
{% endif %}
}
+ {% if manifest.manifest.tfm_partition_ipc %}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
{{manifest.manifest.name}}_STACK +0 ALIGN 128 EMPTY {{manifest.manifest.stack_size}} {
}
+#endif
+ {% else %}
+#if defined (TFM_PSA_API)
+ {{manifest.manifest.name}}_STACK +0 ALIGN 128 EMPTY 0 {
+ }
+#elif TFM_LVL != 1
+ {{manifest.manifest.name}}_STACK +0 ALIGN 128 EMPTY {{manifest.manifest.stack_size}} {
+ }
+#endif
+ {% endif %}
{% if manifest.attr.conditional %}
#endif /* {{manifest.attr.conditional}} */
{% endif %}
@@ -233,8 +237,20 @@
{% endif %}
}
+ {% if manifest.manifest.tfm_partition_ipc %}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
{{manifest.manifest.name}}_STACK +0 ALIGN 128 EMPTY {{manifest.manifest.stack_size}} {
}
+#endif
+ {% else %}
+#if defined (TFM_PSA_API)
+ {{manifest.manifest.name}}_STACK +0 ALIGN 128 EMPTY 0 {
+ }
+#elif TFM_LVL != 1
+ {{manifest.manifest.name}}_STACK +0 ALIGN 128 EMPTY {{manifest.manifest.stack_size}} {
+ }
+#endif
+ {% endif %}
{% if manifest.attr.conditional %}
#endif /* {{manifest.attr.conditional}} */
{% endif %}
diff --git a/platform/ext/common/gcc/tfm_common_s.ld b/platform/ext/common/gcc/tfm_common_s.ld
index 7a57ff1..fa31129 100644
--- a/platform/ext/common/gcc/tfm_common_s.ld
+++ b/platform/ext/common/gcc/tfm_common_s.ld
@@ -117,6 +117,7 @@
__zero_table_start__ = .;
LONG (ADDR(.TFM_BSS))
LONG (SIZEOF(.TFM_BSS))
+#if !defined(TFM_PSA_API)
#if TFM_LVL == 1
LONG (ADDR(.TFM_SECURE_STACK))
LONG (SIZEOF(.TFM_SECURE_STACK))
@@ -124,58 +125,81 @@
LONG (ADDR(.TFM_UNPRIV_BSS))
LONG (SIZEOF(.TFM_UNPRIV_BSS))
#endif /* TFM_LVL == 1 */
+#endif /* !defined(TFM_PSA_API) */
LONG (ADDR(.TFM_SP_STORAGE_BSS))
LONG (SIZEOF(.TFM_SP_STORAGE_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.TFM_SP_STORAGE_STACK))
LONG (SIZEOF(.TFM_SP_STORAGE_STACK))
+#endif
LONG (ADDR(.TFM_SP_AUDIT_LOG_BSS))
LONG (SIZEOF(.TFM_SP_AUDIT_LOG_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.TFM_SP_AUDIT_LOG_STACK))
LONG (SIZEOF(.TFM_SP_AUDIT_LOG_STACK))
+#endif
LONG (ADDR(.TFM_SP_CRYPTO_BSS))
LONG (SIZEOF(.TFM_SP_CRYPTO_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.TFM_SP_CRYPTO_STACK))
LONG (SIZEOF(.TFM_SP_CRYPTO_STACK))
+#endif
LONG (ADDR(.TFM_SP_PLATFORM_BSS))
LONG (SIZEOF(.TFM_SP_PLATFORM_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.TFM_SP_PLATFORM_STACK))
LONG (SIZEOF(.TFM_SP_PLATFORM_STACK))
+#endif
LONG (ADDR(.TFM_SP_INITIAL_ATTESTATION_BSS))
LONG (SIZEOF(.TFM_SP_INITIAL_ATTESTATION_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.TFM_SP_INITIAL_ATTESTATION_STACK))
LONG (SIZEOF(.TFM_SP_INITIAL_ATTESTATION_STACK))
+#endif
#ifdef TFM_PARTITION_TEST_CORE
LONG (ADDR(.TFM_SP_CORE_TEST_BSS))
LONG (SIZEOF(.TFM_SP_CORE_TEST_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.TFM_SP_CORE_TEST_STACK))
LONG (SIZEOF(.TFM_SP_CORE_TEST_STACK))
+#endif
#endif /* TFM_PARTITION_TEST_CORE */
#ifdef TFM_PARTITION_TEST_CORE
LONG (ADDR(.TFM_SP_CORE_TEST_2_BSS))
LONG (SIZEOF(.TFM_SP_CORE_TEST_2_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.TFM_SP_CORE_TEST_2_STACK))
LONG (SIZEOF(.TFM_SP_CORE_TEST_2_STACK))
+#endif
#endif /* TFM_PARTITION_TEST_CORE */
#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
LONG (ADDR(.TFM_SP_SECURE_TEST_PARTITION_BSS))
LONG (SIZEOF(.TFM_SP_SECURE_TEST_PARTITION_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.TFM_SP_SECURE_TEST_PARTITION_STACK))
LONG (SIZEOF(.TFM_SP_SECURE_TEST_PARTITION_STACK))
+#endif
#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
#ifdef TFM_PSA_API
LONG (ADDR(.TFM_SP_IPC_SERVICE_TEST_BSS))
LONG (SIZEOF(.TFM_SP_IPC_SERVICE_TEST_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.TFM_SP_IPC_SERVICE_TEST_STACK))
LONG (SIZEOF(.TFM_SP_IPC_SERVICE_TEST_STACK))
+#endif
#endif /* TFM_PSA_API */
#ifdef TFM_PSA_API
LONG (ADDR(.TFM_SP_IPC_CLIENT_TEST_BSS))
LONG (SIZEOF(.TFM_SP_IPC_CLIENT_TEST_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.TFM_SP_IPC_CLIENT_TEST_STACK))
LONG (SIZEOF(.TFM_SP_IPC_CLIENT_TEST_STACK))
+#endif
#endif /* TFM_PSA_API */
+#if !defined(TFM_PSA_API)
LONG (ADDR(.TFM_UNPRIV_SCRATCH))
LONG (SIZEOF(.TFM_UNPRIV_SCRATCH))
+#endif /* !defined(TFM_PSA_API) */
__zero_table_end__ = .;
} > FLASH
@@ -429,16 +453,14 @@
#if TFM_LVL == 1
+#if !defined(TFM_PSA_API)
.TFM_SECURE_STACK : ALIGN(128)
{
-#ifdef TFM_PSA_API
- . += 0x0200;
-#else
. += 0x2000;
-#endif /* TFM_PSA_API */
} > RAM
Image$$TFM_SECURE_STACK$$ZI$$Base = ADDR(.TFM_SECURE_STACK);
Image$$TFM_SECURE_STACK$$ZI$$Limit = ADDR(.TFM_SECURE_STACK) + SIZEOF(.TFM_SECURE_STACK);
+#endif /* !defined(TFM_PSA_API) */
.heap : ALIGN(8)
{
@@ -486,16 +508,14 @@
Image$$TFM_UNPRIV_DATA$$ZI$$Limit = ADDR(.TFM_UNPRIV_BSS) + SIZEOF(.TFM_UNPRIV_BSS);
#endif /* TFM_LVL == 1 */
+#if !defined(TFM_PSA_API)
.TFM_UNPRIV_SCRATCH : ALIGN(32)
{
-#ifdef TFM_PSA_API
- . += 0x0;
-#else
. += 0x400;
-#endif /* TFM_PSA_API */
} > RAM
Image$$TFM_UNPRIV_SCRATCH$$ZI$$Base = ADDR(.TFM_UNPRIV_SCRATCH);
Image$$TFM_UNPRIV_SCRATCH$$ZI$$Limit = ADDR(.TFM_UNPRIV_SCRATCH) + SIZEOF(.TFM_UNPRIV_SCRATCH);
+#endif /* !defined(TFM_PSA_API) */
/**** PSA RoT DATA start here */
Image$$TFM_PSA_RW_STACK_START$$Base = .;
@@ -517,12 +537,15 @@
Image$$TFM_SP_STORAGE_DATA$$ZI$$Base = ADDR(.TFM_SP_STORAGE_BSS);
Image$$TFM_SP_STORAGE_DATA$$ZI$$Limit = ADDR(.TFM_SP_STORAGE_BSS) + SIZEOF(.TFM_SP_STORAGE_BSS);
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.TFM_SP_STORAGE_STACK : ALIGN(128)
{
. += 0x1800;
} > RAM
Image$$TFM_SP_STORAGE_STACK$$ZI$$Base = ADDR(.TFM_SP_STORAGE_STACK);
Image$$TFM_SP_STORAGE_STACK$$ZI$$Limit = ADDR(.TFM_SP_STORAGE_STACK) + SIZEOF(.TFM_SP_STORAGE_STACK);
+#endif
+
.TFM_SP_AUDIT_LOG_DATA : ALIGN(32)
{
@@ -541,12 +564,17 @@
Image$$TFM_SP_AUDIT_LOG_DATA$$ZI$$Base = ADDR(.TFM_SP_AUDIT_LOG_BSS);
Image$$TFM_SP_AUDIT_LOG_DATA$$ZI$$Limit = ADDR(.TFM_SP_AUDIT_LOG_BSS) + SIZEOF(.TFM_SP_AUDIT_LOG_BSS);
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.TFM_SP_AUDIT_LOG_STACK : ALIGN(128)
{
+#if !defined(TFM_PSA_API)
. += 0x0200;
+#endif
} > RAM
Image$$TFM_SP_AUDIT_LOG_STACK$$ZI$$Base = ADDR(.TFM_SP_AUDIT_LOG_STACK);
Image$$TFM_SP_AUDIT_LOG_STACK$$ZI$$Limit = ADDR(.TFM_SP_AUDIT_LOG_STACK) + SIZEOF(.TFM_SP_AUDIT_LOG_STACK);
+#endif
+
.TFM_SP_CRYPTO_DATA : ALIGN(32)
{
@@ -565,12 +593,15 @@
Image$$TFM_SP_CRYPTO_DATA$$ZI$$Base = ADDR(.TFM_SP_CRYPTO_BSS);
Image$$TFM_SP_CRYPTO_DATA$$ZI$$Limit = ADDR(.TFM_SP_CRYPTO_BSS) + SIZEOF(.TFM_SP_CRYPTO_BSS);
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.TFM_SP_CRYPTO_STACK : ALIGN(128)
{
. += 0x2000;
} > RAM
Image$$TFM_SP_CRYPTO_STACK$$ZI$$Base = ADDR(.TFM_SP_CRYPTO_STACK);
Image$$TFM_SP_CRYPTO_STACK$$ZI$$Limit = ADDR(.TFM_SP_CRYPTO_STACK) + SIZEOF(.TFM_SP_CRYPTO_STACK);
+#endif
+
.TFM_SP_PLATFORM_DATA : ALIGN(32)
{
@@ -589,12 +620,17 @@
Image$$TFM_SP_PLATFORM_DATA$$ZI$$Base = ADDR(.TFM_SP_PLATFORM_BSS);
Image$$TFM_SP_PLATFORM_DATA$$ZI$$Limit = ADDR(.TFM_SP_PLATFORM_BSS) + SIZEOF(.TFM_SP_PLATFORM_BSS);
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.TFM_SP_PLATFORM_STACK : ALIGN(128)
{
+#if !defined(TFM_PSA_API)
. += 0x0400;
+#endif
} > RAM
Image$$TFM_SP_PLATFORM_STACK$$ZI$$Base = ADDR(.TFM_SP_PLATFORM_STACK);
Image$$TFM_SP_PLATFORM_STACK$$ZI$$Limit = ADDR(.TFM_SP_PLATFORM_STACK) + SIZEOF(.TFM_SP_PLATFORM_STACK);
+#endif
+
.TFM_SP_INITIAL_ATTESTATION_DATA : ALIGN(32)
{
@@ -613,12 +649,15 @@
Image$$TFM_SP_INITIAL_ATTESTATION_DATA$$ZI$$Base = ADDR(.TFM_SP_INITIAL_ATTESTATION_BSS);
Image$$TFM_SP_INITIAL_ATTESTATION_DATA$$ZI$$Limit = ADDR(.TFM_SP_INITIAL_ATTESTATION_BSS) + SIZEOF(.TFM_SP_INITIAL_ATTESTATION_BSS);
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.TFM_SP_INITIAL_ATTESTATION_STACK : ALIGN(128)
{
. += 0x0A00;
} > RAM
Image$$TFM_SP_INITIAL_ATTESTATION_STACK$$ZI$$Base = ADDR(.TFM_SP_INITIAL_ATTESTATION_STACK);
Image$$TFM_SP_INITIAL_ATTESTATION_STACK$$ZI$$Limit = ADDR(.TFM_SP_INITIAL_ATTESTATION_STACK) + SIZEOF(.TFM_SP_INITIAL_ATTESTATION_STACK);
+#endif
+
#ifdef TFM_PARTITION_TEST_SECURE_SERVICES
.TFM_SP_SECURE_TEST_PARTITION_DATA : ALIGN(32)
@@ -659,12 +698,15 @@
Image$$TFM_SP_SECURE_TEST_PARTITION_DATA$$ZI$$Base = ADDR(.TFM_SP_SECURE_TEST_PARTITION_BSS);
Image$$TFM_SP_SECURE_TEST_PARTITION_DATA$$ZI$$Limit = ADDR(.TFM_SP_SECURE_TEST_PARTITION_BSS) + SIZEOF(.TFM_SP_SECURE_TEST_PARTITION_BSS);
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.TFM_SP_SECURE_TEST_PARTITION_STACK : ALIGN(128)
{
. += 0x0C00;
} > RAM
Image$$TFM_SP_SECURE_TEST_PARTITION_STACK$$ZI$$Base = ADDR(.TFM_SP_SECURE_TEST_PARTITION_STACK);
Image$$TFM_SP_SECURE_TEST_PARTITION_STACK$$ZI$$Limit = ADDR(.TFM_SP_SECURE_TEST_PARTITION_STACK) + SIZEOF(.TFM_SP_SECURE_TEST_PARTITION_STACK);
+#endif
+
#endif /* TFM_PARTITION_TEST_SECURE_SERVICES */
#ifdef TFM_PSA_API
@@ -685,12 +727,15 @@
Image$$TFM_SP_IPC_SERVICE_TEST_DATA$$ZI$$Base = ADDR(.TFM_SP_IPC_SERVICE_TEST_BSS);
Image$$TFM_SP_IPC_SERVICE_TEST_DATA$$ZI$$Limit = ADDR(.TFM_SP_IPC_SERVICE_TEST_BSS) + SIZEOF(.TFM_SP_IPC_SERVICE_TEST_BSS);
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.TFM_SP_IPC_SERVICE_TEST_STACK : ALIGN(128)
{
. += 0x0200;
} > RAM
Image$$TFM_SP_IPC_SERVICE_TEST_STACK$$ZI$$Base = ADDR(.TFM_SP_IPC_SERVICE_TEST_STACK);
Image$$TFM_SP_IPC_SERVICE_TEST_STACK$$ZI$$Limit = ADDR(.TFM_SP_IPC_SERVICE_TEST_STACK) + SIZEOF(.TFM_SP_IPC_SERVICE_TEST_STACK);
+#endif
+
#endif /* TFM_PSA_API */
/**** PSA RoT DATA end here */
@@ -717,12 +762,15 @@
Image$$TFM_SP_CORE_TEST_DATA$$ZI$$Base = ADDR(.TFM_SP_CORE_TEST_BSS);
Image$$TFM_SP_CORE_TEST_DATA$$ZI$$Limit = ADDR(.TFM_SP_CORE_TEST_BSS) + SIZEOF(.TFM_SP_CORE_TEST_BSS);
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.TFM_SP_CORE_TEST_STACK : ALIGN(128)
{
. += 0x0300;
} > RAM
Image$$TFM_SP_CORE_TEST_STACK$$ZI$$Base = ADDR(.TFM_SP_CORE_TEST_STACK);
Image$$TFM_SP_CORE_TEST_STACK$$ZI$$Limit = ADDR(.TFM_SP_CORE_TEST_STACK) + SIZEOF(.TFM_SP_CORE_TEST_STACK);
+#endif
+
#endif /* TFM_PARTITION_TEST_CORE */
#ifdef TFM_PARTITION_TEST_CORE
@@ -743,12 +791,15 @@
Image$$TFM_SP_CORE_TEST_2_DATA$$ZI$$Base = ADDR(.TFM_SP_CORE_TEST_2_BSS);
Image$$TFM_SP_CORE_TEST_2_DATA$$ZI$$Limit = ADDR(.TFM_SP_CORE_TEST_2_BSS) + SIZEOF(.TFM_SP_CORE_TEST_2_BSS);
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.TFM_SP_CORE_TEST_2_STACK : ALIGN(128)
{
. += 0x0200;
} > RAM
Image$$TFM_SP_CORE_TEST_2_STACK$$ZI$$Base = ADDR(.TFM_SP_CORE_TEST_2_STACK);
Image$$TFM_SP_CORE_TEST_2_STACK$$ZI$$Limit = ADDR(.TFM_SP_CORE_TEST_2_STACK) + SIZEOF(.TFM_SP_CORE_TEST_2_STACK);
+#endif
+
#endif /* TFM_PARTITION_TEST_CORE */
#ifdef TFM_PSA_API
@@ -769,12 +820,15 @@
Image$$TFM_SP_IPC_CLIENT_TEST_DATA$$ZI$$Base = ADDR(.TFM_SP_IPC_CLIENT_TEST_BSS);
Image$$TFM_SP_IPC_CLIENT_TEST_DATA$$ZI$$Limit = ADDR(.TFM_SP_IPC_CLIENT_TEST_BSS) + SIZEOF(.TFM_SP_IPC_CLIENT_TEST_BSS);
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.TFM_SP_IPC_CLIENT_TEST_STACK : ALIGN(128)
{
. += 0x0200;
} > RAM
Image$$TFM_SP_IPC_CLIENT_TEST_STACK$$ZI$$Base = ADDR(.TFM_SP_IPC_CLIENT_TEST_STACK);
Image$$TFM_SP_IPC_CLIENT_TEST_STACK$$ZI$$Limit = ADDR(.TFM_SP_IPC_CLIENT_TEST_STACK) + SIZEOF(.TFM_SP_IPC_CLIENT_TEST_STACK);
+#endif
+
#endif /* TFM_PSA_API */
/**** APPLICATION RoT DATA end here */
diff --git a/platform/ext/common/gcc/tfm_common_s.ld.template b/platform/ext/common/gcc/tfm_common_s.ld.template
index b985d83..4f0395d 100644
--- a/platform/ext/common/gcc/tfm_common_s.ld.template
+++ b/platform/ext/common/gcc/tfm_common_s.ld.template
@@ -88,6 +88,7 @@
__zero_table_start__ = .;
LONG (ADDR(.TFM_BSS))
LONG (SIZEOF(.TFM_BSS))
+#if !defined(TFM_PSA_API)
#if TFM_LVL == 1
LONG (ADDR(.TFM_SECURE_STACK))
LONG (SIZEOF(.TFM_SECURE_STACK))
@@ -95,20 +96,25 @@
LONG (ADDR(.TFM_UNPRIV_BSS))
LONG (SIZEOF(.TFM_UNPRIV_BSS))
#endif /* TFM_LVL == 1 */
+#endif /* !defined(TFM_PSA_API) */
{% for manifest in manifests %}
{% if manifest.attr.conditional %}
#ifdef {{manifest.attr.conditional}}
{% endif %}
LONG (ADDR(.{{manifest.manifest.name}}_BSS))
LONG (SIZEOF(.{{manifest.manifest.name}}_BSS))
+#if defined(TFM_PSA_API) || (TFM_LVL != 1)
LONG (ADDR(.{{manifest.manifest.name}}_STACK))
LONG (SIZEOF(.{{manifest.manifest.name}}_STACK))
- {% if manifest.attr.conditional %}
+#endif
+ {% if manifest.attr.conditional %}
#endif /* {{manifest.attr.conditional}} */
{% endif %}
{% endfor %}
+#if !defined(TFM_PSA_API)
LONG (ADDR(.TFM_UNPRIV_SCRATCH))
LONG (SIZEOF(.TFM_UNPRIV_SCRATCH))
+#endif /* !defined(TFM_PSA_API) */
__zero_table_end__ = .;
} > FLASH
@@ -282,16 +288,14 @@
#if TFM_LVL == 1
+#if !defined(TFM_PSA_API)
.TFM_SECURE_STACK : ALIGN(128)
{
-#ifdef TFM_PSA_API
- . += 0x0200;
-#else
. += 0x2000;
-#endif /* TFM_PSA_API */
} > RAM
Image$$TFM_SECURE_STACK$$ZI$$Base = ADDR(.TFM_SECURE_STACK);
Image$$TFM_SECURE_STACK$$ZI$$Limit = ADDR(.TFM_SECURE_STACK) + SIZEOF(.TFM_SECURE_STACK);
+#endif /* !defined(TFM_PSA_API) */
.heap : ALIGN(8)
{
@@ -339,16 +343,14 @@
Image$$TFM_UNPRIV_DATA$$ZI$$Limit = ADDR(.TFM_UNPRIV_BSS) + SIZEOF(.TFM_UNPRIV_BSS);
#endif /* TFM_LVL == 1 */
+#if !defined(TFM_PSA_API)
.TFM_UNPRIV_SCRATCH : ALIGN(32)
{
-#ifdef TFM_PSA_API
- . += 0x0;
-#else
. += 0x400;
-#endif /* TFM_PSA_API */
} > RAM
Image$$TFM_UNPRIV_SCRATCH$$ZI$$Base = ADDR(.TFM_UNPRIV_SCRATCH);
Image$$TFM_UNPRIV_SCRATCH$$ZI$$Limit = ADDR(.TFM_UNPRIV_SCRATCH) + SIZEOF(.TFM_UNPRIV_SCRATCH);
+#endif /* !defined(TFM_PSA_API) */
/**** PSA RoT DATA start here */
Image$$TFM_PSA_RW_STACK_START$$Base = .;
@@ -394,12 +396,29 @@
Image$${{manifest.manifest.name}}_DATA$$ZI$$Base = ADDR(.{{manifest.manifest.name}}_BSS);
Image$${{manifest.manifest.name}}_DATA$$ZI$$Limit = ADDR(.{{manifest.manifest.name}}_BSS) + SIZEOF(.{{manifest.manifest.name}}_BSS);
+ {% if manifest.manifest.tfm_partition_ipc %}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.{{manifest.manifest.name}}_STACK : ALIGN(128)
{
. += {{manifest.manifest.stack_size}};
} > RAM
Image$${{manifest.manifest.name}}_STACK$$ZI$$Base = ADDR(.{{manifest.manifest.name}}_STACK);
Image$${{manifest.manifest.name}}_STACK$$ZI$$Limit = ADDR(.{{manifest.manifest.name}}_STACK) + SIZEOF(.{{manifest.manifest.name}}_STACK);
+#endif
+ {% else %}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
+ .{{manifest.manifest.name}}_STACK : ALIGN(128)
+ {
+ {# Note: Don't allocate stack for partition when using TFM_PSA_API if tfm_partition_ipc is false #}
+#if !defined(TFM_PSA_API)
+ . += {{manifest.manifest.stack_size}};
+#endif
+ } > RAM
+ Image$${{manifest.manifest.name}}_STACK$$ZI$$Base = ADDR(.{{manifest.manifest.name}}_STACK);
+ Image$${{manifest.manifest.name}}_STACK$$ZI$$Limit = ADDR(.{{manifest.manifest.name}}_STACK) + SIZEOF(.{{manifest.manifest.name}}_STACK);
+#endif
+ {% endif %}
+
{% if manifest.attr.conditional %}
#endif /* {{manifest.attr.conditional}} */
{% endif %}
@@ -453,12 +472,29 @@
Image$${{manifest.manifest.name}}_DATA$$ZI$$Base = ADDR(.{{manifest.manifest.name}}_BSS);
Image$${{manifest.manifest.name}}_DATA$$ZI$$Limit = ADDR(.{{manifest.manifest.name}}_BSS) + SIZEOF(.{{manifest.manifest.name}}_BSS);
+ {% if manifest.manifest.tfm_partition_ipc %}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
.{{manifest.manifest.name}}_STACK : ALIGN(128)
{
. += {{manifest.manifest.stack_size}};
} > RAM
Image$${{manifest.manifest.name}}_STACK$$ZI$$Base = ADDR(.{{manifest.manifest.name}}_STACK);
Image$${{manifest.manifest.name}}_STACK$$ZI$$Limit = ADDR(.{{manifest.manifest.name}}_STACK) + SIZEOF(.{{manifest.manifest.name}}_STACK);
+#endif
+ {% else %}
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
+ .{{manifest.manifest.name}}_STACK : ALIGN(128)
+ {
+ {# Note: Don't allocate stack for partition when using TFM_PSA_API if tfm_partition_ipc is false #}
+#if !defined(TFM_PSA_API)
+ . += {{manifest.manifest.stack_size}};
+#endif
+ } > RAM
+ Image$${{manifest.manifest.name}}_STACK$$ZI$$Base = ADDR(.{{manifest.manifest.name}}_STACK);
+ Image$${{manifest.manifest.name}}_STACK$$ZI$$Limit = ADDR(.{{manifest.manifest.name}}_STACK) + SIZEOF(.{{manifest.manifest.name}}_STACK);
+#endif
+ {% endif %}
+
{% if manifest.attr.conditional %}
#endif /* {{manifest.attr.conditional}} */
{% endif %}
diff --git a/platform/ext/target/mps2/an519/spm_hal.c b/platform/ext/target/mps2/an519/spm_hal.c
index 2ebac2e..a8c4ec5 100644
--- a/platform/ext/target/mps2/an519/spm_hal.c
+++ b/platform/ext/target/mps2/an519/spm_hal.c
@@ -63,8 +63,10 @@
REGION_DECLARE(Image$$, TFM_UNPRIV_CODE, $$RO$$Limit);
REGION_DECLARE(Image$$, TFM_UNPRIV_DATA, $$RW$$Base);
REGION_DECLARE(Image$$, TFM_UNPRIV_DATA, $$ZI$$Limit);
+#ifndef TFM_PSA_API
REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base);
REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit);
+#endif
#if TFM_LVL == 2
REGION_DECLARE(Image$$, TFM_APP_CODE_START, $$Base);
REGION_DECLARE(Image$$, TFM_APP_CODE_END, $$Base);
@@ -275,6 +277,7 @@
return SPM_ERR_OK;
}
+#if !defined(TFM_PSA_API)
/**
* Set share region to which the partition needs access
*/
@@ -328,7 +331,7 @@
return res;
}
-
+#endif /* !defined(TFM_PSA_API) */
#endif /* TFM_LVL != 1 */
void tfm_spm_hal_setup_isolation_hw(void)
diff --git a/platform/ext/target/mps2/an521/spm_hal.c b/platform/ext/target/mps2/an521/spm_hal.c
index ecb244b..6a8d7be 100644
--- a/platform/ext/target/mps2/an521/spm_hal.c
+++ b/platform/ext/target/mps2/an521/spm_hal.c
@@ -63,8 +63,10 @@
REGION_DECLARE(Image$$, TFM_UNPRIV_CODE, $$RO$$Limit);
REGION_DECLARE(Image$$, TFM_UNPRIV_DATA, $$RW$$Base);
REGION_DECLARE(Image$$, TFM_UNPRIV_DATA, $$ZI$$Limit);
+#ifndef TFM_PSA_API
REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base);
REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit);
+#endif
#if TFM_LVL == 2
REGION_DECLARE(Image$$, TFM_APP_CODE_START, $$Base);
REGION_DECLARE(Image$$, TFM_APP_CODE_END, $$Base);
@@ -275,6 +277,7 @@
return SPM_ERR_OK;
}
+#if !defined(TFM_PSA_API)
/**
* Set share region to which the partition needs access
*/
@@ -328,7 +331,7 @@
return res;
}
-
+#endif /* !defined(TFM_PSA_API) */
#endif /* TFM_LVL != 1 */
void tfm_spm_hal_setup_isolation_hw(void)
diff --git a/platform/ext/target/musca_a/spm_hal.c b/platform/ext/target/musca_a/spm_hal.c
index 85c4d76..11f618d 100644
--- a/platform/ext/target/musca_a/spm_hal.c
+++ b/platform/ext/target/musca_a/spm_hal.c
@@ -63,8 +63,10 @@
REGION_DECLARE(Image$$, TFM_UNPRIV_CODE, $$RO$$Limit);
REGION_DECLARE(Image$$, TFM_UNPRIV_DATA, $$RW$$Base);
REGION_DECLARE(Image$$, TFM_UNPRIV_DATA, $$ZI$$Limit);
+#ifndef TFM_PSA_API
REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base);
REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit);
+#endif
#if TFM_LVL == 2
REGION_DECLARE(Image$$, TFM_APP_CODE_START, $$Base);
REGION_DECLARE(Image$$, TFM_APP_CODE_END, $$Base);
@@ -275,6 +277,7 @@
return SPM_ERR_OK;
}
+#if !defined(TFM_PSA_API)
/**
* Set share region to which the partition needs access
*/
@@ -328,7 +331,7 @@
return res;
}
-
+#endif /* !defined(TFM_PSA_API) */
#endif /* TFM_LVL != 1 */
void tfm_spm_hal_setup_isolation_hw(void)
diff --git a/platform/ext/target/musca_a/target_cfg.c b/platform/ext/target/musca_a/target_cfg.c
index bd12d31..f02518a 100644
--- a/platform/ext/target/musca_a/target_cfg.c
+++ b/platform/ext/target/musca_a/target_cfg.c
@@ -231,10 +231,6 @@
SAU->RLAR = (PERIPHERALS_BASE_NS_END & SAU_RLAR_LADDR_Msk)
| SAU_RLAR_ENABLE_Msk;
- /* FIXME: Secondary image partition info comes from BL2. Configure SAU
- * based on those limits.
- */
-
/* Allows SAU to define the code region as a NSC */
struct spctrl_def* spctrl = CMSDK_SPCTRL;
spctrl->nsccfg |= NSCCFG_CODENSC;
diff --git a/platform/ext/target/musca_b1/spm_hal.c b/platform/ext/target/musca_b1/spm_hal.c
index 2d8f678..858c4d1 100644
--- a/platform/ext/target/musca_b1/spm_hal.c
+++ b/platform/ext/target/musca_b1/spm_hal.c
@@ -63,8 +63,10 @@
REGION_DECLARE(Image$$, TFM_UNPRIV_CODE, $$RO$$Limit);
REGION_DECLARE(Image$$, TFM_UNPRIV_DATA, $$RW$$Base);
REGION_DECLARE(Image$$, TFM_UNPRIV_DATA, $$ZI$$Limit);
+#ifndef TFM_PSA_API
REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base);
REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit);
+#endif
#if TFM_LVL == 2
REGION_DECLARE(Image$$, TFM_APP_CODE_START, $$Base);
REGION_DECLARE(Image$$, TFM_APP_CODE_END, $$Base);
@@ -275,6 +277,7 @@
return SPM_ERR_OK;
}
+#if !defined(TFM_PSA_API)
/**
* Set share region to which the partition needs access
*/
@@ -328,7 +331,7 @@
return res;
}
-
+#endif /* !defined(TFM_PSA_API) */
#endif /* TFM_LVL != 1 */
void tfm_spm_hal_setup_isolation_hw(void)
diff --git a/platform/include/tfm_spm_hal.h b/platform/include/tfm_spm_hal.h
index f1a82a0..3ce0b29 100644
--- a/platform/include/tfm_spm_hal.h
+++ b/platform/include/tfm_spm_hal.h
@@ -28,6 +28,7 @@
*/
struct tfm_spm_partition_platform_data_t;
+#if defined (TFM_PSA_API) || (TFM_LVL != 1)
/**
* \brief Holds SPM db fields that define the memory regions used by a
* partition.
@@ -57,6 +58,7 @@
uint32_t stack_bottom; /*!< The bottom of the stack for the partition. */
uint32_t stack_top; /*!< The top of the stack for the partition. */
};
+#endif
/**
* \brief This function initialises the HW used for isolation, and sets the
@@ -145,7 +147,7 @@
uint32_t tfm_spm_hal_get_ns_entry_point(void);
-#if TFM_LVL != 1
+#if (TFM_LVL != 1) && !defined(TFM_PSA_API)
/**
* \brief Configure the sandbox for a partition.
*