Platform: PSoC64: S-IRQ: Add plat_test.c
Derived from Musca B1 platform.
Please see the description in the two commits:
commit a9f8e9ec3fe6ab6969b95af31b0fc787d9959261
commit d3c7766b4703c9eeb8e5271c42dae29d188ebfe0
Change-Id: I2d57c6c8d54e0633caa30153bc2346e17e1bbba0
Signed-off-by: Alamy Liu <alamy.liu@cypress.com>
diff --git a/platform/ext/psoc64.cmake b/platform/ext/psoc64.cmake
index 0ea4694..b999332 100644
--- a/platform/ext/psoc64.cmake
+++ b/platform/ext/psoc64.cmake
@@ -185,6 +185,12 @@
embedded_include_directories(PATH "${PLATFORM_DIR}/common" ABSOLUTE)
endif()
+if (NOT DEFINED BUILD_PLAT_TEST)
+ message(FATAL_ERROR "Configuration variable BUILD_PLAT_TEST (true|false) is undefined!")
+elseif(BUILD_PLAT_TEST)
+ list(APPEND ALL_SRC_C "${PLATFORM_DIR}/target/cypress/psoc64/plat_test.c")
+endif()
+
if (NOT DEFINED BUILD_TARGET_HARDWARE_KEYS)
message(FATAL_ERROR "Configuration variable BUILD_TARGET_HARDWARE_KEYS (true|false) is undefined!")
elseif(BUILD_TARGET_HARDWARE_KEYS)
diff --git a/platform/ext/target/cypress/psoc64/plat_test.c b/platform/ext/target/cypress/psoc64/plat_test.c
new file mode 100644
index 0000000..868206a
--- /dev/null
+++ b/platform/ext/target/cypress/psoc64/plat_test.c
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2020, Cypress Semiconductor Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "cy_tcpwm_counter.h"
+#include "device_definition.h"
+#include "tfm_plat_defs.h"
+#include "tfm_plat_test.h"
+
+void tfm_plat_test_secure_timer_start(void)
+{
+ cy_en_tcpwm_status_t rc;
+
+ if (!CY_TCPWM0_TIMER0_DEV_S.is_initialized) {
+ Cy_TCPWM_Counter_Disable(
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num
+ );
+
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_config->period = TIMER0_MATCH;
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_config->compare0 = TIMER0_MATCH;
+ rc = Cy_TCPWM_Counter_Init(CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num,
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_config);
+ if (rc == CY_TCPWM_SUCCESS) {
+ CY_TCPWM0_TIMER0_DEV_S.is_initialized = true;
+ } else {
+ return;
+ }
+ }
+ Cy_TCPWM_Counter_Enable(
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num
+ );
+ Cy_TCPWM_TriggerStart(
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
+ (1UL << CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num)
+ );
+}
+
+void tfm_plat_test_secure_timer_stop(void)
+{
+ Cy_TCPWM_Counter_Disable(
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
+ CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num
+ );
+}
+
+void tfm_plat_test_non_secure_timer_start(void)
+{
+ cy_en_tcpwm_status_t rc;
+
+ if (!CY_TCPWM0_TIMER1_DEV_NS.is_initialized) {
+ Cy_TCPWM_Counter_Disable(
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_base,
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_counter_num
+ );
+
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_config->period = TIMER1_MATCH;
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_config->compare0 = TIMER1_MATCH;
+ rc = Cy_TCPWM_Counter_Init(CY_TCPWM0_TIMER1_DEV_NS.tcpwm_base,
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_counter_num,
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_config);
+ if (rc == CY_TCPWM_SUCCESS) {
+ CY_TCPWM0_TIMER1_DEV_NS.is_initialized = true;
+ } else {
+ return;
+ }
+ }
+ Cy_TCPWM_Counter_Enable(
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_base,
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_counter_num
+ );
+ Cy_TCPWM_TriggerStart(
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_base,
+ (1UL << CY_TCPWM0_TIMER1_DEV_NS.tcpwm_counter_num)
+ );
+}
+
+void tfm_plat_test_non_secure_timer_stop(void)
+{
+ Cy_TCPWM_Counter_Disable(
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_base,
+ CY_TCPWM0_TIMER1_DEV_NS.tcpwm_counter_num
+ );
+}