commit ab39c71223e036739fa24cf7dc849c4f3a1c76a8
author Kevin Peng <kevin.peng@arm.com> Wed Dec 28 11:25:16 2022 +0800
committer Kevin Peng <kevin.peng@arm.com> Wed Dec 28 11:31:36 2022 +0800
tree a96b8c4568a6affa955f4fb9bf86385abe3f714d
parent 5aa1f4634806ed953cfda0d1d1083fe9fa827717

Platform: Fix the Veneer SAU region for Arm platforms

Because the bits [4:0] of the SAU.LADDR are defined as 0x1F, the limit
address of SAU regions can not be written to the registers directly.
Otherwise, the region might include more than expected.

This patch fixes the veneer region limit addresses for Arm platforms.

Change-Id: I2692f3188a7bf982cc49b94329b2cb3f2c0f7618
Signed-off-by: Kevin Peng <kevin.peng@arm.com>

platform/ext/target/arm/mps2/an519/target_cfg.c

diff --git a/platform/ext/target/arm/mps2/an519/target_cfg.c b/platform/ext/target/arm/mps2/an519/target_cfg.c
index e8940e2..86714b7 100644
--- a/platform/ext/target/arm/mps2/an519/target_cfg.c
+++ b/platform/ext/target/arm/mps2/an519/target_cfg.c
@@ -262,7 +262,7 @@
     },
     {
         (uint32_t)&REGION_NAME(Image$$, ER_VENEER, $$Base),
-        (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit),
+        (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit) - 1,
         true,
     },
     {

platform/ext/target/arm/mps2/an521/target_cfg.c

diff --git a/platform/ext/target/arm/mps2/an521/target_cfg.c b/platform/ext/target/arm/mps2/an521/target_cfg.c
index f17ea04..51e3f94 100644
--- a/platform/ext/target/arm/mps2/an521/target_cfg.c
+++ b/platform/ext/target/arm/mps2/an521/target_cfg.c
@@ -336,7 +336,7 @@
     },
     {
         (uint32_t)&REGION_NAME(Image$$, ER_VENEER, $$Base),
-        (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit),
+        (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit) - 1,
         true,
     },
     {

platform/ext/target/arm/mps3/an524/target_cfg.c

diff --git a/platform/ext/target/arm/mps3/an524/target_cfg.c b/platform/ext/target/arm/mps3/an524/target_cfg.c
index f193019..3d4fe66 100644
--- a/platform/ext/target/arm/mps3/an524/target_cfg.c
+++ b/platform/ext/target/arm/mps3/an524/target_cfg.c
@@ -61,7 +61,7 @@
         (uint32_t)&REGION_NAME(Image$$, ER_VENEER, $$Base),
 
     .veneer_limit =
-        (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit),
+        (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit) - 1,
 
 #ifdef BL2
     .secondary_partition_base =

platform/ext/target/arm/mps3/an547/target_cfg.c

diff --git a/platform/ext/target/arm/mps3/an547/target_cfg.c b/platform/ext/target/arm/mps3/an547/target_cfg.c
index 23650c3..c3a4d7d 100644
--- a/platform/ext/target/arm/mps3/an547/target_cfg.c
+++ b/platform/ext/target/arm/mps3/an547/target_cfg.c
@@ -47,7 +47,7 @@
         NS_PARTITION_SIZE - 1,
 
     .veneer_base = (uint32_t)&REGION_NAME(Image$$, ER_VENEER, $$Base),
-    .veneer_limit = (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit),
+    .veneer_limit = (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit) - 1,
 };
 
 /* Configures the RAM region to NS callable in sacfg block's nsccfg register */

platform/ext/target/arm/mps3/an552/target_cfg.c

diff --git a/platform/ext/target/arm/mps3/an552/target_cfg.c b/platform/ext/target/arm/mps3/an552/target_cfg.c
index c80ad5c..340804f 100644
--- a/platform/ext/target/arm/mps3/an552/target_cfg.c
+++ b/platform/ext/target/arm/mps3/an552/target_cfg.c
@@ -47,7 +47,7 @@
         NS_PARTITION_SIZE - 1,
 
     .veneer_base = (uint32_t)&REGION_NAME(Image$$, ER_VENEER, $$Base),
-    .veneer_limit = (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit),
+    .veneer_limit = (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit) - 1,
 };
 
 /* Configures the RAM region to NS callable in sacfg block's nsccfg register */

platform/ext/target/arm/mps3/corstone310/common/target_cfg.c

diff --git a/platform/ext/target/arm/mps3/corstone310/common/target_cfg.c b/platform/ext/target/arm/mps3/corstone310/common/target_cfg.c
index 1b8d388..b7c0caf 100644
--- a/platform/ext/target/arm/mps3/corstone310/common/target_cfg.c
+++ b/platform/ext/target/arm/mps3/corstone310/common/target_cfg.c
@@ -47,7 +47,7 @@
         NS_PARTITION_SIZE - 1,
 
     .veneer_base = (uint32_t)&REGION_NAME(Image$$, ER_VENEER, $$Base),
-    .veneer_limit = (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit),
+    .veneer_limit = (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit) - 1,
 };
 
 /* Configures the RAM region to NS callable in sacfg block's nsccfg register */

platform/ext/target/arm/musca_b1/target_cfg.c

diff --git a/platform/ext/target/arm/musca_b1/target_cfg.c b/platform/ext/target/arm/musca_b1/target_cfg.c
index e903cdd..576ca9b 100755
--- a/platform/ext/target/arm/musca_b1/target_cfg.c
+++ b/platform/ext/target/arm/musca_b1/target_cfg.c
@@ -47,7 +47,7 @@
         (uint32_t)&REGION_NAME(Image$$, ER_VENEER, $$Base),
 
     .veneer_limit =
-        (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit),
+        (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit) - 1,
 };
 
 /* Allows software, via SAU, to define the code region as a NSC */

platform/ext/target/arm/musca_s1/target_cfg.c

diff --git a/platform/ext/target/arm/musca_s1/target_cfg.c b/platform/ext/target/arm/musca_s1/target_cfg.c
index 7557d69..425893b 100644
--- a/platform/ext/target/arm/musca_s1/target_cfg.c
+++ b/platform/ext/target/arm/musca_s1/target_cfg.c
@@ -49,7 +49,7 @@
         (uint32_t)&REGION_NAME(Image$$, ER_VENEER, $$Base),
 
     .veneer_limit =
-        (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit),
+        (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit) - 1,
 };
 
 /* Allows software, via SAU, to define the code region as a NSC */

platform/ext/target/arm/rss/common/target_cfg.c

diff --git a/platform/ext/target/arm/rss/common/target_cfg.c b/platform/ext/target/arm/rss/common/target_cfg.c
index ee8e0f6..b88865f 100644
--- a/platform/ext/target/arm/rss/common/target_cfg.c
+++ b/platform/ext/target/arm/rss/common/target_cfg.c
@@ -49,7 +49,7 @@
 
 #ifndef TFM_MULTI_CORE_TOPOLOGY
     .veneer_base = (uint32_t)&REGION_NAME(Image$$, ER_VENEER, $$Base),
-    .veneer_limit = (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit),
+    .veneer_limit = (uint32_t)&REGION_NAME(Image$$, VENEER_ALIGN, $$Limit) - 1,
 #endif
 };