Platform: RSS: Improve ATU mapping
Makes the following improvements to the way ATU regions are mapped in
RSS:
- Map UART at the end of the ATU window using the highest region
number to minimise its impact on other regions, since it is only
present for debug purposes.
- Open the host boot image regions only for the period that each image
is being loaded. Also means the same region number can be reused,
but unfortunately not the logical address since MCUBoot will not
permit multiple images with the same load address.
- Move host addresses to host_base_address.h so that they can easily
be replaced for different RSS integrations.
Change-Id: I5f99128d10baae6fb525bb4f7c2ef5c93a342594
Signed-off-by: Jamie Fox <jamie.fox@arm.com>
diff --git a/docs/platform/arm/rss/readme.rst b/docs/platform/arm/rss/readme.rst
index abc2d2f..c676598 100644
--- a/docs/platform/arm/rss/readme.rst
+++ b/docs/platform/arm/rss/readme.rst
@@ -56,9 +56,13 @@
<binary infile> \
<signed binary outfile>
-The ``load address`` is the address to which BL2 will load the image. The RSS
-ATU should be configured to map this logical address to the physical address in
-the host system that the image needs to be loaded to.
+The ``load address`` is the logical address in the RSS memory map to which BL2
+will load the image. RSS FW expects the first host image to be loaded to address
+``0x70000000`` (the beginning of the RSS ATU host access region), and each
+subsequent host image to be loaded at an offset of ``0x100000`` from the
+previous image. The RSS ATU should be configured to map these logical addresses
+to the physical addresses in the host system that the images need to be loaded
+to.
For more information on the ``imgtool`` parameters, see the MCUBoot
`imgtool documentation <https://docs.mcuboot.com/imgtool.html>`_.
diff --git a/platform/ext/target/arm/rss/bl1/boot_hal_bl1.c b/platform/ext/target/arm/rss/bl1/boot_hal_bl1.c
index de51f84..9b48396 100644
--- a/platform/ext/target/arm/rss/bl1/boot_hal_bl1.c
+++ b/platform/ext/target/arm/rss/bl1/boot_hal_bl1.c
@@ -10,6 +10,7 @@
#include "device_definition.h"
#include "Driver_Flash.h"
#include "flash_layout.h"
+#include "host_base_address.h"
#include "platform_base_address.h"
#include "uart_stdout.h"
@@ -18,42 +19,14 @@
REGION_DECLARE(Image$$, ARM_LIB_STACK, $$ZI$$Base);
-/* ATU config */
-#define ATU_UART_LOG_ADDRESS UART0_BASE_NS
-#define ATU_UART_PHYS_ADDRESS ((uint64_t)0x2A400000)
-#define ATU_UART_REGION_SIZE 0x2000 /* 8KB */
-
-#define ATU_SCP_SRAM_LOG_ADDRESS SCP_SRAM_BASE_S
-#define ATU_SCP_SRAM_PHYS_ADDRESS ((uint64_t)0x40000000)
-#define ATU_SCP_SRAM_REGION_SIZE SCP_BL1_SIZE /* 64KB */
-
-#define ATU_AP_SRAM_LOG_ADDRESS AP_SRAM_BASE_S
-#define ATU_AP_SRAM_PHYS_ADDRESS ((uint64_t)0x0)
-#define ATU_AP_SRAM_REGION_SIZE AP_BL1_SIZE /* 128KB */
-
static int32_t init_atu_regions(void)
{
enum atu_error_t err;
/* Initialize UART region */
- err = atu_initialize_region(&ATU_DEV_S, 0, ATU_UART_LOG_ADDRESS,
- ATU_UART_PHYS_ADDRESS, ATU_UART_REGION_SIZE);
- if (err != ATU_ERR_NONE) {
- return 1;
- }
-
- /* Initialize SCP region */
- err = atu_initialize_region(&ATU_DEV_S, 1, ATU_SCP_SRAM_LOG_ADDRESS,
- ATU_SCP_SRAM_PHYS_ADDRESS,
- ATU_SCP_SRAM_REGION_SIZE);
- if (err != ATU_ERR_NONE) {
- return 1;
- }
-
- /* Initialize AP region */
- err = atu_initialize_region(&ATU_DEV_S, 2, ATU_AP_SRAM_LOG_ADDRESS,
- ATU_AP_SRAM_PHYS_ADDRESS,
- ATU_AP_SRAM_REGION_SIZE);
+ err = atu_initialize_region(&ATU_DEV_S,
+ get_supported_region_count(&ATU_DEV_S) - 1,
+ UART0_BASE_NS, HOST_UART_BASE, HOST_UART_SIZE);
if (err != ATU_ERR_NONE) {
return 1;
}
diff --git a/platform/ext/target/arm/rss/bl2/boot_hal_bl2.c b/platform/ext/target/arm/rss/bl2/boot_hal_bl2.c
index ece5c65..7d2e8f8 100644
--- a/platform/ext/target/arm/rss/bl2/boot_hal_bl2.c
+++ b/platform/ext/target/arm/rss/bl2/boot_hal_bl2.c
@@ -11,6 +11,7 @@
#include "bootutil/bootutil_log.h"
#include "device_definition.h"
+#include "host_base_address.h"
#include "platform_regs.h"
#include "platform_base_address.h"
#ifdef CRYPTO_HW_ACCELERATOR
@@ -49,29 +50,70 @@
return 0;
}
+int boot_platform_pre_load(uint32_t image_id)
+{
+ enum atu_error_t err;
+
+ if (image_id == 3) {
+ /* Initialize SCP ATU region */
+ err = atu_initialize_region(&ATU_DEV_S, 0, HOST_BOOT1_LOAD_BASE_S,
+ SCP_BL1_SRAM_BASE, SCP_BL1_SIZE);
+ if (err != ATU_ERR_NONE) {
+ return 1;
+ }
+
+ } else if (image_id == 2) {
+ /* Initialize AP ATU region */
+ err = atu_initialize_region(&ATU_DEV_S, 0, HOST_BOOT0_LOAD_BASE_S,
+ AP_BL1_SRAM_BASE, AP_BL1_SIZE);
+ if (err != ATU_ERR_NONE) {
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
int boot_platform_post_load(uint32_t image_id)
{
+ enum atu_error_t err;
+
/* FIXME: provide enum for image_ids */
if (image_id == 3) {
+ uint32_t channel_stat = 0;
struct rss_sysctrl_t *sysctrl =
(struct rss_sysctrl_t *)RSS_SYSCTRL_BASE_S;
/* Remove the image header and move the image to the start of SCP memory
* FIXME: Would be better to set SCP VTOR, but not currently possible
*/
- memmove((void *)SCP_SRAM_BASE_S,
- (void *)(SCP_SRAM_BASE_S + BL2_HEADER_SIZE),
+ memmove((void *)HOST_BOOT1_LOAD_BASE_S,
+ (void *)(HOST_BOOT1_LOAD_BASE_S + BL2_HEADER_SIZE),
SCP_BL1_SIZE - BL2_HEADER_SIZE);
/* Release SCP CPU from wait */
sysctrl->gretreg = 0x1;
+
+ /* Close SCP ATU region */
+ err = atu_uninitialize_region(&ATU_DEV_S, 0);
+ if (err != ATU_ERR_NONE) {
+ return 1;
+ }
+
+ /* Wait for SCP to finish its startup */
BOOT_LOG_INF("Waiting for SCP BL1 started event");
- uint32_t channel_stat = 0;
while (channel_stat == 0) {
mhu_v2_x_channel_receive(&MHU_SCP_TO_RSS_DEV, 0, &channel_stat);
}
BOOT_LOG_INF("Got SCP BL1 started event");
+
} else if (image_id == 2) {
+ /* Close AP ATU region */
+ err = atu_uninitialize_region(&ATU_DEV_S, 0);
+ if (err != ATU_ERR_NONE) {
+ return 1;
+ }
+
BOOT_LOG_INF("Telling SCP to start AP cores");
mhu_v2_x_initiate_transfer(&MHU_RSS_TO_SCP_DEV);
/* Slot 0 is used in the SCP protocol */
diff --git a/platform/ext/target/arm/rss/bl2/flash_map_bl2.c b/platform/ext/target/arm/rss/bl2/flash_map_bl2.c
index e308985..e5400dc 100644
--- a/platform/ext/target/arm/rss/bl2/flash_map_bl2.c
+++ b/platform/ext/target/arm/rss/bl2/flash_map_bl2.c
@@ -8,6 +8,7 @@
#include "flash_map/flash_map.h"
#include "target.h"
#include "Driver_Flash.h"
+#include "host_base_address.h"
#define ARRAY_SIZE(arr) (sizeof(arr)/sizeof((arr)[0]))
@@ -96,11 +97,11 @@
*exec_ram_size = NON_SECURE_IMAGE_MAX_SIZE;
rc = 0;
} else if (image_id == 2) {
- *exec_ram_start = AP_SRAM_BASE_S;
+ *exec_ram_start = HOST_BOOT0_LOAD_BASE_S;
*exec_ram_size = AP_BL1_SIZE;
rc = 0;
} else if (image_id == 3) {
- *exec_ram_start = SCP_SRAM_BASE_S;
+ *exec_ram_start = HOST_BOOT1_LOAD_BASE_S;
*exec_ram_size = SCP_BL1_SIZE;
rc = 0;
}
diff --git a/platform/ext/target/arm/rss/partition/host_base_address.h b/platform/ext/target/arm/rss/partition/host_base_address.h
new file mode 100644
index 0000000..fad2a40
--- /dev/null
+++ b/platform/ext/target/arm/rss/partition/host_base_address.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * \file host_base_address.h
+ * \brief This file defines the host memory map addresses accessed by RSS.
+ */
+
+#ifndef __HOST_BASE_ADDRESS_H__
+#define __HOST_BASE_ADDRESS_H__
+
+/* Host addresses */
+#define AP_BL1_SRAM_BASE 0x0UL /* AP initial boot SRAM base address */
+#define AP_BL1_SIZE 0x20000U /* 128KB */
+
+#define SCP_BL1_SRAM_BASE 0x40000000UL /* SCP initial boot SRAM base address */
+#define SCP_BL1_SIZE 0x10000U /* 64KB */
+
+#define HOST_UART_BASE 0x2A400000UL /* Host UART base address */
+#define HOST_UART_SIZE 0x2000U /* 8KB */
+
+#endif /* __HOST_BASE_ADDRESS_H__ */
diff --git a/platform/ext/target/arm/rss/partition/platform_base_address.h b/platform/ext/target/arm/rss/partition/platform_base_address.h
index 0b0b57e..a9fdc52 100644
--- a/platform/ext/target/arm/rss/partition/platform_base_address.h
+++ b/platform/ext/target/arm/rss/partition/platform_base_address.h
@@ -65,7 +65,8 @@
/* Non-Secure Host region */
#define HOST_ACCESS_BASE_NS 0x60000000 /* Can access the Host region based on ATU config */
#define HOST_ACCESS_LIMIT_NS (HOST_ACCESS_BASE_NS + HOST_ACCESS_SIZE - 1)
-#define UART0_BASE_NS (HOST_ACCESS_BASE_NS + 0x0A400000) /* UART 0 Non-Secure base address */
+/* ATU regions open in bootloader and runtime */
+#define UART0_BASE_NS (HOST_ACCESS_BASE_NS + 0xFF00000) /* UART 0 Non-Secure base address */
/* Secure memory map addresses */
#define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */
@@ -122,11 +123,11 @@
/* Secure Host region */
#define HOST_ACCESS_BASE_S 0x70000000 /* Can access the Host region based on ATU config */
#define HOST_ACCESS_LIMIT_S (HOST_ACCESS_BASE_S + HOST_ACCESS_SIZE - 1)
-#define UART0_BASE_S (HOST_ACCESS_BASE_S + 0x0A400000) /* UART 0 Secure base address */
-#define SCP_SRAM_BASE_S HOST_ACCESS_BASE_S
-#define SCP_BL1_SIZE 0x10000
-#define AP_SRAM_BASE_S (SCP_SRAM_BASE_S + SCP_BL1_SIZE)
-#define AP_BL1_SIZE 0x20000
+/* ATU regions open in bootloader and runtime */
+#define UART0_BASE_S (HOST_ACCESS_BASE_S + 0xFF00000) /* UART 0 Secure base address */
+/* ATU regions open in BL2 */
+#define HOST_BOOT0_LOAD_BASE_S HOST_ACCESS_BASE_S /* Host boot image 0 base address */
+#define HOST_BOOT1_LOAD_BASE_S (HOST_ACCESS_BASE_S + 0x100000) /* Host boot image 1 base address */
/* Memory map addresses exempt from memory attribution by both the SAU and IDAU */
#define RSS_EWIC_BASE 0xE0047000 /* External Wakeup Interrupt Controller