Platform: Add system reset hal function in SPM
Add tfm_spm_hal_system_reset() function which is used by SPM to reset
the system.
All platforms have the same implementation except for Musca-B1.
Change-Id: I1fe34d9026b9ec35bf981ea9fc6b5a92d391ed58
Signed-off-by: Edison Ai <edison.ai@arm.com>
diff --git a/platform/ext/common/tfm_platform.c b/platform/ext/common/tfm_platform.c
index 48e56f1..eabe3a4 100644
--- a/platform/ext/common/tfm_platform.c
+++ b/platform/ext/common/tfm_platform.c
@@ -26,3 +26,8 @@
return TFM_PLAT_ERR_SUCCESS;
}
+
+__WEAK void tfm_spm_hal_system_reset(void)
+{
+ NVIC_SystemReset();
+}
diff --git a/platform/ext/target/musca_b1/spm_hal.c b/platform/ext/target/musca_b1/spm_hal.c
index b828625..a7fd7a1 100644
--- a/platform/ext/target/musca_b1/spm_hal.c
+++ b/platform/ext/target/musca_b1/spm_hal.c
@@ -278,6 +278,23 @@
return system_reset_cfg();
}
+void tfm_spm_hal_system_reset(void)
+{
+ __disable_irq();
+ mpc_revert_non_secure_to_secure_cfg();
+
+ NVIC->ICPR[0] = UINT32_MAX; /* Clear all pending interrupts */
+ NVIC->ICPR[1] = UINT32_MAX; /* Clear all pending interrupts */
+ NVIC->ICPR[2] = UINT32_MAX; /* Clear all pending interrupts */
+ NVIC->ICPR[3] = UINT32_MAX; /* Clear all pending interrupts */
+ NVIC->ICPR[4] = UINT32_MAX; /* Clear all pending interrupts */
+ NVIC->ICPR[5] = UINT32_MAX; /* Clear all pending interrupts */
+ NVIC->ICPR[6] = UINT32_MAX; /* Clear all pending interrupts */
+ NVIC->ICPR[7] = UINT32_MAX; /* Clear all pending interrupts */
+
+ NVIC_SystemReset();
+}
+
enum tfm_plat_err_t tfm_spm_hal_init_debug(void)
{
return init_debug();
diff --git a/platform/include/tfm_spm_hal.h b/platform/include/tfm_spm_hal.h
index 14a4a27..1bc2626 100644
--- a/platform/include/tfm_spm_hal.h
+++ b/platform/include/tfm_spm_hal.h
@@ -160,6 +160,11 @@
enum tfm_plat_err_t tfm_spm_hal_system_reset_cfg(void);
/**
+ * \brief System reset
+ */
+void tfm_spm_hal_system_reset(void);
+
+/**
* \brief Configures all external interrupts to target the
* NS state, apart for the ones associated to secure
* peripherals (plus MPC and PPC)