SPM: Add MVE support for GNUARM toolchain
Add MVE support based on FPU.
1. Enable FPU usage by CONFIG_TFM_ENABLE_FP.
2. Enable Integer Vector Extension (MVE-I) usage by
CONFIG_TFM_ENABLE_MVE.
3. Enable Floating-point Vector Extension (MVE-F) support by
CONFIG_TFM_ENABLE_MVE_FP.
4. Rename CONFIG_TFM_ENABLE_FPU to CONFIG_TFM_ENABLE_CP10CP11
to cover both coprocessor types.
5. TFM_SYSTEM_MVE deleted.
Change-Id: Iece96c2e49c879fcde0af26f28480cf13ffc7028
Signed-off-by: Gabor Toth <gabor.toth@arm.com>
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 00f0393..32af4d0 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -16,9 +16,6 @@
# Configure TFM_PLATFORM
include(${CMAKE_SOURCE_DIR}/config/tfm_platform.cmake)
-if(TFM_SYSTEM_MVE)
- message(FATAL_ERROR "Hardware MVE is currently not supported in TF-M")
-endif()
if(TFM_SYSTEM_DSP)
message(FATAL_ERROR "Hardware DSP is currently not supported in TF-M")
endif()
diff --git a/config/check_config.cmake b/config/check_config.cmake
index 8b6dadb..56ce259 100644
--- a/config/check_config.cmake
+++ b/config/check_config.cmake
@@ -51,15 +51,6 @@
tfm_invalid_config(TEST_PSA_API STREQUAL "STORAGE" AND NOT TFM_PARTITION_INTERNAL_TRUSTED_STORAGE)
tfm_invalid_config(TEST_PSA_API STREQUAL "STORAGE" AND NOT TFM_PARTITION_PROTECTED_STORAGE)
-########################## FPU ################################################
-
-tfm_invalid_config(NOT (CONFIG_TFM_FP STREQUAL "soft" OR CONFIG_TFM_FP STREQUAL "hard"))
-tfm_invalid_config(NOT CMAKE_C_COMPILER_ID STREQUAL "GNU" AND CONFIG_TFM_FP STREQUAL "hard")
-tfm_invalid_config((NOT CONFIG_TFM_FP_ARCH) AND CONFIG_TFM_FP STREQUAL "hard")
-tfm_invalid_config((NOT TFM_PSA_API) AND CONFIG_TFM_FP STREQUAL "hard")
-tfm_invalid_config(CONFIG_TFM_FP STREQUAL "soft" AND CONFIG_TFM_LAZY_STACKING)
-tfm_invalid_config(CONFIG_TFM_FP STREQUAL "hard" AND NOT CONFIG_TFM_ENABLE_FPU)
-
########################## BL1 #################################################
tfm_invalid_config((BL1 AND PLATFORM_DEFAULT_BL1 AND CONFIG_TFM_BOOT_STORE_MEASUREMENTS) AND NOT TFM_PARTITION_MEASURED_BOOT)
diff --git a/config/config_default.cmake b/config/config_default.cmake
index 4441143..e84d34a 100755
--- a/config/config_default.cmake
+++ b/config/config_default.cmake
@@ -60,11 +60,6 @@
set(CONFIG_TFM_HALT_ON_CORE_PANIC OFF CACHE BOOL "On fatal errors in the secure firmware, halt instead of rebooting.")
-set(CONFIG_TFM_FP "soft" CACHE STRING "FP ABI type in SPE and NSPE: soft-Software ABI, hard-Hardware ABI. This configuration applies to both SPE and TF-M tests NSPE, and needs to be hard when enabling TF-M S/NS FPU tests.")
-set(CONFIG_TFM_LAZY_STACKING OFF CACHE BOOL "Enable/disable lazy stacking")
-
-set(CONFIG_TFM_ENABLE_FPU OFF CACHE BOOL "Make FPU operational when SPE and/or NSPE require FPU usage. This alone only enables the FPU coprocessors, whereas CONFIG_TFM_FP=hard compiles the code with hardware FP instructions and ABI.")
-
set(CONFIG_TFM_DOORBELL_API ON CACHE BOOL "Enable the doorbell APIs")
set(CONFIG_TFM_STACK_WATERMARKS OFF CACHE BOOL "Whether to pre-fill partition stacks with a set value to help determine stack usage")
@@ -204,7 +199,3 @@
########################## FIH #################################################
set_property(CACHE TFM_FIH_PROFILE PROPERTY STRINGS "OFF;LOW;MEDIUM;HIGH")
-
-########################## FP #################################################
-
-set_property(CACHE CONFIG_TFM_FP PROPERTY STRINGS "soft;hard")
diff --git a/config/cp_check.cmake b/config/cp_check.cmake
index 8e4989a..57969f6 100644
--- a/config/cp_check.cmake
+++ b/config/cp_check.cmake
@@ -5,11 +5,19 @@
#
#-------------------------------------------------------------------------------
+########################## FPU and MVE #########################################
+
+tfm_invalid_config(NOT CMAKE_C_COMPILER_ID STREQUAL "GNU" AND (CONFIG_TFM_ENABLE_FP OR CONFIG_TFM_ENABLE_MVE OR CONFIG_TFM_ENABLE_MVE_FP))
+tfm_invalid_config((NOT CONFIG_TFM_FP_ARCH) AND (CONFIG_TFM_ENABLE_FP OR CONFIG_TFM_ENABLE_MVE_FP))
+tfm_invalid_config((NOT TFM_PSA_API) AND (CONFIG_TFM_ENABLE_FP OR CONFIG_TFM_ENABLE_MVE OR CONFIG_TFM_ENABLE_MVE_FP))
+tfm_invalid_config((NOT CONFIG_TFM_ENABLE_FP AND NOT CONFIG_TFM_ENABLE_MVE AND NOT CONFIG_TFM_ENABLE_MVE_FP) AND CONFIG_TFM_LAZY_STACKING)
+tfm_invalid_config((CONFIG_TFM_ENABLE_FP OR CONFIG_TFM_ENABLE_MVE OR CONFIG_TFM_ENABLE_MVE_FP) AND NOT CONFIG_TFM_ENABLE_CP10CP11)
+
###################### Check compiler for FP vulnerability #####################
# Check compiler with mitigation for the VLLDM instruction security vulnerability or not.
# For more information, please check https://developer.arm.com/support/arm-security-updates/vlldm-instruction-security-vulnerability.
-if (CONFIG_TFM_FP STREQUAL "hard")
+if (CONFIG_TFM_FLOAT_ABI STREQUAL "hard")
# Create test C file.
file(WRITE ${CMAKE_CURRENT_BINARY_DIR}/cvetest.c "int x;")
# Compile with mitigation -mfix-cmse-cve-2021-35465.
diff --git a/config/cp_config_default.cmake b/config/cp_config_default.cmake
index 8fcebaa..d9874a5 100644
--- a/config/cp_config_default.cmake
+++ b/config/cp_config_default.cmake
@@ -5,14 +5,19 @@
#
#-------------------------------------------------------------------------------
-################################### FP ########################################
+set(CONFIG_TFM_ENABLE_FP OFF CACHE BOOL "Enable/disable FP usage")
+set(CONFIG_TFM_ENABLE_MVE OFF CACHE BOOL "Enable/disable integer MVE usage")
+set(CONFIG_TFM_ENABLE_MVE_FP OFF CACHE BOOL "Enable/disable floating-point MVE usage")
-if (NOT DEFINED CONFIG_TFM_FP_ARCH)
- set(CONFIG_TFM_FP_ARCH "")
- return()
+if (CONFIG_TFM_ENABLE_FP OR CONFIG_TFM_ENABLE_MVE OR CONFIG_TFM_ENABLE_MVE_FP)
+ # Set float abi to enable hardware floating-point instructions and hardware floating-point linkage.
+ set(CONFIG_TFM_FLOAT_ABI "hard")
+ set(CONFIG_TFM_ENABLE_CP10CP11 ON CACHE BOOL "Make FPU and MVE operational when SPE and/or NSPE require FPU or MVE usage. This alone only enables the coprocessors CP10-CP11, whereas CONFIG_TFM_FLOAT_ABI=hard along with CONFIG_TFM_ENABLE_FP, CONFIG_TFM_ENABLE_MVE or CONFIG_TFM_ENABLE_MVE_FP compiles the code with hardware FP or MVE instructions and ABI.")
+ set(CONFIG_TFM_LAZY_STACKING ON CACHE BOOL "Enable/disable lazy stacking")
+else()
+ # Set float abi soft, meaning software library functions for floating-point operations and software floating-point linkage.
+ set(CONFIG_TFM_FLOAT_ABI "soft")
+ set(CONFIG_TFM_ENABLE_CP10CP11 OFF CACHE BOOL "Make FPU and MVE operational when SPE and/or NSPE require FPU or MVE usage. This alone only enables the coprocessors CP10-CP11, whereas CONFIG_TFM_FLOAT_ABI=hard along with CONFIG_TFM_ENABLE_FP, CONFIG_TFM_ENABLE_MVE or CONFIG_TFM_ENABLE_MVE_FP compiles the code with hardware FP or MVE instructions and ABI.")
+ set(CONFIG_TFM_LAZY_STACKING OFF CACHE BOOL "Enable/disable lazy stacking")
endif()
-if (CONFIG_TFM_FP STREQUAL "hard")
- set(CONFIG_TFM_LAZY_STACKING ON CACHE BOOL "Enable lazy stacking")
- set(CONFIG_TFM_ENABLE_FPU ON CACHE BOOL "Permit TrustZone NSPE access to FPU")
-endif()
diff --git a/docs/integration_guide/tfm_fpu_support.rst b/docs/integration_guide/tfm_fpu_support.rst
index 53eb717..cde89dd 100644
--- a/docs/integration_guide/tfm_fpu_support.rst
+++ b/docs/integration_guide/tfm_fpu_support.rst
@@ -16,7 +16,7 @@
security vulnerability [4]_.
* Support Inter-Process Communication (IPC) [5]_ model in TF-M, and doesn't
support LIBRARY or SFN model.
-* Support Armv8.0-M mainline.
+* Support Armv8-M mainline.
* Support isolation level 1,2,3.
* Does not support use FPU in First-Level Interrupt Handling (FLIH) [6]_ at
current stage.
@@ -27,7 +27,7 @@
.. Note::
Alternatively, if you intend to use FP in your own NSPE application but the
TF-M SPE services that you enable do not require FP, you can set the CMake
- configuration ``CONFIG_TFM_ENABLE_FPU`` to ``ON`` and **ignore** any
+ configuration ``CONFIG_TFM_ENABLE_CP10CP11`` to ``ON`` and **ignore** any
configurations described below.
.. Note::
@@ -63,22 +63,24 @@
===================================
The following CMake configurations configure ``COMPILER_CP_FLAG`` in TF-M SPE.
-* ``CONFIG_TFM_FP`` are used to configure FP ABI type for secure and non-secure
- side both.
+* ``CONFIG_TFM_ENABLE_FP`` is used to enable/disable FPU usage.
- +-------------------+---------------------------+
- | CONFIG_TFM_FP | FP ABI type [2]_ [3]_ |
- +===================+===========================+
- | soft (default) | Software |
- +-------------------+---------------------------+
- | hard | Hardware |
- +-------------------+---------------------------+
-
- FP software ABI type is default in TF-M.
+ +--------------------------+---------------------------+
+ | CONFIG_TFM_ENABLE_FP | FP support |
+ +==========================+===========================+
+ | off (default) | FP diasabled |
+ +--------------------------+---------------------------+
+ | on | FP enabled |
+ +--------------------------+---------------------------+
.. Note::
- If you build TF-M SPE with ``CONFIG_TFM_FP=hard`` and provide your own NSPE
- application, your own NSPE **must** take care of enabling floating point
+ ``CONFIG_TFM_FLOAT_ABI`` depends on ``CONFIG_TFM_ENABLE_FP``. If
+ ``CONFIG_TFM_ENABLE_FP is set ``CONFIG_TFM_FLOAT_ABI`` is automatically
+ set to ``hard``.
+
+.. Note::
+ If you build TF-M SPE with ``CONFIG_TFM_ENABLE_FP=on`` and provide your own
+ NSPE application, your own NSPE **must** take care of enabling floating point
coprocessors CP10 and CP11 on the NS side to avoid aforementioned NOCP usage
fault.
diff --git a/interface/include/config_impl.h.template b/interface/include/config_impl.h.template
index 214f928..a635514 100644
--- a/interface/include/config_impl.h.template
+++ b/interface/include/config_impl.h.template
@@ -58,7 +58,7 @@
#endif /* CONFIG_TFM_SPM_BACKEND_IPC == 1 */
-#if (CONFIG_TFM_FP > 0) && (CONFIG_TFM_SPM_BACKEND_SFN == 1)
+#if (CONFIG_TFM_FLOAT_ABI > 0) && (CONFIG_TFM_SPM_BACKEND_SFN == 1)
#error "FP is not supported for SFN model."
#endif
diff --git a/platform/CMakeLists.txt b/platform/CMakeLists.txt
index 70fb804..4a2e8f1 100755
--- a/platform/CMakeLists.txt
+++ b/platform/CMakeLists.txt
@@ -101,11 +101,10 @@
$<$<BOOL:${TFM_EXCEPTION_INFO_DUMP}>:TFM_EXCEPTION_INFO_DUMP>
$<$<OR:$<VERSION_GREATER:${TFM_ISOLATION_LEVEL},1>,$<STREQUAL:"${TEST_PSA_API}","IPC">>:CONFIG_TFM_ENABLE_MEMORY_PROTECT>
$<$<AND:$<BOOL:${TFM_PXN_ENABLE}>,$<STREQUAL:${TFM_SYSTEM_ARCHITECTURE},armv8.1-m.main>>:TFM_PXN_ENABLE>
- # CONFIG_TFM_FP
- $<$<STREQUAL:${CONFIG_TFM_FP},hard>:CONFIG_TFM_FP=2>
- $<$<STREQUAL:${CONFIG_TFM_FP},soft>:CONFIG_TFM_FP=0>
+ $<$<STREQUAL:${CONFIG_TFM_FLOAT_ABI},hard>:CONFIG_TFM_FLOAT_ABI=2>
+ $<$<STREQUAL:${CONFIG_TFM_FLOAT_ABI},soft>:CONFIG_TFM_FLOAT_ABI=0>
$<$<BOOL:${CONFIG_TFM_LAZY_STACKING}>:CONFIG_TFM_LAZY_STACKING>
- $<$<BOOL:${CONFIG_TFM_ENABLE_FPU}>:CONFIG_TFM_ENABLE_FPU>
+ $<$<BOOL:${CONFIG_TFM_ENABLE_CP10CP11}>:CONFIG_TFM_ENABLE_CP10CP11>
$<$<BOOL:${PLATFORM_DEFAULT_CRYPTO_KEYS}>:PLATFORM_DEFAULT_CRYPTO_KEYS>
PRIVATE
$<$<BOOL:${SYMMETRIC_INITIAL_ATTESTATION}>:SYMMETRIC_INITIAL_ATTESTATION>
diff --git a/platform/ext/accelerator/cc312/CMakeLists.txt b/platform/ext/accelerator/cc312/CMakeLists.txt
index 4b7268c..cf0aa34 100644
--- a/platform/ext/accelerator/cc312/CMakeLists.txt
+++ b/platform/ext/accelerator/cc312/CMakeLists.txt
@@ -190,14 +190,14 @@
# need to fallback to the legacy driver as the new PSA driver overflows
# the available flash memory on Musca-S1 and Musca-B1
if ((NOT ${CC312_LEGACY_DRIVER_API_ENABLED}) AND
- TEST_S AND (${CMAKE_BUILD_TYPE} STREQUAL "Debug") AND (${CONFIG_TFM_FP} STREQUAL "hard"))
+ TEST_S AND (${CMAKE_BUILD_TYPE} STREQUAL "Debug") AND (${CONFIG_TFM_FLOAT_ABI} STREQUAL "hard"))
set(CC312_LEGACY_DRIVER_API_ENABLED ON)
message(WARNING
"The CC-312 legacy driver interface fallback is forced to ${CC312_LEGACY_DRIVER_API_ENABLED}. \
The following parameters are not supported at the same time: \
(TEST_S: ${TEST_S}, \
CMAKE_BUILD_TYPE: ${CMAKE_BUILD_TYPE}, \
- CONFIG_TFM_FP: ${CONFIG_TFM_FP}) for the PSA Cryptoprocessor driver interface due to flash memory constraints.")
+ CONFIG_TFM_FLOAT_ABI: ${CONFIG_TFM_FLOAT_ABI}) for the PSA Cryptoprocessor driver interface due to flash memory constraints.")
endif()
# FixMe: Secure tests enabled and Debug builds on Musca-B1 need to fallback to
diff --git a/platform/ext/target/arm/mps2/an521/CMakeLists.txt b/platform/ext/target/arm/mps2/an521/CMakeLists.txt
index 2ce7264..66b8d89 100644
--- a/platform/ext/target/arm/mps2/an521/CMakeLists.txt
+++ b/platform/ext/target/arm/mps2/an521/CMakeLists.txt
@@ -50,8 +50,8 @@
)
target_link_libraries(CMSIS_5_tfm_ns
INTERFACE
- $<$<AND:$<C_COMPILER_ID:GNU>,$<STREQUAL:${CONFIG_TFM_FP},hard>>:CMSIS_5_RTX_V8MMFN>
- $<$<AND:$<C_COMPILER_ID:GNU>,$<STREQUAL:${CONFIG_TFM_FP},soft>>:CMSIS_5_RTX_V8MMN>
+ $<$<AND:$<C_COMPILER_ID:GNU>,$<OR:$<BOOL:${CONFIG_TFM_ENABLE_FP}>,$<BOOL:${CONFIG_TFM_ENABLE_MVE_FP}>>>:CMSIS_5_RTX_V8MMFN>
+ $<$<AND:$<C_COMPILER_ID:GNU>,$<NOT:$<OR:$<BOOL:${CONFIG_TFM_ENABLE_FP}>,$<BOOL:${CONFIG_TFM_ENABLE_MVE_FP}>>>>:CMSIS_5_RTX_V8MMN>
$<$<C_COMPILER_ID:ARMClang>:CMSIS_5_RTX_V8MMN>
$<$<C_COMPILER_ID:IAR>:CMSIS_5_RTX_V8MMN>
)
diff --git a/platform/ext/target/arm/mps3/an547/preload.cmake b/platform/ext/target/arm/mps3/an547/preload.cmake
index ae27ca9..2d95132 100644
--- a/platform/ext/target/arm/mps3/an547/preload.cmake
+++ b/platform/ext/target/arm/mps3/an547/preload.cmake
@@ -13,4 +13,3 @@
# Set architecture and CPU
set(TFM_SYSTEM_PROCESSOR cortex-m55)
set(TFM_SYSTEM_ARCHITECTURE armv8.1-m.main)
-set(TFM_SYSTEM_MVE OFF)
diff --git a/platform/ext/target/arm/mps3/an552/CMakeLists.txt b/platform/ext/target/arm/mps3/an552/CMakeLists.txt
index 7f5c211..4c55056 100644
--- a/platform/ext/target/arm/mps3/an552/CMakeLists.txt
+++ b/platform/ext/target/arm/mps3/an552/CMakeLists.txt
@@ -47,8 +47,8 @@
target_link_libraries(CMSIS_5_tfm_ns
INTERFACE
$<$<C_COMPILER_ID:ARMClang>:CMSIS_5_RTX_V8MMN>
- $<$<AND:$<C_COMPILER_ID:GNU>,$<STREQUAL:${CONFIG_TFM_FP},hard>>:CMSIS_5_RTX_V8MMFN>
- $<$<AND:$<C_COMPILER_ID:GNU>,$<STREQUAL:${CONFIG_TFM_FP},soft>>:CMSIS_5_RTX_V8MMN>
+ $<$<AND:$<C_COMPILER_ID:GNU>,$<OR:$<BOOL:${CONFIG_TFM_ENABLE_FP}>,$<BOOL:${CONFIG_TFM_ENABLE_MVE_FP}>>>:CMSIS_5_RTX_V8MMFN>
+ $<$<AND:$<C_COMPILER_ID:GNU>,$<NOT:$<OR:$<BOOL:${CONFIG_TFM_ENABLE_FP}>,$<BOOL:${CONFIG_TFM_ENABLE_MVE_FP}>>>>:CMSIS_5_RTX_V8MMN>
$<$<C_COMPILER_ID:IAR>:CMSIS_5_RTX_V81MMN>
)
target_compile_options(tfm_ns
diff --git a/platform/ext/target/arm/mps3/an552/preload.cmake b/platform/ext/target/arm/mps3/an552/preload.cmake
index 1060caa..2933c1e 100644
--- a/platform/ext/target/arm/mps3/an552/preload.cmake
+++ b/platform/ext/target/arm/mps3/an552/preload.cmake
@@ -14,4 +14,3 @@
set(TFM_SYSTEM_PROCESSOR cortex-m55)
set(TFM_SYSTEM_ARCHITECTURE armv8.1-m.main)
set(CONFIG_TFM_FP_ARCH "fpv5-d16")
-set(TFM_SYSTEM_MVE OFF)
diff --git a/platform/ext/target/arm/mps3/corstone310_fvp/preload.cmake b/platform/ext/target/arm/mps3/corstone310_fvp/preload.cmake
index be18337..53b18a4 100644
--- a/platform/ext/target/arm/mps3/corstone310_fvp/preload.cmake
+++ b/platform/ext/target/arm/mps3/corstone310_fvp/preload.cmake
@@ -13,4 +13,3 @@
# Set architecture and CPU
set(TFM_SYSTEM_PROCESSOR cortex-m85)
set(TFM_SYSTEM_ARCHITECTURE armv8.1-m.main)
-set(TFM_SYSTEM_MVE OFF)
diff --git a/platform/ext/target/arm/musca_s1/CMakeLists.txt b/platform/ext/target/arm/musca_s1/CMakeLists.txt
index 52202a6..e0d2897 100644
--- a/platform/ext/target/arm/musca_s1/CMakeLists.txt
+++ b/platform/ext/target/arm/musca_s1/CMakeLists.txt
@@ -44,8 +44,8 @@
)
target_link_libraries(CMSIS_5_tfm_ns
INTERFACE
- $<$<STREQUAL:${CONFIG_TFM_FP},hard>:CMSIS_5_RTX_V8MMFN>
- $<$<STREQUAL:${CONFIG_TFM_FP},soft>:CMSIS_5_RTX_V8MMN>
+ $<$<OR:$<BOOL:${CONFIG_TFM_ENABLE_FP}>,$<BOOL:${CONFIG_TFM_ENABLE_MVE_FP}>>:CMSIS_5_RTX_V8MMFN>
+ $<$<NOT:$<OR:$<BOOL:${CONFIG_TFM_ENABLE_FP}>,$<BOOL:${CONFIG_TFM_ENABLE_MVE_FP}>>>:CMSIS_5_RTX_V8MMN>
)
target_compile_options(tfm_ns
PUBLIC
diff --git a/platform/ext/target/arm/rss/preload.cmake b/platform/ext/target/arm/rss/preload.cmake
index 1f40d4f..12a9ee7 100644
--- a/platform/ext/target/arm/rss/preload.cmake
+++ b/platform/ext/target/arm/rss/preload.cmake
@@ -13,7 +13,6 @@
# Set architecture and CPU
set(TFM_SYSTEM_PROCESSOR cortex-m55)
set(TFM_SYSTEM_ARCHITECTURE armv8.1-m.main)
-set(TFM_SYSTEM_MVE OFF)
# RSS has a CryptoCell-312 as an accelerator.
set(CRYPTO_HW_ACCELERATOR_TYPE cc312)
diff --git a/platform/ns/CMakeLists.txt b/platform/ns/CMakeLists.txt
index 4dc2b66..d2b3bf2 100755
--- a/platform/ns/CMakeLists.txt
+++ b/platform/ns/CMakeLists.txt
@@ -34,11 +34,10 @@
target_compile_definitions(platform_ns
PUBLIC
- # CONFIG_TFM_FP
- $<$<STREQUAL:${CONFIG_TFM_FP},hard>:CONFIG_TFM_FP=2>
- $<$<STREQUAL:${CONFIG_TFM_FP},soft>:CONFIG_TFM_FP=0>
+ $<$<STREQUAL:${CONFIG_TFM_FLOAT_ABI},hard>:CONFIG_TFM_FLOAT_ABI=2>
+ $<$<STREQUAL:${CONFIG_TFM_FLOAT_ABI},soft>:CONFIG_TFM_FLOAT_ABI=0>
$<$<BOOL:${TEST_NS_FPU}>:TEST_NS_FPU>
- $<$<BOOL:${CONFIG_TFM_ENABLE_FPU}>:CONFIG_TFM_ENABLE_FPU>
+ $<$<BOOL:${CONFIG_TFM_ENABLE_CP10CP11}>:CONFIG_TFM_ENABLE_CP10CP11>
$<$<BOOL:${PLATFORM_DEFAULT_CRYPTO_KEYS}>:PLATFORM_DEFAULT_CRYPTO_KEYS>
PRIVATE
$<$<BOOL:${TEST_NS_SLIH_IRQ}>:TEST_NS_SLIH_IRQ>
diff --git a/secure_fw/partitions/ns_agent_tz/ns_agent_tz.c b/secure_fw/partitions/ns_agent_tz/ns_agent_tz.c
index f0046f3..c912660 100644
--- a/secure_fw/partitions/ns_agent_tz/ns_agent_tz.c
+++ b/secure_fw/partitions/ns_agent_tz/ns_agent_tz.c
@@ -26,7 +26,7 @@
" ldr r3, ="M2S(STACK_SEAL_PATTERN)" \n" /* SEAL double-check */
" cmp r2, r3 \n"
" bne ns_agent_nspe_jump_panic \n"
-#if (CONFIG_TFM_FP >= 1)
+#if (CONFIG_TFM_FLOAT_ABI > 0)
" vscclrm {s0-s31, vpr} \n"
" mov r1, #0 \n"
" vmsr fpscr_nzcvqc, r1 \n"
diff --git a/secure_fw/partitions/ns_agent_tz/ns_agent_tz_v80m.c b/secure_fw/partitions/ns_agent_tz/ns_agent_tz_v80m.c
index 60a25f8..2ab320c 100644
--- a/secure_fw/partitions/ns_agent_tz/ns_agent_tz_v80m.c
+++ b/secure_fw/partitions/ns_agent_tz/ns_agent_tz_v80m.c
@@ -29,7 +29,7 @@
" movs r2, #1 \n" /* For NS execution */
" bics r0, r2 \n"
" mov r1, r0 \n"
-#if (CONFIG_TFM_FP >= 1)
+#if (CONFIG_TFM_FLOAT_ABI >= 1)
" vmov d0, r0, r1 \n"
" vmov d1, r0, r1 \n"
" vmov d2, r0, r1 \n"
diff --git a/secure_fw/spm/CMakeLists.txt b/secure_fw/spm/CMakeLists.txt
index c8783ba..1812821 100755
--- a/secure_fw/spm/CMakeLists.txt
+++ b/secure_fw/spm/CMakeLists.txt
@@ -103,9 +103,8 @@
$<$<BOOL:${CONFIG_TFM_HALT_ON_CORE_PANIC}>:CONFIG_TFM_HALT_ON_CORE_PANIC>
$<$<BOOL:${TFM_NS_MANAGE_NSID}>:TFM_NS_MANAGE_NSID>
$<$<BOOL:${TFM_PSA_API}>:CONFIG_TFM_CONN_HANDLE_MAX_NUM=${CONFIG_TFM_CONN_HANDLE_MAX_NUM}>
- # CONFIG_TFM_FP
- $<$<STREQUAL:${CONFIG_TFM_FP},hard>:CONFIG_TFM_FP=2>
- $<$<STREQUAL:${CONFIG_TFM_FP},soft>:CONFIG_TFM_FP=0>
+ $<$<STREQUAL:${CONFIG_TFM_FLOAT_ABI},hard>:CONFIG_TFM_FLOAT_ABI=2>
+ $<$<STREQUAL:${CONFIG_TFM_FLOAT_ABI},soft>:CONFIG_TFM_FLOAT_ABI=0>
$<$<BOOL:${CONFIG_TFM_DOORBELL_API}>:CONFIG_TFM_DOORBELL_API=1>
$<$<BOOL:${CONFIG_TFM_STACK_WATERMARKS}>:CONFIG_TFM_STACK_WATERMARKS>
)
diff --git a/secure_fw/spm/cmsis_func/arch.c b/secure_fw/spm/cmsis_func/arch.c
index 0264b46..1e248be 100644
--- a/secure_fw/spm/cmsis_func/arch.c
+++ b/secure_fw/spm/cmsis_func/arch.c
@@ -269,7 +269,7 @@
*/
#if defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-#if defined(CONFIG_TFM_ENABLE_FPU)
+#if defined(CONFIG_TFM_ENABLE_CP10CP11)
/*
* Enable Secure privileged and unprivilged access to the FP Extension.
* Note: On Armv8-M, if Non-Secure access to the FPU is needed, Secure access
diff --git a/secure_fw/spm/cmsis_psa/arch/tfm_arch.c b/secure_fw/spm/cmsis_psa/arch/tfm_arch.c
index a82e88c..b1fd7aa 100644
--- a/secure_fw/spm/cmsis_psa/arch/tfm_arch.c
+++ b/secure_fw/spm/cmsis_psa/arch/tfm_arch.c
@@ -24,7 +24,7 @@
#endif
"mov r4, r0 \n"
"mov r5, r1 \n"
-#if (CONFIG_TFM_FP >= 1)
+#if (CONFIG_TFM_FLOAT_ABI > 0)
"bl tfm_arch_clear_fp_data \n"
#endif
"mov sp, r4 \n"
diff --git a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v6m_v7m.c b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v6m_v7m.c
index 399b09e..686f272 100644
--- a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v6m_v7m.c
+++ b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v6m_v7m.c
@@ -190,7 +190,7 @@
{
/* There are no coprocessors in Armv6-M implementations */
#ifndef __ARM_ARCH_6M__
-#if defined(CONFIG_TFM_ENABLE_FPU)
+#if defined(CONFIG_TFM_ENABLE_CP10CP11)
/* Enable privileged and unprivilged access to the floating-point
* coprocessor.
*/
diff --git a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
index d1357de..b760969 100644
--- a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
+++ b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
@@ -15,9 +15,7 @@
#include "tfm_hal_device_header.h"
#include "tfm_svcalls.h"
#include "utilities.h"
-#if defined(__FPU_USED) && (__FPU_USED == 1U) && (CONFIG_TFM_FP >= 1)
#include "core_ext.h"
-#endif
#if !defined(__ARM_ARCH_8M_MAIN__) && !defined(__ARM_ARCH_8_1M_MAIN__)
#error "Unsupported ARM Architecture."
@@ -213,7 +211,7 @@
void tfm_arch_config_extensions(void)
{
-#if defined(CONFIG_TFM_ENABLE_FPU)
+#if defined(CONFIG_TFM_ENABLE_CP10CP11)
/*
* Enable SPE privileged and unprivileged access to the FP Extension.
* Note: On Armv8-M, if Non-secure access to the FPU is needed, Secure
@@ -233,7 +231,7 @@
SCB->NSACR |= SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk;
#endif
-#if (CONFIG_TFM_FP >= 1)
+#if (CONFIG_TFM_FLOAT_ABI >= 1)
#ifdef CONFIG_TFM_LAZY_STACKING
/* Enable lazy stacking. */
@@ -260,18 +258,22 @@
/* Prevent non-secure from modifying FPU’s power setting. */
SCnSCB->CPPWR |= SCnSCB_CPPWR_SUS11_Msk | SCnSCB_CPPWR_SUS10_Msk;
-#endif /* CONFIG_TFM_FP >= 1 */
+#endif /* CONFIG_TFM_FLOAT_ABI >= 1 */
#if defined(__ARM_ARCH_8_1M_MAIN__)
SCB->CCR |= SCB_CCR_TRD_Msk;
#endif
}
-#if (CONFIG_TFM_FP >= 1)
+#if (CONFIG_TFM_FLOAT_ABI > 0)
__attribute__((naked, noinline, used)) void tfm_arch_clear_fp_data(void)
{
__ASM volatile(
"eor r0, r0, r0 \n"
+ "vmsr fpscr, r0 \n"
+#if (defined(__ARM_ARCH_8_1M_MAIN__))
+ "vscclrm {s0-s31,vpr} \n"
+#else
"vmov s0, r0 \n"
"vmov s1, r0 \n"
"vmov s2, r0 \n"
@@ -304,7 +306,7 @@
"vmov s29, r0 \n"
"vmov s30, r0 \n"
"vmov s31, r0 \n"
- "vmsr fpscr, r0 \n"
+#endif
"bx lr \n"
);
}
diff --git a/secure_fw/spm/cmsis_psa/main.c b/secure_fw/spm/cmsis_psa/main.c
index 7ddd295..b74bfc4 100644
--- a/secure_fw/spm/cmsis_psa/main.c
+++ b/secure_fw/spm/cmsis_psa/main.c
@@ -86,8 +86,8 @@
SPMLOG_DBGMSGVAL("TF-M isolation level is: ", TFM_LVL);
-#if (CONFIG_TFM_FP == 2)
- SPMLOG_INFMSG("TF-M FP mode: Hardware\r\n");
+#if (CONFIG_TFM_FLOAT_ABI == 2)
+ SPMLOG_INFMSG("TF-M Float ABI: Hard\r\n");
#ifdef CONFIG_TFM_LAZY_STACKING
SPMLOG_INFMSG("Lazy stacking enabled\r\n");
#else
diff --git a/secure_fw/spm/include/tfm_arch.h b/secure_fw/spm/include/tfm_arch.h
index 1204839..4d268f1 100644
--- a/secure_fw/spm/include/tfm_arch.h
+++ b/secure_fw/spm/include/tfm_arch.h
@@ -191,7 +191,7 @@
__ISB();
}
-#if (CONFIG_TFM_FP >= 1) && CONFIG_TFM_LAZY_STACKING
+#if (CONFIG_TFM_FLOAT_ABI >= 1) && CONFIG_TFM_LAZY_STACKING
#define ARCH_FLUSH_FP_CONTEXT() __asm volatile("vmov s0, s0 \n":::"memory")
#else
#define ARCH_FLUSH_FP_CONTEXT()
@@ -203,7 +203,7 @@
/* Configure various extensions. */
void tfm_arch_config_extensions(void);
-#if (CONFIG_TFM_FP >= 1)
+#if (CONFIG_TFM_FLOAT_ABI > 0)
/* Clear float point data. */
void tfm_arch_clear_fp_data(void);
#endif
diff --git a/toolchain_ARMCLANG.cmake b/toolchain_ARMCLANG.cmake
index 403a9c1..5f94c17 100644
--- a/toolchain_ARMCLANG.cmake
+++ b/toolchain_ARMCLANG.cmake
@@ -86,10 +86,9 @@
if (DEFINED TFM_SYSTEM_PROCESSOR)
set(CMAKE_SYSTEM_PROCESSOR ${TFM_SYSTEM_PROCESSOR})
- if (DEFINED TFM_SYSTEM_MVE)
- if(NOT TFM_SYSTEM_MVE)
- string(APPEND CMAKE_SYSTEM_PROCESSOR "+nomve")
- endif()
+ if (TFM_SYSTEM_ARCHITECTURE STREQUAL "armv8.1-m.main")
+ message(WARNING "MVE is not yet supported using ARMCLANG")
+ string(APPEND CMAKE_SYSTEM_PROCESSOR "+nomve")
endif()
if (DEFINED TFM_SYSTEM_DSP)
@@ -109,10 +108,6 @@
# Modifiers are additive instead of subtractive (.fp Vs .no_fp)
if (TFM_SYSTEM_DSP)
string(APPEND CMAKE_ASM_CPU_FLAG ".dsp")
- else()
- if (TFM_SYSTEM_MVE)
- string(APPEND CMAKE_ASM_CPU_FLAG ".mve")
- endif()
endif()
endif()
@@ -129,10 +124,9 @@
set(CMAKE_C_COMPILER_TARGET arm-${CROSS_COMPILE})
set(CMAKE_ASM_COMPILER_TARGET arm-${CROSS_COMPILE})
- if (DEFINED TFM_SYSTEM_MVE)
- if(NOT TFM_SYSTEM_MVE)
- string(APPEND CMAKE_SYSTEM_ARCH "+nomve")
- endif()
+ # MVE is currently not supported in case of armclang
+ if (TFM_SYSTEM_ARCHITECTURE STREQUAL "armv8.1-m.main")
+ string(APPEND CMAKE_SYSTEM_ARCH "+nomve")
endif()
if (DEFINED TFM_SYSTEM_DSP)
diff --git a/toolchain_GNUARM.cmake b/toolchain_GNUARM.cmake
index f9c620a..8ddeddc 100644
--- a/toolchain_GNUARM.cmake
+++ b/toolchain_GNUARM.cmake
@@ -88,14 +88,22 @@
endif()
endif()
if(GCC_VERSION VERSION_GREATER_EQUAL "8.0.0")
- if (DEFINED CONFIG_TFM_FP)
- if(CONFIG_TFM_FP STREQUAL "0" AND
- NOT TFM_SYSTEM_ARCHITECTURE STREQUAL "armv6-m")
- string(APPEND CMAKE_SYSTEM_PROCESSOR "+nofp")
- endif()
+ if(NOT CONFIG_TFM_ENABLE_FP AND
+ NOT TFM_SYSTEM_ARCHITECTURE STREQUAL "armv6-m")
+ string(APPEND CMAKE_SYSTEM_PROCESSOR "+nofp")
endif()
endif()
endif()
+
+ if(TFM_SYSTEM_ARCHITECTURE STREQUAL "armv8.1-m.main")
+ if(NOT CONFIG_TFM_ENABLE_MVE)
+ string(APPEND CMAKE_SYSTEM_PROCESSOR "+nomve")
+ endif()
+ if(NOT CONFIG_TFM_ENABLE_MVE_FP)
+ string(APPEND CMAKE_SYSTEM_PROCESSOR "+nomve.fp")
+ endif()
+ endif()
+
endif()
# CMAKE_SYSTEM_ARCH variable is not a built-in CMAKE variable. It is used to
@@ -103,6 +111,15 @@
# The variable name is choosen to align with the ARMCLANG toolchain file.
set(CMAKE_SYSTEM_ARCH ${TFM_SYSTEM_ARCHITECTURE})
+ if(TFM_SYSTEM_ARCHITECTURE STREQUAL "armv8.1-m.main")
+ if(CONFIG_TFM_ENABLE_MVE)
+ string(APPEND CMAKE_SYSTEM_ARCH "+mve")
+ endif()
+ if(CONFIG_TFM_ENABLE_MVE_FP)
+ string(APPEND CMAKE_SYSTEM_ARCH "+mve.fp")
+ endif()
+ endif()
+
if (DEFINED TFM_SYSTEM_DSP)
# +nodsp modifier is only supported from GCC version 8.
if(GCC_VERSION VERSION_GREATER_EQUAL "8.0.0")
@@ -115,12 +132,11 @@
endif()
if(GCC_VERSION VERSION_GREATER_EQUAL "8.0.0")
- if (DEFINED CONFIG_TFM_FP)
- if(CONFIG_TFM_FP STREQUAL "hard")
- string(APPEND CMAKE_SYSTEM_ARCH "+fp")
- endif()
+ if(CONFIG_TFM_ENABLE_FP)
+ string(APPEND CMAKE_SYSTEM_ARCH "+fp")
endif()
endif()
+
endmacro()
macro(tfm_toolchain_reload_compiler)
@@ -161,9 +177,13 @@
set(BL2_COMPILER_CP_FLAG -mfloat-abi=soft)
- if (CONFIG_TFM_FP STREQUAL "hard")
- set(COMPILER_CP_FLAG -mfloat-abi=hard -mfpu=${CONFIG_TFM_FP_ARCH})
- set(LINKER_CP_OPTION -mfloat-abi=hard -mfpu=${CONFIG_TFM_FP_ARCH})
+ if (CONFIG_TFM_FLOAT_ABI STREQUAL "hard")
+ set(COMPILER_CP_FLAG -mfloat-abi=hard)
+ set(LINKER_CP_OPTION -mfloat-abi=hard)
+ if (CONFIG_TFM_ENABLE_FP OR CONFIG_TFM_ENABLE_MVE_FP)
+ set(COMPILER_CP_FLAG -mfloat-abi=hard -mfpu=${CONFIG_TFM_FP_ARCH})
+ set(LINKER_CP_OPTION -mfloat-abi=hard -mfpu=${CONFIG_TFM_FP_ARCH})
+ endif()
else()
set(COMPILER_CP_FLAG -mfloat-abi=soft)
set(LINKER_CP_OPTION -mfloat-abi=soft)
diff --git a/tools/config_impl.cmake.template b/tools/config_impl.cmake.template
index 721603d..9fb0e7c 100644
--- a/tools/config_impl.cmake.template
+++ b/tools/config_impl.cmake.template
@@ -13,7 +13,7 @@
set(CONFIG_TFM_PSA_API_CROSS_CALL {{config_impl['CONFIG_TFM_PSA_API_CROSS_CALL']}} PARENT_SCOPE)
set(CONFIG_TFM_PSA_API_SUPERVISOR_CALL {{config_impl['CONFIG_TFM_PSA_API_SUPERVISOR_CALL']}} PARENT_SCOPE)
- if((CONFIG_TFM_FP GREATER 0) AND CONFIG_TFM_SPM_BACKEND_SFN)
+ if((CONFIG_TFM_FLOAT_ABI GREATER 0) AND CONFIG_TFM_SPM_BACKEND_SFN)
message(FATAL_ERROR "FP is not supported for SFN model.")
endif()