SPM: Change to new SPM log APIs
Change the LOG_MSG to new log APIs in SPM part.
Change-Id: Ief970fdcff6dfa80b272d29234014ead1ffb18ff
Signed-off-by: Shawn Shan <Shawn.Shan@arm.com>
diff --git a/platform/ext/target/cypress/psoc64/target_cfg.c b/platform/ext/target/cypress/psoc64/target_cfg.c
old mode 100644
new mode 100755
index 9fafa94..e0351e4
--- a/platform/ext/target/cypress/psoc64/target_cfg.c
+++ b/platform/ext/target/cypress/psoc64/target_cfg.c
@@ -22,14 +22,14 @@
#include "device_definition.h"
#include "driver_ppu.h"
#include "driver_smpu.h"
-#include "log/tfm_log.h"
#include "pc_config.h"
#include "platform_description.h"
+#include "region.h"
#include "region_defs.h"
#include "RTE_Device.h"
#include "target_cfg.h"
#include "tfm_plat_defs.h"
-#include "region.h"
+#include "tfm_spm_log.h"
/* The section names come from the scatter file */
@@ -108,29 +108,29 @@
/* UART clock */
clk_rc = Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_8_BIT, 1U);
if (clk_rc != CY_SYSCLK_SUCCESS) {
- LOG_MSG("WARNING: Failed to configure UART clock\r\n");
+ SPMLOG_INFMSG("WARNING: Failed to configure UART clock\r\n");
}
clk_rc = Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_8_BIT, 1U, 108U);
if (clk_rc != CY_SYSCLK_SUCCESS) {
- LOG_MSG("WARNING: Failed to configure UART clock\r\n");
+ SPMLOG_INFMSG("WARNING: Failed to configure UART clock\r\n");
}
clk_rc = Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_8_BIT, 1U);
if (clk_rc != CY_SYSCLK_SUCCESS) {
- LOG_MSG("WARNING: Failed to configure UART clock\r\n");
+ SPMLOG_INFMSG("WARNING: Failed to configure UART clock\r\n");
}
clk_rc = Cy_SysClk_PeriphAssignDivider(PCLK_SCB5_CLOCK, CY_SYSCLK_DIV_8_BIT, 1U);
if (clk_rc != CY_SYSCLK_SUCCESS) {
- LOG_MSG("WARNING: Failed to configure UART clock\r\n");
+ SPMLOG_INFMSG("WARNING: Failed to configure UART clock\r\n");
}
/* Secure: TIMER0 clock */
clk_rc = Cy_SysClk_PeriphAssignDivider(PCLK_TCPWM0_CLOCKS0, CY_SYSCLK_DIV_8_BIT, 1U);
if (clk_rc != CY_SYSCLK_SUCCESS) {
- LOG_MSG("WARNING: Failed to configure timer0 clock\r\n");
+ SPMLOG_INFMSG("WARNING: Failed to configure timer0 clock\r\n");
}
/* Non-Secure: TIMER1 clock */
clk_rc = Cy_SysClk_PeriphAssignDivider(PCLK_TCPWM0_CLOCKS1, CY_SYSCLK_DIV_8_BIT, 1U);
if (clk_rc != CY_SYSCLK_SUCCESS) {
- LOG_MSG("WARNING: Failed to configure timer1 clock\r\n");
+ SPMLOG_INFMSG("WARNING: Failed to configure timer1 clock\r\n");
}
Cy_Platform_Init();
@@ -138,7 +138,7 @@
#ifdef TFM_ENABLE_IRQ_TEST
int_rc = Cy_SysInt_Init(&CY_TCPWM_NVIC_CFG_S, TFM_TIMER0_IRQ_Handler);
if (int_rc != CY_SYSINT_SUCCESS) {
- LOG_MSG("WARNING: Fail to initialize timer interrupt (IRQ TEST might fail)!\r\n");
+ SPMLOG_INFMSG("WARNING: Fail to initialize timer interrupt (IRQ TEST might fail)!\r\n");
}
#endif /* TFM_ENABLE_IRQ_TEST */
@@ -268,13 +268,14 @@
void smpu_print_config(void)
{
- LOG_MSG("\r\nSMPU config:\r\n");
- LOG_MSG("memory_regions.non_secure_code_start = 0x%x\r\n",
+ SPMLOG_INFMSG("\r\nSMPU config:\r\n");
+ SPMLOG_INFMSGVAL("memory_regions.non_secure_code_start = ",
memory_regions.non_secure_code_start);
- LOG_MSG("memory_regions.non_secure_partition_base = 0x%x\r\n",
+ SPMLOG_INFMSGVAL("\r\nmemory_regions.non_secure_partition_base = ",
memory_regions.non_secure_partition_base);
- LOG_MSG("memory_regions.non_secure_partition_limit = 0x%x\r\n",
+ SPMLOG_INFMSGVAL("\r\nmemory_regions.non_secure_partition_limit = ",
memory_regions.non_secure_partition_limit);
+ SPMLOG_INFMSG("\r\n");
size_t n = sizeof(smpu_init_table)/sizeof(smpu_init_table[0]);
diff --git a/platform/ext/target/nxp/lpcxpresso55s69/target_cfg.c b/platform/ext/target/nxp/lpcxpresso55s69/target_cfg.c
index 1e9ed99..3d63077 100755
--- a/platform/ext/target/nxp/lpcxpresso55s69/target_cfg.c
+++ b/platform/ext/target/nxp/lpcxpresso55s69/target_cfg.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2020 Arm Limited. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -14,15 +14,14 @@
* limitations under the License.
*/
-#include "target_cfg.h"
+#include "device_definition.h"
#include "Driver_Common.h"
#include "platform_description.h"
-#include "device_definition.h"
#include "region_defs.h"
+#include "tfm_assert.h"
+#include "target_cfg.h"
#include "tfm_plat_defs.h"
-
-#include "log/tfm_assert.h"
-#include "log/tfm_log.h"
+#include "tfm_spm_log.h"
/* Macros to pick linker symbols */
#define REGION(a, b, c) a##b##c
@@ -198,13 +197,20 @@
| SAU_RLAR_ENABLE_Msk;
#endif /* BL2 */
- LOG_MSG("=== [SAU NS] =======\r\n");
- LOG_MSG("NS ROM [0x%x, 0x%x]\r\n", memory_regions.non_secure_partition_base, memory_regions.non_secure_partition_limit);
- LOG_MSG("NS DATA [0x%x, 0x%x]\r\n", NS_DATA_START, NS_DATA_LIMIT);
- LOG_MSG("NSC [0x%x, 0x%x]\r\n", memory_regions.veneer_base, memory_regions.veneer_limit);
- LOG_MSG("PERIPHERALS [0x%x, 0x%x]\r\n", PERIPHERALS_BASE_NS_START, PERIPHERALS_BASE_NS_END);
+ SPMLOG_INFMSG("=== [SAU NS] =======\r\n");
+ SPMLOG_INFMSGVAL("NS ROM [", memory_regions.non_secure_partition_base);
+ SPMLOG_INFMSGVAL(",", memory_regions.non_secure_partition_limit);
+ SPMLOG_INFMSG("]\r\n");
+ SPMLOG_INFMSGVAL("NS DATA [", NS_DATA_START);
+ SPMLOG_INFMSGVAL(",", NS_DATA_LIMIT);
+ SPMLOG_INFMSG("]\r\n");
+ SPMLOG_INFMSGVAL("NSC [", memory_regions.veneer_base);
+ SPMLOG_INFMSGVAL(",", memory_regions.veneer_limit);
+ SPMLOG_INFMSG("]\r\n");
+ SPMLOG_INFMSGVAL("PERIPHERALS [", PERIPHERALS_BASE_NS_START);
+ SPMLOG_INFMSGVAL(",", PERIPHERALS_BASE_NS_END);
+ SPMLOG_INFMSG("]\r\n");
}
-
/*------------------- Memory configuration functions -------------------------*/
int32_t ahb_secure_control_memory_init(void)
@@ -360,9 +366,13 @@
}
}
- LOG_MSG("=== [AHB MPC NS] =======\r\n");
- LOG_MSG("NS ROM [0x%x, 0x%x]\r\n", memory_regions.non_secure_partition_base, memory_regions.non_secure_partition_limit);
- LOG_MSG("NS DATA [0x%x, 0x%x]\r\n", NS_DATA_START, NS_DATA_LIMIT);
+ SPMLOG_INFMSG("=== [AHB MPC NS] =======\r\n");
+ SPMLOG_INFMSGVAL("NS ROM [", memory_regions.non_secure_partition_base);
+ SPMLOG_INFMSGVAL(",", memory_regions.non_secure_partition_limit);
+ SPMLOG_INFMSG("]\r\n");
+ SPMLOG_INFMSGVAL("NS DATA [", NS_DATA_START);
+ SPMLOG_INFMSGVAL(",", NS_DATA_LIMIT);
+ SPMLOG_INFMSG("]\r\n");
/* Add barriers to assure the MPC configuration is done before continue
* the execution.
diff --git a/secure_fw/spm/cmsis_func/main.c b/secure_fw/spm/cmsis_func/main.c
index 169f146..bfc11cd 100644
--- a/secure_fw/spm/cmsis_func/main.c
+++ b/secure_fw/spm/cmsis_func/main.c
@@ -7,13 +7,13 @@
#include "arch.h"
#include "common/tfm_boot_data.h"
-#include "log/tfm_log.h"
#include "region.h"
#include "spm_func.h"
#include "tfm_hal_platform.h"
#include "tfm_irq_list.h"
#include "tfm_nspm.h"
#include "tfm_spm_hal.h"
+#include "tfm_spm_log.h"
#include "tfm_version.h"
/*
@@ -30,6 +30,12 @@
#error Only TFM_LVL 1 is supported for library model!
#endif
+#define PRINT_TFM_VERSION SPMLOG_INFMSGVAL("Booting TFM v", VERSION_MAJOR); \
+ SPMLOG_INFMSGVAL(".", VERSION_MINOR); \
+ SPMLOG_INFMSG(" "); \
+ SPMLOG_INFMSG(VERSION_STRING); \
+ SPMLOG_INFMSG("\r\n")
+
REGION_DECLARE(Image$$, ARM_LIB_STACK_MSP, $$ZI$$Base);
static int32_t tfm_core_init(void)
@@ -75,10 +81,11 @@
/* Configures architecture-specific coprocessors */
tfm_arch_configure_coprocessors();
- LOG_MSG("\033[1;34m[Sec Thread] Secure image initializing!\033[0m\r\n");
+ SPMLOG_INFMSG("\033[1;34m[Sec Thread] Secure image initializing!\033[0m\r\n");
#ifdef TFM_CORE_DEBUG
- LOG_MSG("TF-M isolation level is: %d\r\n", TFM_LVL);
+ SPMLOG_DBGMSGVAL("TF-M isolation level is: ", TFM_LVL);
+ SPMLOG_DBGMSG("\r\n");
#endif
tfm_core_validate_boot_data();
@@ -131,8 +138,7 @@
tfm_core_panic();
}
/* Print the TF-M version */
- LOG_MSG("\033[1;34mBooting TFM v%d.%d %s\033[0m\r\n",
- VERSION_MAJOR, VERSION_MINOR, VERSION_STRING);
+ PRINT_TFM_VERSION;
if (tfm_spm_db_init() != SPM_ERR_OK) {
tfm_core_panic();
@@ -173,7 +179,7 @@
#ifdef TFM_CORE_DEBUG
/* Jumps to non-secure code */
- LOG_MSG("\033[1;34mJumping to non-secure code...\033[0m\r\n");
+ SPMLOG_DBGMSG("\033[1;34mJumping to non-secure code...\033[0m\r\n");
#endif
jump_to_ns_code();
diff --git a/secure_fw/spm/cmsis_psa/main.c b/secure_fw/spm/cmsis_psa/main.c
index 6ddec00..e539de6 100644
--- a/secure_fw/spm/cmsis_psa/main.c
+++ b/secure_fw/spm/cmsis_psa/main.c
@@ -6,13 +6,13 @@
*/
#include "common/tfm_boot_data.h"
-#include "log/tfm_log.h"
#include "region.h"
#include "spm_ipc.h"
#include "tfm_hal_platform.h"
#include "tfm_irq_list.h"
#include "tfm_nspm.h"
#include "tfm_spm_hal.h"
+#include "tfm_spm_log.h"
#include "tfm_version.h"
/*
@@ -29,6 +29,12 @@
#error Only TFM_LVL 1 and 2 are supported for IPC model!
#endif
+#define PRINT_TFM_VERSION SPMLOG_INFMSGVAL("Booting TFM v", VERSION_MAJOR); \
+ SPMLOG_INFMSGVAL(".", VERSION_MINOR); \
+ SPMLOG_INFMSG(" "); \
+ SPMLOG_INFMSG(VERSION_STRING); \
+ SPMLOG_INFMSG("\r\n")
+
REGION_DECLARE(Image$$, ARM_LIB_STACK_MSP, $$ZI$$Base);
static int32_t tfm_core_init(void)
@@ -74,10 +80,11 @@
/* Configures architecture-specific coprocessors */
tfm_arch_configure_coprocessors();
- LOG_MSG("\033[1;34m[Sec Thread] Secure image initializing!\033[0m\r\n");
+ SPMLOG_INFMSG("\033[1;34m[Sec Thread] Secure image initializing!\033[0m\r\n");
#ifdef TFM_CORE_DEBUG
- LOG_MSG("TF-M isolation level is: %d\r\n", TFM_LVL);
+ SPMLOG_DBGMSGVAL("TF-M isolation level is: ", TFM_LVL);
+ SPMLOG_DBGMSG("\r\n");
#endif
tfm_core_validate_boot_data();
@@ -126,8 +133,7 @@
tfm_core_panic();
}
/* Print the TF-M version */
- LOG_MSG("\033[1;34mBooting TFM v%d.%d %s\033[0m\r\n",
- VERSION_MAJOR, VERSION_MINOR, VERSION_STRING);
+ PRINT_TFM_VERSION;
if (tfm_spm_db_init() != SPM_ERR_OK) {
tfm_core_panic();
diff --git a/secure_fw/spm/cmsis_psa/tfm_multi_core.c b/secure_fw/spm/cmsis_psa/tfm_multi_core.c
index c40b415..c985e90 100644
--- a/secure_fw/spm/cmsis_psa/tfm_multi_core.c
+++ b/secure_fw/spm/cmsis_psa/tfm_multi_core.c
@@ -4,14 +4,13 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#include "tfm_spm_hal.h"
#include "psa/client.h"
+#include "tfm_assert.h"
#include "tfm_nspm.h"
#include "tfm_spe_mailbox.h"
+#include "tfm_spm_hal.h"
+#include "tfm_spm_log.h"
#include "utilities.h"
-#include "log/tfm_assert.h"
-#include "log/tfm_log.h"
-#include "log/tfm_assert.h"
#define DEFAULT_NS_CLIENT_ID (-1)
@@ -24,7 +23,7 @@
{
#ifdef TFM_CORE_DEBUG
/* Boot up non-secure core */
- LOG_MSG("Enabling non-secure core...");
+ SPMLOG_DBGMSG("Enabling non-secure core...");
#endif
tfm_spm_hal_boot_ns_cpu(tfm_spm_hal_get_ns_VTOR());
diff --git a/secure_fw/spm/cmsis_psa/tfm_nspm_ipc.c b/secure_fw/spm/cmsis_psa/tfm_nspm_ipc.c
index 32c2a9c..00e2d92 100644
--- a/secure_fw/spm/cmsis_psa/tfm_nspm_ipc.c
+++ b/secure_fw/spm/cmsis_psa/tfm_nspm_ipc.c
@@ -11,8 +11,6 @@
#include "tfm_nspm.h"
#include "utilities.h"
#include "ext/tz_context.h"
-#include "log/tfm_assert.h"
-#include "log/tfm_log.h"
#define DEFAULT_NS_CLIENT_ID ((int32_t)-1)
diff --git a/interface/include/log/tfm_assert.h b/secure_fw/spm/include/tfm_assert.h
similarity index 68%
rename from interface/include/log/tfm_assert.h
rename to secure_fw/spm/include/tfm_assert.h
index 67d114d..803a70d 100644
--- a/interface/include/log/tfm_assert.h
+++ b/secure_fw/spm/include/tfm_assert.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -8,14 +8,16 @@
#ifndef __TFM_ASSERT_H__
#define __TFM_ASSERT_H__
-#include "tfm_log_raw.h"
+#include "tfm_spm_log.h"
/* Functions and macros in this file is for 'thread mode' usage. */
#define TFM_ASSERT(cond) \
do { \
if (!(cond)) { \
- tfm_log_printf("Assert:%s:%d", __FUNCTION__, __LINE__); \
+ SPMLOG_INFMSG("Assert:"); \
+ SPMLOG_INFMSG(__FUNCTION__); \
+ SPMLOG_INFMSGVAL(",", __LINE__); \
while (1) \
; \
} \