CC312: Fork CC312 runtime library inside tf-m
Files from https://github.com/ARM-software/cryptocell-312-runtime, on
commit a31f19d6fa2173c53f5181a90af100866a78c314
Change-Id: Idd00e58a5bb694de978207823e7553ec051a67ed
Signed-off-by: Raef Coles <raef.coles@arm.com>
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/cc312_cerberus_Register_Description.htm b/lib/ext/cryptocell-312-runtime/shared/hw/include/cc312_cerberus_Register_Description.htm
new file mode 100755
index 0000000..872a8f9
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/cc312_cerberus_Register_Description.htm
@@ -0,0 +1,13221 @@
+<table align="center" frame="border" rules="cols" border="1">
+ <tr>
+ <td valign="top"> created by : </td>
+ </tr>
+ <tr>
+ <td valign="top"> generated by : yoesha01</td>
+ </tr>
+ <tr>
+ <td valign="top"> generated from : /home/hw/yoesha01/P4/cc_7/cc312_cerberus/env/src/regs/XL/regdb_iot.xlsx</td>
+ </tr>
+ <tr>
+ <td valign="top"> IDesignSpec rev : idsbatch v 4.12.19.1 </td>
+ </tr>
+ <tr>
+ <td valign="top"> XML Revision : </td>
+ </tr>
+</table>
+<center>
+ <h1>chip : CryptoCell</h1>
+</center>
+<table border="0">
+ <tr>
+ <td width="40"></td>
+ <td>
+ <table frame="border">
+ <tr>
+ <td align="center" colspan="3"><b>LEGEND</b></td>
+ </tr>
+ <tr>
+ <td colspan="3"><b>RO : Read Only </b></td>
+ </tr>
+ <tr>
+ <td colspan="3"><b>WO : Write Only </b></td>
+ </tr>
+ <tr>
+ <td colspan="3"><b>RW : Read/Write </b></td>
+ </tr>
+ <tr>
+ <td colspan="3"><b>RW1: Read/Write once </b></td>
+ </tr>
+ <tr>
+ <td colspan="3"><b>W1 : Write once </b></td>
+ </tr>
+ <tr>
+ <td colspan="3"><b>RWC: Read/Write change (Register value changes internally) </b></td>
+ </tr>
+ <tr>
+ <td colspan="3"><b>RC : Read Change (Readable, register valus changes) </b></td>
+ </tr>
+ <tr>
+ <td colspan="3"><b>WM : Write Modify (Write triggers an internal FSM) </b></td>
+ </tr>
+ </table>
+ </td>
+ </tr>
+</table>
+<table border="0">
+ <tr>
+ <td width="40"></td>
+ <td>
+ <table frame="border">
+ <tr>
+ <td align="center" colspan="3"><b>INDEX</b></td>
+ </tr>
+ <tr>
+ <td width="100">1.1</td>
+ <td>block: <a href="#1.1">PKA</a></td>
+ <td width="60"></td>
+ <td>0x000000000</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.1</td>
+ <td>reg: <a href="#1.1.1">MEMORY_MAP0</a></td>
+ <td width="60"></td>
+ <td>0x000000000</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.2</td>
+ <td>reg: <a href="#1.1.2">MEMORY_MAP1</a></td>
+ <td width="60"></td>
+ <td>0x000000004</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.3</td>
+ <td>reg: <a href="#1.1.3">MEMORY_MAP2</a></td>
+ <td width="60"></td>
+ <td>0x000000008</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.4</td>
+ <td>reg: <a href="#1.1.4">MEMORY_MAP3</a></td>
+ <td width="60"></td>
+ <td>0x00000000C</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.5</td>
+ <td>reg: <a href="#1.1.5">MEMORY_MAP4</a></td>
+ <td width="60"></td>
+ <td>0x000000010</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.6</td>
+ <td>reg: <a href="#1.1.6">MEMORY_MAP5</a></td>
+ <td width="60"></td>
+ <td>0x000000014</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.7</td>
+ <td>reg: <a href="#1.1.7">MEMORY_MAP6</a></td>
+ <td width="60"></td>
+ <td>0x000000018</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.8</td>
+ <td>reg: <a href="#1.1.8">MEMORY_MAP7</a></td>
+ <td width="60"></td>
+ <td>0x00000001C</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.9</td>
+ <td>reg: <a href="#1.1.9">MEMORY_MAP8</a></td>
+ <td width="60"></td>
+ <td>0x000000020</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.10</td>
+ <td>reg: <a href="#1.1.10">MEMORY_MAP9</a></td>
+ <td width="60"></td>
+ <td>0x000000024</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.11</td>
+ <td>reg: <a href="#1.1.11">MEMORY_MAP10</a></td>
+ <td width="60"></td>
+ <td>0x000000028</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.12</td>
+ <td>reg: <a href="#1.1.12">MEMORY_MAP11</a></td>
+ <td width="60"></td>
+ <td>0x00000002C</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.13</td>
+ <td>reg: <a href="#1.1.13">MEMORY_MAP12</a></td>
+ <td width="60"></td>
+ <td>0x000000030</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.14</td>
+ <td>reg: <a href="#1.1.14">MEMORY_MAP13</a></td>
+ <td width="60"></td>
+ <td>0x000000034</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.15</td>
+ <td>reg: <a href="#1.1.15">MEMORY_MAP14</a></td>
+ <td width="60"></td>
+ <td>0x000000038</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.16</td>
+ <td>reg: <a href="#1.1.16">MEMORY_MAP15</a></td>
+ <td width="60"></td>
+ <td>0x00000003C</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.17</td>
+ <td>reg: <a href="#1.1.17">MEMORY_MAP16</a></td>
+ <td width="60"></td>
+ <td>0x000000040</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.18</td>
+ <td>reg: <a href="#1.1.18">MEMORY_MAP17</a></td>
+ <td width="60"></td>
+ <td>0x000000044</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.19</td>
+ <td>reg: <a href="#1.1.19">MEMORY_MAP18</a></td>
+ <td width="60"></td>
+ <td>0x000000048</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.20</td>
+ <td>reg: <a href="#1.1.20">MEMORY_MAP19</a></td>
+ <td width="60"></td>
+ <td>0x00000004C</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.21</td>
+ <td>reg: <a href="#1.1.21">MEMORY_MAP20</a></td>
+ <td width="60"></td>
+ <td>0x000000050</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.22</td>
+ <td>reg: <a href="#1.1.22">MEMORY_MAP21</a></td>
+ <td width="60"></td>
+ <td>0x000000054</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.23</td>
+ <td>reg: <a href="#1.1.23">MEMORY_MAP22</a></td>
+ <td width="60"></td>
+ <td>0x000000058</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.24</td>
+ <td>reg: <a href="#1.1.24">MEMORY_MAP23</a></td>
+ <td width="60"></td>
+ <td>0x00000005C</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.25</td>
+ <td>reg: <a href="#1.1.25">MEMORY_MAP24</a></td>
+ <td width="60"></td>
+ <td>0x000000060</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.26</td>
+ <td>reg: <a href="#1.1.26">MEMORY_MAP25</a></td>
+ <td width="60"></td>
+ <td>0x000000064</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.27</td>
+ <td>reg: <a href="#1.1.27">MEMORY_MAP26</a></td>
+ <td width="60"></td>
+ <td>0x000000068</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.28</td>
+ <td>reg: <a href="#1.1.28">MEMORY_MAP27</a></td>
+ <td width="60"></td>
+ <td>0x00000006C</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.29</td>
+ <td>reg: <a href="#1.1.29">MEMORY_MAP28</a></td>
+ <td width="60"></td>
+ <td>0x000000070</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.30</td>
+ <td>reg: <a href="#1.1.30">MEMORY_MAP29</a></td>
+ <td width="60"></td>
+ <td>0x000000074</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.31</td>
+ <td>reg: <a href="#1.1.31">MEMORY_MAP30</a></td>
+ <td width="60"></td>
+ <td>0x000000078</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.32</td>
+ <td>reg: <a href="#1.1.32">MEMORY_MAP31</a></td>
+ <td width="60"></td>
+ <td>0x00000007C</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.33</td>
+ <td>reg: <a href="#1.1.33">OPCODE</a></td>
+ <td width="60"></td>
+ <td>0x000000080</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.34</td>
+ <td>reg: <a href="#1.1.34">N_NP_T0_T1_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x000000084</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.35</td>
+ <td>reg: <a href="#1.1.35">PKA_STATUS</a></td>
+ <td width="60"></td>
+ <td>0x000000088</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.36</td>
+ <td>reg: <a href="#1.1.36">PKA_SW_RESET</a></td>
+ <td width="60"></td>
+ <td>0x00000008C</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.37</td>
+ <td>reg: <a href="#1.1.37">PKA_L0</a></td>
+ <td width="60"></td>
+ <td>0x000000090</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.38</td>
+ <td>reg: <a href="#1.1.38">PKA_L1</a></td>
+ <td width="60"></td>
+ <td>0x000000094</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.39</td>
+ <td>reg: <a href="#1.1.39">PKA_L2</a></td>
+ <td width="60"></td>
+ <td>0x000000098</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.40</td>
+ <td>reg: <a href="#1.1.40">PKA_L3</a></td>
+ <td width="60"></td>
+ <td>0x00000009C</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.41</td>
+ <td>reg: <a href="#1.1.41">PKA_L4</a></td>
+ <td width="60"></td>
+ <td>0x0000000A0</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.42</td>
+ <td>reg: <a href="#1.1.42">PKA_L5</a></td>
+ <td width="60"></td>
+ <td>0x0000000A4</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.43</td>
+ <td>reg: <a href="#1.1.43">PKA_L6</a></td>
+ <td width="60"></td>
+ <td>0x0000000A8</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.44</td>
+ <td>reg: <a href="#1.1.44">PKA_L7</a></td>
+ <td width="60"></td>
+ <td>0x0000000AC</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.45</td>
+ <td>reg: <a href="#1.1.45">PKA_PIPE_RDY</a></td>
+ <td width="60"></td>
+ <td>0x0000000B0</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.46</td>
+ <td>reg: <a href="#1.1.46">PKA_DONE</a></td>
+ <td width="60"></td>
+ <td>0x0000000B4</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.47</td>
+ <td>reg: <a href="#1.1.47">PKA_MON_SELECT</a></td>
+ <td width="60"></td>
+ <td>0x0000000B8</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.48</td>
+ <td>reg: <a href="#1.1.48">PKA_VERSION</a></td>
+ <td width="60"></td>
+ <td>0x0000000C4</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.49</td>
+ <td>reg: <a href="#1.1.49">PKA_MON_READ</a></td>
+ <td width="60"></td>
+ <td>0x0000000D0</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.50</td>
+ <td>reg: <a href="#1.1.50">PKA_SRAM_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x0000000D4</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.51</td>
+ <td>reg: <a href="#1.1.51">PKA_SRAM_WDATA</a></td>
+ <td width="60"></td>
+ <td>0x0000000D8</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.52</td>
+ <td>reg: <a href="#1.1.52">PKA_SRAM_RDATA</a></td>
+ <td width="60"></td>
+ <td>0x0000000DC</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.53</td>
+ <td>reg: <a href="#1.1.53">PKA_SRAM_WR_CLR</a></td>
+ <td width="60"></td>
+ <td>0x0000000E0</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.54</td>
+ <td>reg: <a href="#1.1.54">PKA_SRAM_RADDR</a></td>
+ <td width="60"></td>
+ <td>0x0000000E4</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.55</td>
+ <td>reg: <a href="#1.1.55">PKA_WORD_ACCESS</a></td>
+ <td width="60"></td>
+ <td>0x0000000F0</td>
+ </tr>
+ <tr>
+ <td width="100">1.1.56</td>
+ <td>reg: <a href="#1.1.56">PKA_BUFF_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x0000000F8</td>
+ </tr>
+ <tr>
+ <td width="100">1.2</td>
+ <td>block: <a href="#1.2">RNG</a></td>
+ <td width="60"></td>
+ <td>0x000000100</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.1</td>
+ <td>reg: <a href="#1.2.1">RNG_IMR</a></td>
+ <td width="60"></td>
+ <td>0x000000100</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.2</td>
+ <td>reg: <a href="#1.2.2">RNG_ISR</a></td>
+ <td width="60"></td>
+ <td>0x000000104</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.3</td>
+ <td>reg: <a href="#1.2.3">RNG_ICR</a></td>
+ <td width="60"></td>
+ <td>0x000000108</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.4</td>
+ <td>reg: <a href="#1.2.4">TRNG_CONFIG</a></td>
+ <td width="60"></td>
+ <td>0x00000010C</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.5</td>
+ <td>reg: <a href="#1.2.5">TRNG_VALID</a></td>
+ <td width="60"></td>
+ <td>0x000000110</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.6</td>
+ <td>reg: <a href="#1.2.6">EHR_DATA_0</a></td>
+ <td width="60"></td>
+ <td>0x000000114</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.7</td>
+ <td>reg: <a href="#1.2.7">EHR_DATA_1</a></td>
+ <td width="60"></td>
+ <td>0x000000118</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.8</td>
+ <td>reg: <a href="#1.2.8">EHR_DATA_2</a></td>
+ <td width="60"></td>
+ <td>0x00000011C</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.9</td>
+ <td>reg: <a href="#1.2.9">EHR_DATA_3</a></td>
+ <td width="60"></td>
+ <td>0x000000120</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.10</td>
+ <td>reg: <a href="#1.2.10">EHR_DATA_4</a></td>
+ <td width="60"></td>
+ <td>0x000000124</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.11</td>
+ <td>reg: <a href="#1.2.11">EHR_DATA_5</a></td>
+ <td width="60"></td>
+ <td>0x000000128</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.12</td>
+ <td>reg: <a href="#1.2.12">RND_SOURCE_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x00000012C</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.13</td>
+ <td>reg: <a href="#1.2.13">SAMPLE_CNT1</a></td>
+ <td width="60"></td>
+ <td>0x000000130</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.14</td>
+ <td>reg: <a href="#1.2.14">AUTOCORR_STATISTIC</a></td>
+ <td width="60"></td>
+ <td>0x000000134</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.15</td>
+ <td>reg: <a href="#1.2.15">TRNG_DEBUG_CONTROL</a></td>
+ <td width="60"></td>
+ <td>0x000000138</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.16</td>
+ <td>reg: <a href="#1.2.16">RNG_SW_RESET</a></td>
+ <td width="60"></td>
+ <td>0x000000140</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.17</td>
+ <td>reg: <a href="#1.2.17">RNG_DEBUG_EN_INPUT</a></td>
+ <td width="60"></td>
+ <td>0x0000001B4</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.18</td>
+ <td>reg: <a href="#1.2.18">RNG_BUSY</a></td>
+ <td width="60"></td>
+ <td>0x0000001B8</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.19</td>
+ <td>reg: <a href="#1.2.19">RST_BITS_COUNTER</a></td>
+ <td width="60"></td>
+ <td>0x0000001BC</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.20</td>
+ <td>reg: <a href="#1.2.20">RNG_VERSION</a></td>
+ <td width="60"></td>
+ <td>0x0000001C0</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.21</td>
+ <td>reg: <a href="#1.2.21">RNG_CLK_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x0000001C4</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.22</td>
+ <td>reg: <a href="#1.2.22">RNG_DMA_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x0000001C8</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.23</td>
+ <td>reg: <a href="#1.2.23">RNG_DMA_SRC_MASK</a></td>
+ <td width="60"></td>
+ <td>0x0000001CC</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.24</td>
+ <td>reg: <a href="#1.2.24">RNG_DMA_SRAM_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x0000001D0</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.25</td>
+ <td>reg: <a href="#1.2.25">RNG_DMA_SAMPLES_NUM</a></td>
+ <td width="60"></td>
+ <td>0x0000001D4</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.26</td>
+ <td>reg: <a href="#1.2.26">RNG_WATCHDOG_VAL</a></td>
+ <td width="60"></td>
+ <td>0x0000001D8</td>
+ </tr>
+ <tr>
+ <td width="100">1.2.27</td>
+ <td>reg: <a href="#1.2.27">RNG_DMA_STATUS</a></td>
+ <td width="60"></td>
+ <td>0x0000001DC</td>
+ </tr>
+ <tr>
+ <td width="100">1.3</td>
+ <td>block: <a href="#1.3">CHACHA</a></td>
+ <td width="60"></td>
+ <td>0x000000380</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.1</td>
+ <td>reg: <a href="#1.3.1">CHACHA_CONTROL_REG</a></td>
+ <td width="60"></td>
+ <td>0x000000380</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.2</td>
+ <td>reg: <a href="#1.3.2">CHACHA_VERSION</a></td>
+ <td width="60"></td>
+ <td>0x000000384</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.3</td>
+ <td>reg: <a href="#1.3.3">CHACHA_KEY0</a></td>
+ <td width="60"></td>
+ <td>0x000000388</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.4</td>
+ <td>reg: <a href="#1.3.4">CHACHA_KEY1</a></td>
+ <td width="60"></td>
+ <td>0x00000038C</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.5</td>
+ <td>reg: <a href="#1.3.5">CHACHA_KEY2</a></td>
+ <td width="60"></td>
+ <td>0x000000390</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.6</td>
+ <td>reg: <a href="#1.3.6">CHACHA_KEY3</a></td>
+ <td width="60"></td>
+ <td>0x000000394</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.7</td>
+ <td>reg: <a href="#1.3.7">CHACHA_KEY4</a></td>
+ <td width="60"></td>
+ <td>0x000000398</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.8</td>
+ <td>reg: <a href="#1.3.8">CHACHA_KEY5</a></td>
+ <td width="60"></td>
+ <td>0x00000039C</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.9</td>
+ <td>reg: <a href="#1.3.9">CHACHA_KEY6</a></td>
+ <td width="60"></td>
+ <td>0x0000003A0</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.10</td>
+ <td>reg: <a href="#1.3.10">CHACHA_KEY7</a></td>
+ <td width="60"></td>
+ <td>0x0000003A4</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.11</td>
+ <td>reg: <a href="#1.3.11">CHACHA_IV_0</a></td>
+ <td width="60"></td>
+ <td>0x0000003A8</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.12</td>
+ <td>reg: <a href="#1.3.12">CHACHA_IV_1</a></td>
+ <td width="60"></td>
+ <td>0x0000003AC</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.13</td>
+ <td>reg: <a href="#1.3.13">CHACHA_BUSY</a></td>
+ <td width="60"></td>
+ <td>0x0000003B0</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.14</td>
+ <td>reg: <a href="#1.3.14">CHACHA_HW_FLAGS</a></td>
+ <td width="60"></td>
+ <td>0x0000003B4</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.15</td>
+ <td>reg: <a href="#1.3.15">CHACHA_BLOCK_CNT_LSB</a></td>
+ <td width="60"></td>
+ <td>0x0000003B8</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.16</td>
+ <td>reg: <a href="#1.3.16">CHACHA_BLOCK_CNT_MSB</a></td>
+ <td width="60"></td>
+ <td>0x0000003BC</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.17</td>
+ <td>reg: <a href="#1.3.17">CHACHA_SW_RESET</a></td>
+ <td width="60"></td>
+ <td>0x0000003C0</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.18</td>
+ <td>reg: <a href="#1.3.18">CHACHA_FOR_POLY_KEY0</a></td>
+ <td width="60"></td>
+ <td>0x0000003C4</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.19</td>
+ <td>reg: <a href="#1.3.19">CHACHA_FOR_POLY_KEY1</a></td>
+ <td width="60"></td>
+ <td>0x0000003C8</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.20</td>
+ <td>reg: <a href="#1.3.20">CHACHA_FOR_POLY_KEY2</a></td>
+ <td width="60"></td>
+ <td>0x0000003CC</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.21</td>
+ <td>reg: <a href="#1.3.21">CHACHA_FOR_POLY_KEY3</a></td>
+ <td width="60"></td>
+ <td>0x0000003D0</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.22</td>
+ <td>reg: <a href="#1.3.22">CHACHA_FOR_POLY_KEY4</a></td>
+ <td width="60"></td>
+ <td>0x0000003D4</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.23</td>
+ <td>reg: <a href="#1.3.23">CHACHA_FOR_POLY_KEY5</a></td>
+ <td width="60"></td>
+ <td>0x0000003D8</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.24</td>
+ <td>reg: <a href="#1.3.24">CHACHA_FOR_POLY_KEY6</a></td>
+ <td width="60"></td>
+ <td>0x0000003DC</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.25</td>
+ <td>reg: <a href="#1.3.25">CHACHA_FOR_POLY_KEY7</a></td>
+ <td width="60"></td>
+ <td>0x0000003E0</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.26</td>
+ <td>reg: <a href="#1.3.26">CHACHA_BYTE_WORD_ORDER_CNTL_REG</a></td>
+ <td width="60"></td>
+ <td>0x0000003E4</td>
+ </tr>
+ <tr>
+ <td width="100">1.3.27</td>
+ <td>reg: <a href="#1.3.27">CHACHA_DEBUG_REG</a></td>
+ <td width="60"></td>
+ <td>0x0000003E8</td>
+ </tr>
+ <tr>
+ <td width="100">1.4</td>
+ <td>block: <a href="#1.4">AES</a></td>
+ <td width="60"></td>
+ <td>0x000000400</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.1</td>
+ <td>reg: <a href="#1.4.1">AES_KEY_0_0</a></td>
+ <td width="60"></td>
+ <td>0x000000400</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.2</td>
+ <td>reg: <a href="#1.4.2">AES_KEY_0_1</a></td>
+ <td width="60"></td>
+ <td>0x000000404</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.3</td>
+ <td>reg: <a href="#1.4.3">AES_KEY_0_2</a></td>
+ <td width="60"></td>
+ <td>0x000000408</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.4</td>
+ <td>reg: <a href="#1.4.4">AES_KEY_0_3</a></td>
+ <td width="60"></td>
+ <td>0x00000040C</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.5</td>
+ <td>reg: <a href="#1.4.5">AES_KEY_0_4</a></td>
+ <td width="60"></td>
+ <td>0x000000410</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.6</td>
+ <td>reg: <a href="#1.4.6">AES_KEY_0_5</a></td>
+ <td width="60"></td>
+ <td>0x000000414</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.7</td>
+ <td>reg: <a href="#1.4.7">AES_KEY_0_6</a></td>
+ <td width="60"></td>
+ <td>0x000000418</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.8</td>
+ <td>reg: <a href="#1.4.8">AES_KEY_0_7</a></td>
+ <td width="60"></td>
+ <td>0x00000041C</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.9</td>
+ <td>reg: <a href="#1.4.9">AES_KEY_1_0</a></td>
+ <td width="60"></td>
+ <td>0x000000420</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.10</td>
+ <td>reg: <a href="#1.4.10">AES_KEY_1_1</a></td>
+ <td width="60"></td>
+ <td>0x000000424</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.11</td>
+ <td>reg: <a href="#1.4.11">AES_KEY_1_2</a></td>
+ <td width="60"></td>
+ <td>0x000000428</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.12</td>
+ <td>reg: <a href="#1.4.12">AES_KEY_1_3</a></td>
+ <td width="60"></td>
+ <td>0x00000042C</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.13</td>
+ <td>reg: <a href="#1.4.13">AES_KEY_1_4</a></td>
+ <td width="60"></td>
+ <td>0x000000430</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.14</td>
+ <td>reg: <a href="#1.4.14">AES_KEY_1_5</a></td>
+ <td width="60"></td>
+ <td>0x000000434</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.15</td>
+ <td>reg: <a href="#1.4.15">AES_KEY_1_6</a></td>
+ <td width="60"></td>
+ <td>0x000000438</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.16</td>
+ <td>reg: <a href="#1.4.16">AES_KEY_1_7</a></td>
+ <td width="60"></td>
+ <td>0x00000043C</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.17</td>
+ <td>reg: <a href="#1.4.17">AES_IV_0_0</a></td>
+ <td width="60"></td>
+ <td>0x000000440</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.18</td>
+ <td>reg: <a href="#1.4.18">AES_IV_0_1</a></td>
+ <td width="60"></td>
+ <td>0x000000444</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.19</td>
+ <td>reg: <a href="#1.4.19">AES_IV_0_2</a></td>
+ <td width="60"></td>
+ <td>0x000000448</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.20</td>
+ <td>reg: <a href="#1.4.20">AES_IV_0_3</a></td>
+ <td width="60"></td>
+ <td>0x00000044C</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.21</td>
+ <td>reg: <a href="#1.4.21">AES_IV_1_0</a></td>
+ <td width="60"></td>
+ <td>0x000000450</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.22</td>
+ <td>reg: <a href="#1.4.22">AES_IV_1_1</a></td>
+ <td width="60"></td>
+ <td>0x000000454</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.23</td>
+ <td>reg: <a href="#1.4.23">AES_IV_1_2</a></td>
+ <td width="60"></td>
+ <td>0x000000458</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.24</td>
+ <td>reg: <a href="#1.4.24">AES_IV_1_3</a></td>
+ <td width="60"></td>
+ <td>0x00000045C</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.25</td>
+ <td>reg: <a href="#1.4.25">AES_CTR_0_0</a></td>
+ <td width="60"></td>
+ <td>0x000000460</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.26</td>
+ <td>reg: <a href="#1.4.26">AES_CTR_0_1</a></td>
+ <td width="60"></td>
+ <td>0x000000464</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.27</td>
+ <td>reg: <a href="#1.4.27">AES_CTR_0_2</a></td>
+ <td width="60"></td>
+ <td>0x000000468</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.28</td>
+ <td>reg: <a href="#1.4.28">AES_CTR_0_3</a></td>
+ <td width="60"></td>
+ <td>0x00000046C</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.29</td>
+ <td>reg: <a href="#1.4.29">AES_BUSY</a></td>
+ <td width="60"></td>
+ <td>0x000000470</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.30</td>
+ <td>reg: <a href="#1.4.30">AES_SK</a></td>
+ <td width="60"></td>
+ <td>0x000000478</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.31</td>
+ <td>reg: <a href="#1.4.31">AES_CMAC_INIT</a></td>
+ <td width="60"></td>
+ <td>0x00000047C</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.32</td>
+ <td>reg: <a href="#1.4.32">AES_SK1</a></td>
+ <td width="60"></td>
+ <td>0x0000004B4</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.33</td>
+ <td>reg: <a href="#1.4.33">AES_REMAINING_BYTES</a></td>
+ <td width="60"></td>
+ <td>0x0000004BC</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.34</td>
+ <td>reg: <a href="#1.4.34">AES_CONTROL</a></td>
+ <td width="60"></td>
+ <td>0x0000004C0</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.35</td>
+ <td>reg: <a href="#1.4.35">AES_HW_FLAGS</a></td>
+ <td width="60"></td>
+ <td>0x0000004C8</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.36</td>
+ <td>reg: <a href="#1.4.36">AES_CTR_NO_INCREMENT</a></td>
+ <td width="60"></td>
+ <td>0x0000004D8</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.37</td>
+ <td>reg: <a href="#1.4.37">AES_DFA_IS_ON</a></td>
+ <td width="60"></td>
+ <td>0x0000004F0</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.38</td>
+ <td>reg: <a href="#1.4.38">AES_DFA_ERR_STATUS</a></td>
+ <td width="60"></td>
+ <td>0x0000004F8</td>
+ </tr>
+ <tr>
+ <td width="100">1.4.39</td>
+ <td>reg: <a href="#1.4.39">AES_CMAC_SIZE0_KICK</a></td>
+ <td width="60"></td>
+ <td>0x000000524</td>
+ </tr>
+ <tr>
+ <td width="100">1.5</td>
+ <td>block: <a href="#1.5">HASH</a></td>
+ <td width="60"></td>
+ <td>0x000000640</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.1</td>
+ <td>reg: <a href="#1.5.1">HASH_H0</a></td>
+ <td width="60"></td>
+ <td>0x000000640</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.2</td>
+ <td>reg: <a href="#1.5.2">HASH_H1</a></td>
+ <td width="60"></td>
+ <td>0x000000644</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.3</td>
+ <td>reg: <a href="#1.5.3">HASH_H2</a></td>
+ <td width="60"></td>
+ <td>0x000000648</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.4</td>
+ <td>reg: <a href="#1.5.4">HASH_H3</a></td>
+ <td width="60"></td>
+ <td>0x00000064C</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.5</td>
+ <td>reg: <a href="#1.5.5">HASH_H4</a></td>
+ <td width="60"></td>
+ <td>0x000000650</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.6</td>
+ <td>reg: <a href="#1.5.6">HASH_H5</a></td>
+ <td width="60"></td>
+ <td>0x000000654</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.7</td>
+ <td>reg: <a href="#1.5.7">HASH_H6</a></td>
+ <td width="60"></td>
+ <td>0x000000658</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.8</td>
+ <td>reg: <a href="#1.5.8">HASH_H7</a></td>
+ <td width="60"></td>
+ <td>0x00000065C</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.9</td>
+ <td>reg: <a href="#1.5.9">HASH_H8</a></td>
+ <td width="60"></td>
+ <td>0x000000660</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.10</td>
+ <td>reg: <a href="#1.5.10">AUTO_HW_PADDING</a></td>
+ <td width="60"></td>
+ <td>0x000000684</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.11</td>
+ <td>reg: <a href="#1.5.11">HASH_XOR_DIN</a></td>
+ <td width="60"></td>
+ <td>0x000000688</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.12</td>
+ <td>reg: <a href="#1.5.12">LOAD_INIT_STATE</a></td>
+ <td width="60"></td>
+ <td>0x000000694</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.13</td>
+ <td>reg: <a href="#1.5.13">HASH_SEL_AES_MAC</a></td>
+ <td width="60"></td>
+ <td>0x0000006A4</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.14</td>
+ <td>reg: <a href="#1.5.14">HASH_VERSION</a></td>
+ <td width="60"></td>
+ <td>0x0000007B0</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.15</td>
+ <td>reg: <a href="#1.5.15">HASH_CONTROL</a></td>
+ <td width="60"></td>
+ <td>0x0000007C0</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.16</td>
+ <td>reg: <a href="#1.5.16">HASH_PAD_EN</a></td>
+ <td width="60"></td>
+ <td>0x0000007C4</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.17</td>
+ <td>reg: <a href="#1.5.17">HASH_PAD_CFG</a></td>
+ <td width="60"></td>
+ <td>0x0000007C8</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.18</td>
+ <td>reg: <a href="#1.5.18">HASH_CUR_LEN_0</a></td>
+ <td width="60"></td>
+ <td>0x0000007CC</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.19</td>
+ <td>reg: <a href="#1.5.19">HASH_CUR_LEN_1</a></td>
+ <td width="60"></td>
+ <td>0x0000007D0</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.20</td>
+ <td>reg: <a href="#1.5.20">HASH_PARAM</a></td>
+ <td width="60"></td>
+ <td>0x0000007DC</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.21</td>
+ <td>reg: <a href="#1.5.21">HASH_AES_SW_RESET</a></td>
+ <td width="60"></td>
+ <td>0x0000007E4</td>
+ </tr>
+ <tr>
+ <td width="100">1.5.22</td>
+ <td>reg: <a href="#1.5.22">HASH_ENDIANESS</a></td>
+ <td width="60"></td>
+ <td>0x0000007E8</td>
+ </tr>
+ <tr>
+ <td width="100">1.6</td>
+ <td>block: <a href="#1.6">MISC</a></td>
+ <td width="60"></td>
+ <td>0x000000800</td>
+ </tr>
+ <tr>
+ <td width="100">1.6.1</td>
+ <td>reg: <a href="#1.6.1">AES_CLK_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x000000810</td>
+ </tr>
+ <tr>
+ <td width="100">1.6.2</td>
+ <td>reg: <a href="#1.6.2">HASH_CLK_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x000000818</td>
+ </tr>
+ <tr>
+ <td width="100">1.6.3</td>
+ <td>reg: <a href="#1.6.3">PKA_CLK_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x00000081C</td>
+ </tr>
+ <tr>
+ <td width="100">1.6.4</td>
+ <td>reg: <a href="#1.6.4">DMA_CLK_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x000000820</td>
+ </tr>
+ <tr>
+ <td width="100">1.6.5</td>
+ <td>reg: <a href="#1.6.5">CLK_STATUS</a></td>
+ <td width="60"></td>
+ <td>0x000000824</td>
+ </tr>
+ <tr>
+ <td width="100">1.6.6</td>
+ <td>reg: <a href="#1.6.6">CHACHA_CLK_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x000000858</td>
+ </tr>
+ <tr>
+ <td width="100">1.7</td>
+ <td>block: <a href="#1.7">CC_CTL</a></td>
+ <td width="60"></td>
+ <td>0x000000900</td>
+ </tr>
+ <tr>
+ <td width="100">1.7.1</td>
+ <td>reg: <a href="#1.7.1">CRYPTO_CTL</a></td>
+ <td width="60"></td>
+ <td>0x000000900</td>
+ </tr>
+ <tr>
+ <td width="100">1.7.2</td>
+ <td>reg: <a href="#1.7.2">CRYPTO_BUSY</a></td>
+ <td width="60"></td>
+ <td>0x000000910</td>
+ </tr>
+ <tr>
+ <td width="100">1.7.3</td>
+ <td>reg: <a href="#1.7.3">HASH_BUSY</a></td>
+ <td width="60"></td>
+ <td>0x00000091C</td>
+ </tr>
+ <tr>
+ <td width="100">1.7.4</td>
+ <td>reg: <a href="#1.7.4">CONTEXT_ID</a></td>
+ <td width="60"></td>
+ <td>0x000000930</td>
+ </tr>
+ <tr>
+ <td width="100">1.8</td>
+ <td>block: <a href="#1.8">GHASH</a></td>
+ <td width="60"></td>
+ <td>0x000000960</td>
+ </tr>
+ <tr>
+ <td width="100">1.8.1</td>
+ <td>reg: <a href="#1.8.1">GHASH_SUBKEY_0_0</a></td>
+ <td width="60"></td>
+ <td>0x000000960</td>
+ </tr>
+ <tr>
+ <td width="100">1.8.2</td>
+ <td>reg: <a href="#1.8.2">GHASH_SUBKEY_0_1</a></td>
+ <td width="60"></td>
+ <td>0x000000964</td>
+ </tr>
+ <tr>
+ <td width="100">1.8.3</td>
+ <td>reg: <a href="#1.8.3">GHASH_SUBKEY_0_2</a></td>
+ <td width="60"></td>
+ <td>0x000000968</td>
+ </tr>
+ <tr>
+ <td width="100">1.8.4</td>
+ <td>reg: <a href="#1.8.4">GHASH_SUBKEY_0_3</a></td>
+ <td width="60"></td>
+ <td>0x00000096C</td>
+ </tr>
+ <tr>
+ <td width="100">1.8.5</td>
+ <td>reg: <a href="#1.8.5">GHASH_IV_0_0</a></td>
+ <td width="60"></td>
+ <td>0x000000970</td>
+ </tr>
+ <tr>
+ <td width="100">1.8.6</td>
+ <td>reg: <a href="#1.8.6">GHASH_IV_0_1</a></td>
+ <td width="60"></td>
+ <td>0x000000974</td>
+ </tr>
+ <tr>
+ <td width="100">1.8.7</td>
+ <td>reg: <a href="#1.8.7">GHASH_IV_0_2</a></td>
+ <td width="60"></td>
+ <td>0x000000978</td>
+ </tr>
+ <tr>
+ <td width="100">1.8.8</td>
+ <td>reg: <a href="#1.8.8">GHASH_IV_0_3</a></td>
+ <td width="60"></td>
+ <td>0x00000097C</td>
+ </tr>
+ <tr>
+ <td width="100">1.8.9</td>
+ <td>reg: <a href="#1.8.9">GHASH_BUSY</a></td>
+ <td width="60"></td>
+ <td>0x000000980</td>
+ </tr>
+ <tr>
+ <td width="100">1.8.10</td>
+ <td>reg: <a href="#1.8.10">GHASH_INIT</a></td>
+ <td width="60"></td>
+ <td>0x000000984</td>
+ </tr>
+ <tr>
+ <td width="100">1.9</td>
+ <td>block: <a href="#1.9">HOST_RGF</a></td>
+ <td width="60"></td>
+ <td>0x000000A00</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.1</td>
+ <td>reg: <a href="#1.9.1">HOST_RGF_IRR</a></td>
+ <td width="60"></td>
+ <td>0x000000A00</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.2</td>
+ <td>reg: <a href="#1.9.2">HOST_RGF_IMR</a></td>
+ <td width="60"></td>
+ <td>0x000000A04</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.3</td>
+ <td>reg: <a href="#1.9.3">HOST_RGF_ICR</a></td>
+ <td width="60"></td>
+ <td>0x000000A08</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.4</td>
+ <td>reg: <a href="#1.9.4">HOST_RGF_ENDIAN</a></td>
+ <td width="60"></td>
+ <td>0x000000A0C</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.5</td>
+ <td>reg: <a href="#1.9.5">HOST_RGF_SIGNATURE</a></td>
+ <td width="60"></td>
+ <td>0x000000A24</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.6</td>
+ <td>reg: <a href="#1.9.6">HOST_BOOT</a></td>
+ <td width="60"></td>
+ <td>0x000000A28</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.7</td>
+ <td>reg: <a href="#1.9.7">HOST_CRYPTOKEY_SEL</a></td>
+ <td width="60"></td>
+ <td>0x000000A38</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.8</td>
+ <td>reg: <a href="#1.9.8">HOST_CORE_CLK_GATING_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x000000A78</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.9</td>
+ <td>reg: <a href="#1.9.9">HOST_CC_IS_IDLE</a></td>
+ <td width="60"></td>
+ <td>0x000000A7C</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.10</td>
+ <td>reg: <a href="#1.9.10">HOST_POWERDOWN</a></td>
+ <td width="60"></td>
+ <td>0x000000A80</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.11</td>
+ <td>reg: <a href="#1.9.11">HOST_REMOVE_GHASH_ENGINE</a></td>
+ <td width="60"></td>
+ <td>0x000000A84</td>
+ </tr>
+ <tr>
+ <td width="100">1.9.12</td>
+ <td>reg: <a href="#1.9.12">HOST_REMOVE_CHACHA_ENGINE</a></td>
+ <td width="60"></td>
+ <td>0x000000A88</td>
+ </tr>
+ <tr>
+ <td width="100">1.10</td>
+ <td>block: <a href="#1.10">AHB</a></td>
+ <td width="60"></td>
+ <td>0x000000B00</td>
+ </tr>
+ <tr>
+ <td width="100">1.10.1</td>
+ <td>reg: <a href="#1.10.1">AHBM_SINGLES</a></td>
+ <td width="60"></td>
+ <td>0x000000B00</td>
+ </tr>
+ <tr>
+ <td width="100">1.10.2</td>
+ <td>reg: <a href="#1.10.2">AHBM_HPROT</a></td>
+ <td width="60"></td>
+ <td>0x000000B04</td>
+ </tr>
+ <tr>
+ <td width="100">1.10.3</td>
+ <td>reg: <a href="#1.10.3">AHBM_HMASTLOCK</a></td>
+ <td width="60"></td>
+ <td>0x000000B08</td>
+ </tr>
+ <tr>
+ <td width="100">1.10.4</td>
+ <td>reg: <a href="#1.10.4">AHBM_HNONSEC</a></td>
+ <td width="60"></td>
+ <td>0x000000B0C</td>
+ </tr>
+ <tr>
+ <td width="100">1.11</td>
+ <td>block: <a href="#1.11">DIN</a></td>
+ <td width="60"></td>
+ <td>0x000000C00</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.1</td>
+ <td>reg: <a href="#1.11.1">DIN_BUFFER</a></td>
+ <td width="60"></td>
+ <td>0x000000C00</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.2</td>
+ <td>reg: <a href="#1.11.2">DIN_MEM_DMA_BUSY</a></td>
+ <td width="60"></td>
+ <td>0x000000C20</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.3</td>
+ <td>reg: <a href="#1.11.3">SRC_LLI_WORD0</a></td>
+ <td width="60"></td>
+ <td>0x000000C28</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.4</td>
+ <td>reg: <a href="#1.11.4">SRC_LLI_WORD1</a></td>
+ <td width="60"></td>
+ <td>0x000000C2C</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.5</td>
+ <td>reg: <a href="#1.11.5">SRAM_SRC_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x000000C30</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.6</td>
+ <td>reg: <a href="#1.11.6">DIN_SRAM_BYTES_LEN</a></td>
+ <td width="60"></td>
+ <td>0x000000C34</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.7</td>
+ <td>reg: <a href="#1.11.7">DIN_SRAM_DMA_BUSY</a></td>
+ <td width="60"></td>
+ <td>0x000000C38</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.8</td>
+ <td>reg: <a href="#1.11.8">DIN_SRAM_ENDIANNESS</a></td>
+ <td width="60"></td>
+ <td>0x000000C3C</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.9</td>
+ <td>reg: <a href="#1.11.9">DIN_CPU_DATA_SIZE</a></td>
+ <td width="60"></td>
+ <td>0x000000C48</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.10</td>
+ <td>reg: <a href="#1.11.10">FIFO_IN_EMPTY</a></td>
+ <td width="60"></td>
+ <td>0x000000C50</td>
+ </tr>
+ <tr>
+ <td width="100">1.11.11</td>
+ <td>reg: <a href="#1.11.11">DIN_FIFO_RST_PNTR</a></td>
+ <td width="60"></td>
+ <td>0x000000C58</td>
+ </tr>
+ <tr>
+ <td width="100">1.12</td>
+ <td>block: <a href="#1.12">DOUT</a></td>
+ <td width="60"></td>
+ <td>0x000000D00</td>
+ </tr>
+ <tr>
+ <td width="100">1.12.1</td>
+ <td>reg: <a href="#1.12.1">DOUT_BUFFER</a></td>
+ <td width="60"></td>
+ <td>0x000000D00</td>
+ </tr>
+ <tr>
+ <td width="100">1.12.2</td>
+ <td>reg: <a href="#1.12.2">DOUT_MEM_DMA_BUSY</a></td>
+ <td width="60"></td>
+ <td>0x000000D20</td>
+ </tr>
+ <tr>
+ <td width="100">1.12.3</td>
+ <td>reg: <a href="#1.12.3">DST_LLI_WORD0</a></td>
+ <td width="60"></td>
+ <td>0x000000D28</td>
+ </tr>
+ <tr>
+ <td width="100">1.12.4</td>
+ <td>reg: <a href="#1.12.4">DST_LLI_WORD1</a></td>
+ <td width="60"></td>
+ <td>0x000000D2C</td>
+ </tr>
+ <tr>
+ <td width="100">1.12.5</td>
+ <td>reg: <a href="#1.12.5">SRAM_DEST_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x000000D30</td>
+ </tr>
+ <tr>
+ <td width="100">1.12.6</td>
+ <td>reg: <a href="#1.12.6">DOUT_SRAM_BYTES_LEN</a></td>
+ <td width="60"></td>
+ <td>0x000000D34</td>
+ </tr>
+ <tr>
+ <td width="100">1.12.7</td>
+ <td>reg: <a href="#1.12.7">DOUT_SRAM_DMA_BUSY</a></td>
+ <td width="60"></td>
+ <td>0x000000D38</td>
+ </tr>
+ <tr>
+ <td width="100">1.12.8</td>
+ <td>reg: <a href="#1.12.8">DOUT_SRAM_ENDIANNESS</a></td>
+ <td width="60"></td>
+ <td>0x000000D3C</td>
+ </tr>
+ <tr>
+ <td width="100">1.12.9</td>
+ <td>reg: <a href="#1.12.9">READ_ALIGN_LAST</a></td>
+ <td width="60"></td>
+ <td>0x000000D44</td>
+ </tr>
+ <tr>
+ <td width="100">1.12.10</td>
+ <td>reg: <a href="#1.12.10">DOUT_FIFO_EMPTY</a></td>
+ <td width="60"></td>
+ <td>0x000000D50</td>
+ </tr>
+ <tr>
+ <td width="100">1.13</td>
+ <td>block: <a href="#1.13">HOST_SRAM</a></td>
+ <td width="60"></td>
+ <td>0x000000F00</td>
+ </tr>
+ <tr>
+ <td width="100">1.13.1</td>
+ <td>reg: <a href="#1.13.1">SRAM_DATA</a></td>
+ <td width="60"></td>
+ <td>0x000000F00</td>
+ </tr>
+ <tr>
+ <td width="100">1.13.2</td>
+ <td>reg: <a href="#1.13.2">SRAM_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x000000F04</td>
+ </tr>
+ <tr>
+ <td width="100">1.13.3</td>
+ <td>reg: <a href="#1.13.3">SRAM_DATA_READY</a></td>
+ <td width="60"></td>
+ <td>0x000000F08</td>
+ </tr>
+ <tr>
+ <td width="100">1.14</td>
+ <td>block: <a href="#1.14">ID_REGISTERS</a></td>
+ <td width="60"></td>
+ <td>0x000000F10</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.1</td>
+ <td>reg: <a href="#1.14.1">PERIPHERAL_ID_4</a></td>
+ <td width="60"></td>
+ <td>0x000000FD0</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.2</td>
+ <td>reg: <a href="#1.14.2">PIDRESERVED0</a></td>
+ <td width="60"></td>
+ <td>0x000000FD4</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.3</td>
+ <td>reg: <a href="#1.14.3">PIDRESERVED1</a></td>
+ <td width="60"></td>
+ <td>0x000000FD8</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.4</td>
+ <td>reg: <a href="#1.14.4">PIDRESERVED2</a></td>
+ <td width="60"></td>
+ <td>0x000000FDC</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.5</td>
+ <td>reg: <a href="#1.14.5">PERIPHERAL_ID_0</a></td>
+ <td width="60"></td>
+ <td>0x000000FE0</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.6</td>
+ <td>reg: <a href="#1.14.6">PERIPHERAL_ID_1</a></td>
+ <td width="60"></td>
+ <td>0x000000FE4</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.7</td>
+ <td>reg: <a href="#1.14.7">PERIPHERAL_ID_2</a></td>
+ <td width="60"></td>
+ <td>0x000000FE8</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.8</td>
+ <td>reg: <a href="#1.14.8">PERIPHERAL_ID_3</a></td>
+ <td width="60"></td>
+ <td>0x000000FEC</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.9</td>
+ <td>reg: <a href="#1.14.9">COMPONENT_ID_0</a></td>
+ <td width="60"></td>
+ <td>0x000000FF0</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.10</td>
+ <td>reg: <a href="#1.14.10">COMPONENT_ID_1</a></td>
+ <td width="60"></td>
+ <td>0x000000FF4</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.11</td>
+ <td>reg: <a href="#1.14.11">COMPONENT_ID_2</a></td>
+ <td width="60"></td>
+ <td>0x000000FF8</td>
+ </tr>
+ <tr>
+ <td width="100">1.14.12</td>
+ <td>reg: <a href="#1.14.12">COMPONENT_ID_3</a></td>
+ <td width="60"></td>
+ <td>0x000000FFC</td>
+ </tr>
+ <tr>
+ <td width="100">1.15</td>
+ <td>block: <a href="#1.15">AO</a></td>
+ <td width="60"></td>
+ <td>0x000001E00</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.1</td>
+ <td>reg: <a href="#1.15.1">HOST_DCU_EN0</a></td>
+ <td width="60"></td>
+ <td>0x000001E00</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.2</td>
+ <td>reg: <a href="#1.15.2">HOST_DCU_EN1</a></td>
+ <td width="60"></td>
+ <td>0x000001E04</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.3</td>
+ <td>reg: <a href="#1.15.3">HOST_DCU_EN2</a></td>
+ <td width="60"></td>
+ <td>0x000001E08</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.4</td>
+ <td>reg: <a href="#1.15.4">HOST_DCU_EN3</a></td>
+ <td width="60"></td>
+ <td>0x000001E0C</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.5</td>
+ <td>reg: <a href="#1.15.5">HOST_DCU_LOCK0</a></td>
+ <td width="60"></td>
+ <td>0x000001E10</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.6</td>
+ <td>reg: <a href="#1.15.6">HOST_DCU_LOCK1</a></td>
+ <td width="60"></td>
+ <td>0x000001E14</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.7</td>
+ <td>reg: <a href="#1.15.7">HOST_DCU_LOCK2</a></td>
+ <td width="60"></td>
+ <td>0x000001E18</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.8</td>
+ <td>reg: <a href="#1.15.8">HOST_DCU_LOCK3</a></td>
+ <td width="60"></td>
+ <td>0x000001E1C</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.9</td>
+ <td>reg: <a href="#1.15.9">AO_ICV_DCU_RESTRICTION_MASK0</a></td>
+ <td width="60"></td>
+ <td>0x000001E20</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.10</td>
+ <td>reg: <a href="#1.15.10">AO_ICV_DCU_RESTRICTION_MASK1</a></td>
+ <td width="60"></td>
+ <td>0x000001E24</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.11</td>
+ <td>reg: <a href="#1.15.11">AO_ICV_DCU_RESTRICTION_MASK2</a></td>
+ <td width="60"></td>
+ <td>0x000001E28</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.12</td>
+ <td>reg: <a href="#1.15.12">AO_ICV_DCU_RESTRICTION_MASK3</a></td>
+ <td width="60"></td>
+ <td>0x000001E2C</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.13</td>
+ <td>reg: <a href="#1.15.13">AO_CC_SEC_DEBUG_RESET</a></td>
+ <td width="60"></td>
+ <td>0x000001E30</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.14</td>
+ <td>reg: <a href="#1.15.14">HOST_AO_LOCK_BITS</a></td>
+ <td width="60"></td>
+ <td>0x000001E34</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.15</td>
+ <td>reg: <a href="#1.15.15">AO_APB_FILTERING</a></td>
+ <td width="60"></td>
+ <td>0x000001E38</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.16</td>
+ <td>reg: <a href="#1.15.16">AO_CC_GPPC</a></td>
+ <td width="60"></td>
+ <td>0x000001E3C</td>
+ </tr>
+ <tr>
+ <td width="100">1.15.17</td>
+ <td>reg: <a href="#1.15.17">HOST_RGF_CC_SW_RST</a></td>
+ <td width="60"></td>
+ <td>0x000001E40</td>
+ </tr>
+ <tr>
+ <td width="100">1.16</td>
+ <td>block: <a href="#1.16">NVM</a></td>
+ <td width="60"></td>
+ <td>0x000001F00</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.1</td>
+ <td>reg: <a href="#1.16.1">AIB_FUSE_PROG_COMPLETED</a></td>
+ <td width="60"></td>
+ <td>0x000001F04</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.2</td>
+ <td>reg: <a href="#1.16.2">NVM_DEBUG_STATUS</a></td>
+ <td width="60"></td>
+ <td>0x000001F08</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.3</td>
+ <td>reg: <a href="#1.16.3">LCS_IS_VALID</a></td>
+ <td width="60"></td>
+ <td>0x000001F0C</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.4</td>
+ <td>reg: <a href="#1.16.4">NVM_IS_IDLE</a></td>
+ <td width="60"></td>
+ <td>0x000001F10</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.5</td>
+ <td>reg: <a href="#1.16.5">LCS_REG</a></td>
+ <td width="60"></td>
+ <td>0x000001F14</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.6</td>
+ <td>reg: <a href="#1.16.6">HOST_SHADOW_KDR_REG</a></td>
+ <td width="60"></td>
+ <td>0x000001F18</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.7</td>
+ <td>reg: <a href="#1.16.7">HOST_SHADOW_KCP_REG</a></td>
+ <td width="60"></td>
+ <td>0x000001F1C</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.8</td>
+ <td>reg: <a href="#1.16.8">HOST_SHADOW_KCE_REG</a></td>
+ <td width="60"></td>
+ <td>0x000001F20</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.9</td>
+ <td>reg: <a href="#1.16.9">HOST_SHADOW_KPICV_REG</a></td>
+ <td width="60"></td>
+ <td>0x000001F24</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.10</td>
+ <td>reg: <a href="#1.16.10">HOST_SHADOW_KCEICV_REG</a></td>
+ <td width="60"></td>
+ <td>0x000001F28</td>
+ </tr>
+ <tr>
+ <td width="100">1.16.11</td>
+ <td>reg: <a href="#1.16.11">OTP_ADDR_WIDTH_DEF</a></td>
+ <td width="60"></td>
+ <td>0x000001F2C</td>
+ </tr>
+ <tr>
+ <td width="100">1.17</td>
+ <td>block: <a href="#1.17">ENV_CC_MEMORIES</a></td>
+ <td width="60"></td>
+ <td>0x060004000</td>
+ </tr>
+ <tr>
+ <td width="100">1.17.1</td>
+ <td>reg: <a href="#1.17.1">ENV_FUSE_READY</a></td>
+ <td width="60"></td>
+ <td>0x060004000</td>
+ </tr>
+ <tr>
+ <td width="100">1.17.2</td>
+ <td>reg: <a href="#1.17.2">ENV_PERF_RAM_MASTER</a></td>
+ <td width="60"></td>
+ <td>0x0600040EC</td>
+ </tr>
+ <tr>
+ <td width="100">1.17.3</td>
+ <td>reg: <a href="#1.17.3">ENV_PERF_RAM_ADDR_HIGH4</a></td>
+ <td width="60"></td>
+ <td>0x0600040F0</td>
+ </tr>
+ <tr>
+ <td width="100">1.17.4</td>
+ <td>reg: <a href="#1.17.4">ENV_FUSES_RAM</a></td>
+ <td width="60"></td>
+ <td>0x0600043EC</td>
+ </tr>
+ <tr>
+ <td width="100">1.18</td>
+ <td>block: <a href="#1.18">FPGA_ENV_REGS</a></td>
+ <td width="60"></td>
+ <td>0x060005000</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.1</td>
+ <td>reg: <a href="#1.18.1">ENV_FPGA_PKA_DEBUG_MODE</a></td>
+ <td width="60"></td>
+ <td>0x060005024</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.2</td>
+ <td>reg: <a href="#1.18.2">ENV_FPGA_SCAN_MODE</a></td>
+ <td width="60"></td>
+ <td>0x060005030</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.3</td>
+ <td>reg: <a href="#1.18.3">ENV_FPGA_CC_ALLOW_SCAN</a></td>
+ <td width="60"></td>
+ <td>0x060005034</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.4</td>
+ <td>reg: <a href="#1.18.4">ENV_FPGA_CC_HOST_INT</a></td>
+ <td width="60"></td>
+ <td>0x0600050A0</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.5</td>
+ <td>reg: <a href="#1.18.5">ENV_FPGA_CC_PUB_HOST_INT</a></td>
+ <td width="60"></td>
+ <td>0x0600050A4</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.6</td>
+ <td>reg: <a href="#1.18.6">ENV_FPGA_CC_RST_N</a></td>
+ <td width="60"></td>
+ <td>0x0600050A8</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.7</td>
+ <td>reg: <a href="#1.18.7">ENV_FPGA_RST_OVERRIDE</a></td>
+ <td width="60"></td>
+ <td>0x0600050AC</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.8</td>
+ <td>reg: <a href="#1.18.8">ENV_FPGA_CC_POR_N_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x0600050E0</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.9</td>
+ <td>reg: <a href="#1.18.9">ENV_FPGA_CC_COLD_RST</a></td>
+ <td width="60"></td>
+ <td>0x0600050FC</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.10</td>
+ <td>reg: <a href="#1.18.10">ENV_FPGA_DUMMY_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x060005108</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.11</td>
+ <td>reg: <a href="#1.18.11">ENV_FPGA_COUNTER_CLR</a></td>
+ <td width="60"></td>
+ <td>0x060005118</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.12</td>
+ <td>reg: <a href="#1.18.12">ENV_FPGA_COUNTER_RD</a></td>
+ <td width="60"></td>
+ <td>0x06000511C</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.13</td>
+ <td>reg: <a href="#1.18.13">ENV_FPGA_RNG_DEBUG_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x060005430</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.14</td>
+ <td>reg: <a href="#1.18.14">ENV_FPGA_CC_LCS</a></td>
+ <td width="60"></td>
+ <td>0x06000543C</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.15</td>
+ <td>reg: <a href="#1.18.15">ENV_FPGA_CC_IS_CM_DM_SECURE_RMA</a></td>
+ <td width="60"></td>
+ <td>0x060005440</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.16</td>
+ <td>reg: <a href="#1.18.16">ENV_FPGA_DCU_EN</a></td>
+ <td width="60"></td>
+ <td>0x060005444</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.17</td>
+ <td>reg: <a href="#1.18.17">ENV_FPGA_CC_LCS_IS_VALID</a></td>
+ <td width="60"></td>
+ <td>0x060005448</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.18</td>
+ <td>reg: <a href="#1.18.18">ENV_FPGA_POWER_DOWN</a></td>
+ <td width="60"></td>
+ <td>0x060005478</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.19</td>
+ <td>reg: <a href="#1.18.19">ENV_FPGA_DCU_H_EN</a></td>
+ <td width="60"></td>
+ <td>0x060005484</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.20</td>
+ <td>reg: <a href="#1.18.20">ENV_FPGA_VERSION</a></td>
+ <td width="60"></td>
+ <td>0x060005488</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.21</td>
+ <td>reg: <a href="#1.18.21">ENV_FPGA_ROSC_WRITE</a></td>
+ <td width="60"></td>
+ <td>0x06000548C</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.22</td>
+ <td>reg: <a href="#1.18.22">ENV_FPGA_ROSC_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x060005490</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.23</td>
+ <td>reg: <a href="#1.18.23">ENV_FPGA_RESET_SESSION_KEY</a></td>
+ <td width="60"></td>
+ <td>0x060005494</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.24</td>
+ <td>reg: <a href="#1.18.24">ENV_FPGA_SESSION_KEY_0</a></td>
+ <td width="60"></td>
+ <td>0x0600054A0</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.25</td>
+ <td>reg: <a href="#1.18.25">ENV_FPGA_SESSION_KEY_1</a></td>
+ <td width="60"></td>
+ <td>0x0600054A4</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.26</td>
+ <td>reg: <a href="#1.18.26">ENV_FPGA_SESSION_KEY_2</a></td>
+ <td width="60"></td>
+ <td>0x0600054A8</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.27</td>
+ <td>reg: <a href="#1.18.27">ENV_FPGA_SESSION_KEY_3</a></td>
+ <td width="60"></td>
+ <td>0x0600054AC</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.28</td>
+ <td>reg: <a href="#1.18.28">ENV_FPGA_SESSION_KEY_VALID</a></td>
+ <td width="60"></td>
+ <td>0x0600054B0</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.29</td>
+ <td>reg: <a href="#1.18.29">ENV_FPGA_SPIDEN</a></td>
+ <td width="60"></td>
+ <td>0x0600054D0</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.30</td>
+ <td>reg: <a href="#1.18.30">ENV_FPGA_AXIM_USER_PARAMS</a></td>
+ <td width="60"></td>
+ <td>0x060005600</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.31</td>
+ <td>reg: <a href="#1.18.31">ENV_FPGA_SECURITY_MODE_OVERRIDE</a></td>
+ <td width="60"></td>
+ <td>0x060005604</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.32</td>
+ <td>reg: <a href="#1.18.32">ENV_FPGA_SRAM_ENABLE</a></td>
+ <td width="60"></td>
+ <td>0x060005608</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.33</td>
+ <td>reg: <a href="#1.18.33">ENV_FPGA_APB_FIPS_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x060005650</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.34</td>
+ <td>reg: <a href="#1.18.34">ENV_FPGA_APB_FIPS_VAL</a></td>
+ <td width="60"></td>
+ <td>0x060005654</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.35</td>
+ <td>reg: <a href="#1.18.35">ENV_FPGA_APB_FIPS_MASK</a></td>
+ <td width="60"></td>
+ <td>0x060005658</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.36</td>
+ <td>reg: <a href="#1.18.36">ENV_FPGA_APB_FIPS_CNT</a></td>
+ <td width="60"></td>
+ <td>0x06000565C</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.37</td>
+ <td>reg: <a href="#1.18.37">ENV_FPGA_APB_FIPS_NEW_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x060005660</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.38</td>
+ <td>reg: <a href="#1.18.38">ENV_FPGA_APB_FIPS_NEW_VAL</a></td>
+ <td width="60"></td>
+ <td>0x060005664</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.39</td>
+ <td>reg: <a href="#1.18.39">ENV_FPGA_APB_PPROT_OVERRIDE</a></td>
+ <td width="60"></td>
+ <td>0x060005668</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.40</td>
+ <td>reg: <a href="#1.18.40">ENV_FPGA_APBP_FIPS_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x060005670</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.41</td>
+ <td>reg: <a href="#1.18.41">ENV_FPGA_APBP_FIPS_VAL</a></td>
+ <td width="60"></td>
+ <td>0x060005674</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.42</td>
+ <td>reg: <a href="#1.18.42">ENV_FPGA_APBP_FIPS_MASK</a></td>
+ <td width="60"></td>
+ <td>0x060005678</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.43</td>
+ <td>reg: <a href="#1.18.43">ENV_FPGA_APBP_FIPS_CNT</a></td>
+ <td width="60"></td>
+ <td>0x06000567C</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.44</td>
+ <td>reg: <a href="#1.18.44">ENV_FPGA_APBP_FIPS_NEW_ADDR</a></td>
+ <td width="60"></td>
+ <td>0x060005680</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.45</td>
+ <td>reg: <a href="#1.18.45">ENV_FPGA_APBP_FIPS_NEW_VAL</a></td>
+ <td width="60"></td>
+ <td>0x060005684</td>
+ </tr>
+ <tr>
+ <td width="100">1.18.46</td>
+ <td>reg: <a href="#1.18.46">ENV_FPGA_AO_CC_GPPC</a></td>
+ <td width="60"></td>
+ <td>0x060005700</td>
+ </tr>
+ <tr>
+ <td width="100">1.19</td>
+ <td>block: <a href="#1.19">ENV_PERF_RAM_BASE</a></td>
+ <td width="60"></td>
+ <td>0x060006000</td>
+ </tr>
+ <tr>
+ <td width="100">1.19.1</td>
+ <td>reg: <a href="#1.19.1">ENV_PERF_RAM_BASE</a></td>
+ <td width="60"></td>
+ <td>0x060006000</td>
+ </tr>
+ </table>
+ </td>
+ </tr>
+</table><br><a name="1"></a><table border="0" width="95%" bgcolor="#993333">
+ <td><b><font color="#FFFF00" size="+2">1 : Chip: CryptoCell</font></b></td>
+ <td align="right"><font color="#FFFF00" size="+2">0x000000000</font></td>
+</table><br><br>
+Blocks:
+<br><a href="#1.1">PKA</a><br><a href="#1.2">RNG</a><br><a href="#1.3">CHACHA</a><br><a href="#1.4">AES</a><br><a href="#1.5">HASH</a><br><a href="#1.6">MISC</a><br><a href="#1.7">CC_CTL</a><br><a href="#1.8">GHASH</a><br><a href="#1.9">HOST_RGF</a><br><a href="#1.10">AHB</a><br><a href="#1.11">DIN</a><br><a href="#1.12">DOUT</a><br><a href="#1.13">HOST_SRAM</a><br><a href="#1.14">ID_REGISTERS</a><br><a href="#1.15">AO</a><br><a href="#1.16">NVM</a><br><a href="#1.17">ENV_CC_MEMORIES</a><br><a href="#1.18">FPGA_ENV_REGS</a><br><a href="#1.19">ENV_PERF_RAM_BASE</a><br><a name="1.1"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.1 : Block: PKA</font></b></td>
+ <td align="right"><font color="#000000">0x000000000</font></td>
+</table><br><a name="1.1.1"></a><br>1.1.1 : <b>Reg : MEMORY_MAP0</b> : 0x000000000<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R0 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.1.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.1.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R0 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.1.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.2"></a><br>1.1.2 : <b>Reg : MEMORY_MAP1</b> : 0x000000004<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R1 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.2.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.2.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R1 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.2.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.3"></a><br>1.1.3 : <b>Reg : MEMORY_MAP2</b> : 0x000000008<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R2 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.3.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.3.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP2</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R2 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.3.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.4"></a><br>1.1.4 : <b>Reg : MEMORY_MAP3</b> : 0x00000000C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R3 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.4.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.4.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP3</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R3 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.4.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.5"></a><br>1.1.5 : <b>Reg : MEMORY_MAP4</b> : 0x000000010<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R4 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP4</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.5.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.5.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP4</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R4 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.5.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.6"></a><br>1.1.6 : <b>Reg : MEMORY_MAP5</b> : 0x000000014<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R5 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP5</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.6.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.6.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP5</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R5 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.6.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.7"></a><br>1.1.7 : <b>Reg : MEMORY_MAP6</b> : 0x000000018<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R6 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP6</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.7.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.7.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP6</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R6 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.7.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.8"></a><br>1.1.8 : <b>Reg : MEMORY_MAP7</b> : 0x00000001C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R7 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP7</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.8.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.8.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP7</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R7 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.8.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.9"></a><br>1.1.9 : <b>Reg : MEMORY_MAP8</b> : 0x000000020<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R8 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP8</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.9.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.9.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP8</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R8 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.9.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.10"></a><br>1.1.10 : <b>Reg : MEMORY_MAP9</b> : 0x000000024<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R9 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP9</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.10.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.10.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP9</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R9 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.10.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.11"></a><br>1.1.11 : <b>Reg : MEMORY_MAP10</b> : 0x000000028<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R10 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP10</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.11.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.11.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP10</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R10 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.11.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.12"></a><br>1.1.12 : <b>Reg : MEMORY_MAP11</b> : 0x00000002C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R11 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP11</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.12.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.12.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP11</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R11 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.12.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.13"></a><br>1.1.13 : <b>Reg : MEMORY_MAP12</b> : 0x000000030<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R12 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP12</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.13.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.13.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP12</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R12 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.13.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.14"></a><br>1.1.14 : <b>Reg : MEMORY_MAP13</b> : 0x000000034<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R13 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP13</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.14.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.14.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP13</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R13 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.14.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.15"></a><br>1.1.15 : <b>Reg : MEMORY_MAP14</b> : 0x000000038<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R14 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP14</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.15.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.15.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP14</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R14 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.15.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.16"></a><br>1.1.16 : <b>Reg : MEMORY_MAP15</b> : 0x00000003C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R15 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP15</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.16.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.16.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP15</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R15 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.16.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.17"></a><br>1.1.17 : <b>Reg : MEMORY_MAP16</b> : 0x000000040<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R16 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP16</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.17.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.17.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP16</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R16 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.17.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.18"></a><br>1.1.18 : <b>Reg : MEMORY_MAP17</b> : 0x000000044<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R17 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP17</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.18.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.18.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP17</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R17 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.18.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.19"></a><br>1.1.19 : <b>Reg : MEMORY_MAP18</b> : 0x000000048<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R18 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP18</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.19.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.19.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP18</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R18 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.19.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.20"></a><br>1.1.20 : <b>Reg : MEMORY_MAP19</b> : 0x00000004C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R19 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP19</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.20.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.20.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP19</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R19 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.20.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.21"></a><br>1.1.21 : <b>Reg : MEMORY_MAP20</b> : 0x000000050<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R20 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP20</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.21.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.21.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP20</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R20 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.21.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.22"></a><br>1.1.22 : <b>Reg : MEMORY_MAP21</b> : 0x000000054<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R21 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP21</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.22.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.22.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP21</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R21 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.22.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.23"></a><br>1.1.23 : <b>Reg : MEMORY_MAP22</b> : 0x000000058<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R22 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP22</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.23.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.23.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP22</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R22 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.23.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.24"></a><br>1.1.24 : <b>Reg : MEMORY_MAP23</b> : 0x00000005C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R23 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP23</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.24.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.24.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP23</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R23 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.24.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.25"></a><br>1.1.25 : <b>Reg : MEMORY_MAP24</b> : 0x000000060<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R24 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP24</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.25.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.25.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP24</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R24 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.25.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.26"></a><br>1.1.26 : <b>Reg : MEMORY_MAP25</b> : 0x000000064<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R25 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP25</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.26.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.26.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP25</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R25 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.26.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.27"></a><br>1.1.27 : <b>Reg : MEMORY_MAP26</b> : 0x000000068<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R26 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP26</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.27.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.27.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP26</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R26 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.27.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.28"></a><br>1.1.28 : <b>Reg : MEMORY_MAP27</b> : 0x00000006C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R27 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP27</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.28.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.28.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP27</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R27 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.28.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.29"></a><br>1.1.29 : <b>Reg : MEMORY_MAP28</b> : 0x000000070<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R28 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP28</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.29.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.29.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP28</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R28 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.29.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.30"></a><br>1.1.30 : <b>Reg : MEMORY_MAP29</b> : 0x000000074<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R29 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP29</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.30.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.30.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP29</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R29 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.30.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.31"></a><br>1.1.31 : <b>Reg : MEMORY_MAP30</b> : 0x000000078<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R30 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP30</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.31.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.31.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP30</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R30 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.31.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.32"></a><br>1.1.32 : <b>Reg : MEMORY_MAP31</b> : 0x00000007C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual register R31 to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">MEMORY_MAP31</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.32.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.32.2"></a>10:1
+ </td>
+ <td valign="top">MEMORY_MAP31</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the R31 register to.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.32.3"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.33"></a><br>1.1.33 : <b>Reg : OPCODE</b> : 0x000000080<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the PKA's OPCODE.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">OPCODE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.33.1"></a>5:0
+ </td>
+ <td valign="top">TAG</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Holds the opreation's tag or the operand C virtual address.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.33.2"></a>11:6
+ </td>
+ <td valign="top">REG_R</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Result register virtual address 0-15.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.33.3"></a>17:12
+ </td>
+ <td valign="top">REG_B</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Operand B virtual address 0-15.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.33.4"></a>23:18
+ </td>
+ <td valign="top">REG_A</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Operand A virtual address 0-15.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.33.5"></a>26:24
+ </td>
+ <td valign="top">LEN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The length of the operation. The value serves as a pointer to PKA length register, for example, if the value is 0, PKA_L0
+ holds the size of the operation.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.33.6"></a>31:27
+ </td>
+ <td valign="top">OPCODE</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Defines the PKA operation:<br>@0x4 - Add,Inc<br>@0x5 - Sub,Dec,Neg<br>@0x6 - ModAdd,ModInc<br>@0x7 - ModSub,ModDec,ModNeg<br>@0x8 - AND,TST0,CLR0<br>@0x9 - OR,COPY,SET0<br>@0xa - XOR,FLIP0,INVERT,COMPARE<br>@0xc - SHR0<br>@0xd - SHR1<br>@0xe - SHL0<br>@0xf - SHL1<br>@0x10 - MulLow<br>@0x11 - ModMul<br>@0x12 - ModMulN<br>@0x13 - ModExp<br>@0x14 - Division<br>@0x15 - Div<br>@0x16 - ModDiv<br>@0x00 - Terminate
+ </td>
+ </tr>
+</table><a name="1.1.34"></a><br>1.1.34 : <b>Reg : N_NP_T0_T1_ADDR</b> : 0x000000084<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps N_NP_T0_T1 to a virtual address.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">N_NP_T0_T1_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.34.1"></a>4:0
+ </td>
+ <td valign="top">N_VIRTUAL_ADDR</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Virtual address of register N.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.34.2"></a>9:5
+ </td>
+ <td valign="top">NP_VIRTUAL_ADDR</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">Virtual address of register NP.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.34.3"></a>14:10
+ </td>
+ <td valign="top">T0_VIRTUAL_ADDR</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">Virtual address of temporary register number 0</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.34.4"></a>19:15
+ </td>
+ <td valign="top">T1_VIRTUAL_ADDR</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">Virtual address of temporary register number 1</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.34.5"></a>31:20
+ </td>
+ <td valign="top">Reserved</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.35"></a><br>1.1.35 : <b>Reg : PKA_STATUS</b> : 0x000000088<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the PKA pipe status.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_STATUS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.1"></a>3:0
+ </td>
+ <td valign="top">ALU_MSB_4BITS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The most significant 4-bits of the operand updated in shift operation.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.2"></a>7:4
+ </td>
+ <td valign="top">ALU_LSB_4BITS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The least significant 4-bits of the operand updated in shift operation.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.3"></a>8:8
+ </td>
+ <td valign="top">ALU_SIGN_OUT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicates the last operation's sign (MSB).</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.4"></a>9:9
+ </td>
+ <td valign="top">ALU_CARRY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Holds the carry of the last ALU operation.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.5"></a>10:10
+ </td>
+ <td valign="top">ALU_CARRY_MOD</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">holds the carry of the last Modular operation.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.6"></a>11:11
+ </td>
+ <td valign="top">ALU_SUB_IS_ZERO</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicates the last subtraction operation's sign .</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.7"></a>12:12
+ </td>
+ <td valign="top">ALU_OUT_ZERO</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">Indicates if the result of ALU OUT is zero.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.8"></a>13:13
+ </td>
+ <td valign="top">ALU_MODOVRFLW</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Modular overflow flag.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.9"></a>14:14
+ </td>
+ <td valign="top">DIV_BY_ZERO</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indication if the division is done by zero.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.10"></a>15:15
+ </td>
+ <td valign="top">MODINV_OF_ZERO</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicates the Modular inverse of zero.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.11"></a>20:16
+ </td>
+ <td valign="top">OPCODE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Opcode of the last operation</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.35.12"></a>31:21
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.36"></a><br>1.1.36 : <b>Reg : PKA_SW_RESET</b> : 0x00000008C<br><b>reg sep address</b> : <b> reg host address</b> : <br>Writing to this register triggers a software reset of the PKA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_SW_RESET</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.36.1"></a>0:0
+ </td>
+ <td valign="top">PKA_SW_RESET</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The reset mechanism takes about four PKA clock cycles until the reset line is deasserted</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.36.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.37"></a><br>1.1.37 : <b>Reg : PKA_L0</b> : 0x000000090<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds one of the optional size of the operation.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_L0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.37.1"></a>12:0
+ </td>
+ <td valign="top">PKA_L0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Size of the operation in bytes.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.37.2"></a>31:13
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.38"></a><br>1.1.38 : <b>Reg : PKA_L1</b> : 0x000000094<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds one of the optional size of the operation.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_L1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.38.1"></a>12:0
+ </td>
+ <td valign="top">PKA_L1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Size of the operation in bytes.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.38.2"></a>31:13
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.39"></a><br>1.1.39 : <b>Reg : PKA_L2</b> : 0x000000098<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds one of the optional size of the operation.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_L2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.39.1"></a>12:0
+ </td>
+ <td valign="top">PKA_L2</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Size of the operation in bytes.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.39.2"></a>31:13
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.40"></a><br>1.1.40 : <b>Reg : PKA_L3</b> : 0x00000009C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds one of the optional size of the operation.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_L3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.40.1"></a>12:0
+ </td>
+ <td valign="top">PKA_L3</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Size of the operation in bytes.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.40.2"></a>31:13
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.41"></a><br>1.1.41 : <b>Reg : PKA_L4</b> : 0x0000000A0<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds one of the optional size of the operation.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_L4</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.41.1"></a>12:0
+ </td>
+ <td valign="top">PKA_L4</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Size of the operation in bytes.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.41.2"></a>31:13
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.42"></a><br>1.1.42 : <b>Reg : PKA_L5</b> : 0x0000000A4<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds one of the optional size of the operation.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_L5</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.42.1"></a>12:0
+ </td>
+ <td valign="top">PKA_L5</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Size of the operation in bytes.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.42.2"></a>31:13
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.43"></a><br>1.1.43 : <b>Reg : PKA_L6</b> : 0x0000000A8<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds one of the optional size of the operation.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_L6</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.43.1"></a>12:0
+ </td>
+ <td valign="top">PKA_L6</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Size of the operation in bytes.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.43.2"></a>31:13
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.44"></a><br>1.1.44 : <b>Reg : PKA_L7</b> : 0x0000000AC<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds one of the optional size of the operation.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_L7</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.44.1"></a>12:0
+ </td>
+ <td valign="top">PKA_L7</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Size of the operation in bytes.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.44.2"></a>31:13
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.45"></a><br>1.1.45 : <b>Reg : PKA_PIPE_RDY</b> : 0x0000000B0<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register indicates whether the PKA pipe is ready to receive a new OPCODE.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_PIPE_RDY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.45.1"></a>0:0
+ </td>
+ <td valign="top">PKA_PIPE_RDY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">Indication whether PKA pipe is ready for new OPCODE.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.45.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.46"></a><br>1.1.46 : <b>Reg : PKA_DONE</b> : 0x0000000B4<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register indicates whether PKA operation is completed.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_DONE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.46.1"></a>0:0
+ </td>
+ <td valign="top">PKA_DONE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">Indicates if PKA operation is completed, and pipe is empty.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.46.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.47"></a><br>1.1.47 : <b>Reg : PKA_MON_SELECT</b> : 0x0000000B8<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register defines which PKA FSM monitor is being output.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_MON_SELECT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.47.1"></a>3:0
+ </td>
+ <td valign="top">PKA_MON_SELECT</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Defines which PKA FSM monitor is being output.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.47.2"></a>31:4
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.1.48"></a><br>1.1.48 : <b>Reg : PKA_VERSION</b> : 0x0000000C4<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the pka version<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_VERSION</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.48.1"></a>31:0
+ </td>
+ <td valign="top">PKA_VERSION</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">This is the PKA version</td>
+ </tr>
+</table><a name="1.1.49"></a><br>1.1.49 : <b>Reg : PKA_MON_READ</b> : 0x0000000D0<br><b>reg sep address</b> : <b> reg host address</b> : <br>The PKA monitor bus register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_MON_READ</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.49.1"></a>31:0
+ </td>
+ <td valign="top">PKA_MON_READ</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This is the PKA monitor bus register output</td>
+ </tr>
+</table><a name="1.1.50"></a><br>1.1.50 : <b>Reg : PKA_SRAM_ADDR</b> : 0x0000000D4<br><b>reg sep address</b> : <b> reg host address</b> : <br>first address given to PKA SRAM for write transactions.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_SRAM_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.50.1"></a>31:0
+ </td>
+ <td valign="top">PKA_SRAM_ADDR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PKA SRAM write starting address</td>
+ </tr>
+</table><a name="1.1.51"></a><br>1.1.51 : <b>Reg : PKA_SRAM_WDATA</b> : 0x0000000D8<br><b>reg sep address</b> : <b> reg host address</b> : <br>Write data to PKA SRAM.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_SRAM_WDATA</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.51.1"></a>31:0
+ </td>
+ <td valign="top">PKA_SRAM_WDATA</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">32 bit write to PKA SRAM: triggers the SRAM write DMA address automatically incremented</td>
+ </tr>
+</table><a name="1.1.52"></a><br>1.1.52 : <b>Reg : PKA_SRAM_RDATA</b> : 0x0000000DC<br><b>reg sep address</b> : <b> reg host address</b> : <br>Read data from PKA SRAM.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_SRAM_RDATA</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.52.1"></a>31:0
+ </td>
+ <td valign="top">PKA_SRAM_RDATA</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">32 bit read from PKA SRAM: read - triggers the SRAM read DMA address automatically incremented</td>
+ </tr>
+</table><a name="1.1.53"></a><br>1.1.53 : <b>Reg : PKA_SRAM_WR_CLR</b> : 0x0000000E0<br><b>reg sep address</b> : <b> reg host address</b> : <br>Write buffer clean.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_SRAM_WR_CLR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.53.1"></a>31:0
+ </td>
+ <td valign="top">PKA_SRAM_WR_CLR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Clear the write buffer.</td>
+ </tr>
+</table><a name="1.1.54"></a><br>1.1.54 : <b>Reg : PKA_SRAM_RADDR</b> : 0x0000000E4<br><b>reg sep address</b> : <b> reg host address</b> : <br>first address given to PKA SRAM for read transactions.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_SRAM_RADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.54.1"></a>31:0
+ </td>
+ <td valign="top">PKA_SRAM_RADDR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PKA SRAM read starting address</td>
+ </tr>
+</table><a name="1.1.55"></a><br>1.1.55 : <b>Reg : PKA_WORD_ACCESS</b> : 0x0000000F0<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the data written to PKA memory using the wop opcode.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_WORD_ACCESS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.55.1"></a>31:0
+ </td>
+ <td valign="top">PKA_WORD_ACCESS</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">32 bit read/write data.</td>
+ </tr>
+</table><a name="1.1.56"></a><br>1.1.56 : <b>Reg : PKA_BUFF_ADDR</b> : 0x0000000F8<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register maps the virtual buffer registers to a physical address in memory.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_BUFF_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.56.1"></a>11:0
+ </td>
+ <td valign="top">PKA_BUF_ADDR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the physical address in memory to map the buffer registers.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.1.56.2"></a>31:12
+ </td>
+ <td valign="top">RESEREVED1</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.1">(top of block)</a><a name="1.2"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.2 : Block: RNG</font></b></td>
+ <td align="right"><font color="#000000">0x000000100</font></td>
+</table><br><a name="1.2.1"></a><br>1.2.1 : <b>Reg : RNG_IMR</b> : 0x000000100<br><b>reg sep address</b> : <b> reg host address</b> : <br>Interrupt masking register.<br>Consists of {prng_imr trng_imr} bit[31-16] - PRNG_IMR bit[15-0] - TRNG_IMR <br>(Ws - PRNG bit exists only if PRNG_EXISTS flag)<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_IMR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.1.1"></a>0:0
+ </td>
+ <td valign="top">EHR_VALID_INT_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">1'b1 - masks the EHR interrupt. No interrupt is generated. <br>See RNG_ISR for explanation on this interrupt.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.1.2"></a>1:1
+ </td>
+ <td valign="top">AUTOCORR_ERR_INT_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">1'b1 - masks the autocorrelation interrupt. No interrupt is generated. <br>See RNG_ISR for explanation on this interrupt.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.1.3"></a>2:2
+ </td>
+ <td valign="top">CRNGT_ERR_INT_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">1'b1 - masks the CRNGT error interrupt. No interrupt is generated. <br>See RNG_ISR for explanation on this interrupt.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.1.4"></a>3:3
+ </td>
+ <td valign="top">VN_ERR_INT_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">1'b1 - masks the Von-Neumann error interrupt. No interrupt is generated. <br>See RNG_ISR for explanation on this interrupt.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.1.5"></a>4:4
+ </td>
+ <td valign="top">WATCHDOG_INT_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">1'b1 - masks the watchdog interrupt. No interrupt is generated. <br>See RNG_ISR for explanation on this interrupt.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.1.6"></a>5:5
+ </td>
+ <td valign="top">RNG_DMA_DONE_INT</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">1'b1 - masks the RNG DMA completion interrupt. No interrupt is generated. <br>See RNG_ISR for explanation on this interrupt.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.1.7"></a>31:6
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.2"></a><br>1.2.2 : <b>Reg : RNG_ISR</b> : 0x000000104<br><b>reg sep address</b> : <b> reg host address</b> : <br>Status register. <br>If corresponding RNG_IMR bit is unmasked, an interrupt is generated. <br>Consists of trng_isr and prng_isr bit[15-0] - TRNG bit[31-16] - PRNG<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_ISR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.1"></a>0:0
+ </td>
+ <td valign="top">EHR_VALID</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates that 192 bits have been collected in the TRNG and are ready to be read.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.2"></a>1:1
+ </td>
+ <td valign="top">AUTOCORR_ERR</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates Autocorrelation test failed four times in a row. When it set ,TRNG ceases to function until next reset.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.3"></a>2:2
+ </td>
+ <td valign="top">CRNGT_ERR</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates CRNGT in the TRNG test failed. Failure occurs when two consecutive blocks of 16 collected bits are equal.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.4"></a>3:3
+ </td>
+ <td valign="top">VN_ERR</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates Von Neumann error. Error in von Neumann occurs if 32 consecutive collected bits are identical, ZERO, or ONE.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.5"></a>4:4
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.6"></a>5:5
+ </td>
+ <td valign="top">RNG_DMA_DONE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates RNG DMA to SRAM is completed.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.7"></a>15:6
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.8"></a>16:16
+ </td>
+ <td valign="top">RESEEDING_DONE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates completion of reseeding algorithm with no errors.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.9"></a>17:17
+ </td>
+ <td valign="top">INSTANTIATION_DONE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates completion of instantiation algorithm with no errors.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.10"></a>18:18
+ </td>
+ <td valign="top">FINAL_UPDATE_DONE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates completion of final update algorithm.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.11"></a>19:19
+ </td>
+ <td valign="top">OUTPUT_READY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates that the result of PRNG is valid and ready to be read. The result can be read from the RNG_READOUT register.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.12"></a>20:20
+ </td>
+ <td valign="top">RESEED_CNTR_FULL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates that the reseed counter has reached 2^48, requiring to run the reseed algorithm before generating new random
+ numbers.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.13"></a>21:21
+ </td>
+ <td valign="top">RESEED_CNTR_TOP_40</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates that the top 40 bits of the reseed counter are set (that is the reseed counter is larger than 2^48-2^8). This
+ is a recommendation for running the reseed algorithm before the counter reaches its max value.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.14"></a>22:22
+ </td>
+ <td valign="top">PRNG_CRNGT_ERR</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates CRNGT in the PRNG test failed. Failure occurs when two consecutive results of AES are equal</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.15"></a>23:23
+ </td>
+ <td valign="top">REQ_SIZE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates that the request size counter (which represents how many generations of random bits in the PRNG have been produced)
+ has reached 2^12, thus requiring a working state update before generating new random numbers.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.16"></a>24:24
+ </td>
+ <td valign="top">KAT_ERR</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates that one of the KAT (Known Answer Tests) tests has failed. When set, the entire engine ceases to function.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.17"></a>26:25
+ </td>
+ <td valign="top">WHICH_KAT_ERR</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When the KAT_ERR bit is set, these bits represent which Known Answer Test had failed:<br>@2'b00 - first test of instantiation<br>@2'b01 - second test of instantiation<br>@2'b10 - first test of reseeding<br>@2'b11 - second test of reseeding
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.2.18"></a>31:27
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.3"></a><br>1.2.3 : <b>Reg : RNG_ICR</b> : 0x000000108<br><b>reg sep address</b> : <b> reg host address</b> : <br>Interrupt/status bit clear Register. Consists of trng_icr and prng_icr bit[15-0] - TRNG bit[31-16] - PRNG<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_ICR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.1"></a>0:0
+ </td>
+ <td valign="top">EHR_VALID</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.2"></a>1:1
+ </td>
+ <td valign="top">AUTOCORR_ERR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Cannot be cleared by SW! Only RNG reset clears this bit.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.3"></a>2:2
+ </td>
+ <td valign="top">CRNGT_ERR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.4"></a>3:3
+ </td>
+ <td valign="top">VN_ERR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.5"></a>4:4
+ </td>
+ <td valign="top">RNG_WATCHDOG</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.6"></a>5:5
+ </td>
+ <td valign="top">RNG_DMA_DONE</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.7"></a>15:6
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.8"></a>16:16
+ </td>
+ <td valign="top">RESEEDING_DONE</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.9"></a>17:17
+ </td>
+ <td valign="top">INSTANTIATION_DONE</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.10"></a>18:18
+ </td>
+ <td valign="top">FINAL_UPDATE_DONE</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.11"></a>19:19
+ </td>
+ <td valign="top">OUTPUT_READY</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.12"></a>20:20
+ </td>
+ <td valign="top">RESEED_CNTR_FULL</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.13"></a>21:21
+ </td>
+ <td valign="top">RESEED_CNTR_TOP_40</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.14"></a>22:22
+ </td>
+ <td valign="top">PRNG_CRNGT_ERR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.15"></a>23:23
+ </td>
+ <td valign="top">REQ_SIZE</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 - clears corresponding bit in RNG_ISR</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.16"></a>24:24
+ </td>
+ <td valign="top">KAT_ERR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Cannot be cleared by SW! Only RNG reset clears this bit.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.17"></a>26:25
+ </td>
+ <td valign="top">WHICH_KAT_ERR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Cannot be cleared by SW! Only RNG reset clears this bit.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.3.18"></a>31:27
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.4"></a><br>1.2.4 : <b>Reg : TRNG_CONFIG</b> : 0x00000010C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register handles TRNG configuration<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">TRNG_CONFIG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.4.1"></a>1:0
+ </td>
+ <td valign="top">RND_SRC_SEL</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Defines the length of the oscillator ring (= the number of inverters) out of four possible selections.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.4.2"></a>2:2
+ </td>
+ <td valign="top">SOP_SEL</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Secure Output Port selection:<br>@1'b1 - sop_data port reflects TRNG output (EHR_DATA). <br>@1'b0 - sop_data port reflects PRNG output (RNG_READOUT). <br>NOTE: Secure output is used for direct connection of the RNG block outputs to an engine input key. <br>If CryptoCell does not include a HW PRNG - this field should be set to 1.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.4.3"></a>31:3
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.5"></a><br>1.2.5 : <b>Reg : TRNG_VALID</b> : 0x000000110<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register indicates that the TRNG data is valid.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">TRNG_VALID</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.5.1"></a>0:0
+ </td>
+ <td valign="top">EHR_VALID</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 indicates that collection of bits in the TRNG is completed, and data can be read from the EHR_DATA register.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.5.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.6"></a><br>1.2.6 : <b>Reg : EHR_DATA_0</b> : 0x000000114<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register contains the data collected in the TRNG[31_0].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">EHR_DATA_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.6.1"></a>31:0
+ </td>
+ <td valign="top">EHR_DATA</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the data collected in the TRNG[31_0] .<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).
+ </td>
+ </tr>
+</table><a name="1.2.7"></a><br>1.2.7 : <b>Reg : EHR_DATA_1</b> : 0x000000118<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register contains the data collected in the TRNG[63_32].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">EHR_DATA_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.7.1"></a>31:0
+ </td>
+ <td valign="top">EHR_DATA</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the data collected in the TRNG[63_32].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).
+ </td>
+ </tr>
+</table><a name="1.2.8"></a><br>1.2.8 : <b>Reg : EHR_DATA_2</b> : 0x00000011C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register contains the data collected in the TRNG[95_64].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">EHR_DATA_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.8.1"></a>31:0
+ </td>
+ <td valign="top">EHR_DATA</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the data collected in the TRNG[95_64].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).
+ </td>
+ </tr>
+</table><a name="1.2.9"></a><br>1.2.9 : <b>Reg : EHR_DATA_3</b> : 0x000000120<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register contains the data collected in the TRNG[127_96].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">EHR_DATA_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.9.1"></a>31:0
+ </td>
+ <td valign="top">EHR_DATA</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the data collected in the TRNG[127_96].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).
+ </td>
+ </tr>
+</table><a name="1.2.10"></a><br>1.2.10 : <b>Reg : EHR_DATA_4</b> : 0x000000124<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register contains the data collected in the TRNG[159_128].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">EHR_DATA_4</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.10.1"></a>31:0
+ </td>
+ <td valign="top">EHR_DATA</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the data collected in the TRNG[159_128].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).
+ </td>
+ </tr>
+</table><a name="1.2.11"></a><br>1.2.11 : <b>Reg : EHR_DATA_5</b> : 0x000000128<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register contains the data collected in the TRNG[191_160].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">EHR_DATA_5</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.11.1"></a>31:0
+ </td>
+ <td valign="top">EHR_DATA</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Contains the data collected in the TRNG[191_160].<br>NOTE: can only be set while in debug mode (rng_debug_enable input is set).
+ </td>
+ </tr>
+</table><a name="1.2.12"></a><br>1.2.12 : <b>Reg : RND_SOURCE_ENABLE</b> : 0x00000012C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the enable signal for the random source.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RND_SOURCE_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.12.1"></a>0:0
+ </td>
+ <td valign="top">RND_SRC_EN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Enable signal for the random source.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.12.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.13"></a><br>1.2.13 : <b>Reg : SAMPLE_CNT1</b> : 0x000000130<br><b>reg sep address</b> : <b> reg host address</b> : <br>Counts clocks between sampling of random bit.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">SAMPLE_CNT1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.13.1"></a>31:0
+ </td>
+ <td valign="top">SAMPLE_CNTR1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">Sets the number of rng_clk cycles between two consecutive ring oscillator samples.<br>NOTE: If the Von-Neumann is bypassed, the minimum value for sample counter must not be less than decimal seventeen.
+ </td>
+ </tr>
+</table><a name="1.2.14"></a><br>1.2.14 : <b>Reg : AUTOCORR_STATISTIC</b> : 0x000000134<br><b>reg sep address</b> : <b> reg host address</b> : <br>Statistics about autocorrelation test activations.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AUTOCORR_STATISTIC</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.14.1"></a>13:0
+ </td>
+ <td valign="top">AUTOCORR_TRYS</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Count each time an autocorrelation test starts. Any write to the register resets the counter. Stops collecting statistics
+ if one of the counters has reached the limit.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.14.2"></a>21:14
+ </td>
+ <td valign="top">AUTOCORR_FAILS</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Count each time an autocorrelation test fails. Any write to the register resets the counter. Stops collecting statistics if
+ one of the counters has reached the limit.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.14.3"></a>31:22
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.15"></a><br>1.2.15 : <b>Reg : TRNG_DEBUG_CONTROL</b> : 0x000000138<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is used to debug the TRNG<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">TRNG_DEBUG_CONTROL</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.15.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.15.2"></a>1:1
+ </td>
+ <td valign="top">VNC_BYPASS</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When this bit is set, the Von-Neumann balancer is bypassed (including the 32 consecutive bits test).<br>NOTE: Can only be set while in debug mode. If TRNG_TESTS_BYPASS_EN HW flag is defined, this bit can be set while not in debug
+ mode.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.15.3"></a>2:2
+ </td>
+ <td valign="top">TRNG_CRNGT_BYPASS</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When this bit is set, the CRNGT test in the TRNG is bypassed. <br>NOTE: Can only be set while in debug mode. If TRNG_TESTS_BYPASS_EN HW flag is defined, this bit can be set while not in debug
+ mode.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.15.4"></a>3:3
+ </td>
+ <td valign="top">AUTO_CORRELATE_BYPASS</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When this bit is set, the autocorrelation test in the TRNG module is bypassed.<br>NOTE: Can only be set while in debug mode. If TRNG_TESTS_BYPASS_EN HW flag is defined, this bit can be set while not in debug
+ mode.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.15.5"></a>31:4
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.16"></a><br>1.2.16 : <b>Reg : RNG_SW_RESET</b> : 0x000000140<br><b>reg sep address</b> : <b> reg host address</b> : <br>Generate SW reset solely to RNG block.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_SW_RESET</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.16.1"></a>0:0
+ </td>
+ <td valign="top">RNG_SW_RESET</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Any value written (1'b0 or 1'b1) causes a reset cycle to the TRNG block. <br>The reset mechanism takes about four RNG clock cycles until the reset line is de-asserted.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.16.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.17"></a><br>1.2.17 : <b>Reg : RNG_DEBUG_EN_INPUT</b> : 0x0000001B4<br><b>reg sep address</b> : <b> reg host address</b> : <br>Defines the RNG in debug mode<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_DEBUG_EN_INPUT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.17.1"></a>0:0
+ </td>
+ <td valign="top">RNG_DEBUG_EN</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reflects the rng_debug_enable input port</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.17.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.18"></a><br>1.2.18 : <b>Reg : RNG_BUSY</b> : 0x0000001B8<br><b>reg sep address</b> : <b> reg host address</b> : <br>RNG busy indication<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_BUSY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.18.1"></a>0:0
+ </td>
+ <td valign="top">RNG_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reflects rng_busy output port which Consists of trng_busy and prng_busy.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.18.2"></a>1:1
+ </td>
+ <td valign="top">TRNG_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reflects trng_busy.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.18.3"></a>2:2
+ </td>
+ <td valign="top">PRNG_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reflects prng_busy.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.18.4"></a>31:3
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.19"></a><br>1.2.19 : <b>Reg : RST_BITS_COUNTER</b> : 0x0000001BC<br><b>reg sep address</b> : <b> reg host address</b> : <br>Resets the counter of collected bits in the TRNG<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RST_BITS_COUNTER</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.19.1"></a>0:0
+ </td>
+ <td valign="top">RST_BITS_COUNTER</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing any value to this address resets the bits counter and trng valid registers.<br>RND_SORCE_ENABLE register must be unset in order for reset to take place.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.19.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.20"></a><br>1.2.20 : <b>Reg : RNG_VERSION</b> : 0x0000001C0<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the RNG version<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_VERSION</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.20.1"></a>0:0
+ </td>
+ <td valign="top">EHR_WIDTH_192</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">@1'b0 - 128 bit EHR<br>@1'b1 - 192 bit EHR
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.20.2"></a>1:1
+ </td>
+ <td valign="top">CRNGT_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">@1'b0 - does not exist<br>@1'b1 - exists
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.20.3"></a>2:2
+ </td>
+ <td valign="top">AUTOCORR_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">@1'b0 - does not exist<br>@1'b1 - exists
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.20.4"></a>3:3
+ </td>
+ <td valign="top">TRNG_TESTS_BYPASS_EN</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">@1'b0 - trng tests bypass not enabled<br>@1'b1 - trng tests bypass enabled
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.20.5"></a>4:4
+ </td>
+ <td valign="top">PRNG_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b0 - does not exist<br>@1'b1 - exists
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.20.6"></a>5:5
+ </td>
+ <td valign="top">KAT_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b0 - does not exist<br>@1'b1 - exists
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.20.7"></a>6:6
+ </td>
+ <td valign="top">RESEEDING_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b0 - does not exist<br>@1'b1 - exists
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.20.8"></a>7:7
+ </td>
+ <td valign="top">RNG_USE_5_SBOXES</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b0 - 20 SBOX AES<br>@1'b1 - 5 SBOX AES
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.20.9"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.21"></a><br>1.2.21 : <b>Reg : RNG_CLK_ENABLE</b> : 0x0000001C4<br><b>reg sep address</b> : <b> reg host address</b> : <br>Writing to this register enables/disables the RNG clock.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_CLK_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.21.1"></a>0:0
+ </td>
+ <td valign="top">EN</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 enables RNG clock.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.21.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.22"></a><br>1.2.22 : <b>Reg : RNG_DMA_ENABLE</b> : 0x0000001C8<br><b>reg sep address</b> : <b> reg host address</b> : <br>Writing to this register enables/disables the RNG DMA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_DMA_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.22.1"></a>0:0
+ </td>
+ <td valign="top">EN</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 enables RNG DMA to SRAM. The Value is cleared when DMA completes its operation.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.22.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.23"></a><br>1.2.23 : <b>Reg : RNG_DMA_SRC_MASK</b> : 0x0000001CC<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register defines which ring-oscillator length should be used when using the RNG DMA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_DMA_SRC_MASK</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.23.1"></a>0:0
+ </td>
+ <td valign="top">EN_SRC_SEL0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 enables SRC_SEL 0.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.23.2"></a>1:1
+ </td>
+ <td valign="top">EN_SRC_SEL1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 enables SRC_SEL 1.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.23.3"></a>2:2
+ </td>
+ <td valign="top">EN_SRC_SEL2</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 enables SRC_SEL 2.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.23.4"></a>3:3
+ </td>
+ <td valign="top">EN_SRC_SEL3</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing value 1'b1 enables SRC_SEL 3.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.23.5"></a>31:4
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.24"></a><br>1.2.24 : <b>Reg : RNG_DMA_SRAM_ADDR</b> : 0x0000001D0<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register defines the start address of the DMA for the TRNG data.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_DMA_SRAM_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.24.1"></a>10:0
+ </td>
+ <td valign="top">RNG_SRAM_DMA_ADDR</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Defines the start address of the DMA for the TRNG data.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.24.2"></a>31:11
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.25"></a><br>1.2.25 : <b>Reg : RNG_DMA_SAMPLES_NUM</b> : 0x0000001D4<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register defines the number of 192-bits samples that the DMA collects per RNG configuration.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_DMA_SAMPLES_NUM</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.25.1"></a>7:0
+ </td>
+ <td valign="top">RNG_SAMPLES_NUM</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Defines the number of 192-bits samples that the DMA collects per RNG configuration.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.25.2"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.2.26"></a><br>1.2.26 : <b>Reg : RNG_WATCHDOG_VAL</b> : 0x0000001D8<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register defines the maximum number of clock cycles per TRNG collection of 192 samples. If the number of cycles for a
+collection exceeds this threshold, TRNG signals an interrupt.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_WATCHDOG_VAL</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.26.1"></a>31:0
+ </td>
+ <td valign="top">RNG_WATCHDOG_VAL</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Defines the maximum number of clock cycles per TRNG collection of 192 samples. If the number of cycles for a collection exceeds
+ this threshold, TRNG signals an interrupt.
+ </td>
+ </tr>
+</table><a name="1.2.27"></a><br>1.2.27 : <b>Reg : RNG_DMA_STATUS</b> : 0x0000001DC<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the RNG DMA status.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">RNG_DMA_STATUS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.27.1"></a>0:0
+ </td>
+ <td valign="top">RNG_DMA_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicates whether DMA is busy.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.27.2"></a>2:1
+ </td>
+ <td valign="top">DMA_SRC_SEL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The active ring oscillator length using by DMA</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.27.3"></a>10:3
+ </td>
+ <td valign="top">NUM_OF_SAMPLES</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Number of samples already collected in the current ring oscillator chain length.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.2.27.4"></a>31:11
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.2">(top of block)</a><a name="1.3"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.3 : Block: CHACHA</font></b></td>
+ <td align="right"><font color="#000000">0x000000380</font></td>
+</table><br><a name="1.3.1"></a><br>1.3.1 : <b>Reg : CHACHA_CONTROL_REG</b> : 0x000000380<br><b>reg sep address</b> : <b> reg host address</b> : <br>CHACHA general configuration.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_CONTROL_REG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.1.1"></a>0:0
+ </td>
+ <td valign="top">CHACHA_OR_SALSA</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Core: <br>@1'b0 - ChaCha mode. <br>@1'b1 - Salsa mode.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.1.2"></a>1:1
+ </td>
+ <td valign="top">INIT_FROM_HOST</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Start init for new Message:<br>@1'b0 - disable. <br>@1'b1 - enable.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.1.3"></a>2:2
+ </td>
+ <td valign="top">CALC_KEY_FOR_POLY1305</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Only if ChaCha core:<br>@1'b0 - disable. <br>@1'b1 - enable.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.1.4"></a>3:3
+ </td>
+ <td valign="top">KEY_LEN</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">For All Core: <br>@1'b0 - 256 bit. <br>@1'b1 - 128 bit.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.1.5"></a>5:4
+ </td>
+ <td valign="top">NUM_OF_ROUNDS</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The core of ChaCha is a hash function which based on rotation operations. The hash function consist in application of 20 rounds
+ (default value). In additional, ChaCha have two variants (they work exactly as the original algorithm): ChaCha20/8 and ChaCha20/12
+ (using 8 and 12 rounds). <br>Default value 00<br>@00 - 20 rounds <br>@01 - 12 rounds<br>@10 - 8 rounds <br>@11 - N/A
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.1.6"></a>8:6
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.1.7"></a>9:9
+ </td>
+ <td valign="top">RESET_BLOCK_CNT</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">For new message</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.1.8"></a>10:10
+ </td>
+ <td valign="top">USE_IV_96BIT</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">If use 96bit IV</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.1.9"></a>31:11
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved1</td>
+ </tr>
+</table><a name="1.3.2"></a><br>1.3.2 : <b>Reg : CHACHA_VERSION</b> : 0x000000384<br><b>reg sep address</b> : <b> reg host address</b> : <br>CHACHA Version<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_VERSION</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.2.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_VERSION</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top"></td>
+ </tr>
+</table><a name="1.3.3"></a><br>1.3.3 : <b>Reg : CHACHA_KEY0</b> : 0x000000388<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 255:224 of CHACHA Key<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_KEY0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.3.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_KEY0</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 255:224 of CHACHA Key</td>
+ </tr>
+</table><a name="1.3.4"></a><br>1.3.4 : <b>Reg : CHACHA_KEY1</b> : 0x00000038C<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 223:192 of CHACHA Key<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_KEY1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.4.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_KEY1</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 223:192 of CHACHA Key</td>
+ </tr>
+</table><a name="1.3.5"></a><br>1.3.5 : <b>Reg : CHACHA_KEY2</b> : 0x000000390<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits191:160 of CHACHA Key<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_KEY2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.5.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_KEY2</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits191:160 of CHACHA Key</td>
+ </tr>
+</table><a name="1.3.6"></a><br>1.3.6 : <b>Reg : CHACHA_KEY3</b> : 0x000000394<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits159:128 of CHACHA Key<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_KEY3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.6.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_KEY3</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 159:128 of CHACHA Key</td>
+ </tr>
+</table><a name="1.3.7"></a><br>1.3.7 : <b>Reg : CHACHA_KEY4</b> : 0x000000398<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 127:96 of CHACHA Key<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_KEY4</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.7.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_KEY4</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 127:96 of CHACHA Key</td>
+ </tr>
+</table><a name="1.3.8"></a><br>1.3.8 : <b>Reg : CHACHA_KEY5</b> : 0x00000039C<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 95:64 of CHACHA Key<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_KEY5</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.8.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_KEY5</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 95:64 of CHACHA Key</td>
+ </tr>
+</table><a name="1.3.9"></a><br>1.3.9 : <b>Reg : CHACHA_KEY6</b> : 0x0000003A0<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 63:32 of CHACHA Key<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_KEY6</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.9.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_KEY6</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 63:32 of CHACHA Key</td>
+ </tr>
+</table><a name="1.3.10"></a><br>1.3.10 : <b>Reg : CHACHA_KEY7</b> : 0x0000003A4<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 31:0 of CHACHA Key<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_KEY7</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.10.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_KEY7</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of CHACHA Key</td>
+ </tr>
+</table><a name="1.3.11"></a><br>1.3.11 : <b>Reg : CHACHA_IV_0</b> : 0x0000003A8<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 31:0 of CHACHA_IV0 register<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_IV_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.11.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_IV_0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of CHACHA_IV0 register</td>
+ </tr>
+</table><a name="1.3.12"></a><br>1.3.12 : <b>Reg : CHACHA_IV_1</b> : 0x0000003AC<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 31:0 of CHACHA_IV1 register<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_IV_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.12.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_IV_1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of CHACHA_IV1 register</td>
+ </tr>
+</table><a name="1.3.13"></a><br>1.3.13 : <b>Reg : CHACHA_BUSY</b> : 0x0000003B0<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is set when the CHACHA/SALSA core is active<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_BUSY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.13.1"></a>0:0
+ </td>
+ <td valign="top">CHACHA_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">CHACHA_BUSY Register. this register is set when the CHACHA/SALSA core is active</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.13.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.3.14"></a><br>1.3.14 : <b>Reg : CHACHA_HW_FLAGS</b> : 0x0000003B4<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the pre-synthesis HW flag configuration of the CHACHA/SALSA engine<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_HW_FLAGS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.14.1"></a>0:0
+ </td>
+ <td valign="top">CHACHA_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">If this flag is set, the Salsa/ChaCha engine include ChaCha implementation:<br>@1'b0 - disable. <br>@1'b1 - enable.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.14.2"></a>1:1
+ </td>
+ <td valign="top">SALSA_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">If this flag is set, the Salsa/ChaCha engine include Salsa implementation:<br>@1'b0 - disable. <br>@1'b1 - enable.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.14.3"></a>2:2
+ </td>
+ <td valign="top">FAST_CHACHA</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">If this flag is set, the next matrix calculated when the current one is written to data output path (same flag for Salsa core):<br>@1'b0 - disable. <br>@1'b1 - enable.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.14.4"></a>31:3
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.3.15"></a><br>1.3.15 : <b>Reg : CHACHA_BLOCK_CNT_LSB</b> : 0x0000003B8<br><b>reg sep address</b> : <b> reg host address</b> : <br>The two first words (n) in the last row of the cipher matrix are the block counter. At the end of each block (512b), the block_cnt
+for the next block is written by HW to the block_cnt_lsb and block_cnt_msb registers. Need reset block counter , if start
+new message.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_BLOCK_CNT_LSB</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.15.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_BLOCK_CNT_LSB</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of CHACHA_BLOCK_CNT_LSB register. <br>This register holds the chacha block counter bits 31:0
+ </td>
+ </tr>
+</table><a name="1.3.16"></a><br>1.3.16 : <b>Reg : CHACHA_BLOCK_CNT_MSB</b> : 0x0000003BC<br><b>reg sep address</b> : <b> reg host address</b> : <br>The two first words (n) in the last row of the cipher matrix are the block counter. At the end of each block (512b), the block_cnt
+for the next block is written by HW to the block_cnt_lsb and block_cnt_msb registers. Need reset block counter , if start
+new message.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_BLOCK_CNT_MSB</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.16.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_BLOCK_CNT_MSB</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of CHACHA_BLOCK_CNT_MSB register. <br>This register holds the chacha block counter bits 63:32
+ </td>
+ </tr>
+</table><a name="1.3.17"></a><br>1.3.17 : <b>Reg : CHACHA_SW_RESET</b> : 0x0000003C0<br><b>reg sep address</b> : <b> reg host address</b> : <br>Resets CHACHA/SALSA engine.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_SW_RESET</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.17.1"></a>0:0
+ </td>
+ <td valign="top">CHACH_SW_RESET</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing to this address resets the only FSM of CHACHA engine. The reset takes 4 CORE_CLK cycles.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.17.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.3.18"></a><br>1.3.18 : <b>Reg : CHACHA_FOR_POLY_KEY0</b> : 0x0000003C4<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 255:224 of CHACHA_FOR_POLY_KEY<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_FOR_POLY_KEY0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.18.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_FOR_POLY_KEY0</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 255:224 of CHACHA_FOR_POLY_KEY</td>
+ </tr>
+</table><a name="1.3.19"></a><br>1.3.19 : <b>Reg : CHACHA_FOR_POLY_KEY1</b> : 0x0000003C8<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 223:192 of CHACHA_FOR_POLY_KEY<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_FOR_POLY_KEY1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.19.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_FOR_POLY_KEY1</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 223:192 of CHACHA_FOR_POLY_KEY</td>
+ </tr>
+</table><a name="1.3.20"></a><br>1.3.20 : <b>Reg : CHACHA_FOR_POLY_KEY2</b> : 0x0000003CC<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits191:160 of CHACHA_FOR_POLY_KEY<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_FOR_POLY_KEY2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.20.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_FOR_POLY_KEY2</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits191:160 of CHACHA_FOR_POLY_KEY</td>
+ </tr>
+</table><a name="1.3.21"></a><br>1.3.21 : <b>Reg : CHACHA_FOR_POLY_KEY3</b> : 0x0000003D0<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits159:128 of CHACHA_FOR_POLY_KEY<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_FOR_POLY_KEY3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.21.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_FOR_POLY_KEY3</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 159:128 of CHACHA_FOR_POLY_KEY</td>
+ </tr>
+</table><a name="1.3.22"></a><br>1.3.22 : <b>Reg : CHACHA_FOR_POLY_KEY4</b> : 0x0000003D4<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 127:96 of CHACHA_FOR_POLY_KEY<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_FOR_POLY_KEY4</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.22.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_FOR_POLY_KEY4</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 127:96 of CHACHA_FOR_POLY_KEY</td>
+ </tr>
+</table><a name="1.3.23"></a><br>1.3.23 : <b>Reg : CHACHA_FOR_POLY_KEY5</b> : 0x0000003D8<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 95:64 of CHACHA_FOR_POLY_KEY<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_FOR_POLY_KEY5</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.23.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_FOR_POLY_KEY5</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 95:64 of CHACHA_FOR_POLY_KEY</td>
+ </tr>
+</table><a name="1.3.24"></a><br>1.3.24 : <b>Reg : CHACHA_FOR_POLY_KEY6</b> : 0x0000003DC<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 63:32 of CHACHA_FOR_POLY_KEY<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_FOR_POLY_KEY6</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.24.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_FOR_POLY_KEY6</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 63:32 of CHACHA_FOR_POLY_KEY</td>
+ </tr>
+</table><a name="1.3.25"></a><br>1.3.25 : <b>Reg : CHACHA_FOR_POLY_KEY7</b> : 0x0000003E0<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 31:0 of CHACHA_FOR_POLY_KEY<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_FOR_POLY_KEY7</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.25.1"></a>31:0
+ </td>
+ <td valign="top">CHACHA_FOR_POLY_KEY7</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of CHACHA_FOR_POLY_KEY</td>
+ </tr>
+</table><a name="1.3.26"></a><br>1.3.26 : <b>Reg : CHACHA_BYTE_WORD_ORDER_CNTL_REG</b> : 0x0000003E4<br><b>reg sep address</b> : <b> reg host address</b> : <br>CHACHA/SALSA DATA ORDER configuration.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_BYTE_WORD_ORDER_CNTL_REG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.26.1"></a>0:0
+ </td>
+ <td valign="top">CHACHA_DIN_WORD_ORDER</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Change the words order of the input data.<br>@1'b0 - disable. <br>@1'b1 - enable. (reverse each word in 128 bit input ( w0->w3, w1->w2, w2->w1,w3-w0))
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.26.2"></a>1:1
+ </td>
+ <td valign="top">CHACHA_DIN_BYTE_ORDER</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Change the byte order of the input data.<br>@1'b0 - disable. <br>@1'b1 - enable. (reverse each byte in each word input (b0->b3, b1->b2, b2->b1,b3->b0))
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.26.3"></a>2:2
+ </td>
+ <td valign="top">CHACHA_CORE_MATRIX_LBE_ORDER</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Change the quarter of a matrix order in core<br>@1'b0 - disable. <br>@1'b1 - enable. (reverse each quarter of a matrix (m[0-127]->m[384-511], m[128-255]->m[256-383], m[256-383]->m[128-255], m[384-511]->m[0-127]))
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.26.4"></a>3:3
+ </td>
+ <td valign="top">CHACHA_DOUT_WORD_ORDER</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Change the words order of the output data.<br>@1'b0 - disable. <br>@1'b1 - enable. (reverse each word in 128 bit output ( w0->w3, w1->w2, w2->w1,w3-w0))
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.26.5"></a>4:4
+ </td>
+ <td valign="top">CHACHA_DOUT_BYTE_ORDER</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Change the byte order of the output data.<br>@1'b0 - disable. <br>@1'b1 - enable. (reverse each byte in each word output (b0->b3, b1->b2, b2->b1,b3->b0))
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.26.6"></a>31:5
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.3.27"></a><br>1.3.27 : <b>Reg : CHACHA_DEBUG_REG</b> : 0x0000003E8<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is used to debug the CHACHA engine<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_DEBUG_REG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.27.1"></a>1:0
+ </td>
+ <td valign="top">CHACHA_DEBUG_FSM_STATE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">CHACHA_DEBUG_FSM_STATE<br>@0x0 - IDLE_STATE<br>@0x1 - INIT_STATE<br>@0x2 - ROUNDS_STATE<br>@0x3 - FINAL_STATE
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.3.27.2"></a>31:2
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.3">(top of block)</a><a name="1.4"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.4 : Block: AES</font></b></td>
+ <td align="right"><font color="#000000">0x000000400</font></td>
+</table><br><a name="1.4.1"></a><br>1.4.1 : <b>Reg : AES_KEY_0_0</b> : 0x000000400<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 31:0 of AES Key0 (used as the AES key in non-tunneling operations, and as the first tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_0_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.1.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_0_0</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of AES Key0.</td>
+ </tr>
+</table><a name="1.4.2"></a><br>1.4.2 : <b>Reg : AES_KEY_0_1</b> : 0x000000404<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 63:32 of AES Key0 (used as the AES key in non-tunneling operations, and as the first tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_0_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.2.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_0_1</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 63:32 of AES Key0.</td>
+ </tr>
+</table><a name="1.4.3"></a><br>1.4.3 : <b>Reg : AES_KEY_0_2</b> : 0x000000408<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 95:64 of AES Key0 (used as the AES key in non-tunneling operations, and as the first tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_0_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.3.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_0_2</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 95:64 of AES Key0.</td>
+ </tr>
+</table><a name="1.4.4"></a><br>1.4.4 : <b>Reg : AES_KEY_0_3</b> : 0x00000040C<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 127:96 of AES Key0 (used as the AES key in non-tunneling operations, and as the first tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_0_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.4.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_0_3</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 127:96 of AES Key0.</td>
+ </tr>
+</table><a name="1.4.5"></a><br>1.4.5 : <b>Reg : AES_KEY_0_4</b> : 0x000000410<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 159:128 of AES Key0 (used as the AES key in non-tunneling operations, and as the first tunnel stage key in tunneling
+operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_0_4</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.5.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_0_4</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 159:128 of AES Key0 .</td>
+ </tr>
+</table><a name="1.4.6"></a><br>1.4.6 : <b>Reg : AES_KEY_0_5</b> : 0x000000414<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 191:160 of AES Key0 (used as the AES key in non-tunneling operations, and as the first tunnel stage key in tunneling
+operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_0_5</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.6.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_0_5</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 191:160 of AES Key0.</td>
+ </tr>
+</table><a name="1.4.7"></a><br>1.4.7 : <b>Reg : AES_KEY_0_6</b> : 0x000000418<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 223:192 of AES Key0 (used as the AES key in non-tunneling operations, and as the first tunnel stage key in tunneling
+operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_0_6</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.7.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_0_6</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 223:192 of AES Key0.</td>
+ </tr>
+</table><a name="1.4.8"></a><br>1.4.8 : <b>Reg : AES_KEY_0_7</b> : 0x00000041C<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 255:224 of AES Key0 (used as the AES key in non-tunneling operations, and as the first tunnel stage key in tunneling
+operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_0_7</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.8.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_0_7</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 255:224 of AES Key0.</td>
+ </tr>
+</table><a name="1.4.9"></a><br>1.4.9 : <b>Reg : AES_KEY_1_0</b> : 0x000000420<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 31:0 of AES Key1 (used as the second AES tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_1_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.9.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_1_0</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of AES Key1.</td>
+ </tr>
+</table><a name="1.4.10"></a><br>1.4.10 : <b>Reg : AES_KEY_1_1</b> : 0x000000424<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 63:32 of AES Key1 (used as the second AES tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_1_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.10.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_1_1</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 63:32 of AES Key1.</td>
+ </tr>
+</table><a name="1.4.11"></a><br>1.4.11 : <b>Reg : AES_KEY_1_2</b> : 0x000000428<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 95:64 of AES Key1 (used as the second AES tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_1_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.11.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_1_2</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 95:64 of AES Key1.</td>
+ </tr>
+</table><a name="1.4.12"></a><br>1.4.12 : <b>Reg : AES_KEY_1_3</b> : 0x00000042C<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 127:96 of AES Key1 (used as the second AES tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_1_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.12.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_1_3</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 127:96 of AES Key1.</td>
+ </tr>
+</table><a name="1.4.13"></a><br>1.4.13 : <b>Reg : AES_KEY_1_4</b> : 0x000000430<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 159:128 of AES Key1 (used as the second AES tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_1_4</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.13.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_1_4</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 159:128 of AES Key1.</td>
+ </tr>
+</table><a name="1.4.14"></a><br>1.4.14 : <b>Reg : AES_KEY_1_5</b> : 0x000000434<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 191:160 of AES Key1 (used as the second AES tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_1_5</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.14.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_1_5</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 191:160 of AES Key1.</td>
+ </tr>
+</table><a name="1.4.15"></a><br>1.4.15 : <b>Reg : AES_KEY_1_6</b> : 0x000000438<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 223:192 of AES Key1 (used as the second AES tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_1_6</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.15.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_1_6</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 223:192 of AES Key1.</td>
+ </tr>
+</table><a name="1.4.16"></a><br>1.4.16 : <b>Reg : AES_KEY_1_7</b> : 0x00000043C<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 255:224 of AES Key1 (used as the second AES tunnel stage key in tunneling operations).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_KEY_1_7</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.16.1"></a>31:0
+ </td>
+ <td valign="top">AES_KEY_1_7</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 255:224 of AES Key1.</td>
+ </tr>
+</table><a name="1.4.17"></a><br>1.4.17 : <b>Reg : AES_IV_0_0</b> : 0x000000440<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 31:0 of AES_IV0 register. <br>AES IV0 is used as the AES IV (Initialization Value) register in non-tunneling operations, <br>and as the first tunnel stage IV register in tunneling operations. <br>The IV register should be loaded according to the AES mode:<br>in AES CBC/CBC-MAC - the AES IV register should be loaded with the IV (initialization vector).<br>in XTS-AES - the AES IV register should be loaded with the 'T' value (unless the HW T calculation mode is active, in which
+the 'T' value is calculated by the HW).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_IV_0_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.17.1"></a>31:0
+ </td>
+ <td valign="top">AES_IV_0_0</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of AES_IV0 register. <br>For the description of AES_IV0, see the AES_IV_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.18"></a><br>1.4.18 : <b>Reg : AES_IV_0_1</b> : 0x000000444<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 63:32 of AES_IV0 128b register. <br>For the description of AES_IV0, see the AES_IV_0_0 register description<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_IV_0_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.18.1"></a>31:0
+ </td>
+ <td valign="top">AES_IV_0_1</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 63:32 of AES_IV0 register. <br>For the description of AES_IV0, see the AES_IV_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.19"></a><br>1.4.19 : <b>Reg : AES_IV_0_2</b> : 0x000000448<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 95:64 of AES_IV0 128b register. <br>For the description of AES_IV0, see the AES_IV_0_0 register description<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_IV_0_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.19.1"></a>31:0
+ </td>
+ <td valign="top">AES_IV_0_2</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 95:64 of AES_IV0 register. <br>For the description of AES_IV0, see the AES_IV_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.20"></a><br>1.4.20 : <b>Reg : AES_IV_0_3</b> : 0x00000044C<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 127:96 of AES_IV0 128b register. <br>For the description of AES_IV0, see the AES_IV_0_0 register description<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_IV_0_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.20.1"></a>31:0
+ </td>
+ <td valign="top">AES_IV_0_3</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 127:96 of AES_IV0 register. <br>For the description of AES_IV0, see the AES_IV_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.21"></a><br>1.4.21 : <b>Reg : AES_IV_1_0</b> : 0x000000450<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 31:0 of AES_IV1 128b register. <br>AES IV1 is used as the AES IV (Initialization Value) register as the second tunnel stage IV register in tunneling operations.
+<br>The IV register should be loaded according to the AES mode:<br>in AES CBC/CBC-MAC - the AES IV register should be loaded with the IV (initialization vector).<br>in XTS-AES - the AES IV register should be loaded with the 'T' value (unless the HW T calculation mode is active, in which
+the 'T' value is calculated by the HW.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_IV_1_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.21.1"></a>31:0
+ </td>
+ <td valign="top">AES_IV_1_0</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of AES_IV1 register. <br>For the description of AES_IV1, see the AES_IV_1_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.22"></a><br>1.4.22 : <b>Reg : AES_IV_1_1</b> : 0x000000454<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 63:32 of AES_IV1 128b register. <br>For the description of AES_IV1, see the AES_IV_1_0 register description<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_IV_1_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.22.1"></a>31:0
+ </td>
+ <td valign="top">AES_IV_1_1</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 63:32 of AES_IV1 register. <br>For the description of AES_IV1, see the AES_IV_1_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.23"></a><br>1.4.23 : <b>Reg : AES_IV_1_2</b> : 0x000000458<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 95:64 of AES_IV1 128b register. <br>For the description of AES_IV1, see the AES_IV_1_0 register description<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_IV_1_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.23.1"></a>31:0
+ </td>
+ <td valign="top">AES_IV_1_2</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 95:64 of AES_IV1 register. <br>For the description of AES_IV1, see the AES_IV_1_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.24"></a><br>1.4.24 : <b>Reg : AES_IV_1_3</b> : 0x00000045C<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 127:96 of AES_IV1 128b register. <br>For the description of AES_IV1, see the AES_IV_1_0 register description<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_IV_1_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.24.1"></a>31:0
+ </td>
+ <td valign="top">AES_IV_1_3</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 127:96 of AES_IV1 register. <br>For the description of AES_IV1, see the AES_IV_1_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.25"></a><br>1.4.25 : <b>Reg : AES_CTR_0_0</b> : 0x000000460<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 31:0 of AES_CTR0 128b register. <br>AES CTR0 is used as the AES CTR (counter) register in non-tunneling operations, and as the first tunnel stage CTR register
+in tunneling operations. <br>The CTR register should be loaded according to the AES mode:<br>in AES CTR/GCTR - the AES CTR register should be loaded with the counter value.<br>in XTS-AES - the AES CTR register should be loaded with the 'i' value (in order to calculate the T value from it, if HW T
+calculation is supported).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_CTR_0_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.25.1"></a>31:0
+ </td>
+ <td valign="top">AES_CTR_0_0</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 31:0 of AES_CTR0 register. <br>For the description of AES_CTR0, see the AES_CTR_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.26"></a><br>1.4.26 : <b>Reg : AES_CTR_0_1</b> : 0x000000464<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 63:32 of AES_CTR0 128b register. <br>For the description of AES_CTR0, see the AES_CTR_0_0 register description.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_CTR_0_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.26.1"></a>31:0
+ </td>
+ <td valign="top">AES_CTR_0_1</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 63:32 of AES_CTR0 register. <br>For the description of AES_CTR0, see the AES_CTR_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.27"></a><br>1.4.27 : <b>Reg : AES_CTR_0_2</b> : 0x000000468<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 95:64 of AES_CTR0 128b register. <br>For the description of AES_CTR0, see the AES_CTR_0_0 register description.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_CTR_0_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.27.1"></a>31:0
+ </td>
+ <td valign="top">AES_CTR_0_2</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 95:64 of AES_CTR0 register. <br>For the description of AES_CTR0, see the AES_CTR_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.28"></a><br>1.4.28 : <b>Reg : AES_CTR_0_3</b> : 0x00000046C<br><b>reg sep address</b> : <b> reg host address</b> : <br>bits 127:96 of AES_CTR0 128b register. <br>For the description of AES_CTR0, see the AES_CTR_0_0 register description.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_CTR_0_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.28.1"></a>31:0
+ </td>
+ <td valign="top">AES_CTR_0_3</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 127:96 of AES_CTR0 register. <br>For the description of AES_CTR0, see the AES_CTR_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.4.29"></a><br>1.4.29 : <b>Reg : AES_BUSY</b> : 0x000000470<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is set when the AES core is active<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_BUSY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.29.1"></a>0:0
+ </td>
+ <td valign="top">AES_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">AES_BUSY Register. this register is set when the AES core is active</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.29.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">31'b0</td>
+ </tr>
+</table><a name="1.4.30"></a><br>1.4.30 : <b>Reg : AES_SK</b> : 0x000000478<br><b>reg sep address</b> : <b> reg host address</b> : <br>writing to this address causes sampling of the HW key to the AES_KEY0 register<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_SK</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.30.1"></a>0:0
+ </td>
+ <td valign="top">AES_SK</td>
+ <td valign="top" align="center">wm</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">writing to this address causes sampling of the HW key to the AES_KEY0 register</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.30.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wm</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.4.31"></a><br>1.4.31 : <b>Reg : AES_CMAC_INIT</b> : 0x00000047C<br><b>reg sep address</b> : <b> reg host address</b> : <br>Writing to this address triggers the AES engine generating of K1 and K2 for AES CMAC operations.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_CMAC_INIT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.31.1"></a>0:0
+ </td>
+ <td valign="top">AES_CMAC_INIT</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing to this address starts the generating of K1 and K2 for AES CMAC operations</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.31.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.4.32"></a><br>1.4.32 : <b>Reg : AES_SK1</b> : 0x0000004B4<br><b>reg sep address</b> : <b> reg host address</b> : <br>writing to this address causes sampling of the HW key to the AES_KEY1 register<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_SK1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.32.1"></a>0:0
+ </td>
+ <td valign="top">AES_SK1</td>
+ <td valign="top" align="center">wm</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">writing to this address causes sampling of the HW key to the AES_KEY1 register</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.32.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wm</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.4.33"></a><br>1.4.33 : <b>Reg : AES_REMAINING_BYTES</b> : 0x0000004BC<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register should be set with the amount of remaining bytes until the end of the current AES operation. The AES engine
+counts down from this value to determine the last / one before last blocks in AES CMAC, XTS AES and AES CCM.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_REMAINING_BYTES</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.33.1"></a>31:0
+ </td>
+ <td valign="top">AES_REMAINING_BYTES</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This register should be set with the amount of remaining bytes until the end of the current AES operation. The AES engine
+ counts down from this value to determine the last / one before last blocks in AES CMAC, XTS AES and AES CCM.
+ </td>
+ </tr>
+</table><a name="1.4.34"></a><br>1.4.34 : <b>Reg : AES_CONTROL</b> : 0x0000004C0<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the configuration of the AES engine<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_CONTROL</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.1"></a>0:0
+ </td>
+ <td valign="top">DEC_KEY0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines whether the AES performs Decrypt/Encrypt operations, in non-tunneling operations:<br>@0 - Encrypt<br>@1 - Decrypt
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.2"></a>1:1
+ </td>
+ <td valign="top">MODE0_IS_CBC_CTS</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">If MODE_KEY0 is set to 3'b001 (CBC), and this field is set - the mode is CBC-CTS. In addition, If MODE_KEY0 is set to 3'b010
+ (CTR), and this field is set - the mode is GCTR.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.3"></a>4:2
+ </td>
+ <td valign="top">MODE_KEY0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines the AES mode in non tunneling operations, and the AES mode of the first stage in tunneling operations:<br>@000 - ECB<br>@001 - CBC<br>@010 - CTR <br>@011 - CBC MAC<br>@100 - XEX/XTS<br>@101 - XCBC-MAC <br>@110 -OFB<br>@111 - CMAC
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.4"></a>7:5
+ </td>
+ <td valign="top">MODE_KEY1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines the AES mode of the second stage operation in tunneling operations:<br>@000 - ECB<br>@001 - CBC<br>@010 - CTR <br>@011 - CBC MAC<br>@100 - XEX/XTS<br>@101 - XCBC-MAC <br>@110 -OFB<br>@111 - CMAC
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.5"></a>8:8
+ </td>
+ <td valign="top">CBC_IS_ESSIV</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">If MODE_KEY0 is set to 3'b001 (CBC), and this field is set - the mode is CBC-with ESSIV.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.6"></a>9:9
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.7"></a>10:10
+ </td>
+ <td valign="top">AES_TUNNEL_IS_ON</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines whether the AES performs dual-tunnel operations or standard non-tunneling operations:<br>@0 - standard non-tunneling operations<br>@1 - tunneling operations.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.8"></a>11:11
+ </td>
+ <td valign="top">CBC_IS_BITLOCKER</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">If MODE_KEY0 is set to 3'b001 (CBC), and this field is set - the mode isBITLOCKER.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.9"></a>13:12
+ </td>
+ <td valign="top">NK_KEY0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines the AES Key length in non tunneling operations, and the AES key length of the first stage in tunneling
+ operations:<br>@00 - 128 bits key<br>@01 - 192 bits key <br>@10 - 256 bits key <br>@11 - N/A
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.10"></a>15:14
+ </td>
+ <td valign="top">NK_KEY1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines the AES key length of the second stage operation in tunneling operations:<br>@00 - 128 bits key <br>@01 - 192 bits key <br>@10 - 256 bits key <br>@11 - N/A
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.11"></a>21:16
+ </td>
+ <td valign="top">RESERVED2</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.12"></a>22:22
+ </td>
+ <td valign="top">AES_TUNNEL1_DECRYPT</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines whether the second tunnel stage performs encrypt or decrypt operation :<br>@0 - the second tunnel stage performs encrypt operations. <br>@1 - the second tunnel stage performs decrypt operations.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.13"></a>23:23
+ </td>
+ <td valign="top">AES_TUN_B1_USES_PADDED_DATA_IN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines, for tunneling operations, the data that is fed to the second tunneling stage:<br>@0 - the output of the first block (standard tunneling operation).<br>@1- data_in after padding rather than the output of the first block.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.14"></a>24:24
+ </td>
+ <td valign="top">AES_TUNNEL0_ENCRYPT</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines whether the first tunnel stage performs encrypt or decrypt operation :<br>@0 - the first tunnel stage performs decrypt operations.<br>@1 - the first tunnel stage performs encrypt operations.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.15"></a>25:25
+ </td>
+ <td valign="top">AES_OUTPUT_MID_TUNNEL_DATA</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This fields determines whether the AES output is the result of the first or second tunneling stage:<br>@0 - The AES engine outputs the result of the second tunnel stage (standard tunneling).<br>@1 - The AES engine outputs the result of the first tunnel stage.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.16"></a>26:26
+ </td>
+ <td valign="top">AES_TUNNEL_B1_PAD_EN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines whether the input data to the second tunnel stage is padded with zeroes (according to the remaining_bytes
+ value) or not:<br>@0 - The data input to the second tunnel block is not padded with zeros.<br>@1 - The data input to the second tunnel block is padded with zeros.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.17"></a>27:27
+ </td>
+ <td valign="top">RESERVED3</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.18"></a>28:28
+ </td>
+ <td valign="top">AES_OUT_MID_TUN_TO_HASH</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines for AES-TO-HASH-AND-DOUT tunneling operations, whether the AES outputs to the HASH the result of the
+ first or the second tunneling stage:<br>@0 - The AES engine writes to the hash the result of the second tunnel stage.<br>@1 - The AES engine writes to the hash the result of the first tunnel stage.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.19"></a>29:29
+ </td>
+ <td valign="top">AES_XOR_CRYPTOKEY</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field determines the value that is written to AES_KEY0, when AES_SK is kicked:<br>@0 - The value that is written to AES_KEY0 is the value of the HW cryptokey, as is.<br>@1 - The value that is written to AES_KEY0 is the value of the HW cryptokey xored with the current value of AES_KEY0.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.20"></a>30:30
+ </td>
+ <td valign="top">RESERVED4</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.34.21"></a>31:31
+ </td>
+ <td valign="top">DIRECT_ACCESS</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Using direct access and not the din-dout interface</td>
+ </tr>
+</table><a name="1.4.35"></a><br>1.4.35 : <b>Reg : AES_HW_FLAGS</b> : 0x0000004C8<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the pre-synthesis HW flag configuration of the AES engine<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_HW_FLAGS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.1"></a>0:0
+ </td>
+ <td valign="top">SUPPORT_256_192_KEY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">the SUPPORT_256_192_KEY flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.2"></a>1:1
+ </td>
+ <td valign="top">AES_LARGE_RKEK</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">the AES_LARGE_RKEK flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.3"></a>2:2
+ </td>
+ <td valign="top">DPA_CNTRMSR_EXIST</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">the DPA_CNTRMSR_EXIST flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.4"></a>3:3
+ </td>
+ <td valign="top">CTR_EXIST</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">the CTR_EXIST flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.5"></a>4:4
+ </td>
+ <td valign="top">ONLY_ENCRYPT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">the ONLY_ENCRYPT flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.6"></a>5:5
+ </td>
+ <td valign="top">USE_SBOX_TABLE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">the USE_SBOX_TABLE flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.7"></a>7:6
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.8"></a>8:8
+ </td>
+ <td valign="top">USE_5_SBOXES</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">the USE_5_SBOXES flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.9"></a>9:9
+ </td>
+ <td valign="top">AES_SUPPORT_PREV_IV</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">the AES_SUPPORT_PREV_IV flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.10"></a>10:10
+ </td>
+ <td valign="top">aes_tunnel_exists</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">the aes_tunnel_exists flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.11"></a>11:11
+ </td>
+ <td valign="top">SECOND_REGS_SET_EXIST</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">the SECOND_REGS_SET_EXIST flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.12"></a>12:12
+ </td>
+ <td valign="top">DFA_CNTRMSR_EXIST</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">the DFA_CNTRMSR_EXIST flag</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.35.13"></a>31:13
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.4.36"></a><br>1.4.36 : <b>Reg : AES_CTR_NO_INCREMENT</b> : 0x0000004D8<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register enables the AES CTR no increment mode (in which the counter mode is not incremented between 2 blocks)<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_CTR_NO_INCREMENT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.36.1"></a>0:0
+ </td>
+ <td valign="top">AES_CTR_NO_INCREMENT</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field enables the AES CTR "no increment" mode (in which the counter mode is not incremented between 2 blocks)</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.36.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.4.37"></a><br>1.4.37 : <b>Reg : AES_DFA_IS_ON</b> : 0x0000004F0<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register disable/enable the AES dfa.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_DFA_IS_ON</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.37.1"></a>0:0
+ </td>
+ <td valign="top">AES_DFA_IS_ON</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">writing to this register turns the DFA counter-measures on. this register exists only if DFA countermeasures are supported</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.37.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.4.38"></a><br>1.4.38 : <b>Reg : AES_DFA_ERR_STATUS</b> : 0x0000004F8<br><b>reg sep address</b> : <b> reg host address</b> : <br>dfa error status register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_DFA_ERR_STATUS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.38.1"></a>0:0
+ </td>
+ <td valign="top">AES_DFA_ERR_STATUS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">after a DFA violation this register is set and the AES block is disabled) until the next reset. this register only exists
+ if DFA countermeasures is are supported
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.38.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.4.39"></a><br>1.4.39 : <b>Reg : AES_CMAC_SIZE0_KICK</b> : 0x000000524<br><b>reg sep address</b> : <b> reg host address</b> : <br>writing to this address triggers the AES engine to perform a CMAC operation with size 0. The CMAC result can be read from
+the AES_IV0 register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_CMAC_SIZE0_KICK</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.39.1"></a>0:0
+ </td>
+ <td valign="top">AES_CMAC_SIZE0_KICK</td>
+ <td valign="top" align="center">wm</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">writing to this address triggers the AES engine to perform a CMAC operation with size 0. The CMAC result can be read from
+ the AES_IV0 register.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.4.39.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wm</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.4">(top of block)</a><a name="1.5"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.5 : Block: HASH</font></b></td>
+ <td align="right"><font color="#000000">0x000000640</font></td>
+</table><br><a name="1.5.1"></a><br>1.5.1 : <b>Reg : HASH_H0</b> : 0x000000640<br><b>reg sep address</b> : <b> reg host address</b> : <br>H0 data. can only be written in the following HASH_CONTROL modes: MD5 SHA1 SHA224 SHA256 SHA384 SHA512<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_H0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.1.1"></a>31:0
+ </td>
+ <td valign="top">HASH_H0</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1) Write initial Hash value. <br>2) Read final Hash value - result.
+ </td>
+ </tr>
+</table><a name="1.5.2"></a><br>1.5.2 : <b>Reg : HASH_H1</b> : 0x000000644<br><b>reg sep address</b> : <b> reg host address</b> : <br>H1 data. can only be written in the following HASH_CONTROL modes: MD5 SHA1 SHA224 SHA256 SHA384 SHA512<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_H1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.2.1"></a>31:0
+ </td>
+ <td valign="top">HASH_H1</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1) Write initial Hash value. <br>2) Read final Hash value - result.
+ </td>
+ </tr>
+</table><a name="1.5.3"></a><br>1.5.3 : <b>Reg : HASH_H2</b> : 0x000000648<br><b>reg sep address</b> : <b> reg host address</b> : <br>H2 data. can only be written in the following HASH_CONTROL modes: MD5 SHA1 SHA224 SHA256 SHA384 SHA512<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_H2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.3.1"></a>31:0
+ </td>
+ <td valign="top">HASH_H2</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1) Write initial Hash value. <br>2) Read final Hash value - result.
+ </td>
+ </tr>
+</table><a name="1.5.4"></a><br>1.5.4 : <b>Reg : HASH_H3</b> : 0x00000064C<br><b>reg sep address</b> : <b> reg host address</b> : <br>H3 data. can only be written in the following HASH_CONTROL modes: MD5 SHA1 SHA224 SHA256 SHA384 SHA512<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_H3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.4.1"></a>31:0
+ </td>
+ <td valign="top">HASH_H3</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1) Write initial Hash value. <br>2) Read final Hash value - result.
+ </td>
+ </tr>
+</table><a name="1.5.5"></a><br>1.5.5 : <b>Reg : HASH_H4</b> : 0x000000650<br><b>reg sep address</b> : <b> reg host address</b> : <br>H4 data. can only be written in the following HASH_CONTROL modes: SHA1 SHA224 SHA256 SHA384 SHA512<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_H4</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.5.1"></a>31:0
+ </td>
+ <td valign="top">HASH_H4</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1) Write initial Hash value. <br>2) Read final Hash value - result.
+ </td>
+ </tr>
+</table><a name="1.5.6"></a><br>1.5.6 : <b>Reg : HASH_H5</b> : 0x000000654<br><b>reg sep address</b> : <b> reg host address</b> : <br>H5 data. can only be written in the following HASH_CONTROL modes: SHA224 SHA256 SHA384 SHA512<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_H5</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.6.1"></a>31:0
+ </td>
+ <td valign="top">HASH_H5</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1) Write initial Hash value. <br>2) Read final Hash value - result.
+ </td>
+ </tr>
+</table><a name="1.5.7"></a><br>1.5.7 : <b>Reg : HASH_H6</b> : 0x000000658<br><b>reg sep address</b> : <b> reg host address</b> : <br>H6 data. can only be written in the following HASH_CONTROL modes: SHA224 SHA256 SHA384 SHA512<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_H6</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.7.1"></a>31:0
+ </td>
+ <td valign="top">HASH_H6</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1) Write initial Hash value. <br>2) Read final Hash value - result.
+ </td>
+ </tr>
+</table><a name="1.5.8"></a><br>1.5.8 : <b>Reg : HASH_H7</b> : 0x00000065C<br><b>reg sep address</b> : <b> reg host address</b> : <br>H7 data. can only be written in the following HASH_CONTROL modes: SHA224 SHA256 SHA384 SHA512<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_H7</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.8.1"></a>31:0
+ </td>
+ <td valign="top">HASH_H7</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1) Write initial Hash value. <br>2) Read final Hash value - result.
+ </td>
+ </tr>
+</table><a name="1.5.9"></a><br>1.5.9 : <b>Reg : HASH_H8</b> : 0x000000660<br><b>reg sep address</b> : <b> reg host address</b> : <br>H8 data. can only be written in the following HASH_CONTROL modes: SHA384 SHA512<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_H8</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.9.1"></a>31:0
+ </td>
+ <td valign="top">HASH_H8</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1) Write initial Hash value. <br>2) Read final Hash value - result.
+ </td>
+ </tr>
+</table><a name="1.5.10"></a><br>1.5.10 : <b>Reg : AUTO_HW_PADDING</b> : 0x000000684<br><b>reg sep address</b> : <b> reg host address</b> : <br>HW padding automatically activated by engine. For the special case of ZERO bytes data vector this register should not be used!
+instead use HASH_PAD_CFG<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AUTO_HW_PADDING</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.10.1"></a>0:0
+ </td>
+ <td valign="top">EN</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - Enable Automatic HW padding (No need for SW intervention by writing PAD_CFG). <br>Note: Not supported for 0 bytes !<br>Note: Disable this register when HASH op is done
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.10.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.5.11"></a><br>1.5.11 : <b>Reg : HASH_XOR_DIN</b> : 0x000000688<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is always xored with the input to the hash engine,it should be '0' if xored is not reqiured .<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_XOR_DIN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.11.1"></a>31:0
+ </td>
+ <td valign="top">HASH_XOR_DATA</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This register holds the value to be xor-ed with hash input data.</td>
+ </tr>
+</table><a name="1.5.12"></a><br>1.5.12 : <b>Reg : LOAD_INIT_STATE</b> : 0x000000694<br><b>reg sep address</b> : <b> reg host address</b> : <br>Indication to HASH that the following data is to be loaded into initial value registers in HASH(H0:H15) or IV to AES MAC<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">LOAD_INIT_STATE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.12.1"></a>0:0
+ </td>
+ <td valign="top">LOAD</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Load data to initial state registers. digest/iv for hash/aes_mac. When done loading data this bit should be reset</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.12.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.5.13"></a><br>1.5.13 : <b>Reg : HASH_SEL_AES_MAC</b> : 0x0000006A4<br><b>reg sep address</b> : <b> reg host address</b> : <br>select the AES MAC module rather than the hash module<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_SEL_AES_MAC</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.13.1"></a>0:0
+ </td>
+ <td valign="top">HASH_SEL_AES_MAC</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b0 - select the hash module<br>@1'b1 - select the AES mac module
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.13.2"></a>1:1
+ </td>
+ <td valign="top">GHASH_SEL</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b0 - select the hash module<br>@1'b1 - select the ghash module
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.13.3"></a>31:2
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.5.14"></a><br>1.5.14 : <b>Reg : HASH_VERSION</b> : 0x0000007B0<br><b>reg sep address</b> : <b> reg host address</b> : <br>HASH VERSION Register<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_VERSION</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.14.1"></a>7:0
+ </td>
+ <td valign="top">FIXES</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top"></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.14.2"></a>11:8
+ </td>
+ <td valign="top">MINOR_VERSION_NUMBER</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">minor version number</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.14.3"></a>15:12
+ </td>
+ <td valign="top">MAJOR_VERSION_NUMBER</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">major version number</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.14.4"></a>31:16
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.5.15"></a><br>1.5.15 : <b>Reg : HASH_CONTROL</b> : 0x0000007C0<br><b>reg sep address</b> : <b> reg host address</b> : <br>HASH_CONTROL Register. selects which HASH mode to run<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_CONTROL</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.15.1"></a>1:0
+ </td>
+ <td valign="top">MODE_0_1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bits 1:0 of the HASH mode field. The hash mode field possible values are:<br>@4'b0000 - MD5 if present<br>@4'b0001 - SHA-1<br>@4'b0010 - SHA-256<br>@4'b1010 - SHA-224
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.15.2"></a>2:2
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.15.3"></a>3:3
+ </td>
+ <td valign="top">MODE_3</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">bit 3 of the HASH mode field. The hash mode field possible values are:4'b0000 - MD5 if present 4'b0001 - SHA-1 4'b0010 - SHA-256
+ 4'b1010 - SHA-224
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.15.4"></a>31:4
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.5.16"></a><br>1.5.16 : <b>Reg : HASH_PAD_EN</b> : 0x0000007C4<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register enables the hash hw padding .<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_PAD_EN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.16.1"></a>0:0
+ </td>
+ <td valign="top">EN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">1 - Enable generation of padding by HW Pad block.<br>0 - Disable generation of padding by HW Pad block.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.16.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.5.17"></a><br>1.5.17 : <b>Reg : HASH_PAD_CFG</b> : 0x0000007C8<br><b>reg sep address</b> : <b> reg host address</b> : <br>HASH_PAD_CFG Register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_PAD_CFG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.17.1"></a>1:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.17.2"></a>2:2
+ </td>
+ <td valign="top">DO_PAD</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Enable Padding generation. must be reset upon completion of padding.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.17.3"></a>31:3
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.5.18"></a><br>1.5.18 : <b>Reg : HASH_CUR_LEN_0</b> : 0x0000007CC<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register hold the length of current hash operation bit 31:0.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_CUR_LEN_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.18.1"></a>31:0
+ </td>
+ <td valign="top">Length</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Represent the current length of valid bits where digest need to be computed In Bytes.</td>
+ </tr>
+</table><a name="1.5.19"></a><br>1.5.19 : <b>Reg : HASH_CUR_LEN_1</b> : 0x0000007D0<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register hold the length of current hash operation bit 63:32.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_CUR_LEN_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.19.1"></a>31:0
+ </td>
+ <td valign="top">Length</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Represent the current length of valid bits where digest need to be computed In Bytes.</td>
+ </tr>
+</table><a name="1.5.20"></a><br>1.5.20 : <b>Reg : HASH_PARAM</b> : 0x0000007DC<br><b>reg sep address</b> : <b> reg host address</b> : <br>HASH_PARAM Register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_PARAM</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.1"></a>3:0
+ </td>
+ <td valign="top">CW</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">Indicates the number of concurrent words the hash is using to compute signature. 1 - One concurrent w(t). 2 - Two concurrent
+ w(t).
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.2"></a>7:4
+ </td>
+ <td valign="top">CH</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicate if Hi adders are present for each Hi value or 1 adder is shared for all Hi. 0 - One Hi value is updated at a time
+ 1 - All Hi values are updated at the same time.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.3"></a>11:8
+ </td>
+ <td valign="top">DW</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Determine the granularity of word size. 0 - 32 bit word data. 1 - 64 bit word data.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.4"></a>12:12
+ </td>
+ <td valign="top">SHA_512_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicate if SHA-512 is present in the design. By default SHA-1 and SHA-256 are present. 0 - SHA-1 and SHA-256 are present
+ only 1 - SHA-1 and all SHA-2 are present (SHA-256 SHA-512).
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.5"></a>13:13
+ </td>
+ <td valign="top">PAD_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">Indicate if pad block is present in the design. 0 - pad function is not supported by hardware. 1 - pad function is supported
+ by hardware.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.6"></a>14:14
+ </td>
+ <td valign="top">MD5_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicate if MD5 is present in HW</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.7"></a>15:15
+ </td>
+ <td valign="top">HMAC_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicate if HMAC logic is present in the design</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.8"></a>16:16
+ </td>
+ <td valign="top">SHA_256_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">Indicate if SHA-256 is present in the design</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.9"></a>17:17
+ </td>
+ <td valign="top">HASH_COMPARE_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicate if COMPARE digest logic is present in the design</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.10"></a>18:18
+ </td>
+ <td valign="top">DUMP_HASH_TO_DOUT_EXISTS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicate if HASH to dout is present in the design</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.20.11"></a>31:19
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.5.21"></a><br>1.5.21 : <b>Reg : HASH_AES_SW_RESET</b> : 0x0000007E4<br><b>reg sep address</b> : <b> reg host address</b> : <br>HASH_AES_SW_RESET Register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_AES_SW_RESET</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.21.1"></a>0:0
+ </td>
+ <td valign="top">HASH_AES_SW_RESET</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Hash receive reset internally.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.21.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.5.22"></a><br>1.5.22 : <b>Reg : HASH_ENDIANESS</b> : 0x0000007E8<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register hold the HASH_ENDIANESS configuration.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_ENDIANESS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.22.1"></a>0:0
+ </td>
+ <td valign="top">ENDIAN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">The default value is little-endian. The data and generation of padding can be swapped to be big-endian.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.5.22.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.5">(top of block)</a><a name="1.6"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.6 : Block: MISC</font></b></td>
+ <td align="right"><font color="#000000">0x000000800</font></td>
+</table><br><a name="1.6.1"></a><br>1.6.1 : <b>Reg : AES_CLK_ENABLE</b> : 0x000000810<br><b>reg sep address</b> : <b> reg host address</b> : <br>The AES clock enable register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AES_CLK_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.1.1"></a>0:0
+ </td>
+ <td valign="top">EN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b1 - the AES clock is enabled.<br>@1'b0 - the AES clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.1.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.6.2"></a><br>1.6.2 : <b>Reg : HASH_CLK_ENABLE</b> : 0x000000818<br><b>reg sep address</b> : <b> reg host address</b> : <br>The HASH clock enable register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_CLK_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.2.1"></a>0:0
+ </td>
+ <td valign="top">EN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b1 - the HASH clock is enabled.<br>@1'b0 - the HASH clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.2.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.6.3"></a><br>1.6.3 : <b>Reg : PKA_CLK_ENABLE</b> : 0x00000081C<br><b>reg sep address</b> : <b> reg host address</b> : <br>The PKA clock enable register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PKA_CLK_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.3.1"></a>0:0
+ </td>
+ <td valign="top">EN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b1 - the PKA clock is enabled.<br>@1'b0 - the PKA clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.3.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.6.4"></a><br>1.6.4 : <b>Reg : DMA_CLK_ENABLE</b> : 0x000000820<br><b>reg sep address</b> : <b> reg host address</b> : <br>DMA_CLK enable register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DMA_CLK_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.4.1"></a>0:0
+ </td>
+ <td valign="top">EN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b1 - the DMA clock is enabled.<br>@1'b0 - the DMA clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.4.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.6.5"></a><br>1.6.5 : <b>Reg : CLK_STATUS</b> : 0x000000824<br><b>reg sep address</b> : <b> reg host address</b> : <br>The CryptoCell clocks' status register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CLK_STATUS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.5.1"></a>0:0
+ </td>
+ <td valign="top">AES_CLK_STATUS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b1 - the AES clock is enabled.<br>@1'b0 - the AES clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.5.2"></a>1:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b1 - the DES clock is enabled.<br>@1'b0 - the DES clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.5.3"></a>2:2
+ </td>
+ <td valign="top">HASH_CLK_STATUS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b1 - the HASH clock is enabled.<br>@1'b0 - the HASH clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.5.4"></a>3:3
+ </td>
+ <td valign="top">PKA_CLK_STATUS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b1 - the PKA clock is enabled.<br>@1'b0 - the PKA clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.5.5"></a>6:4
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.5.6"></a>7:7
+ </td>
+ <td valign="top">CHACHA_CLK_STATUS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b1 - the CHACHA clock is enabled.<br>@1'b0 - the CHACHA clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.5.7"></a>8:8
+ </td>
+ <td valign="top">DMA_CLK_STATUS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">@1'b1 - the DMA clock is enabled.<br>@1'b0 - the DMA clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.5.8"></a>31:9
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.6.6"></a><br>1.6.6 : <b>Reg : CHACHA_CLK_ENABLE</b> : 0x000000858<br><b>reg sep address</b> : <b> reg host address</b> : <br>CHACHA /SALSA clock enable register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CHACHA_CLK_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.6.1"></a>0:0
+ </td>
+ <td valign="top">EN</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b1 - the CHACHA / SALSA clock is enabled.<br>@1'b0 - the CHACHA / SALSA clock is disabled.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.6.6.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.6">(top of block)</a><a name="1.7"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.7 : Block: CC_CTL</font></b></td>
+ <td align="right"><font color="#000000">0x000000900</font></td>
+</table><br><a name="1.7.1"></a><br>1.7.1 : <b>Reg : CRYPTO_CTL</b> : 0x000000900<br><b>reg sep address</b> : <b> reg host address</b> : <br>Defines the cryptographic flow.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CRYPTO_CTL</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.7.1.1"></a>4:0
+ </td>
+ <td valign="top">MODE</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Determines the active cryptographic engine:<br>@5'b0000 - BYPASS<br>@5'b0001 - AES<br>@5'b0010 - AES_TO_HASH<br>@5'b0011 - AES_AND_HASH<br>@5'b0100 - DES<br>@5'b0101 - DES_TO_HASH<br>@5'b0110 - DES_AND_HASH<br>@5'b0111 - HASH<br>@5'b1001 - AES_MAC_AND_BYPASS<br>@5'b1010 - AES_TO_HASH_AND_DOUT<br>@5'b1011 - Reserved<br>@5'b1000 - Reserved
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.7.1.2"></a>31:5
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.7.2"></a><br>1.7.2 : <b>Reg : CRYPTO_BUSY</b> : 0x000000910<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is set when the cryptographic core is busy.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CRYPTO_BUSY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.7.2.1"></a>0:0
+ </td>
+ <td valign="top">CRYPTO_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b0 - Ready<br>@1'b1 - Busy<br>Asserted when AES_BUSY or DES_BUSY or HASH_BUSY are asserted or when the DIN FIFO is not empty.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.7.2.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.7.3"></a><br>1.7.3 : <b>Reg : HASH_BUSY</b> : 0x00000091C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is set when the Hash engine is busy.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HASH_BUSY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.7.3.1"></a>0:0
+ </td>
+ <td valign="top">HASH_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b0 - Ready<br>@1'b1 - Busy<br>Asserted when hash engine is busy.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.7.3.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.7.4"></a><br>1.7.4 : <b>Reg : CONTEXT_ID</b> : 0x000000930<br><b>reg sep address</b> : <b> reg host address</b> : <br>A general RD/WR register. For Firmware use.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">CONTEXT_ID</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.7.4.1"></a>7:0
+ </td>
+ <td valign="top">CONTEXT_ID</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Context ID</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.7.4.2"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.7">(top of block)</a><a name="1.8"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.8 : Block: GHASH</font></b></td>
+ <td align="right"><font color="#000000">0x000000960</font></td>
+</table><br><a name="1.8.1"></a><br>1.8.1 : <b>Reg : GHASH_SUBKEY_0_0</b> : 0x000000960<br><b>reg sep address</b> : <b> reg host address</b> : <br>Bits 31:0 of GHASH Key0 (used as the GHASH module key).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">GHASH_SUBKEY_0_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.1.1"></a>31:0
+ </td>
+ <td valign="top">GHASH_SUBKEY_0_0</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Bits 31:0 of GHASH Key0.</td>
+ </tr>
+</table><a name="1.8.2"></a><br>1.8.2 : <b>Reg : GHASH_SUBKEY_0_1</b> : 0x000000964<br><b>reg sep address</b> : <b> reg host address</b> : <br>Bits 63:32 of GHASH Key0 (used as the GHASH module key).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">GHASH_SUBKEY_0_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.2.1"></a>31:0
+ </td>
+ <td valign="top">GHASH_SUBKEY_0_1</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Bits 63:32 of GHASH Key0.</td>
+ </tr>
+</table><a name="1.8.3"></a><br>1.8.3 : <b>Reg : GHASH_SUBKEY_0_2</b> : 0x000000968<br><b>reg sep address</b> : <b> reg host address</b> : <br>Bits 95:64 of GHASH Key0 (used as the GHASH module key).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">GHASH_SUBKEY_0_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.3.1"></a>31:0
+ </td>
+ <td valign="top">GHASH_SUBKEY_0_2</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Bits 95:64 of GHASH Key0.</td>
+ </tr>
+</table><a name="1.8.4"></a><br>1.8.4 : <b>Reg : GHASH_SUBKEY_0_3</b> : 0x00000096C<br><b>reg sep address</b> : <b> reg host address</b> : <br>Bits 127:96 of GHASH Key0 (used as the GHASH module key).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">GHASH_SUBKEY_0_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.4.1"></a>31:0
+ </td>
+ <td valign="top">GHASH_SUBKEY_0_3</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Bits 127:96 of GHASH Key0.</td>
+ </tr>
+</table><a name="1.8.5"></a><br>1.8.5 : <b>Reg : GHASH_IV_0_0</b> : 0x000000970<br><b>reg sep address</b> : <b> reg host address</b> : <br>Bits 31:0 of GHASH_IV0 register. <br>GHASH IV0 is used as the GHASH IV (Initialization Value) register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">GHASH_IV_0_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.5.1"></a>31:0
+ </td>
+ <td valign="top">GHASH_IV_0_0</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Bits 31:0 of GHASH_IV0 register of the GHASH module. <br>For the description of GHASH_IV0, see the GHASH_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.8.6"></a><br>1.8.6 : <b>Reg : GHASH_IV_0_1</b> : 0x000000974<br><b>reg sep address</b> : <b> reg host address</b> : <br>Bits 63:32 of GHASH_IV0 register. <br>GHASH IV0 is used as the GHASH IV (Initialization Value) register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">GHASH_IV_0_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.6.1"></a>31:0
+ </td>
+ <td valign="top">GHASH_IV_0_1</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Bits 63:32 of GHASH_IV0 register of the GHASH module. <br>For the description of GHASH_IV0, see the GHASH_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.8.7"></a><br>1.8.7 : <b>Reg : GHASH_IV_0_2</b> : 0x000000978<br><b>reg sep address</b> : <b> reg host address</b> : <br>Bits 95:64 of GHASH_IV0 register. <br>GHASH IV0 is used as the GHASH IV (Initialization Value) register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">GHASH_IV_0_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.7.1"></a>31:0
+ </td>
+ <td valign="top">GHASH_IV_0_2</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Bits 95:64 of GHASH_IV0 register of the GHASH module. <br>For the description of GHASH_IV0, see the GHASH_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.8.8"></a><br>1.8.8 : <b>Reg : GHASH_IV_0_3</b> : 0x00000097C<br><b>reg sep address</b> : <b> reg host address</b> : <br>Bits 127:96 of GHASH_IV0 register. <br>GHASH IV0 is used as the GHASH IV (Initialization Value) register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">GHASH_IV_0_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.8.1"></a>31:0
+ </td>
+ <td valign="top">GHASH_IV_0_3</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Bits 127:96 of GHASH_IV0 register of the GHASH module. <br>For the description of GHASH_IV0, see the GHASH_0_0 register description
+ </td>
+ </tr>
+</table><a name="1.8.9"></a><br>1.8.9 : <b>Reg : GHASH_BUSY</b> : 0x000000980<br><b>reg sep address</b> : <b> reg host address</b> : <br>The GHASH module GHASH_BUSY Register. This register is set when the GHASH core is active.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">GHASH_BUSY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.9.1"></a>0:0
+ </td>
+ <td valign="top">GHASH_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">GHASH_BUSY Register. this register is set when the GHASH core is active</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.9.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.8.10"></a><br>1.8.10 : <b>Reg : GHASH_INIT</b> : 0x000000984<br><b>reg sep address</b> : <b> reg host address</b> : <br>Writing to this address sets the GHASH engine to be ready to a new GHASH operation.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">GHASH_INIT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.10.1"></a>0:0
+ </td>
+ <td valign="top">GHASH_INIT</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing to this address sets the GHASH engine to be ready to a new GHASH operation.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.8.10.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.8">(top of block)</a><a name="1.9"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.9 : Block: HOST_RGF</font></b></td>
+ <td align="right"><font color="#000000">0x000000A00</font></td>
+</table><br><a name="1.9.1"></a><br>1.9.1 : <b>Reg : HOST_RGF_IRR</b> : 0x000000A00<br><b>reg sep address</b> : <b> reg host address</b> : <br>The Interrupt Request register. Each bit of this register holds the interrupt status of a single interrupt source.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_RGF_IRR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.1.1"></a>3:0
+ </td>
+ <td valign="top">unused0</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.1.2"></a>4:4
+ </td>
+ <td valign="top">SRAM_TO_DIN_INT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The SRAM to DIN DMA done interrupt status. This interrupt is asserted when all data was delivered to DIN buffer from SRAM.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.1.3"></a>5:5
+ </td>
+ <td valign="top">DOUT_TO_SRAM_INT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The DOUT to SRAM DMA done interrupt status. This interrupt is asserted when all data was delivered to SRAM buffer from DOUT.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.1.4"></a>6:6
+ </td>
+ <td valign="top">MEM_TO_DIN_INT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The memory to DIN DMA done interrupt status. This interrupt is asserted when all data was delivered to DIN buffer from memory.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.1.5"></a>7:7
+ </td>
+ <td valign="top">DOUT_TO_MEM_INT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The DOUT to memory DMA done interrupt status. This interrupt is asserted when all data was delivered to memory buffer from
+ DOUT.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.1.6"></a>8:8
+ </td>
+ <td valign="top">AHB_ERR_INT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The AXI error interrupt status.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.1.7"></a>9:9
+ </td>
+ <td valign="top">PKA_EXP_INT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The PKA end of operation interrupt status.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.1.8"></a>10:10
+ </td>
+ <td valign="top">RNG_INT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The RNG interrupt status.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.1.9"></a>11:11
+ </td>
+ <td valign="top">SYM_DMA_COMPLETED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The GPR interrupt status.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.1.10"></a>31:12
+ </td>
+ <td valign="top">RESERVED2</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.9.2"></a><br>1.9.2 : <b>Reg : HOST_RGF_IMR</b> : 0x000000A04<br><b>reg sep address</b> : <b> reg host address</b> : <br>The Interrupt Mask register. Each bit of this register holds the mask of a single interrupt source.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_RGF_IMR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.2.1"></a>3:0
+ </td>
+ <td valign="top">unused0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.2.2"></a>4:4
+ </td>
+ <td valign="top">SRAM_TO_DIN_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">The SRAM to DIN DMA done interrupt mask.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.2.3"></a>5:5
+ </td>
+ <td valign="top">DOUT_TO_SRAM_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">The DOUT to SRAM DMA done interrupt mask.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.2.4"></a>6:6
+ </td>
+ <td valign="top">MEM_TO_DIN_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">The memory to DIN DMA done interrupt mask.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.2.5"></a>7:7
+ </td>
+ <td valign="top">DOUT_TO_MEM_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">The DOUT to memory DMA done interrupt mask.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.2.6"></a>8:8
+ </td>
+ <td valign="top">AXI_ERR_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">The AXI error interrupt mask.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.2.7"></a>9:9
+ </td>
+ <td valign="top">PKA_EXP_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">The PKA end of operation interrupt mask.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.2.8"></a>10:10
+ </td>
+ <td valign="top">RNG_INT_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">The RNG interrupt mask.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.2.9"></a>11:11
+ </td>
+ <td valign="top">SYM_DMA_COMPLETED_MASK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">The GPR interrupt mask.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.2.10"></a>31:12
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.9.3"></a><br>1.9.3 : <b>Reg : HOST_RGF_ICR</b> : 0x000000A08<br><b>reg sep address</b> : <b> reg host address</b> : <br>Interrupt Clear Register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_RGF_ICR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.3.1"></a>3:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.3.2"></a>4:4
+ </td>
+ <td valign="top">SRAM_TO_DIN_CLEAR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The SRAM to DIN DMA done interrupt clear.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.3.3"></a>5:5
+ </td>
+ <td valign="top">DOUT_TO_SRAM_CLEAR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The DOUT to SRAM DMA done interrupt clear.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.3.4"></a>6:6
+ </td>
+ <td valign="top">MEM_TO_DIN_CLEAR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The memory to DIN DMA done interrupt clear.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.3.5"></a>7:7
+ </td>
+ <td valign="top">DOUT_TO_MEM_CLEAR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The DOUT to memory DMA done interrupt clear.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.3.6"></a>8:8
+ </td>
+ <td valign="top">AXI_ERR_CLEAR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The AXI error interrupt clear.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.3.7"></a>9:9
+ </td>
+ <td valign="top">PKA_EXP_CLEAR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The PKA end of operation interrupt clear.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.3.8"></a>10:10
+ </td>
+ <td valign="top">RNG_INT_CLEAR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The RNG interrupt clear.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.3.9"></a>11:11
+ </td>
+ <td valign="top">SYM_DMA_COMPLETED_CLEAR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The GPR interrupt clear.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.3.10"></a>31:12
+ </td>
+ <td valign="top">RESERVED2</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.9.4"></a><br>1.9.4 : <b>Reg : HOST_RGF_ENDIAN</b> : 0x000000A0C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register defines the endianness of the Host-accessible registers.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_RGF_ENDIAN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.4.1"></a>2:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">rw1</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.4.2"></a>3:3
+ </td>
+ <td valign="top">DOUT_WR_BG</td>
+ <td valign="top" align="center">rw1</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DOUT write endianness:<br>@1'b0 - little endian <br>@1'b1 - big endian
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.4.3"></a>6:4
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">rw1</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.4.4"></a>7:7
+ </td>
+ <td valign="top">DIN_RD_BG</td>
+ <td valign="top" align="center">rw1</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DIN write endianness:<br>@1'b0 - little endian <br>@1'b1 - big endian
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.4.5"></a>10:8
+ </td>
+ <td valign="top">RESERVED2</td>
+ <td valign="top" align="center">rw1</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.4.6"></a>11:11
+ </td>
+ <td valign="top">DOUT_WR_WBG</td>
+ <td valign="top" align="center">rw1</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DOUT write word endianness:<br>@1'b0 - little endian <br>@1'b1 - big endian
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.4.7"></a>14:12
+ </td>
+ <td valign="top">RESERVED3</td>
+ <td valign="top" align="center">rw1</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.4.8"></a>15:15
+ </td>
+ <td valign="top">DIN_RD_WBG</td>
+ <td valign="top" align="center">rw1</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DIN write word endianness:<br>@1'b0 - little endian <br>@1'b1 - big endian
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.4.9"></a>31:16
+ </td>
+ <td valign="top">RESERVED4</td>
+ <td valign="top" align="center">rw1</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.9.5"></a><br>1.9.5 : <b>Reg : HOST_RGF_SIGNATURE</b> : 0x000000A24<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the CryptoCell product signature.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_RGF_SIGNATURE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.5.1"></a>31:0
+ </td>
+ <td valign="top">HOST_SIGNATURE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">Identification “signature”: always returns a fixed value, used by Host driver to verify CryptoCell presence at this address.</td>
+ </tr>
+</table><a name="1.9.6"></a><br>1.9.6 : <b>Reg : HOST_BOOT</b> : 0x000000A28<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the values of CryptoCell's pre-synthesis flags<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_BOOT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.1"></a>0:0
+ </td>
+ <td valign="top">SYNTHESIS_CONFIG</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">POWER_GATING_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.2"></a>1:1
+ </td>
+ <td valign="top">LARGE_RKEK_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">LARGE_RKEK_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.3"></a>2:2
+ </td>
+ <td valign="top">HASH_IN_FUSES_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">HASH_IN_FUSES_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.4"></a>3:3
+ </td>
+ <td valign="top">EXT_MEM_SECURED_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">EXT_MEM_SECURED_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.5"></a>4:4
+ </td>
+ <td valign="top">Reserved</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.6"></a>5:5
+ </td>
+ <td valign="top">RKEK_ECC_EXISTS_LOCAL_N</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">RKEK_ECC_EXISTS_LOCAL_N</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.7"></a>8:6
+ </td>
+ <td valign="top">SRAM_SIZE_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SRAM_SIZE_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.8"></a>9:9
+ </td>
+ <td valign="top">DSCRPTR_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DSCRPTR_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.9"></a>10:10
+ </td>
+ <td valign="top">PAU_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PAU_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.10"></a>11:11
+ </td>
+ <td valign="top">RNG_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">RNG_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.11"></a>12:12
+ </td>
+ <td valign="top">PKA_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">PKA_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.12"></a>13:13
+ </td>
+ <td valign="top">RC4_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">RC4_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.13"></a>14:14
+ </td>
+ <td valign="top">SHA_512_PRSNT_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SHA_512_PRSNT_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.14"></a>15:15
+ </td>
+ <td valign="top">SHA_256_PRSNT_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">SHA_256_PRSNT_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.15"></a>16:16
+ </td>
+ <td valign="top">MD5_PRSNT_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">MD5_PRSNT_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.16"></a>17:17
+ </td>
+ <td valign="top">HASH_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">HASH_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.17"></a>18:18
+ </td>
+ <td valign="top">C2_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">C2_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.18"></a>19:19
+ </td>
+ <td valign="top">DES_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DES_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.19"></a>20:20
+ </td>
+ <td valign="top">AES_XCBC_MAC_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">AES_XCBC_MAC_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.20"></a>21:21
+ </td>
+ <td valign="top">AES_CMAC_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">AES_CMAC_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.21"></a>22:22
+ </td>
+ <td valign="top">AES_CCM_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">AES_CCM_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.22"></a>23:23
+ </td>
+ <td valign="top">AES_XEX_HW_T_CALC_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">AES_XEX_HW_T_CALC_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.23"></a>24:24
+ </td>
+ <td valign="top">AES_XEX_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">AES_XEX_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.24"></a>25:25
+ </td>
+ <td valign="top">CTR_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">CTR_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.25"></a>26:26
+ </td>
+ <td valign="top">AES_DIN_BYTE_RESOLUTION_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">AES_DIN_BYTE_RESOLUTION_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.26"></a>27:27
+ </td>
+ <td valign="top">TUNNELING_ENB_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">TUNNELING_ENB_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.27"></a>28:28
+ </td>
+ <td valign="top">SUPPORT_256_192_KEY_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">SUPPORT_256_192_KEY_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.28"></a>29:29
+ </td>
+ <td valign="top">ONLY_ENCRYPT_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">ONLY_ENCRYPT_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.29"></a>30:30
+ </td>
+ <td valign="top">AES_EXISTS_LOCAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">AES_EXISTS_LOCAL</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.6.30"></a>31:31
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.9.7"></a><br>1.9.7 : <b>Reg : HOST_CRYPTOKEY_SEL</b> : 0x000000A38<br><b>reg sep address</b> : <b> reg host address</b> : <br>AES hardware key select.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_CRYPTOKEY_SEL</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.7.1"></a>2:0
+ </td>
+ <td valign="top">SEL_CRYPTO_KEY</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Select the source of the HW key that is used by the AES engine: <br>@3'h0 - RKEK<br>@3'h1 -the Krtl.<br>@3'h2 - the provision key KCP.<br>@3'h3 - the code encryption key KCE. <br>@3'h4 - the KPICV, The ICV provisioning key .<br>@3'h5 - the code encryption key KCEICV<br>NOTE:<br>When "kprtl_lock" is set - kprtl will be masked (trying to load it will load zeros to the AES key register.<br>When "kcertl_lock" is set - kcertl will be masked (trying to load it will load zeros to the AES key register.<br>When scan_mode is asserted – all the RTL keys (Krtll) will be masked.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.7.2"></a>31:3
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.9.8"></a><br>1.9.8 : <b>Reg : HOST_CORE_CLK_GATING_ENABLE</b> : 0x000000A78<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register enables the core clk gating by masking/enabling the cc_idle_state output signal.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_CORE_CLK_GATING_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.8.1"></a>0:0
+ </td>
+ <td valign="top">HOST_CORE_CLK_GATING_ENABLE</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Enable the core clk gating,</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.8.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.9.9"></a><br>1.9.9 : <b>Reg : HOST_CC_IS_IDLE</b> : 0x000000A7C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the idle indication of CC . Note: This is a special register, affected by internal logic. Test result
+of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_CC_IS_IDLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.1"></a>0:0
+ </td>
+ <td valign="top">HOST_CC_IS_IDLE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Read if CC is idle.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.2"></a>1:1
+ </td>
+ <td valign="top">HOST_CC_IS_IDLE_EVENT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The event that indicates that CC is idle.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.3"></a>2:2
+ </td>
+ <td valign="top">SYM_IS_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">symetric flow is busy</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.4"></a>3:3
+ </td>
+ <td valign="top">AHB_IS_IDLE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">ahb stste machine is idle</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.5"></a>4:4
+ </td>
+ <td valign="top">NVM_ARB_IS_IDLE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">nvm arbiter is idle</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.6"></a>5:5
+ </td>
+ <td valign="top">NVM_IS_IDLE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">nvm is idle</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.7"></a>6:6
+ </td>
+ <td valign="top">FATAL_WR</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">fatal write</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.8"></a>7:7
+ </td>
+ <td valign="top">RNG_IS_IDLE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">rng is idle</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.9"></a>8:8
+ </td>
+ <td valign="top">PKA_IS_IDLE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">pka is idle</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.10"></a>9:9
+ </td>
+ <td valign="top">CRYPTO_IS_IDLE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">crypto flow is done</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.9.11"></a>31:10
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.9.10"></a><br>1.9.10 : <b>Reg : HOST_POWERDOWN</b> : 0x000000A80<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register start the power-down sequence.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_POWERDOWN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.10.1"></a>0:0
+ </td>
+ <td valign="top">HOST_POWERDOWN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Power down enable register.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.10.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.9.11"></a><br>1.9.11 : <b>Reg : HOST_REMOVE_GHASH_ENGINE</b> : 0x000000A84<br><b>reg sep address</b> : <b> reg host address</b> : <br>These inputs are to be statically tied to 0 or 1 by the customers. When such an input is set, the matching engines inputs
+are tied to zero and its outputs are disconnected, so that the engine will be entirely removed by Synthesis<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_REMOVE_GHASH_ENGINE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.11.1"></a>0:0
+ </td>
+ <td valign="top">HOST_REMOVE_GHASH_ENGINE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Read the Remove_chacha_engine input</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.11.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.9.12"></a><br>1.9.12 : <b>Reg : HOST_REMOVE_CHACHA_ENGINE</b> : 0x000000A88<br><b>reg sep address</b> : <b> reg host address</b> : <br>These inputs are to be statically tied to 0 or 1 by the customers. When such an input is set, the matching engines inputs
+are tied to zero and its outputs are disconnected, so that the engine will be entirely removed by Synthesis<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_REMOVE_CHACHA_ENGINE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.12.1"></a>0:0
+ </td>
+ <td valign="top">HOST_REMOVE_CHACHA_ENGINE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Read the Remove_ghash_engine input</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.9.12.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a href="#1.9">(top of block)</a><a name="1.10"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.10 : Block: AHB</font></b></td>
+ <td align="right"><font color="#000000">0x000000B00</font></td>
+</table><br><a name="1.10.1"></a><br>1.10.1 : <b>Reg : AHBM_SINGLES</b> : 0x000000B00<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register forces the ahb transactions to be always singles.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AHBM_SINGLES</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.10.1.1"></a>0:0
+ </td>
+ <td valign="top">AHB_SINGLES</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Force ahb singles</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.10.1.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.10.2"></a><br>1.10.2 : <b>Reg : AHBM_HPROT</b> : 0x000000B04<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the ahb prot value<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AHBM_HPROT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.10.2.1"></a>3:0
+ </td>
+ <td valign="top">AHB_PROT</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The ahb prot value</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.10.2.2"></a>31:4
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.10.3"></a><br>1.10.3 : <b>Reg : AHBM_HMASTLOCK</b> : 0x000000B08<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds ahb hmastlock value<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AHBM_HMASTLOCK</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.10.3.1"></a>0:0
+ </td>
+ <td valign="top">AHB_HMASTLOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The hmastlock value.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.10.3.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.10.4"></a><br>1.10.4 : <b>Reg : AHBM_HNONSEC</b> : 0x000000B0C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds ahb hnonsec value<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AHBM_HNONSEC</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.10.4.1"></a>0:0
+ </td>
+ <td valign="top">AHB_WRITE_HNONSEC</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The hnonsec value for write transaction.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.10.4.2"></a>1:1
+ </td>
+ <td valign="top">AHB_READ_HNONSEC</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The hnonsec value for read transaction.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.10.4.3"></a>31:2
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.10">(top of block)</a><a name="1.11"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.11 : Block: DIN</font></b></td>
+ <td align="right"><font color="#000000">0x000000C00</font></td>
+</table><br><a name="1.11.1"></a><br>1.11.1 : <b>Reg : DIN_BUFFER</b> : 0x000000C00<br><b>reg sep address</b> : <b> reg host address</b> : <br>This address can be used by the CPU to write data directly to the DIN buffer to be sent to engines.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DIN_BUFFER</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.1.1"></a>31:0
+ </td>
+ <td valign="top">DIN_BUFFER_DATA</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This register is mapped into 8 addresses in order to enable a CPU burst.</td>
+ </tr>
+</table><a name="1.11.2"></a><br>1.11.2 : <b>Reg : DIN_MEM_DMA_BUSY</b> : 0x000000C20<br><b>reg sep address</b> : <b> reg host address</b> : <br>Indicates whether memory (AXI) source DMA (DIN) is busy.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DIN_MEM_DMA_BUSY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.2.1"></a>0:0
+ </td>
+ <td valign="top">DIN_MEM_DMA_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DIN memory DMA busy:<br>@1'b1 - busy<br>@1'b0 - not busy
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.2.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.11.3"></a><br>1.11.3 : <b>Reg : SRC_LLI_WORD0</b> : 0x000000C28<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is used in direct LLI mode - holds the location of the data source in the memory (AXI).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">SRC_LLI_WORD0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.3.1"></a>31:0
+ </td>
+ <td valign="top">SRC_LLI_WORD0</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Source address within memory.</td>
+ </tr>
+</table><a name="1.11.4"></a><br>1.11.4 : <b>Reg : SRC_LLI_WORD1</b> : 0x000000C2C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is used in direct LLI mode - holds the number of bytes to be read from the memory (AXI). Writing to this register
+triggers the DMA.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">SRC_LLI_WORD1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.4.1"></a>29:0
+ </td>
+ <td valign="top">BYTES_NUM</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Total number of bytes to read using DMA in this entry</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.4.2"></a>30:30
+ </td>
+ <td valign="top">FIRST</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - Indicates the first LLI entry</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.4.3"></a>31:31
+ </td>
+ <td valign="top">LAST</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - Indicates the last LLI entry</td>
+ </tr>
+</table><a name="1.11.5"></a><br>1.11.5 : <b>Reg : SRAM_SRC_ADDR</b> : 0x000000C30<br><b>reg sep address</b> : <b> reg host address</b> : <br>Location of data (start address) to be read from SRAM.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">SRAM_SRC_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.5.1"></a>31:0
+ </td>
+ <td valign="top">SRAM_SOURCE</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SRAM source base address of data</td>
+ </tr>
+</table><a name="1.11.6"></a><br>1.11.6 : <b>Reg : DIN_SRAM_BYTES_LEN</b> : 0x000000C34<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the size of the data (in bytes) to be read from the SRAM.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DIN_SRAM_BYTES_LEN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.6.1"></a>31:0
+ </td>
+ <td valign="top">BYTES_LEN</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Size of data to read from SRAM (bytes). This is the trigger to the SRAM SRC DMA.</td>
+ </tr>
+</table><a name="1.11.7"></a><br>1.11.7 : <b>Reg : DIN_SRAM_DMA_BUSY</b> : 0x000000C38<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the status of the SRAM DMA DIN.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DIN_SRAM_DMA_BUSY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.7.1"></a>0:0
+ </td>
+ <td valign="top">BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DIN SRAM DMA busy:<br>@1'b1 - busy<br>@1'b0 - not busy
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.7.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.11.8"></a><br>1.11.8 : <b>Reg : DIN_SRAM_ENDIANNESS</b> : 0x000000C3C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register defines the endianness of the DIN interface to SRAM.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DIN_SRAM_ENDIANNESS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.8.1"></a>0:0
+ </td>
+ <td valign="top">SRAM_DIN_ENDIANNESS</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Defines the endianness of DIN interface to SRAM:<br>@1'b1 - big-endianness<br>@1'b0 - little endianness
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.8.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.11.9"></a><br>1.11.9 : <b>Reg : DIN_CPU_DATA_SIZE</b> : 0x000000C48<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register hold the number of bytes to be transmited using external DMA<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DIN_CPU_DATA_SIZE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.9.1"></a>15:0
+ </td>
+ <td valign="top">CPU_DIN_SIZE</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When using external DMA, the size of transmited data in bytes should be written to this register.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.9.2"></a>31:16
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.11.10"></a><br>1.11.10 : <b>Reg : FIFO_IN_EMPTY</b> : 0x000000C50<br><b>reg sep address</b> : <b> reg host address</b> : <br>DIN FIFO empty indication<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">FIFO_IN_EMPTY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.10.1"></a>0:0
+ </td>
+ <td valign="top">EMPTY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">1'b1 - FIFO empty</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.10.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.11.11"></a><br>1.11.11 : <b>Reg : DIN_FIFO_RST_PNTR</b> : 0x000000C58<br><b>reg sep address</b> : <b> reg host address</b> : <br>Writing to this register resets the DIN_FIFO pointers.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DIN_FIFO_RST_PNTR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.11.1"></a>0:0
+ </td>
+ <td valign="top">RST</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing any value to this address resets the DIN_FIFO pointers.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.11.11.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.11">(top of block)</a><a name="1.12"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.12 : Block: DOUT</font></b></td>
+ <td align="right"><font color="#000000">0x000000D00</font></td>
+</table><br><a name="1.12.1"></a><br>1.12.1 : <b>Reg : DOUT_BUFFER</b> : 0x000000D00<br><b>reg sep address</b> : <b> reg host address</b> : <br>Cryptographic result - CPU can directly access it.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DOUT_BUFFER</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.1.1"></a>31:0
+ </td>
+ <td valign="top">DOUT_BUFFER_DATA</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This address can be used by the CPU to read data directly from the DOUT buffer.</td>
+ </tr>
+</table><a name="1.12.2"></a><br>1.12.2 : <b>Reg : DOUT_MEM_DMA_BUSY</b> : 0x000000D20<br><b>reg sep address</b> : <b> reg host address</b> : <br>DOUT memory DMA busy - Indicates that memory (AXI) destination DMA (DOUT) is busy,<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DOUT_MEM_DMA_BUSY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.2.1"></a>0:0
+ </td>
+ <td valign="top">DOUT_MEM_DMA_BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DOUT memory DMA busy:<br>@1'b1 - busy<br>@1'b0 - not busy
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.2.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.12.3"></a><br>1.12.3 : <b>Reg : DST_LLI_WORD0</b> : 0x000000D28<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is used in direct LLI mode - holds the location of the data destination in the memory (AXI)<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DST_LLI_WORD0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.3.1"></a>31:0
+ </td>
+ <td valign="top">DST_LLI_WORD0</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Destination address within memory</td>
+ </tr>
+</table><a name="1.12.4"></a><br>1.12.4 : <b>Reg : DST_LLI_WORD1</b> : 0x000000D2C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register is used in direct LLI mode - holds the number of bytes to be written to the memory (AXI). <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DST_LLI_WORD1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.4.1"></a>29:0
+ </td>
+ <td valign="top">BYTES_NUM</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Total byte number to be written by DMA in this entry</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.4.2"></a>30:30
+ </td>
+ <td valign="top">FIRST</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - Indicates the first LLI entry</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.4.3"></a>31:31
+ </td>
+ <td valign="top">LAST</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - Indicates the last LLI entry</td>
+ </tr>
+</table><a name="1.12.5"></a><br>1.12.5 : <b>Reg : SRAM_DEST_ADDR</b> : 0x000000D30<br><b>reg sep address</b> : <b> reg host address</b> : <br>Location of result to be sent to in SRAM<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">SRAM_DEST_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.5.1"></a>31:0
+ </td>
+ <td valign="top">SRAM_DEST</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SRAM destination base address for data.</td>
+ </tr>
+</table><a name="1.12.6"></a><br>1.12.6 : <b>Reg : DOUT_SRAM_BYTES_LEN</b> : 0x000000D34<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the size of the data (in bytes) to be written to the SRAM.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DOUT_SRAM_BYTES_LEN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.6.1"></a>31:0
+ </td>
+ <td valign="top">BYTES_LEN</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Size of data to write to SRAM (bytes). This is the trigger to the SRAM DST DMA.</td>
+ </tr>
+</table><a name="1.12.7"></a><br>1.12.7 : <b>Reg : DOUT_SRAM_DMA_BUSY</b> : 0x000000D38<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the status of the SRAM DMA DOUT.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DOUT_SRAM_DMA_BUSY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.7.1"></a>0:0
+ </td>
+ <td valign="top">BUSY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">@1'b0 - all data was written to SRAM.<br>@1'b1 - DOUT SRAM DMA busy.
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.7.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.12.8"></a><br>1.12.8 : <b>Reg : DOUT_SRAM_ENDIANNESS</b> : 0x000000D3C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register defines the endianness of the DOUT interface from SRAM.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DOUT_SRAM_ENDIANNESS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.8.1"></a>0:0
+ </td>
+ <td valign="top">DOUT_SRAM_ENDIANNESS</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Defines the endianness of DOUT interface from SRAM:<br>@1'b1 - big-endianness<br>@1'b0 - little endianness
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.8.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.12.9"></a><br>1.12.9 : <b>Reg : READ_ALIGN_LAST</b> : 0x000000D44<br><b>reg sep address</b> : <b> reg host address</b> : <br>Indication that the next read from the CPU is the last one. This is needed only when the data size is NOT modulo 4 (e.g. HASH
+padding).<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">READ_ALIGN_LAST</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.9.1"></a>0:0
+ </td>
+ <td valign="top">LAST</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - Flush the read aligner content (used for reading the last data).</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.9.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.12.10"></a><br>1.12.10 : <b>Reg : DOUT_FIFO_EMPTY</b> : 0x000000D50<br><b>reg sep address</b> : <b> reg host address</b> : <br>DOUT_FIFO_EMPTY Register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">DOUT_FIFO_EMPTY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.10.1"></a>0:0
+ </td>
+ <td valign="top">DOUT_FIFO_EMPTY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">@1'b0 - DOUT FIFO is not empty <br>@1'b1 - DOUT FIFO is empty
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.12.10.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.12">(top of block)</a><a name="1.13"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.13 : Block: HOST_SRAM</font></b></td>
+ <td align="right"><font color="#000000">0x000000F00</font></td>
+</table><br><a name="1.13.1"></a><br>1.13.1 : <b>Reg : SRAM_DATA</b> : 0x000000F00<br><b>reg sep address</b> : <b> reg host address</b> : <br>READ WRITE DATA FROM SRAM<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">SRAM_DATA</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.13.1.1"></a>31:0
+ </td>
+ <td valign="top">SRAM_DATA</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">32 bit write or read from SRAM: read - triggers the SRAM read DMA address automatically incremented write - triggers the SRAM
+ write DMA address automatically incremented
+ </td>
+ </tr>
+</table><a name="1.13.2"></a><br>1.13.2 : <b>Reg : SRAM_ADDR</b> : 0x000000F04<br><b>reg sep address</b> : <b> reg host address</b> : <br>first address given to SRAM DMA for read/write transactions from SRAM<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">SRAM_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.13.2.1"></a>14:0
+ </td>
+ <td valign="top">SRAM_ADDR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SRAM starting address</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.13.2.2"></a>31:15
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">17'b0</td>
+ </tr>
+</table><a name="1.13.3"></a><br>1.13.3 : <b>Reg : SRAM_DATA_READY</b> : 0x000000F08<br><b>reg sep address</b> : <b> reg host address</b> : <br>The SRAM content is ready for read in SRAM_DATA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">SRAM_DATA_READY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.13.3.1"></a>0:0
+ </td>
+ <td valign="top">SRAM_READY</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">SRAM content is ready for read in SRAM_DATA.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.13.3.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.13">(top of block)</a><a name="1.14"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.14 : Block: ID_REGISTERS</font></b></td>
+ <td align="right"><font color="#000000">0x000000F10</font></td>
+</table><br><a name="1.14.1"></a><br>1.14.1 : <b>Reg : PERIPHERAL_ID_4</b> : 0x000000FD0<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PERIPHERAL_ID_4</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.1.1"></a>3:0
+ </td>
+ <td valign="top">DES_2_JEP106</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">Continuation Code. 0x4 for ARM products.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.1.2"></a>31:4
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.2"></a><br>1.14.2 : <b>Reg : PIDRESERVED0</b> : 0x000000FD4<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PIDRESERVED0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.2.1"></a>31:0
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.3"></a><br>1.14.3 : <b>Reg : PIDRESERVED1</b> : 0x000000FD8<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PIDRESERVED1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.3.1"></a>31:0
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.4"></a><br>1.14.4 : <b>Reg : PIDRESERVED2</b> : 0x000000FDC<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PIDRESERVED2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.4.1"></a>31:0
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.5"></a><br>1.14.5 : <b>Reg : PERIPHERAL_ID_0</b> : 0x000000FE0<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PERIPHERAL_ID_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.5.1"></a>7:0
+ </td>
+ <td valign="top">PART_0</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">Identification register part number, bits[7:0]</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.5.2"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.6"></a><br>1.14.6 : <b>Reg : PERIPHERAL_ID_1</b> : 0x000000FE4<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PERIPHERAL_ID_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.6.1"></a>3:0
+ </td>
+ <td valign="top">PART_1</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Identification register part number, bits[11:8]</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.6.2"></a>7:4
+ </td>
+ <td valign="top">DES_0_JEP106</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x3</td>
+ <td valign="top">identification code, bits[3:0]. 0x3B for ARM products.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.6.3"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.7"></a><br>1.14.7 : <b>Reg : PERIPHERAL_ID_2</b> : 0x000000FE8<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PERIPHERAL_ID_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.7.1"></a>2:0
+ </td>
+ <td valign="top">DES_1_JEP106</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">identification code, bits[6:4]. 0x3B for ARM products.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.7.2"></a>3
+ </td>
+ <td valign="top">JEDEC</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">constant 0x1. Indicates that a JEDEC assigned value is used.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.7.3"></a>7:4
+ </td>
+ <td valign="top">REVISION</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">starts at zero and increments for every new IP release.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.7.4"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.8"></a><br>1.14.8 : <b>Reg : PERIPHERAL_ID_3</b> : 0x000000FEC<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">PERIPHERAL_ID_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.8.1"></a>3:0
+ </td>
+ <td valign="top">CMOD</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Customer Modified, normally zero, but if a partner applies any changes themselves, they must change this value.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.8.2"></a>7:4
+ </td>
+ <td valign="top">REVAND</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">starts at zero for every Revision, and increments if metal fixes are applied between 2 IP releases.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.8.3"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.9"></a><br>1.14.9 : <b>Reg : COMPONENT_ID_0</b> : 0x000000FF0<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">COMPONENT_ID_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.9.1"></a>7:0
+ </td>
+ <td valign="top">PRMBL_0</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">constant 0xD</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.9.2"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.10"></a><br>1.14.10 : <b>Reg : COMPONENT_ID_1</b> : 0x000000FF4<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">COMPONENT_ID_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.10.1"></a>3:0
+ </td>
+ <td valign="top">PRMBL_1</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">constant 0x0</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.10.2"></a>7:4
+ </td>
+ <td valign="top">CLASS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">component type 0 0xF for Cryptocell</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.10.3"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.11"></a><br>1.14.11 : <b>Reg : COMPONENT_ID_2</b> : 0x000000FF8<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">COMPONENT_ID_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.11.1"></a>7:0
+ </td>
+ <td valign="top">PRMBL_2</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">constant 0x5</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.11.2"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a name="1.14.12"></a><br>1.14.12 : <b>Reg : COMPONENT_ID_3</b> : 0x000000FFC<br><b>reg sep address</b> : <b> reg host address</b> : <br><br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">COMPONENT_ID_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.12.1"></a>7:0
+ </td>
+ <td valign="top">PRMBL_3</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">constant 0xB1</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.14.12.2"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved<br>Note: This is a special register, this registers
+ </td>
+ </tr>
+</table><a href="#1.14">(top of block)</a><a name="1.15"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.15 : Block: AO</font></b></td>
+ <td align="right"><font color="#000000">0x000001E00</font></td>
+</table><br><a name="1.15.1"></a><br>1.15.1 : <b>Reg : HOST_DCU_EN0</b> : 0x000001E00<br><b>reg sep address</b> : <b> reg host address</b> : <br>The DCU [31:0] enable register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_DCU_EN0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.1.1"></a>31:0
+ </td>
+ <td valign="top">HOST_DCU_EN0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Debug Control Unit (DCU) Enable bits.</td>
+ </tr>
+</table><a name="1.15.2"></a><br>1.15.2 : <b>Reg : HOST_DCU_EN1</b> : 0x000001E04<br><b>reg sep address</b> : <b> reg host address</b> : <br>The DCU [63:32] enable register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_DCU_EN1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.2.1"></a>31:0
+ </td>
+ <td valign="top">HOST_DCU_EN1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Debug Control Unit (DCU) Enable bits.</td>
+ </tr>
+</table><a name="1.15.3"></a><br>1.15.3 : <b>Reg : HOST_DCU_EN2</b> : 0x000001E08<br><b>reg sep address</b> : <b> reg host address</b> : <br>The DCU [95:64] enable register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_DCU_EN2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.3.1"></a>31:0
+ </td>
+ <td valign="top">HOST_DCU_EN2</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Debug Control Unit (DCU) Enable bits.</td>
+ </tr>
+</table><a name="1.15.4"></a><br>1.15.4 : <b>Reg : HOST_DCU_EN3</b> : 0x000001E0C<br><b>reg sep address</b> : <b> reg host address</b> : 1E0C<br>The DCU [1271:96] enable register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_DCU_EN3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.4.1"></a>31:0
+ </td>
+ <td valign="top">HOST_DCU_EN3</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Debug Control Unit (DCU) Enable bits.</td>
+ </tr>
+</table><a name="1.15.5"></a><br>1.15.5 : <b>Reg : HOST_DCU_LOCK0</b> : 0x000001E10<br><b>reg sep address</b> : <b> reg host address</b> : <br>The DCU lock register.Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_DCU_LOCK0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.5.1"></a>31:0
+ </td>
+ <td valign="top">HOST_DCU_LOCK0</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DCU_lock [31:0] register (a dedicated lock register per DCU bit).</td>
+ </tr>
+</table><a name="1.15.6"></a><br>1.15.6 : <b>Reg : HOST_DCU_LOCK1</b> : 0x000001E14<br><b>reg sep address</b> : <b> reg host address</b> : <br>The DCU lock register.Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_DCU_LOCK1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.6.1"></a>31:0
+ </td>
+ <td valign="top">HOST_DCU_LOCK1</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DCU_lock [63:32] register (a dedicated lock register per DCU bit).</td>
+ </tr>
+</table><a name="1.15.7"></a><br>1.15.7 : <b>Reg : HOST_DCU_LOCK2</b> : 0x000001E18<br><b>reg sep address</b> : <b> reg host address</b> : <br>The DCU lock register.Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_DCU_LOCK2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.7.1"></a>31:0
+ </td>
+ <td valign="top">HOST_DCU_LOCK2</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DCU_lock [95:64] register (a dedicated lock register per DCU bit).</td>
+ </tr>
+</table><a name="1.15.8"></a><br>1.15.8 : <b>Reg : HOST_DCU_LOCK3</b> : 0x000001E1C<br><b>reg sep address</b> : <b> reg host address</b> : <br>The DCU lock register.Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_DCU_LOCK3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.8.1"></a>31:0
+ </td>
+ <td valign="top">HOST_DCU_LOCK3</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">DCU_lock [127:96] register (a dedicated lock register per DCU bit).</td>
+ </tr>
+</table><a name="1.15.9"></a><br>1.15.9 : <b>Reg : AO_ICV_DCU_RESTRICTION_MASK0</b> : 0x000001E20<br><b>reg sep address</b> : <b> reg host address</b> : <br>The DCU lock register.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AO_ICV_DCU_RESTRICTION_MASK0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.9.1"></a>31:0
+ </td>
+ <td valign="top">AO_ICV_DCU_RESTRICTION_MASK0</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">AO_ICV_DCU_RESTRICTION_MASK [31:0] parameter, that will be a customer modifiable.</td>
+ </tr>
+</table><a name="1.15.10"></a><br>1.15.10 : <b>Reg : AO_ICV_DCU_RESTRICTION_MASK1</b> : 0x000001E24<br><b>reg sep address</b> : <b> reg host address</b> : <br>The "ICV_DCU_restriction_mask" parameter is read by FW during the secure debug verification to prevent OEM from setting specific
+DCUs that protect ICV secrets<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AO_ICV_DCU_RESTRICTION_MASK1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.10.1"></a>31:0
+ </td>
+ <td valign="top">AO_ICV_DCU_RESTRICTION_MASK1</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">AO_ICV_DCU_RESTRICTION_MASK [63:32] parameter, that will be a customer modifiable.</td>
+ </tr>
+</table><a name="1.15.11"></a><br>1.15.11 : <b>Reg : AO_ICV_DCU_RESTRICTION_MASK2</b> : 0x000001E28<br><b>reg sep address</b> : <b> reg host address</b> : <br>The "ICV_DCU_restriction_mask" parameter is read by FW during the secure debug verification to prevent OEM from setting specific
+DCUs that protect ICV secrets<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AO_ICV_DCU_RESTRICTION_MASK2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.11.1"></a>31:0
+ </td>
+ <td valign="top">AO_ICV_DCU_RESTRICTION_MASK2</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">AO_ICV_DCU_RESTRICTION_MASK [95:64] parameter, that will be a customer modifiable.</td>
+ </tr>
+</table><a name="1.15.12"></a><br>1.15.12 : <b>Reg : AO_ICV_DCU_RESTRICTION_MASK3</b> : 0x000001E2C<br><b>reg sep address</b> : <b> reg host address</b> : <br>The "ICV_DCU_restriction_mask" parameter is read by FW during the secure debug verification to prevent OEM from setting specific
+DCUs that protect ICV secrets<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AO_ICV_DCU_RESTRICTION_MASK3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.12.1"></a>31:0
+ </td>
+ <td valign="top">AO_ICV_DCU_RESTRICTION_MASK3</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">AO_ICV_DCU_RESTRICTION_MASK [127:96] parameter, that will be a customer modifiable.</td>
+ </tr>
+</table><a name="1.15.13"></a><br>1.15.13 : <b>Reg : AO_CC_SEC_DEBUG_RESET</b> : 0x000001E30<br><b>reg sep address</b> : <b> reg host address</b> : <br>The reset-upon-debug indication<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AO_CC_SEC_DEBUG_RESET</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.13.1"></a>0:0
+ </td>
+ <td valign="top">AO_CC_SEC_DEBUG_RESET</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">For resets Cerberus, and prevents loading the HW keys after that reset</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.13.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.15.14"></a><br>1.15.14 : <b>Reg : HOST_AO_LOCK_BITS</b> : 0x000001E34<br><b>reg sep address</b> : <b> reg host address</b> : <br>These masks will define, per LCS, which DCU bits will be tied to zero, even if the Host tries to set them. Note: This is a
+special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_AO_LOCK_BITS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.14.1"></a>0:0
+ </td>
+ <td valign="top">HOST_FATAL_ERR</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When the "FATAL_ERROR" register is asserted - HW keys will not be copied from OTP</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.14.2"></a>1:1
+ </td>
+ <td valign="top">HOST_KPICV_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When this FW controlled register is set, the Kpicv HW key is masked (to zero).</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.14.3"></a>2:2
+ </td>
+ <td valign="top">HOST_KCEICV_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When this FW controlled register is set, the Kceicv HW key is masked (to zero).</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.14.4"></a>3:3
+ </td>
+ <td valign="top">HOST_KCP_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When this FW controlled register is set, the Kcp HW key is masked (to zero).</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.14.5"></a>4:4
+ </td>
+ <td valign="top">HOST_KCE_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When this FW controlled register is set, the Kce HW key is masked (to zero).</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.14.6"></a>5:5
+ </td>
+ <td valign="top">HOST_ICV_RMA_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The ICV_RMA_LOCK register is set-once (per POR).</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.14.7"></a>6:6
+ </td>
+ <td valign="top">RESET_UPON_DEBUG_DISABLE</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The RESET_UPON_DEBUG_DISABLE register is set-once (per POR).</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.14.8"></a>7:7
+ </td>
+ <td valign="top">HOST_FORCE_DFA_ENABLE</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">When this FW controlled register is set, the AES DFA countermeasures are enabled/disabled (regardless of the AES_DFA_IS_ON
+ register value).
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.14.9"></a>8:8
+ </td>
+ <td valign="top">HOST_DFA_ENABLE_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">When this FW control is set, the DFA_ENABLE register can't be written until the next POR. The DFA_ENABLE_LOCK register is
+ set-once (per POR).
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.14.10"></a>31:9
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.15.15"></a><br>1.15.15 : <b>Reg : AO_APB_FILTERING</b> : 0x000001E38<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register holds the AO_APB_FILTERING data. Note: This is a special register, affected by internal logic. Test result of
+this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AO_APB_FILTERING</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.1"></a>0:0
+ </td>
+ <td valign="top">ONLY_SEC_ACCESS_ALLOW</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">when this FW controlled register is set, the APB slave accepts only secure accesses</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.2"></a>1:1
+ </td>
+ <td valign="top">ONLY_SEC_ACCESS_ALLOW_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">when this FW controlled register is set, the ONLY_SEC_ACCESS_ALLOWED register can't be modified (until the next POR).</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.3"></a>2:2
+ </td>
+ <td valign="top">ONLY_PRIV_ACCESS_ALLOW</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">when this FW controlled register is set, the APB slave accepts only privileged accesses</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.4"></a>3:3
+ </td>
+ <td valign="top">ONLY_PRIV_ACCESS_ALLOW_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">when this FW controlled register is set, the APBC_ONLY_PRIV_ACCESS_ALLOWED register can't be modified (until the next POR)</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.5"></a>4:4
+ </td>
+ <td valign="top">APBC_ONLY_SEC_ACCESS_ALLOW</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">when this FW controlled register is set, the APB-C slave accepts only secure accesses</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.6"></a>5:5
+ </td>
+ <td valign="top">APBC_ONLY_SEC_ACCESS_ALLOW_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">when this FW controlled register is set, the APBC_ONLY_SEC_ACCESS_ALLOWED register can't be modified (until the next POR).</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.7"></a>6:6
+ </td>
+ <td valign="top">APBC_ONLY_PRIV_ACCESS_ALLOW</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">when this FW controlled register is set, the APB-C slave accepts only privileged accesses</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.8"></a>7:7
+ </td>
+ <td valign="top">APBC_ONLY_PRIV_ACCESS_ALLOW_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">when this FW controlled register is set, the APBC_ONLY_PRIV_ACCESS_ALLOWED register can't be modified (until the next POR)</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.9"></a>8:8
+ </td>
+ <td valign="top">APBC_ONLY_INST_ACCESS_ALLOW</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">when this FW controlled register is set, the APB-C slave accepts only instruction accesses</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.10"></a>9:9
+ </td>
+ <td valign="top">APBC_ONLY_INST_ACCESS_ALLOW_LOCK</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">when this FW controlled register is set, the APBC_ONLY_INST_ACCESS_ALLOWED register can't be modified (until the next POR)</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.15.11"></a>31:10
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.15.16"></a><br>1.15.16 : <b>Reg : AO_CC_GPPC</b> : 0x000001E3C<br><b>reg sep address</b> : <b> reg host address</b> : <br>holds the AO_CC_GPPC value from AO<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AO_CC_GPPC</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.16.1"></a>7:0
+ </td>
+ <td valign="top">AO_CC_GPPC</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">The AO_CC_GPPC value</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.16.2"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a name="1.15.17"></a><br>1.15.17 : <b>Reg : HOST_RGF_CC_SW_RST</b> : 0x000001E40<br><b>reg sep address</b> : <b> reg host address</b> : <br>Writing to this register generates a general reset to CryptoCell. This reset takes about 4 core clock cycles.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_RGF_CC_SW_RST</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.17.1"></a>0:0
+ </td>
+ <td valign="top">HOST_RGF_CC_SW_RST</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Writing '1' to this field generates a general reset to CryptoCell.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.15.17.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.15">(top of block)</a><a name="1.16"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.16 : Block: NVM</font></b></td>
+ <td align="right"><font color="#000000">0x000001F00</font></td>
+</table><br><a name="1.16.1"></a><br>1.16.1 : <b>Reg : AIB_FUSE_PROG_COMPLETED</b> : 0x000001F04<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register reflects the fuse_aib_prog_completed input, which indicates that the fuse programming was completed.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">AIB_FUSE_PROG_COMPLETED</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.1.1"></a>0:0
+ </td>
+ <td valign="top">AIB_FUSE_PROG_COMPLETED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicates if the fuse programming operation has been completed.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.1.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.16.2"></a><br>1.16.2 : <b>Reg : NVM_DEBUG_STATUS</b> : 0x000001F08<br><b>reg sep address</b> : <b> reg host address</b> : <br>AIB debug status register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">NVM_DEBUG_STATUS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.2.1"></a>0:0
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.2.2"></a>3:1
+ </td>
+ <td valign="top">NVM_SM</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Main nvm fsm<br>3'b000 - IDLE<br>3'b001 - READ_DUMMY<br>3'b010 - READ_MAN_FLAG<br>3'b011 - READ_OEM_FLAG<br>3'b100 - READ_GPPC<br>3'b101 - DECODE<br>3'b110 - OTP_LCS_VALID<br>3'b111 - LCS_IS_VALID
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.2.3"></a>31:4
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.16.3"></a><br>1.16.3 : <b>Reg : LCS_IS_VALID</b> : 0x000001F0C<br><b>reg sep address</b> : <b> reg host address</b> : <br>Indicates that the LCS register holds a valid value.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">LCS_IS_VALID</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.3.1"></a>0:0
+ </td>
+ <td valign="top">LCS_IS_VALID_REG</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicates whether LCS is valid.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.3.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.16.4"></a><br>1.16.4 : <b>Reg : NVM_IS_IDLE</b> : 0x000001F10<br><b>reg sep address</b> : <b> reg host address</b> : <br>Indicates that the LCS register holds a valid value.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">NVM_IS_IDLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.4.1"></a>0:0
+ </td>
+ <td valign="top">NVM_IS_IDLE_REG</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indicates whether the NVM manager finishes its operation, calculates the LCS, reads the HW keys, compares the number of zeros
+ and clears the keys
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.4.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.16.5"></a><br>1.16.5 : <b>Reg : LCS_REG</b> : 0x000001F14<br><b>reg sep address</b> : <b> reg host address</b> : <br>The lifecycle state register.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">LCS_REG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.5.1"></a>2:0
+ </td>
+ <td valign="top">LCS_REG</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">Indicates the LCS (Lifecycle State) value.<br>3'b000 - CM<br>3'b001 - DM<br>3'b101 - SE<br>3'b111 - RMA
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.5.2"></a>7:3
+ </td>
+ <td valign="top">RESERVED0</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.5.3"></a>8:8
+ </td>
+ <td valign="top">ERROR_KDR_ZERO_CNT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indication that the number of zeroes in the loaded KDR is not equal to the value set in the manufacture flag.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.5.4"></a>9:9
+ </td>
+ <td valign="top">ERROR_PROV_ZERO_CNT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indication that the number of zeroes in the loaded KCP is not equal to the value set in the OEM flag.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.5.5"></a>10:10
+ </td>
+ <td valign="top">ERROR_KCE_ZERO_CNT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indication that the number of zeroes in the loaded KCE is not equal to the value set in the OEM flag.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.5.6"></a>11:11
+ </td>
+ <td valign="top">ERROR_KPICV_ZERO_CNT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indication that the number of zeroes in the loaded KPICV is not equal to the value set in the manufacture flag.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.5.7"></a>12:12
+ </td>
+ <td valign="top">ERROR_KCEICV_ZERO_CNT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Indication that the number of zeroes in the loaded KCEICV is not equal to the value set in the manufacture flag.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.5.8"></a>31:13
+ </td>
+ <td valign="top">RESERVED1</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.16.6"></a><br>1.16.6 : <b>Reg : HOST_SHADOW_KDR_REG</b> : 0x000001F18<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register interface is used to update the RKEK(KDR) registers when the device is in CM or DM mode , it is Write-once
+(per warm boot) in RMA LCS, The RKEK is updated by shifting .<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_SHADOW_KDR_REG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.6.1"></a>0:0
+ </td>
+ <td valign="top">HOST_SHADOW_KDR_REG</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field is used to update the KDR registers when the device is in CM , DM or RMA mode, The KDR is updated by shifting .</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.6.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.16.7"></a><br>1.16.7 : <b>Reg : HOST_SHADOW_KCP_REG</b> : 0x000001F1C<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register interface is used to update the KCP registers when the device is in CM or DM mode, The KCP is updated by shifting<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_SHADOW_KCP_REG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.7.1"></a>0:0
+ </td>
+ <td valign="top">HOST_SHADOW_KCP_REG</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field is used to update the KCP registers when the device is in CM or DM mode, The KCP is updated by shifting</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.7.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.16.8"></a><br>1.16.8 : <b>Reg : HOST_SHADOW_KCE_REG</b> : 0x000001F20<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register interface is used to update the KCE registers when the device is in CM or DM mode, The KCE is updated by shifting<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_SHADOW_KCE_REG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.8.1"></a>0:0
+ </td>
+ <td valign="top">HOST_SHADOW_KCE_REG</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field is used to update the KCE registers when the device is in CM or DM mode, The KCE is updated by shifting</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.8.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.16.9"></a><br>1.16.9 : <b>Reg : HOST_SHADOW_KPICV_REG</b> : 0x000001F24<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register interface is used to update the KPICV registers when the device is in CM or DM mode, The KPICV is updated by
+shifting<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_SHADOW_KPICV_REG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.9.1"></a>0:0
+ </td>
+ <td valign="top">HOST_SHADOW_KPICV_REG</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field is used to update the KPICV registers when the device is in CM or DM mode, The KPICV is updated by shifting</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.9.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.16.10"></a><br>1.16.10 : <b>Reg : HOST_SHADOW_KCEICV_REG</b> : 0x000001F28<br><b>reg sep address</b> : <b> reg host address</b> : <br>This register interface is used to update the KCEICV registers when the device is in CM or DM mode, The KCEICV is updated
+by shifting<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">HOST_SHADOW_KCEICV_REG</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.10.1"></a>0:0
+ </td>
+ <td valign="top">HOST_SHADOW_KCEICV_REG</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">This field is used to update the KCEICV registers when the device is in CM or DM mode, The KCEICV is updated by shifting</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.10.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a name="1.16.11"></a><br>1.16.11 : <b>Reg : OTP_ADDR_WIDTH_DEF</b> : 0x000001F2C<br><b>reg sep address</b> : <b> reg host address</b> : <br>OTP_ADDR_WIDTH parameter, that will define the integrated OTP address width (address in words). The supported sizes are 6
+(for 2 Kbits),7,8,9,11 (for 64 Kbits). The default value in the provided RTL will be 6.<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">OTP_ADDR_WIDTH_DEF</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.11.1"></a>3:0
+ </td>
+ <td valign="top">OTP_ADDR_WIDTH_DEF</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x</td>
+ <td valign="top">Holds the OTP_ADDR_WIDTH_DEF value.</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.16.11.2"></a>31:4
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Reserved</td>
+ </tr>
+</table><a href="#1.16">(top of block)</a><a name="1.17"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.17 : Block: ENV_CC_MEMORIES</font></b></td>
+ <td align="right"><font color="#000000">0x060004000</font></td>
+</table><br><a name="1.17.1"></a><br>1.17.1 : <b>Reg : ENV_FUSE_READY</b> : 0x060004000<br><b>reg sep address</b> : <b> reg host address</b> : <br>keep FUSE ready de-asserted (used in Discretix internal DSM tests only)<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FUSE_READY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.17.1.1"></a>0:0
+ </td>
+ <td valign="top">FUSE_READY</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'0 - FUSE ready kept low , 1'1 - FUSE ready released</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.17.1.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">31'b0</td>
+ </tr>
+</table><a name="1.17.2"></a><br>1.17.2 : <b>Reg : ENV_PERF_RAM_MASTER</b> : 0x0600040EC<br><b>reg sep address</b> : <b> reg host address</b> : <br>selects who's the Performance RAM master<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_PERF_RAM_MASTER</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.17.2.1"></a>0:0
+ </td>
+ <td valign="top">PERF_RAM_MASTER</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b0 - sw_monitor_sni0er, 1'b1 - HOST</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.17.2.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">selects who's the Performance RAM master</td>
+ </tr>
+</table><a name="1.17.3"></a><br>1.17.3 : <b>Reg : ENV_PERF_RAM_ADDR_HIGH4</b> : 0x0600040F0<br><b>reg sep address</b> : <b> reg host address</b> : <br>4 bits to concat with ENV_PERF_RAM_BASE[11]<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_PERF_RAM_ADDR_HIGH4</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.17.3.1"></a>1:0
+ </td>
+ <td valign="top">ADDR_HIGH_4</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">4 bits to concatenate: perf ram address = {ENV_PERF_RAM_ADDR_HIGH[3:0] ENV_PERF_RAM_BASE[11:2]}</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.17.3.2"></a>31:2
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">4 bits to concat with ENV_PERF_RAM_BASE[11</td>
+ </tr>
+</table><a name="1.17.4"></a><br>1.17.4 : <b>Reg : ENV_FUSES_RAM</b> : 0x0600043EC<br><b>reg sep address</b> : <b> reg host address</b> : <br>Using this address the HOST gains access to the aib_slave_model (fuses). (Actually there are 256 words hidden here.)<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FUSES_RAM</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.17.4.1"></a>31:0
+ </td>
+ <td valign="top">FUSE_VAL</td>
+ <td valign="top" align="center">r/wc</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Fuse value</td>
+ </tr>
+</table><a href="#1.17">(top of block)</a><a name="1.18"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.18 : Block: FPGA_ENV_REGS</font></b></td>
+ <td align="right"><font color="#000000">0x060005000</font></td>
+</table><br><a name="1.18.1"></a><br>1.18.1 : <b>Reg : ENV_FPGA_PKA_DEBUG_MODE</b> : 0x060005024<br><b>reg sep address</b> : <b> reg host address</b> : <br>Drive PKA debug mode <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_PKA_DEBUG_MODE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.1.1"></a>0:0
+ </td>
+ <td valign="top">PKA_DEBUG_MODE</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - PKA in debug mode</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.1.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">0</td>
+ </tr>
+</table><a name="1.18.2"></a><br>1.18.2 : <b>Reg : ENV_FPGA_SCAN_MODE</b> : 0x060005030<br><b>reg sep address</b> : <b> reg host address</b> : <br>CryptoCell scan_mode input<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_SCAN_MODE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.2.1"></a>0:0
+ </td>
+ <td valign="top">SCAN_MODE</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">when Scan mode is set RKEKs are reset</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.2.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">0</td>
+ </tr>
+</table><a name="1.18.3"></a><br>1.18.3 : <b>Reg : ENV_FPGA_CC_ALLOW_SCAN</b> : 0x060005034<br><b>reg sep address</b> : <b> reg host address</b> : <br>CryptoCell allow_scan output<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_CC_ALLOW_SCAN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.3.1"></a>0:0
+ </td>
+ <td valign="top">CC_ALLOW_SCAN</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">When low scan can not be performed. Reset value is: 1'b1</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.3.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">0</td>
+ </tr>
+</table><a name="1.18.4"></a><br>1.18.4 : <b>Reg : ENV_FPGA_CC_HOST_INT</b> : 0x0600050A0<br><b>reg sep address</b> : <b> reg host address</b> : <br>CryptoCell interrupt value<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_CC_HOST_INT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.4.1"></a>0:0
+ </td>
+ <td valign="top">CC_HOST_INT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">CryptoCell interrupt to Host Active High</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.4.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">0</td>
+ </tr>
+</table><a name="1.18.5"></a><br>1.18.5 : <b>Reg : ENV_FPGA_CC_PUB_HOST_INT</b> : 0x0600050A4<br><b>reg sep address</b> : <b> reg host address</b> : <br>CryptoCell public host interrupt value<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_CC_PUB_HOST_INT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.5.1"></a>0:0
+ </td>
+ <td valign="top">CC_PUB_HOST_INT</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">CryptoCell interrupt to public Host Active High</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.5.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">0</td>
+ </tr>
+</table><a name="1.18.6"></a><br>1.18.6 : <b>Reg : ENV_FPGA_CC_RST_N</b> : 0x0600050A8<br><b>reg sep address</b> : <b> reg host address</b> : <br>generate reset cycle towards CryptoCell<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_CC_RST_N</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.6.1"></a>0:0
+ </td>
+ <td valign="top">CC_RST_N</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - generate reset cycle towards CryptoCell</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.6.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">generate reset cycle towards CryptoCell</td>
+ </tr>
+</table><a name="1.18.7"></a><br>1.18.7 : <b>Reg : ENV_FPGA_RST_OVERRIDE</b> : 0x0600050AC<br><b>reg sep address</b> : <b> reg host address</b> : <br>Force high all reset lines in CryptoCell<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_RST_OVERRIDE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.7.1"></a>0:0
+ </td>
+ <td valign="top">RST_OVERRIDE</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - doesn't permit SW_RST or SYS_RST to CryptoCell or any engine</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.7.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Force high all reset lines in CryptoCell<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.
+ </td>
+ </tr>
+</table><a name="1.18.8"></a><br>1.18.8 : <b>Reg : ENV_FPGA_CC_POR_N_ADDR</b> : 0x0600050E0<br><b>reg sep address</b> : <b> reg host address</b> : <br>CryptoCell power ON <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_CC_POR_N_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.8.1"></a>0:0
+ </td>
+ <td valign="top">CC_POR_N_ADDR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x1</td>
+ <td valign="top">Active low. When asserted indicates that the entire system is powered on and not only the CryptoCell. If there's no potential
+ powering down of the CryptoCell in the SoC this input must be connected to the SYS_RST_n input
+ </td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.8.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">CryptoCell power ON</td>
+ </tr>
+</table><a name="1.18.9"></a><br>1.18.9 : <b>Reg : ENV_FPGA_CC_COLD_RST</b> : 0x0600050FC<br><b>reg sep address</b> : <b> reg host address</b> : <br>CryptoCell cold reset<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_CC_COLD_RST</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.9.1"></a>0:0
+ </td>
+ <td valign="top">ENV_CC_COLD_RST</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">CryptoCell cold reset assertion</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.9.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">CryptoCell cold reset</td>
+ </tr>
+</table><a name="1.18.10"></a><br>1.18.10 : <b>Reg : ENV_FPGA_DUMMY_ADDR</b> : 0x060005108<br><b>reg sep address</b> : <b> reg host address</b> : <br>dummy environment register <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_DUMMY_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.10.1"></a>31:0
+ </td>
+ <td valign="top">ENV_DUMMY_ADDR</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">0</td>
+ </tr>
+</table><a name="1.18.11"></a><br>1.18.11 : <b>Reg : ENV_FPGA_COUNTER_CLR</b> : 0x060005118<br><b>reg sep address</b> : <b> reg host address</b> : <br>clear and start the SW counter<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_COUNTER_CLR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.11.1"></a>0:0
+ </td>
+ <td valign="top">COUNTER_CLR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - clear/start counter</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.11.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">clear and start the SW counter</td>
+ </tr>
+</table><a name="1.18.12"></a><br>1.18.12 : <b>Reg : ENV_FPGA_COUNTER_RD</b> : 0x06000511C<br><b>reg sep address</b> : <b> reg host address</b> : <br>clear and start the SW counter<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_COUNTER_RD</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.12.1"></a>31:0
+ </td>
+ <td valign="top">COUNTER_VAL</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SW counter value</td>
+ </tr>
+</table><a name="1.18.13"></a><br>1.18.13 : <b>Reg : ENV_FPGA_RNG_DEBUG_ENABLE</b> : 0x060005430<br><b>reg sep address</b> : <b> reg host address</b> : <br>set RNG debug port<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_RNG_DEBUG_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.13.1"></a>0:0
+ </td>
+ <td valign="top">DEBUG_EN</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - RNG debug port asserted</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.13.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">31'b0</td>
+ </tr>
+</table><a name="1.18.14"></a><br>1.18.14 : <b>Reg : ENV_FPGA_CC_LCS</b> : 0x06000543C<br><b>reg sep address</b> : <b> reg host address</b> : <br>LCS register value<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_CC_LCS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.14.1"></a>7:0
+ </td>
+ <td valign="top">LCS</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">LCS data</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.14.2"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">24'b0</td>
+ </tr>
+</table><a name="1.18.15"></a><br>1.18.15 : <b>Reg : ENV_FPGA_CC_IS_CM_DM_SECURE_RMA</b> : 0x060005440<br><b>reg sep address</b> : <b> reg host address</b> : <br>read the lcs states if it is CM DM SECURED or RMA<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_CC_IS_CM_DM_SECURE_RMA</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.15.1"></a>0:0
+ </td>
+ <td valign="top">IS_CM</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - lcs state is CM 1'b0 - not</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.15.2"></a>1:1
+ </td>
+ <td valign="top">IS_DM</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - lcs state is DM 1'b0 - not</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.15.3"></a>2:2
+ </td>
+ <td valign="top">IS_SECURE</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - lcs state is SECURE 1'b0 - not</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.15.4"></a>3:3
+ </td>
+ <td valign="top">IS_RMA</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">1'b1 - lcs state is RMA 1'b0 - not</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.15.5"></a>31:4
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">28'b0</td>
+ </tr>
+</table><a name="1.18.16"></a><br>1.18.16 : <b>Reg : ENV_FPGA_DCU_EN</b> : 0x060005444<br><b>reg sep address</b> : <b> reg host address</b> : <br>read the lcs states if it is CM DM SECURED or RMA <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_DCU_EN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.16.1"></a>31:0
+ </td>
+ <td valign="top">DCU_EN</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Every bit in this sets of bits sets the matching dcu_en signal to a single dcu.</td>
+ </tr>
+</table><a name="1.18.17"></a><br>1.18.17 : <b>Reg : ENV_FPGA_CC_LCS_IS_VALID</b> : 0x060005448<br><b>reg sep address</b> : <b> reg host address</b> : <br>boot process finished reading LCS from NVM and write it to LCS register<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_CC_LCS_IS_VALID</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.17.1"></a>0:0
+ </td>
+ <td valign="top">LCS_IS_VALID</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">LCS data is valid</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.17.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">31'b0</td>
+ </tr>
+</table><a name="1.18.18"></a><br>1.18.18 : <b>Reg : ENV_FPGA_POWER_DOWN</b> : 0x060005478<br><b>reg sep address</b> : <b> reg host address</b> : <br>ENV_POWER_DOWN change bus to X's in DX simulations ONLY !<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_POWER_DOWN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.18.1"></a>31:0
+ </td>
+ <td valign="top">ENV_POWER_DOWN</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">write pulse of power down indication. Used for Internal DX simulations ONLY !</td>
+ </tr>
+</table><a name="1.18.19"></a><br>1.18.19 : <b>Reg : ENV_FPGA_DCU_H_EN</b> : 0x060005484<br><b>reg sep address</b> : <b> reg host address</b> : <br>read the lcs states if it is CM DM SECURED or RMA <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_DCU_H_EN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.19.1"></a>31:0
+ </td>
+ <td valign="top">DCU_EN</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Every bit in this sets of bits sets the matching dcu_en signal to a single dcu.</td>
+ </tr>
+</table><a name="1.18.20"></a><br>1.18.20 : <b>Reg : ENV_FPGA_VERSION</b> : 0x060005488<br><b>reg sep address</b> : <b> reg host address</b> : <br>version of FPGA <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_VERSION</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.20.1"></a>31:0
+ </td>
+ <td valign="top">FPGA_VERSION</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Define the FPGA version.</td>
+ </tr>
+</table><a name="1.18.21"></a><br>1.18.21 : <b>Reg : ENV_FPGA_ROSC_WRITE</b> : 0x06000548C<br><b>reg sep address</b> : <b> reg host address</b> : <br>ROSC write select<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_ROSC_WRITE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.21.1"></a>0:0
+ </td>
+ <td valign="top">ROSC_PSEL</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">rosc psel</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.21.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">31'b0</td>
+ </tr>
+</table><a name="1.18.22"></a><br>1.18.22 : <b>Reg : ENV_FPGA_ROSC_ADDR</b> : 0x060005490<br><b>reg sep address</b> : <b> reg host address</b> : <br>ROSC ADDRRESS<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_ROSC_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.22.1"></a>7:0
+ </td>
+ <td valign="top">ROSC_ADDR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">rosc address</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.22.2"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">24'b0</td>
+ </tr>
+</table><a name="1.18.23"></a><br>1.18.23 : <b>Reg : ENV_FPGA_RESET_SESSION_KEY</b> : 0x060005494<br><b>reg sep address</b> : <b> reg host address</b> : <br>Reset the session key<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_RESET_SESSION_KEY</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.23.1"></a>0:0
+ </td>
+ <td valign="top">RESET_SESSION_KEY</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">async reset for the session key - (fpga env only)</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.23.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">31'b0</td>
+ </tr>
+</table><a name="1.18.24"></a><br>1.18.24 : <b>Reg : ENV_FPGA_SESSION_KEY_0</b> : 0x0600054A0<br><b>reg sep address</b> : <b> reg host address</b> : <br>Session key 0<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_SESSION_KEY_0</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.24.1"></a>31:0
+ </td>
+ <td valign="top">SESSION_KEY_0</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Session key 0</td>
+ </tr>
+</table><a name="1.18.25"></a><br>1.18.25 : <b>Reg : ENV_FPGA_SESSION_KEY_1</b> : 0x0600054A4<br><b>reg sep address</b> : <b> reg host address</b> : <br>Session key 0<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_SESSION_KEY_1</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.25.1"></a>31:0
+ </td>
+ <td valign="top">SESSION_KEY_1</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Session key 1</td>
+ </tr>
+</table><a name="1.18.26"></a><br>1.18.26 : <b>Reg : ENV_FPGA_SESSION_KEY_2</b> : 0x0600054A8<br><b>reg sep address</b> : <b> reg host address</b> : <br>Session key 1<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_SESSION_KEY_2</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.26.1"></a>31:0
+ </td>
+ <td valign="top">SESSION_KEY_2</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Session key 2</td>
+ </tr>
+</table><a name="1.18.27"></a><br>1.18.27 : <b>Reg : ENV_FPGA_SESSION_KEY_3</b> : 0x0600054AC<br><b>reg sep address</b> : <b> reg host address</b> : <br>Session key 1<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_SESSION_KEY_3</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.27.1"></a>31:0
+ </td>
+ <td valign="top">SESSION_KEY_3</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Session key 3</td>
+ </tr>
+</table><a name="1.18.28"></a><br>1.18.28 : <b>Reg : ENV_FPGA_SESSION_KEY_VALID</b> : 0x0600054B0<br><b>reg sep address</b> : <b> reg host address</b> : <br>Session key valid<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_SESSION_KEY_VALID</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.28.1"></a>0:0
+ </td>
+ <td valign="top">SESSION_KEY_VALID</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Session key valid</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.28.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a name="1.18.29"></a><br>1.18.29 : <b>Reg : ENV_FPGA_SPIDEN</b> : 0x0600054D0<br><b>reg sep address</b> : <b> reg host address</b> : <br>spiden override<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_SPIDEN</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.29.1"></a>0:0
+ </td>
+ <td valign="top">SPIDEN</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">spiden value</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.29.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a name="1.18.30"></a><br>1.18.30 : <b>Reg : ENV_FPGA_AXIM_USER_PARAMS</b> : 0x060005600<br><b>reg sep address</b> : <b> reg host address</b> : <br>axim master cache coherency configuration override<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_AXIM_USER_PARAMS</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.30.1"></a>4:0
+ </td>
+ <td valign="top">ARUSER</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">aruser override value</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.30.2"></a>9:5
+ </td>
+ <td valign="top">AWUSER</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">awuser override value</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.30.3"></a>31:10
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a name="1.18.31"></a><br>1.18.31 : <b>Reg : ENV_FPGA_SECURITY_MODE_OVERRIDE</b> : 0x060005604<br><b>reg sep address</b> : <b> reg host address</b> : <br>axim master prot override <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_SECURITY_MODE_OVERRIDE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.31.1"></a>0:0
+ </td>
+ <td valign="top">AWPROT_NS_BIT</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">AWPROT override value</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.31.2"></a>1:1
+ </td>
+ <td valign="top">AWPROT_NS_OVERRIDE</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">AWPROT override enable</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.31.3"></a>2:2
+ </td>
+ <td valign="top">ARPROT_NS_BIT</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">ARPROT override value</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.31.4"></a>3:3
+ </td>
+ <td valign="top">ARPROT_NS_OVERRIDE</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">ARPROT override enable</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.31.5"></a>31:4
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a name="1.18.32"></a><br>1.18.32 : <b>Reg : ENV_FPGA_SRAM_ENABLE</b> : 0x060005608<br><b>reg sep address</b> : <b> reg host address</b> : <br>SRAM enable<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_SRAM_ENABLE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.32.1"></a>0:0
+ </td>
+ <td valign="top">SRAM_ENABLE</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">sram enable bit</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.32.2"></a>31:1
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a name="1.18.33"></a><br>1.18.33 : <b>Reg : ENV_FPGA_APB_FIPS_ADDR</b> : 0x060005650<br><b>reg sep address</b> : <b> reg host address</b> : <br>the secure host register offset for fips access match<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APB_FIPS_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.33.1"></a>11:0
+ </td>
+ <td valign="top">FIPS_ADDR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SECURE HOST FIPS register offset</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.33.2"></a>31:12
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a name="1.18.34"></a><br>1.18.34 : <b>Reg : ENV_FPGA_APB_FIPS_VAL</b> : 0x060005654<br><b>reg sep address</b> : <b> reg host address</b> : <br>the secure host write data for fips access match<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APB_FIPS_VAL</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.34.1"></a>31:0
+ </td>
+ <td valign="top">FIPS_DATA</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SECURE HOST FIPS data</td>
+ </tr>
+</table><a name="1.18.35"></a><br>1.18.35 : <b>Reg : ENV_FPGA_APB_FIPS_MASK</b> : 0x060005658<br><b>reg sep address</b> : <b> reg host address</b> : <br>the secure host write data mask for fips access match<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APB_FIPS_MASK</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.35.1"></a>31:0
+ </td>
+ <td valign="top">FIPS_MASK</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SECURE HOST FIPS data mask</td>
+ </tr>
+</table><a name="1.18.36"></a><br>1.18.36 : <b>Reg : ENV_FPGA_APB_FIPS_CNT</b> : 0x06000565C<br><b>reg sep address</b> : <b> reg host address</b> : <br>the secure host fips access counter thershold <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APB_FIPS_CNT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.36.1"></a>31:0
+ </td>
+ <td valign="top">FIPS_CNT</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SECURE HOST FIPS CNT</td>
+ </tr>
+</table><a name="1.18.37"></a><br>1.18.37 : <b>Reg : ENV_FPGA_APB_FIPS_NEW_ADDR</b> : 0x060005660<br><b>reg sep address</b> : <b> reg host address</b> : <br>the secure host register offset of the new register after FIPS cnt reached<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APB_FIPS_NEW_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.37.1"></a>11:0
+ </td>
+ <td valign="top">FIPS_NEW_ADDR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SECURE HOST FIPS NEW register offset</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.37.2"></a>31:12
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a name="1.18.38"></a><br>1.18.38 : <b>Reg : ENV_FPGA_APB_FIPS_NEW_VAL</b> : 0x060005664<br><b>reg sep address</b> : <b> reg host address</b> : <br>the secure host new write data after fips cnt reached<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APB_FIPS_NEW_VAL</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.38.1"></a>31:0
+ </td>
+ <td valign="top">FIPS_DATA</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">SECURE HOST FIPS NEW data</td>
+ </tr>
+</table><a name="1.18.39"></a><br>1.18.39 : <b>Reg : ENV_FPGA_APB_PPROT_OVERRIDE</b> : 0x060005668<br><b>reg sep address</b> : <b> reg host address</b> : <br>apbs pprot override <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APB_PPROT_OVERRIDE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.39.1"></a>2:0
+ </td>
+ <td valign="top">PPROT_OVERRIDE_VAL</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PPROT override value</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.39.2"></a>3:3
+ </td>
+ <td valign="top">PPROT_OVERRIDE_CNTL</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PPROT override control ;1 = ovveride</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.39.3"></a>31:4
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">rw</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">ARPROT override value</td>
+ </tr>
+</table><a name="1.18.40"></a><br>1.18.40 : <b>Reg : ENV_FPGA_APBP_FIPS_ADDR</b> : 0x060005670<br><b>reg sep address</b> : <b> reg host address</b> : <br>the public host register offset for fips access match<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APBP_FIPS_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.40.1"></a>11:0
+ </td>
+ <td valign="top">FIPS_ADDR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PUBLIC HOST FIPS register offset</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.40.2"></a>31:12
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a name="1.18.41"></a><br>1.18.41 : <b>Reg : ENV_FPGA_APBP_FIPS_VAL</b> : 0x060005674<br><b>reg sep address</b> : <b> reg host address</b> : <br>the public host write data for fips access match<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APBP_FIPS_VAL</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.41.1"></a>31:0
+ </td>
+ <td valign="top">FIPS_DATA</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PUBLIC HOST FIPS data</td>
+ </tr>
+</table><a name="1.18.42"></a><br>1.18.42 : <b>Reg : ENV_FPGA_APBP_FIPS_MASK</b> : 0x060005678<br><b>reg sep address</b> : <b> reg host address</b> : <br>the public host write data mask for fips access match<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APBP_FIPS_MASK</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.42.1"></a>31:0
+ </td>
+ <td valign="top">FIPS_MASK</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PUBLIC HOST FIPS data mask</td>
+ </tr>
+</table><a name="1.18.43"></a><br>1.18.43 : <b>Reg : ENV_FPGA_APBP_FIPS_CNT</b> : 0x06000567C<br><b>reg sep address</b> : <b> reg host address</b> : <br>the public host fips access counter thershold <br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APBP_FIPS_CNT</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.43.1"></a>31:0
+ </td>
+ <td valign="top">FIPS_CNT</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PUBLIC HOST FIPS CNT</td>
+ </tr>
+</table><a name="1.18.44"></a><br>1.18.44 : <b>Reg : ENV_FPGA_APBP_FIPS_NEW_ADDR</b> : 0x060005680<br><b>reg sep address</b> : <b> reg host address</b> : <br>the public host register offset of the new register after FIPS cnt reached<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APBP_FIPS_NEW_ADDR</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.44.1"></a>11:0
+ </td>
+ <td valign="top">FIPS_NEW_ADDR</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PUBLIC HOST FIPS NEW register offset</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.44.2"></a>31:12
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a name="1.18.45"></a><br>1.18.45 : <b>Reg : ENV_FPGA_APBP_FIPS_NEW_VAL</b> : 0x060005684<br><b>reg sep address</b> : <b> reg host address</b> : <br>the public host new write data after fips cnt reached<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_APBP_FIPS_NEW_VAL</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.45.1"></a>31:0
+ </td>
+ <td valign="top">FIPS_DATA</td>
+ <td valign="top" align="center">wo</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">PUBLIC HOST FIPS NEW data</td>
+ </tr>
+</table><a name="1.18.46"></a><br>1.18.46 : <b>Reg : ENV_FPGA_AO_CC_GPPC</b> : 0x060005700<br><b>reg sep address</b> : <b> reg host address</b> : <br>holds the AO_CC_GPPC value from AO<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_FPGA_AO_CC_GPPC</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.46.1"></a>7:0
+ </td>
+ <td valign="top">AO_CC_GPPC</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">AO_CC_GPPC</td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.18.46.2"></a>31:8
+ </td>
+ <td valign="top">RESERVED</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">reserved</td>
+ </tr>
+</table><a href="#1.18">(top of block)</a><a name="1.19"></a><br><table frame="border" width="95%" BORDERCOLOR="#993333">
+ <td><b><font color="#000000">1.19 : Block: ENV_PERF_RAM_BASE</font></b></td>
+ <td align="right"><font color="#000000">0x060006000</font></td>
+</table><br><a name="1.19.1"></a><br>1.19.1 : <b>Reg : ENV_PERF_RAM_BASE</b> : 0x060006000<br><b>reg sep address</b> : <b> reg host address</b> : <br>Performance RAM base address Data read from performance RAM<br>Note: This is a special register, affected by internal logic. Test result of this register is NA.<br><table border="1" bgcolor="#EEEEEE" width="800">
+ <tr>
+ <td colspan="32" align="center">ENV_PERF_RAM_BASE</td>
+ </tr>
+ <tr></tr>
+</table>
+<table border="1" width="800">
+ <tr>
+ <td width="40"><b>bits</b></td>
+ <td width="100"><b>Field name</b></td>
+ <td width="20"><b>permission</b></td>
+ <td width="40"><b>default</b></td>
+ <td width="600"><b>Description</b></td>
+ </tr>
+ <tr>
+ <td valign="top" align="center"><a name="1.19.1.1"></a>31:0
+ </td>
+ <td valign="top">PERF_RAM_D</td>
+ <td valign="top" align="center">ro</td>
+ <td valign="top" align="center">0x0</td>
+ <td valign="top">Data read from performance RAM</td>
+ </tr>
+</table><a href="#1.19">(top of block)</a><br><a href="#1">(top of chip)</a><hr WIDTH="100%" SIZE="3" NOSHADE="1">***** Copyright 2012 All Rights Reserved. *****
\ No newline at end of file
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_crys_kernel.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_crys_kernel.h
new file mode 100644
index 0000000..9a12875
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_crys_kernel.h
@@ -0,0 +1,853 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __DX_CRYS_KERNEL_H__
+#define __DX_CRYS_KERNEL_H__
+// --------------------------------------
+// BLOCK: AES
+// --------------------------------------
+#define DX_AES_KEY_0_0_REG_OFFSET 0x0400UL
+#define DX_AES_KEY_0_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_0_0_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_0_1_REG_OFFSET 0x0404UL
+#define DX_AES_KEY_0_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_0_1_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_0_2_REG_OFFSET 0x0408UL
+#define DX_AES_KEY_0_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_0_2_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_0_3_REG_OFFSET 0x040CUL
+#define DX_AES_KEY_0_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_0_3_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_0_4_REG_OFFSET 0x0410UL
+#define DX_AES_KEY_0_4_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_0_4_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_0_5_REG_OFFSET 0x0414UL
+#define DX_AES_KEY_0_5_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_0_5_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_0_6_REG_OFFSET 0x0418UL
+#define DX_AES_KEY_0_6_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_0_6_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_0_7_REG_OFFSET 0x041CUL
+#define DX_AES_KEY_0_7_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_0_7_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_1_0_REG_OFFSET 0x0420UL
+#define DX_AES_KEY_1_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_1_0_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_1_1_REG_OFFSET 0x0424UL
+#define DX_AES_KEY_1_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_1_1_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_1_2_REG_OFFSET 0x0428UL
+#define DX_AES_KEY_1_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_1_2_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_1_3_REG_OFFSET 0x042CUL
+#define DX_AES_KEY_1_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_1_3_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_1_4_REG_OFFSET 0x0430UL
+#define DX_AES_KEY_1_4_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_1_4_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_1_5_REG_OFFSET 0x0434UL
+#define DX_AES_KEY_1_5_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_1_5_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_1_6_REG_OFFSET 0x0438UL
+#define DX_AES_KEY_1_6_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_1_6_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_KEY_1_7_REG_OFFSET 0x043CUL
+#define DX_AES_KEY_1_7_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_KEY_1_7_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_IV_0_0_REG_OFFSET 0x0440UL
+#define DX_AES_IV_0_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_IV_0_0_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_IV_0_1_REG_OFFSET 0x0444UL
+#define DX_AES_IV_0_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_IV_0_1_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_IV_0_2_REG_OFFSET 0x0448UL
+#define DX_AES_IV_0_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_IV_0_2_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_IV_0_3_REG_OFFSET 0x044CUL
+#define DX_AES_IV_0_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_IV_0_3_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_IV_1_0_REG_OFFSET 0x0450UL
+#define DX_AES_IV_1_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_IV_1_0_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_IV_1_1_REG_OFFSET 0x0454UL
+#define DX_AES_IV_1_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_IV_1_1_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_IV_1_2_REG_OFFSET 0x0458UL
+#define DX_AES_IV_1_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_IV_1_2_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_IV_1_3_REG_OFFSET 0x045CUL
+#define DX_AES_IV_1_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_IV_1_3_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_CTR_0_0_REG_OFFSET 0x0460UL
+#define DX_AES_CTR_0_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_CTR_0_0_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_CTR_0_1_REG_OFFSET 0x0464UL
+#define DX_AES_CTR_0_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_CTR_0_1_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_CTR_0_2_REG_OFFSET 0x0468UL
+#define DX_AES_CTR_0_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_CTR_0_2_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_CTR_0_3_REG_OFFSET 0x046CUL
+#define DX_AES_CTR_0_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_CTR_0_3_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_BUSY_REG_OFFSET 0x0470UL
+#define DX_AES_BUSY_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_BUSY_VALUE_BIT_SIZE 0x1UL
+#define DX_AES_SK_REG_OFFSET 0x0478UL
+#define DX_AES_SK_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_SK_VALUE_BIT_SIZE 0x1UL
+#define DX_AES_CMAC_INIT_REG_OFFSET 0x047CUL
+#define DX_AES_CMAC_INIT_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_CMAC_INIT_VALUE_BIT_SIZE 0x1UL
+#define DX_AES_SK1_REG_OFFSET 0x04B4UL
+#define DX_AES_SK1_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_SK1_VALUE_BIT_SIZE 0x1UL
+#define DX_AES_REMAINING_BYTES_REG_OFFSET 0x04BCUL
+#define DX_AES_REMAINING_BYTES_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_REMAINING_BYTES_VALUE_BIT_SIZE 0x20UL
+#define DX_AES_CONTROL_REG_OFFSET 0x04C0UL
+#define DX_AES_CONTROL_DEC_KEY0_BIT_SHIFT 0x0UL
+#define DX_AES_CONTROL_DEC_KEY0_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_MODE0_IS_CBC_CTS_BIT_SHIFT 0x1UL
+#define DX_AES_CONTROL_MODE0_IS_CBC_CTS_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_MODE_KEY0_BIT_SHIFT 0x2UL
+#define DX_AES_CONTROL_MODE_KEY0_BIT_SIZE 0x3UL
+#define DX_AES_CONTROL_MODE_KEY1_BIT_SHIFT 0x5UL
+#define DX_AES_CONTROL_MODE_KEY1_BIT_SIZE 0x3UL
+#define DX_AES_CONTROL_CBC_IS_ESSIV_BIT_SHIFT 0x8UL
+#define DX_AES_CONTROL_CBC_IS_ESSIV_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_AES_TUNNEL_IS_ON_BIT_SHIFT 0xAUL
+#define DX_AES_CONTROL_AES_TUNNEL_IS_ON_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_CBC_IS_BITLOCKER_BIT_SHIFT 0xBUL
+#define DX_AES_CONTROL_CBC_IS_BITLOCKER_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_NK_KEY0_BIT_SHIFT 0xCUL
+#define DX_AES_CONTROL_NK_KEY0_BIT_SIZE 0x2UL
+#define DX_AES_CONTROL_NK_KEY1_BIT_SHIFT 0xEUL
+#define DX_AES_CONTROL_NK_KEY1_BIT_SIZE 0x2UL
+#define DX_AES_CONTROL_AES_TUNNEL1_DECRYPT_BIT_SHIFT 0x16UL
+#define DX_AES_CONTROL_AES_TUNNEL1_DECRYPT_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_AES_TUN_B1_USES_PADDED_DATA_IN_BIT_SHIFT 0x17UL
+#define DX_AES_CONTROL_AES_TUN_B1_USES_PADDED_DATA_IN_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_AES_TUNNEL0_ENCRYPT_BIT_SHIFT 0x18UL
+#define DX_AES_CONTROL_AES_TUNNEL0_ENCRYPT_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_AES_OUTPUT_MID_TUNNEL_DATA_BIT_SHIFT 0x19UL
+#define DX_AES_CONTROL_AES_OUTPUT_MID_TUNNEL_DATA_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_AES_TUNNEL_B1_PAD_EN_BIT_SHIFT 0x1AUL
+#define DX_AES_CONTROL_AES_TUNNEL_B1_PAD_EN_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_AES_OUT_MID_TUN_TO_HASH_BIT_SHIFT 0x1CUL
+#define DX_AES_CONTROL_AES_OUT_MID_TUN_TO_HASH_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_AES_XOR_CRYPTOKEY_BIT_SHIFT 0x1DUL
+#define DX_AES_CONTROL_AES_XOR_CRYPTOKEY_BIT_SIZE 0x1UL
+#define DX_AES_CONTROL_DIRECT_ACCESS_BIT_SHIFT 0x1FUL
+#define DX_AES_CONTROL_DIRECT_ACCESS_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_REG_OFFSET 0x04C8UL
+#define DX_AES_HW_FLAGS_SUPPORT_256_192_KEY_BIT_SHIFT 0x0UL
+#define DX_AES_HW_FLAGS_SUPPORT_256_192_KEY_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_AES_LARGE_RKEK_BIT_SHIFT 0x1UL
+#define DX_AES_HW_FLAGS_AES_LARGE_RKEK_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_DPA_CNTRMSR_EXIST_BIT_SHIFT 0x2UL
+#define DX_AES_HW_FLAGS_DPA_CNTRMSR_EXIST_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_CTR_EXIST_BIT_SHIFT 0x3UL
+#define DX_AES_HW_FLAGS_CTR_EXIST_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_ONLY_ENCRYPT_BIT_SHIFT 0x4UL
+#define DX_AES_HW_FLAGS_ONLY_ENCRYPT_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_USE_SBOX_TABLE_BIT_SHIFT 0x5UL
+#define DX_AES_HW_FLAGS_USE_SBOX_TABLE_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_USE_5_SBOXES_BIT_SHIFT 0x8UL
+#define DX_AES_HW_FLAGS_USE_5_SBOXES_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_AES_SUPPORT_PREV_IV_BIT_SHIFT 0x9UL
+#define DX_AES_HW_FLAGS_AES_SUPPORT_PREV_IV_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_AES_TUNNEL_EXISTS_BIT_SHIFT 0xAUL
+#define DX_AES_HW_FLAGS_AES_TUNNEL_EXISTS_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_SECOND_REGS_SET_EXIST_BIT_SHIFT 0xBUL
+#define DX_AES_HW_FLAGS_SECOND_REGS_SET_EXIST_BIT_SIZE 0x1UL
+#define DX_AES_HW_FLAGS_DFA_CNTRMSR_EXIST_BIT_SHIFT 0xCUL
+#define DX_AES_HW_FLAGS_DFA_CNTRMSR_EXIST_BIT_SIZE 0x1UL
+#define DX_AES_CTR_NO_INCREMENT_REG_OFFSET 0x04D8UL
+#define DX_AES_CTR_NO_INCREMENT_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_CTR_NO_INCREMENT_VALUE_BIT_SIZE 0x1UL
+#define DX_AES_DFA_IS_ON_REG_OFFSET 0x04F0UL
+#define DX_AES_DFA_IS_ON_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_DFA_IS_ON_VALUE_BIT_SIZE 0x1UL
+#define DX_AES_DFA_ERR_STATUS_REG_OFFSET 0x04F8UL
+#define DX_AES_DFA_ERR_STATUS_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_DFA_ERR_STATUS_VALUE_BIT_SIZE 0x1UL
+#define DX_AES_CMAC_SIZE0_KICK_REG_OFFSET 0x0524UL
+#define DX_AES_CMAC_SIZE0_KICK_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_CMAC_SIZE0_KICK_VALUE_BIT_SIZE 0x1UL
+// --------------------------------------
+// BLOCK: MISC
+// --------------------------------------
+#define DX_AES_CLK_ENABLE_REG_OFFSET 0x0810UL
+#define DX_AES_CLK_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_AES_CLK_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_HASH_CLK_ENABLE_REG_OFFSET 0x0818UL
+#define DX_HASH_CLK_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_CLK_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_PKA_CLK_ENABLE_REG_OFFSET 0x081CUL
+#define DX_PKA_CLK_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_CLK_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_DMA_CLK_ENABLE_REG_OFFSET 0x0820UL
+#define DX_DMA_CLK_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_DMA_CLK_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_CLK_STATUS_REG_OFFSET 0x0824UL
+#define DX_CLK_STATUS_AES_CLK_STATUS_BIT_SHIFT 0x0UL
+#define DX_CLK_STATUS_AES_CLK_STATUS_BIT_SIZE 0x1UL
+#define DX_CLK_STATUS_HASH_CLK_STATUS_BIT_SHIFT 0x2UL
+#define DX_CLK_STATUS_HASH_CLK_STATUS_BIT_SIZE 0x1UL
+#define DX_CLK_STATUS_PKA_CLK_STATUS_BIT_SHIFT 0x3UL
+#define DX_CLK_STATUS_PKA_CLK_STATUS_BIT_SIZE 0x1UL
+#define DX_CLK_STATUS_CHACHA_CLK_STATUS_BIT_SHIFT 0x7UL
+#define DX_CLK_STATUS_CHACHA_CLK_STATUS_BIT_SIZE 0x1UL
+#define DX_CLK_STATUS_DMA_CLK_STATUS_BIT_SHIFT 0x8UL
+#define DX_CLK_STATUS_DMA_CLK_STATUS_BIT_SIZE 0x1UL
+#define DX_CHACHA_CLK_ENABLE_REG_OFFSET 0x0858UL
+#define DX_CHACHA_CLK_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_CLK_ENABLE_VALUE_BIT_SIZE 0x1UL
+// --------------------------------------
+// BLOCK: CC_CTL
+// --------------------------------------
+#define DX_CRYPTO_CTL_REG_OFFSET 0x0900UL
+#define DX_CRYPTO_CTL_VALUE_BIT_SHIFT 0x0UL
+#define DX_CRYPTO_CTL_VALUE_BIT_SIZE 0x5UL
+#define DX_CRYPTO_BUSY_REG_OFFSET 0x0910UL
+#define DX_CRYPTO_BUSY_VALUE_BIT_SHIFT 0x0UL
+#define DX_CRYPTO_BUSY_VALUE_BIT_SIZE 0x1UL
+#define DX_HASH_BUSY_REG_OFFSET 0x091CUL
+#define DX_HASH_BUSY_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_BUSY_VALUE_BIT_SIZE 0x1UL
+#define DX_CONTEXT_ID_REG_OFFSET 0x0930UL
+#define DX_CONTEXT_ID_VALUE_BIT_SHIFT 0x0UL
+#define DX_CONTEXT_ID_VALUE_BIT_SIZE 0x8UL
+// --------------------------------------
+// BLOCK: DIN
+// --------------------------------------
+#define DX_DIN_BUFFER_REG_OFFSET 0x0C00UL
+#define DX_DIN_BUFFER_VALUE_BIT_SHIFT 0x0UL
+#define DX_DIN_BUFFER_VALUE_BIT_SIZE 0x20UL
+#define DX_DIN_MEM_DMA_BUSY_REG_OFFSET 0x0C20UL
+#define DX_DIN_MEM_DMA_BUSY_VALUE_BIT_SHIFT 0x0UL
+#define DX_DIN_MEM_DMA_BUSY_VALUE_BIT_SIZE 0x1UL
+#define DX_SRC_LLI_WORD0_REG_OFFSET 0x0C28UL
+#define DX_SRC_LLI_WORD0_VALUE_BIT_SHIFT 0x0UL
+#define DX_SRC_LLI_WORD0_VALUE_BIT_SIZE 0x20UL
+#define DX_SRC_LLI_WORD1_REG_OFFSET 0x0C2CUL
+#define DX_SRC_LLI_WORD1_BYTES_NUM_BIT_SHIFT 0x0UL
+#define DX_SRC_LLI_WORD1_BYTES_NUM_BIT_SIZE 0x1EUL
+#define DX_SRC_LLI_WORD1_FIRST_BIT_SHIFT 0x1EUL
+#define DX_SRC_LLI_WORD1_FIRST_BIT_SIZE 0x1UL
+#define DX_SRC_LLI_WORD1_LAST_BIT_SHIFT 0x1FUL
+#define DX_SRC_LLI_WORD1_LAST_BIT_SIZE 0x1UL
+#define DX_SRAM_SRC_ADDR_REG_OFFSET 0x0C30UL
+#define DX_SRAM_SRC_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_SRAM_SRC_ADDR_VALUE_BIT_SIZE 0x20UL
+#define DX_DIN_SRAM_BYTES_LEN_REG_OFFSET 0x0C34UL
+#define DX_DIN_SRAM_BYTES_LEN_VALUE_BIT_SHIFT 0x0UL
+#define DX_DIN_SRAM_BYTES_LEN_VALUE_BIT_SIZE 0x20UL
+#define DX_DIN_SRAM_DMA_BUSY_REG_OFFSET 0x0C38UL
+#define DX_DIN_SRAM_DMA_BUSY_VALUE_BIT_SHIFT 0x0UL
+#define DX_DIN_SRAM_DMA_BUSY_VALUE_BIT_SIZE 0x1UL
+#define DX_DIN_SRAM_ENDIANNESS_REG_OFFSET 0x0C3CUL
+#define DX_DIN_SRAM_ENDIANNESS_VALUE_BIT_SHIFT 0x0UL
+#define DX_DIN_SRAM_ENDIANNESS_VALUE_BIT_SIZE 0x1UL
+#define DX_DIN_CPU_DATA_SIZE_REG_OFFSET 0x0C48UL
+#define DX_DIN_CPU_DATA_SIZE_VALUE_BIT_SHIFT 0x0UL
+#define DX_DIN_CPU_DATA_SIZE_VALUE_BIT_SIZE 0x10UL
+#define DX_FIFO_IN_EMPTY_REG_OFFSET 0x0C50UL
+#define DX_FIFO_IN_EMPTY_VALUE_BIT_SHIFT 0x0UL
+#define DX_FIFO_IN_EMPTY_VALUE_BIT_SIZE 0x1UL
+#define DX_DIN_FIFO_RST_PNTR_REG_OFFSET 0x0C58UL
+#define DX_DIN_FIFO_RST_PNTR_VALUE_BIT_SHIFT 0x0UL
+#define DX_DIN_FIFO_RST_PNTR_VALUE_BIT_SIZE 0x1UL
+// --------------------------------------
+// BLOCK: DOUT
+// --------------------------------------
+#define DX_DOUT_BUFFER_REG_OFFSET 0x0D00UL
+#define DX_DOUT_BUFFER_VALUE_BIT_SHIFT 0x0UL
+#define DX_DOUT_BUFFER_VALUE_BIT_SIZE 0x20UL
+#define DX_DOUT_MEM_DMA_BUSY_REG_OFFSET 0x0D20UL
+#define DX_DOUT_MEM_DMA_BUSY_VALUE_BIT_SHIFT 0x0UL
+#define DX_DOUT_MEM_DMA_BUSY_VALUE_BIT_SIZE 0x1UL
+#define DX_DST_LLI_WORD0_REG_OFFSET 0x0D28UL
+#define DX_DST_LLI_WORD0_VALUE_BIT_SHIFT 0x0UL
+#define DX_DST_LLI_WORD0_VALUE_BIT_SIZE 0x20UL
+#define DX_DST_LLI_WORD1_REG_OFFSET 0x0D2CUL
+#define DX_DST_LLI_WORD1_BYTES_NUM_BIT_SHIFT 0x0UL
+#define DX_DST_LLI_WORD1_BYTES_NUM_BIT_SIZE 0x1EUL
+#define DX_DST_LLI_WORD1_FIRST_BIT_SHIFT 0x1EUL
+#define DX_DST_LLI_WORD1_FIRST_BIT_SIZE 0x1UL
+#define DX_DST_LLI_WORD1_LAST_BIT_SHIFT 0x1FUL
+#define DX_DST_LLI_WORD1_LAST_BIT_SIZE 0x1UL
+#define DX_SRAM_DEST_ADDR_REG_OFFSET 0x0D30UL
+#define DX_SRAM_DEST_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_SRAM_DEST_ADDR_VALUE_BIT_SIZE 0x20UL
+#define DX_DOUT_SRAM_BYTES_LEN_REG_OFFSET 0x0D34UL
+#define DX_DOUT_SRAM_BYTES_LEN_VALUE_BIT_SHIFT 0x0UL
+#define DX_DOUT_SRAM_BYTES_LEN_VALUE_BIT_SIZE 0x20UL
+#define DX_DOUT_SRAM_DMA_BUSY_REG_OFFSET 0x0D38UL
+#define DX_DOUT_SRAM_DMA_BUSY_VALUE_BIT_SHIFT 0x0UL
+#define DX_DOUT_SRAM_DMA_BUSY_VALUE_BIT_SIZE 0x1UL
+#define DX_DOUT_SRAM_ENDIANNESS_REG_OFFSET 0x0D3CUL
+#define DX_DOUT_SRAM_ENDIANNESS_VALUE_BIT_SHIFT 0x0UL
+#define DX_DOUT_SRAM_ENDIANNESS_VALUE_BIT_SIZE 0x1UL
+#define DX_READ_ALIGN_LAST_REG_OFFSET 0x0D44UL
+#define DX_READ_ALIGN_LAST_VALUE_BIT_SHIFT 0x0UL
+#define DX_READ_ALIGN_LAST_VALUE_BIT_SIZE 0x1UL
+#define DX_DOUT_FIFO_EMPTY_REG_OFFSET 0x0D50UL
+#define DX_DOUT_FIFO_EMPTY_VALUE_BIT_SHIFT 0x0UL
+#define DX_DOUT_FIFO_EMPTY_VALUE_BIT_SIZE 0x1UL
+// --------------------------------------
+// BLOCK: HASH
+// --------------------------------------
+#define DX_HASH_H0_REG_OFFSET 0x0640UL
+#define DX_HASH_H0_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_H0_VALUE_BIT_SIZE 0x20UL
+#define DX_HASH_H1_REG_OFFSET 0x0644UL
+#define DX_HASH_H1_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_H1_VALUE_BIT_SIZE 0x20UL
+#define DX_HASH_H2_REG_OFFSET 0x0648UL
+#define DX_HASH_H2_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_H2_VALUE_BIT_SIZE 0x20UL
+#define DX_HASH_H3_REG_OFFSET 0x064CUL
+#define DX_HASH_H3_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_H3_VALUE_BIT_SIZE 0x20UL
+#define DX_HASH_H4_REG_OFFSET 0x0650UL
+#define DX_HASH_H4_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_H4_VALUE_BIT_SIZE 0x20UL
+#define DX_HASH_H5_REG_OFFSET 0x0654UL
+#define DX_HASH_H5_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_H5_VALUE_BIT_SIZE 0x20UL
+#define DX_HASH_H6_REG_OFFSET 0x0658UL
+#define DX_HASH_H6_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_H6_VALUE_BIT_SIZE 0x20UL
+#define DX_HASH_H7_REG_OFFSET 0x065CUL
+#define DX_HASH_H7_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_H7_VALUE_BIT_SIZE 0x20UL
+#define DX_HASH_H8_REG_OFFSET 0x0660UL
+#define DX_HASH_H8_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_H8_VALUE_BIT_SIZE 0x20UL
+#define DX_AUTO_HW_PADDING_REG_OFFSET 0x0684UL
+#define DX_AUTO_HW_PADDING_VALUE_BIT_SHIFT 0x0UL
+#define DX_AUTO_HW_PADDING_VALUE_BIT_SIZE 0x1UL
+#define DX_HASH_XOR_DIN_REG_OFFSET 0x0688UL
+#define DX_HASH_XOR_DIN_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_XOR_DIN_VALUE_BIT_SIZE 0x20UL
+#define DX_LOAD_INIT_STATE_REG_OFFSET 0x0694UL
+#define DX_LOAD_INIT_STATE_VALUE_BIT_SHIFT 0x0UL
+#define DX_LOAD_INIT_STATE_VALUE_BIT_SIZE 0x1UL
+#define DX_HASH_SEL_AES_MAC_REG_OFFSET 0x06A4UL
+#define DX_HASH_SEL_AES_MAC_HASH_SEL_AES_MAC_BIT_SHIFT 0x0UL
+#define DX_HASH_SEL_AES_MAC_HASH_SEL_AES_MAC_BIT_SIZE 0x1UL
+#define DX_HASH_SEL_AES_MAC_GHASH_SEL_BIT_SHIFT 0x1UL
+#define DX_HASH_SEL_AES_MAC_GHASH_SEL_BIT_SIZE 0x1UL
+#define DX_HASH_VERSION_REG_OFFSET 0x07B0UL
+#define DX_HASH_VERSION_FIXES_BIT_SHIFT 0x0UL
+#define DX_HASH_VERSION_FIXES_BIT_SIZE 0x8UL
+#define DX_HASH_VERSION_MINOR_VERSION_NUMBER_BIT_SHIFT 0x8UL
+#define DX_HASH_VERSION_MINOR_VERSION_NUMBER_BIT_SIZE 0x4UL
+#define DX_HASH_VERSION_MAJOR_VERSION_NUMBER_BIT_SHIFT 0xCUL
+#define DX_HASH_VERSION_MAJOR_VERSION_NUMBER_BIT_SIZE 0x4UL
+#define DX_HASH_CONTROL_REG_OFFSET 0x07C0UL
+#define DX_HASH_CONTROL_MODE_0_1_BIT_SHIFT 0x0UL
+#define DX_HASH_CONTROL_MODE_0_1_BIT_SIZE 0x2UL
+#define DX_HASH_CONTROL_MODE_3_BIT_SHIFT 0x3UL
+#define DX_HASH_CONTROL_MODE_3_BIT_SIZE 0x1UL
+#define DX_HASH_PAD_EN_REG_OFFSET 0x07C4UL
+#define DX_HASH_PAD_EN_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_PAD_EN_VALUE_BIT_SIZE 0x1UL
+#define DX_HASH_PAD_CFG_REG_OFFSET 0x07C8UL
+#define DX_HASH_PAD_CFG_VALUE_BIT_SHIFT 0x2UL
+#define DX_HASH_PAD_CFG_VALUE_BIT_SIZE 0x1UL
+#define DX_HASH_CUR_LEN_0_REG_OFFSET 0x07CCUL
+#define DX_HASH_CUR_LEN_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_CUR_LEN_0_VALUE_BIT_SIZE 0x20UL
+#define DX_HASH_CUR_LEN_1_REG_OFFSET 0x07D0UL
+#define DX_HASH_CUR_LEN_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_CUR_LEN_1_VALUE_BIT_SIZE 0x20UL
+#define DX_HASH_PARAM_REG_OFFSET 0x07DCUL
+#define DX_HASH_PARAM_CW_BIT_SHIFT 0x0UL
+#define DX_HASH_PARAM_CW_BIT_SIZE 0x4UL
+#define DX_HASH_PARAM_CH_BIT_SHIFT 0x4UL
+#define DX_HASH_PARAM_CH_BIT_SIZE 0x4UL
+#define DX_HASH_PARAM_DW_BIT_SHIFT 0x8UL
+#define DX_HASH_PARAM_DW_BIT_SIZE 0x4UL
+#define DX_HASH_PARAM_SHA_512_EXISTS_BIT_SHIFT 0xCUL
+#define DX_HASH_PARAM_SHA_512_EXISTS_BIT_SIZE 0x1UL
+#define DX_HASH_PARAM_PAD_EXISTS_BIT_SHIFT 0xDUL
+#define DX_HASH_PARAM_PAD_EXISTS_BIT_SIZE 0x1UL
+#define DX_HASH_PARAM_MD5_EXISTS_BIT_SHIFT 0xEUL
+#define DX_HASH_PARAM_MD5_EXISTS_BIT_SIZE 0x1UL
+#define DX_HASH_PARAM_HMAC_EXISTS_BIT_SHIFT 0xFUL
+#define DX_HASH_PARAM_HMAC_EXISTS_BIT_SIZE 0x1UL
+#define DX_HASH_PARAM_SHA_256_EXISTS_BIT_SHIFT 0x10UL
+#define DX_HASH_PARAM_SHA_256_EXISTS_BIT_SIZE 0x1UL
+#define DX_HASH_PARAM_HASH_COMPARE_EXISTS_BIT_SHIFT 0x11UL
+#define DX_HASH_PARAM_HASH_COMPARE_EXISTS_BIT_SIZE 0x1UL
+#define DX_HASH_PARAM_DUMP_HASH_TO_DOUT_EXISTS_BIT_SHIFT 0x12UL
+#define DX_HASH_PARAM_DUMP_HASH_TO_DOUT_EXISTS_BIT_SIZE 0x1UL
+#define DX_HASH_AES_SW_RESET_REG_OFFSET 0x07E4UL
+#define DX_HASH_AES_SW_RESET_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_AES_SW_RESET_VALUE_BIT_SIZE 0x1UL
+#define DX_HASH_ENDIANESS_REG_OFFSET 0x07E8UL
+#define DX_HASH_ENDIANESS_VALUE_BIT_SHIFT 0x0UL
+#define DX_HASH_ENDIANESS_VALUE_BIT_SIZE 0x1UL
+// --------------------------------------
+// BLOCK: GHASH
+// --------------------------------------
+#define DX_GHASH_SUBKEY_0_0_REG_OFFSET 0x0960UL
+#define DX_GHASH_SUBKEY_0_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_GHASH_SUBKEY_0_0_VALUE_BIT_SIZE 0x20UL
+#define DX_GHASH_SUBKEY_0_1_REG_OFFSET 0x0964UL
+#define DX_GHASH_SUBKEY_0_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_GHASH_SUBKEY_0_1_VALUE_BIT_SIZE 0x20UL
+#define DX_GHASH_SUBKEY_0_2_REG_OFFSET 0x0968UL
+#define DX_GHASH_SUBKEY_0_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_GHASH_SUBKEY_0_2_VALUE_BIT_SIZE 0x20UL
+#define DX_GHASH_SUBKEY_0_3_REG_OFFSET 0x096CUL
+#define DX_GHASH_SUBKEY_0_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_GHASH_SUBKEY_0_3_VALUE_BIT_SIZE 0x20UL
+#define DX_GHASH_IV_0_0_REG_OFFSET 0x0970UL
+#define DX_GHASH_IV_0_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_GHASH_IV_0_0_VALUE_BIT_SIZE 0x20UL
+#define DX_GHASH_IV_0_1_REG_OFFSET 0x0974UL
+#define DX_GHASH_IV_0_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_GHASH_IV_0_1_VALUE_BIT_SIZE 0x20UL
+#define DX_GHASH_IV_0_2_REG_OFFSET 0x0978UL
+#define DX_GHASH_IV_0_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_GHASH_IV_0_2_VALUE_BIT_SIZE 0x20UL
+#define DX_GHASH_IV_0_3_REG_OFFSET 0x097CUL
+#define DX_GHASH_IV_0_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_GHASH_IV_0_3_VALUE_BIT_SIZE 0x20UL
+#define DX_GHASH_BUSY_REG_OFFSET 0x0980UL
+#define DX_GHASH_BUSY_VALUE_BIT_SHIFT 0x0UL
+#define DX_GHASH_BUSY_VALUE_BIT_SIZE 0x1UL
+#define DX_GHASH_INIT_REG_OFFSET 0x0984UL
+#define DX_GHASH_INIT_VALUE_BIT_SHIFT 0x0UL
+#define DX_GHASH_INIT_VALUE_BIT_SIZE 0x1UL
+// --------------------------------------
+// BLOCK: PKA
+// --------------------------------------
+#define DX_MEMORY_MAP0_REG_OFFSET 0x0000UL
+#define DX_MEMORY_MAP0_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP0_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP1_REG_OFFSET 0x0004UL
+#define DX_MEMORY_MAP1_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP1_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP2_REG_OFFSET 0x0008UL
+#define DX_MEMORY_MAP2_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP2_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP3_REG_OFFSET 0x000CUL
+#define DX_MEMORY_MAP3_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP3_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP4_REG_OFFSET 0x0010UL
+#define DX_MEMORY_MAP4_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP4_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP5_REG_OFFSET 0x0014UL
+#define DX_MEMORY_MAP5_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP5_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP6_REG_OFFSET 0x0018UL
+#define DX_MEMORY_MAP6_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP6_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP7_REG_OFFSET 0x001CUL
+#define DX_MEMORY_MAP7_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP7_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP8_REG_OFFSET 0x0020UL
+#define DX_MEMORY_MAP8_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP8_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP9_REG_OFFSET 0x0024UL
+#define DX_MEMORY_MAP9_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP9_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP10_REG_OFFSET 0x0028UL
+#define DX_MEMORY_MAP10_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP10_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP11_REG_OFFSET 0x002CUL
+#define DX_MEMORY_MAP11_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP11_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP12_REG_OFFSET 0x0030UL
+#define DX_MEMORY_MAP12_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP12_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP13_REG_OFFSET 0x0034UL
+#define DX_MEMORY_MAP13_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP13_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP14_REG_OFFSET 0x0038UL
+#define DX_MEMORY_MAP14_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP14_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP15_REG_OFFSET 0x003CUL
+#define DX_MEMORY_MAP15_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP15_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP16_REG_OFFSET 0x0040UL
+#define DX_MEMORY_MAP16_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP16_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP17_REG_OFFSET 0x0044UL
+#define DX_MEMORY_MAP17_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP17_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP18_REG_OFFSET 0x0048UL
+#define DX_MEMORY_MAP18_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP18_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP19_REG_OFFSET 0x004CUL
+#define DX_MEMORY_MAP19_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP19_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP20_REG_OFFSET 0x0050UL
+#define DX_MEMORY_MAP20_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP20_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP21_REG_OFFSET 0x0054UL
+#define DX_MEMORY_MAP21_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP21_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP22_REG_OFFSET 0x0058UL
+#define DX_MEMORY_MAP22_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP22_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP23_REG_OFFSET 0x005CUL
+#define DX_MEMORY_MAP23_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP23_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP24_REG_OFFSET 0x0060UL
+#define DX_MEMORY_MAP24_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP24_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP25_REG_OFFSET 0x0064UL
+#define DX_MEMORY_MAP25_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP25_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP26_REG_OFFSET 0x0068UL
+#define DX_MEMORY_MAP26_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP26_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP27_REG_OFFSET 0x006CUL
+#define DX_MEMORY_MAP27_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP27_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP28_REG_OFFSET 0x0070UL
+#define DX_MEMORY_MAP28_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP28_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP29_REG_OFFSET 0x0074UL
+#define DX_MEMORY_MAP29_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP29_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP30_REG_OFFSET 0x0078UL
+#define DX_MEMORY_MAP30_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP30_VALUE_BIT_SIZE 0xAUL
+#define DX_MEMORY_MAP31_REG_OFFSET 0x007CUL
+#define DX_MEMORY_MAP31_VALUE_BIT_SHIFT 0x1UL
+#define DX_MEMORY_MAP31_VALUE_BIT_SIZE 0xAUL
+#define DX_OPCODE_REG_OFFSET 0x0080UL
+#define DX_OPCODE_TAG_BIT_SHIFT 0x0UL
+#define DX_OPCODE_TAG_BIT_SIZE 0x6UL
+#define DX_OPCODE_REG_R_BIT_SHIFT 0x6UL
+#define DX_OPCODE_REG_R_BIT_SIZE 0x6UL
+#define DX_OPCODE_REG_B_BIT_SHIFT 0xCUL
+#define DX_OPCODE_REG_B_BIT_SIZE 0x6UL
+#define DX_OPCODE_REG_A_BIT_SHIFT 0x12UL
+#define DX_OPCODE_REG_A_BIT_SIZE 0x6UL
+#define DX_OPCODE_LEN_BIT_SHIFT 0x18UL
+#define DX_OPCODE_LEN_BIT_SIZE 0x3UL
+#define DX_OPCODE_OPCODE_BIT_SHIFT 0x1BUL
+#define DX_OPCODE_OPCODE_BIT_SIZE 0x5UL
+#define DX_N_NP_T0_T1_ADDR_REG_OFFSET 0x0084UL
+#define DX_N_NP_T0_T1_ADDR_N_VIRTUAL_ADDR_BIT_SHIFT 0x0UL
+#define DX_N_NP_T0_T1_ADDR_N_VIRTUAL_ADDR_BIT_SIZE 0x5UL
+#define DX_N_NP_T0_T1_ADDR_NP_VIRTUAL_ADDR_BIT_SHIFT 0x5UL
+#define DX_N_NP_T0_T1_ADDR_NP_VIRTUAL_ADDR_BIT_SIZE 0x5UL
+#define DX_N_NP_T0_T1_ADDR_T0_VIRTUAL_ADDR_BIT_SHIFT 0xAUL
+#define DX_N_NP_T0_T1_ADDR_T0_VIRTUAL_ADDR_BIT_SIZE 0x5UL
+#define DX_N_NP_T0_T1_ADDR_T1_VIRTUAL_ADDR_BIT_SHIFT 0xFUL
+#define DX_N_NP_T0_T1_ADDR_T1_VIRTUAL_ADDR_BIT_SIZE 0x5UL
+#define DX_PKA_STATUS_REG_OFFSET 0x0088UL
+#define DX_PKA_STATUS_ALU_MSB_4BITS_BIT_SHIFT 0x0UL
+#define DX_PKA_STATUS_ALU_MSB_4BITS_BIT_SIZE 0x4UL
+#define DX_PKA_STATUS_ALU_LSB_4BITS_BIT_SHIFT 0x4UL
+#define DX_PKA_STATUS_ALU_LSB_4BITS_BIT_SIZE 0x4UL
+#define DX_PKA_STATUS_ALU_SIGN_OUT_BIT_SHIFT 0x8UL
+#define DX_PKA_STATUS_ALU_SIGN_OUT_BIT_SIZE 0x1UL
+#define DX_PKA_STATUS_ALU_CARRY_BIT_SHIFT 0x9UL
+#define DX_PKA_STATUS_ALU_CARRY_BIT_SIZE 0x1UL
+#define DX_PKA_STATUS_ALU_CARRY_MOD_BIT_SHIFT 0xAUL
+#define DX_PKA_STATUS_ALU_CARRY_MOD_BIT_SIZE 0x1UL
+#define DX_PKA_STATUS_ALU_SUB_IS_ZERO_BIT_SHIFT 0xBUL
+#define DX_PKA_STATUS_ALU_SUB_IS_ZERO_BIT_SIZE 0x1UL
+#define DX_PKA_STATUS_ALU_OUT_ZERO_BIT_SHIFT 0xCUL
+#define DX_PKA_STATUS_ALU_OUT_ZERO_BIT_SIZE 0x1UL
+#define DX_PKA_STATUS_ALU_MODOVRFLW_BIT_SHIFT 0xDUL
+#define DX_PKA_STATUS_ALU_MODOVRFLW_BIT_SIZE 0x1UL
+#define DX_PKA_STATUS_DIV_BY_ZERO_BIT_SHIFT 0xEUL
+#define DX_PKA_STATUS_DIV_BY_ZERO_BIT_SIZE 0x1UL
+#define DX_PKA_STATUS_MODINV_OF_ZERO_BIT_SHIFT 0xFUL
+#define DX_PKA_STATUS_MODINV_OF_ZERO_BIT_SIZE 0x1UL
+#define DX_PKA_STATUS_OPCODE_BIT_SHIFT 0x10UL
+#define DX_PKA_STATUS_OPCODE_BIT_SIZE 0x5UL
+#define DX_PKA_SW_RESET_REG_OFFSET 0x008CUL
+#define DX_PKA_SW_RESET_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_SW_RESET_VALUE_BIT_SIZE 0x1UL
+#define DX_PKA_L0_REG_OFFSET 0x0090UL
+#define DX_PKA_L0_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_L0_VALUE_BIT_SIZE 0xDUL
+#define DX_PKA_L1_REG_OFFSET 0x0094UL
+#define DX_PKA_L1_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_L1_VALUE_BIT_SIZE 0xDUL
+#define DX_PKA_L2_REG_OFFSET 0x0098UL
+#define DX_PKA_L2_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_L2_VALUE_BIT_SIZE 0xDUL
+#define DX_PKA_L3_REG_OFFSET 0x009CUL
+#define DX_PKA_L3_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_L3_VALUE_BIT_SIZE 0xDUL
+#define DX_PKA_L4_REG_OFFSET 0x00A0UL
+#define DX_PKA_L4_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_L4_VALUE_BIT_SIZE 0xDUL
+#define DX_PKA_L5_REG_OFFSET 0x00A4UL
+#define DX_PKA_L5_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_L5_VALUE_BIT_SIZE 0xDUL
+#define DX_PKA_L6_REG_OFFSET 0x00A8UL
+#define DX_PKA_L6_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_L6_VALUE_BIT_SIZE 0xDUL
+#define DX_PKA_L7_REG_OFFSET 0x00ACUL
+#define DX_PKA_L7_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_L7_VALUE_BIT_SIZE 0xDUL
+#define DX_PKA_PIPE_RDY_REG_OFFSET 0x00B0UL
+#define DX_PKA_PIPE_RDY_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_PIPE_RDY_VALUE_BIT_SIZE 0x1UL
+#define DX_PKA_DONE_REG_OFFSET 0x00B4UL
+#define DX_PKA_DONE_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_DONE_VALUE_BIT_SIZE 0x1UL
+#define DX_PKA_MON_SELECT_REG_OFFSET 0x00B8UL
+#define DX_PKA_MON_SELECT_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_MON_SELECT_VALUE_BIT_SIZE 0x4UL
+#define DX_PKA_VERSION_REG_OFFSET 0x00C4UL
+#define DX_PKA_VERSION_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_VERSION_VALUE_BIT_SIZE 0x20UL
+#define DX_PKA_MON_READ_REG_OFFSET 0x00D0UL
+#define DX_PKA_MON_READ_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_MON_READ_VALUE_BIT_SIZE 0x20UL
+#define DX_PKA_SRAM_ADDR_REG_OFFSET 0x00D4UL
+#define DX_PKA_SRAM_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_SRAM_ADDR_VALUE_BIT_SIZE 0x20UL
+#define DX_PKA_SRAM_WDATA_REG_OFFSET 0x00D8UL
+#define DX_PKA_SRAM_WDATA_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_SRAM_WDATA_VALUE_BIT_SIZE 0x20UL
+#define DX_PKA_SRAM_RDATA_REG_OFFSET 0x00DCUL
+#define DX_PKA_SRAM_RDATA_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_SRAM_RDATA_VALUE_BIT_SIZE 0x20UL
+#define DX_PKA_SRAM_WR_CLR_REG_OFFSET 0x00E0UL
+#define DX_PKA_SRAM_WR_CLR_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_SRAM_WR_CLR_VALUE_BIT_SIZE 0x20UL
+#define DX_PKA_SRAM_RADDR_REG_OFFSET 0x00E4UL
+#define DX_PKA_SRAM_RADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_SRAM_RADDR_VALUE_BIT_SIZE 0x20UL
+#define DX_PKA_WORD_ACCESS_REG_OFFSET 0x00F0UL
+#define DX_PKA_WORD_ACCESS_VALUE_BIT_SHIFT 0x0UL
+#define DX_PKA_WORD_ACCESS_VALUE_BIT_SIZE 0x20UL
+#define DX_PKA_BUFF_ADDR_REG_OFFSET 0x00F8UL
+#define DX_PKA_BUFF_ADDR_PKA_BUF_ADDR_BIT_SHIFT 0x0UL
+#define DX_PKA_BUFF_ADDR_PKA_BUF_ADDR_BIT_SIZE 0xCUL
+#define DX_PKA_BUFF_ADDR_RESEREVED1_BIT_SHIFT 0xCUL
+#define DX_PKA_BUFF_ADDR_RESEREVED1_BIT_SIZE 0x14UL
+// --------------------------------------
+// BLOCK: AHB
+// --------------------------------------
+#define DX_AHBM_SINGLES_REG_OFFSET 0x0B00UL
+#define DX_AHBM_SINGLES_VALUE_BIT_SHIFT 0x0UL
+#define DX_AHBM_SINGLES_VALUE_BIT_SIZE 0x1UL
+#define DX_AHBM_HPROT_REG_OFFSET 0x0B04UL
+#define DX_AHBM_HPROT_VALUE_BIT_SHIFT 0x0UL
+#define DX_AHBM_HPROT_VALUE_BIT_SIZE 0x4UL
+#define DX_AHBM_HMASTLOCK_REG_OFFSET 0x0B08UL
+#define DX_AHBM_HMASTLOCK_VALUE_BIT_SHIFT 0x0UL
+#define DX_AHBM_HMASTLOCK_VALUE_BIT_SIZE 0x1UL
+#define DX_AHBM_HNONSEC_REG_OFFSET 0x0B0CUL
+#define DX_AHBM_HNONSEC_AHB_WRITE_HNONSEC_BIT_SHIFT 0x0UL
+#define DX_AHBM_HNONSEC_AHB_WRITE_HNONSEC_BIT_SIZE 0x1UL
+#define DX_AHBM_HNONSEC_AHB_READ_HNONSEC_BIT_SHIFT 0x1UL
+#define DX_AHBM_HNONSEC_AHB_READ_HNONSEC_BIT_SIZE 0x1UL
+// --------------------------------------
+// BLOCK: AO
+// --------------------------------------
+#define DX_HOST_DCU_EN0_REG_OFFSET 0x1E00UL
+#define DX_HOST_DCU_EN0_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_DCU_EN0_VALUE_BIT_SIZE 0x20UL
+#define DX_HOST_DCU_EN1_REG_OFFSET 0x1E04UL
+#define DX_HOST_DCU_EN1_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_DCU_EN1_VALUE_BIT_SIZE 0x20UL
+#define DX_HOST_DCU_EN2_REG_OFFSET 0x1E08UL
+#define DX_HOST_DCU_EN2_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_DCU_EN2_VALUE_BIT_SIZE 0x20UL
+#define DX_HOST_DCU_EN3_REG_OFFSET 0x1E0CUL
+#define DX_HOST_DCU_EN3_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_DCU_EN3_VALUE_BIT_SIZE 0x20UL
+#define DX_HOST_DCU_LOCK0_REG_OFFSET 0x1E10UL
+#define DX_HOST_DCU_LOCK0_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_DCU_LOCK0_VALUE_BIT_SIZE 0x20UL
+#define DX_HOST_DCU_LOCK1_REG_OFFSET 0x1E14UL
+#define DX_HOST_DCU_LOCK1_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_DCU_LOCK1_VALUE_BIT_SIZE 0x20UL
+#define DX_HOST_DCU_LOCK2_REG_OFFSET 0x1E18UL
+#define DX_HOST_DCU_LOCK2_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_DCU_LOCK2_VALUE_BIT_SIZE 0x20UL
+#define DX_HOST_DCU_LOCK3_REG_OFFSET 0x1E1CUL
+#define DX_HOST_DCU_LOCK3_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_DCU_LOCK3_VALUE_BIT_SIZE 0x20UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK0_REG_OFFSET 0x1E20UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK0_VALUE_BIT_SHIFT 0x0UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK0_VALUE_BIT_SIZE 0x20UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK1_REG_OFFSET 0x1E24UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK1_VALUE_BIT_SHIFT 0x0UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK1_VALUE_BIT_SIZE 0x20UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK2_REG_OFFSET 0x1E28UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK2_VALUE_BIT_SHIFT 0x0UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK2_VALUE_BIT_SIZE 0x20UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK3_REG_OFFSET 0x1E2CUL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK3_VALUE_BIT_SHIFT 0x0UL
+#define DX_AO_ICV_DCU_RESTRICTION_MASK3_VALUE_BIT_SIZE 0x20UL
+#define DX_AO_CC_SEC_DEBUG_RESET_REG_OFFSET 0x1E30UL
+#define DX_AO_CC_SEC_DEBUG_RESET_VALUE_BIT_SHIFT 0x0UL
+#define DX_AO_CC_SEC_DEBUG_RESET_VALUE_BIT_SIZE 0x1UL
+#define DX_HOST_AO_LOCK_BITS_REG_OFFSET 0x1E34UL
+#define DX_HOST_AO_LOCK_BITS_HOST_FATAL_ERR_BIT_SHIFT 0x0UL
+#define DX_HOST_AO_LOCK_BITS_HOST_FATAL_ERR_BIT_SIZE 0x1UL
+#define DX_HOST_AO_LOCK_BITS_HOST_KPICV_LOCK_BIT_SHIFT 0x1UL
+#define DX_HOST_AO_LOCK_BITS_HOST_KPICV_LOCK_BIT_SIZE 0x1UL
+#define DX_HOST_AO_LOCK_BITS_HOST_KCEICV_LOCK_BIT_SHIFT 0x2UL
+#define DX_HOST_AO_LOCK_BITS_HOST_KCEICV_LOCK_BIT_SIZE 0x1UL
+#define DX_HOST_AO_LOCK_BITS_HOST_KCP_LOCK_BIT_SHIFT 0x3UL
+#define DX_HOST_AO_LOCK_BITS_HOST_KCP_LOCK_BIT_SIZE 0x1UL
+#define DX_HOST_AO_LOCK_BITS_HOST_KCE_LOCK_BIT_SHIFT 0x4UL
+#define DX_HOST_AO_LOCK_BITS_HOST_KCE_LOCK_BIT_SIZE 0x1UL
+#define DX_HOST_AO_LOCK_BITS_HOST_ICV_RMA_LOCK_BIT_SHIFT 0x5UL
+#define DX_HOST_AO_LOCK_BITS_HOST_ICV_RMA_LOCK_BIT_SIZE 0x1UL
+#define DX_HOST_AO_LOCK_BITS_RESET_UPON_DEBUG_DISABLE_BIT_SHIFT 0x6UL
+#define DX_HOST_AO_LOCK_BITS_RESET_UPON_DEBUG_DISABLE_BIT_SIZE 0x1UL
+#define DX_HOST_AO_LOCK_BITS_HOST_FORCE_DFA_ENABLE_BIT_SHIFT 0x7UL
+#define DX_HOST_AO_LOCK_BITS_HOST_FORCE_DFA_ENABLE_BIT_SIZE 0x1UL
+#define DX_HOST_AO_LOCK_BITS_HOST_DFA_ENABLE_LOCK_BIT_SHIFT 0x8UL
+#define DX_HOST_AO_LOCK_BITS_HOST_DFA_ENABLE_LOCK_BIT_SIZE 0x1UL
+#define DX_AO_APB_FILTERING_REG_OFFSET 0x1E38UL
+#define DX_AO_APB_FILTERING_ONLY_SEC_ACCESS_ALLOW_BIT_SHIFT 0x0UL
+#define DX_AO_APB_FILTERING_ONLY_SEC_ACCESS_ALLOW_BIT_SIZE 0x1UL
+#define DX_AO_APB_FILTERING_ONLY_SEC_ACCESS_ALLOW_LOCK_BIT_SHIFT 0x1UL
+#define DX_AO_APB_FILTERING_ONLY_SEC_ACCESS_ALLOW_LOCK_BIT_SIZE 0x1UL
+#define DX_AO_APB_FILTERING_ONLY_PRIV_ACCESS_ALLOW_BIT_SHIFT 0x2UL
+#define DX_AO_APB_FILTERING_ONLY_PRIV_ACCESS_ALLOW_BIT_SIZE 0x1UL
+#define DX_AO_APB_FILTERING_ONLY_PRIV_ACCESS_ALLOW_LOCK_BIT_SHIFT 0x3UL
+#define DX_AO_APB_FILTERING_ONLY_PRIV_ACCESS_ALLOW_LOCK_BIT_SIZE 0x1UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_SEC_ACCESS_ALLOW_BIT_SHIFT 0x4UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_SEC_ACCESS_ALLOW_BIT_SIZE 0x1UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_SEC_ACCESS_ALLOW_LOCK_BIT_SHIFT 0x5UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_SEC_ACCESS_ALLOW_LOCK_BIT_SIZE 0x1UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_PRIV_ACCESS_ALLOW_BIT_SHIFT 0x6UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_PRIV_ACCESS_ALLOW_BIT_SIZE 0x1UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_PRIV_ACCESS_ALLOW_LOCK_BIT_SHIFT 0x7UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_PRIV_ACCESS_ALLOW_LOCK_BIT_SIZE 0x1UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_INST_ACCESS_ALLOW_BIT_SHIFT 0x8UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_INST_ACCESS_ALLOW_BIT_SIZE 0x1UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_INST_ACCESS_ALLOW_LOCK_BIT_SHIFT 0x9UL
+#define DX_AO_APB_FILTERING_APBC_ONLY_INST_ACCESS_ALLOW_LOCK_BIT_SIZE 0x1UL
+#define DX_AO_CC_GPPC_REG_OFFSET 0x1E3CUL
+#define DX_AO_CC_GPPC_VALUE_BIT_SHIFT 0x0UL
+#define DX_AO_CC_GPPC_VALUE_BIT_SIZE 0x8UL
+#define DX_HOST_RGF_CC_SW_RST_REG_OFFSET 0x1E40UL
+#define DX_HOST_RGF_CC_SW_RST_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_RGF_CC_SW_RST_VALUE_BIT_SIZE 0x1UL
+// --------------------------------------
+// BLOCK: CHACHA
+// --------------------------------------
+#define DX_CHACHA_CONTROL_REG_REG_OFFSET 0x0380UL
+#define DX_CHACHA_CONTROL_REG_CHACHA_OR_SALSA_BIT_SHIFT 0x0UL
+#define DX_CHACHA_CONTROL_REG_CHACHA_OR_SALSA_BIT_SIZE 0x1UL
+#define DX_CHACHA_CONTROL_REG_INIT_FROM_HOST_BIT_SHIFT 0x1UL
+#define DX_CHACHA_CONTROL_REG_INIT_FROM_HOST_BIT_SIZE 0x1UL
+#define DX_CHACHA_CONTROL_REG_CALC_KEY_FOR_POLY1305_BIT_SHIFT 0x2UL
+#define DX_CHACHA_CONTROL_REG_CALC_KEY_FOR_POLY1305_BIT_SIZE 0x1UL
+#define DX_CHACHA_CONTROL_REG_KEY_LEN_BIT_SHIFT 0x3UL
+#define DX_CHACHA_CONTROL_REG_KEY_LEN_BIT_SIZE 0x1UL
+#define DX_CHACHA_CONTROL_REG_NUM_OF_ROUNDS_BIT_SHIFT 0x4UL
+#define DX_CHACHA_CONTROL_REG_NUM_OF_ROUNDS_BIT_SIZE 0x2UL
+#define DX_CHACHA_CONTROL_REG_RESET_BLOCK_CNT_BIT_SHIFT 0x9UL
+#define DX_CHACHA_CONTROL_REG_RESET_BLOCK_CNT_BIT_SIZE 0x1UL
+#define DX_CHACHA_CONTROL_REG_USE_IV_96BIT_BIT_SHIFT 0xAUL
+#define DX_CHACHA_CONTROL_REG_USE_IV_96BIT_BIT_SIZE 0x1UL
+#define DX_CHACHA_VERSION_REG_OFFSET 0x0384UL
+#define DX_CHACHA_VERSION_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_VERSION_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_KEY0_REG_OFFSET 0x0388UL
+#define DX_CHACHA_KEY0_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_KEY0_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_KEY1_REG_OFFSET 0x038CUL
+#define DX_CHACHA_KEY1_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_KEY1_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_KEY2_REG_OFFSET 0x0390UL
+#define DX_CHACHA_KEY2_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_KEY2_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_KEY3_REG_OFFSET 0x0394UL
+#define DX_CHACHA_KEY3_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_KEY3_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_KEY4_REG_OFFSET 0x0398UL
+#define DX_CHACHA_KEY4_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_KEY4_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_KEY5_REG_OFFSET 0x039CUL
+#define DX_CHACHA_KEY5_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_KEY5_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_KEY6_REG_OFFSET 0x03A0UL
+#define DX_CHACHA_KEY6_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_KEY6_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_KEY7_REG_OFFSET 0x03A4UL
+#define DX_CHACHA_KEY7_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_KEY7_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_IV_0_REG_OFFSET 0x03A8UL
+#define DX_CHACHA_IV_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_IV_0_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_IV_1_REG_OFFSET 0x03ACUL
+#define DX_CHACHA_IV_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_IV_1_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_BUSY_REG_OFFSET 0x03B0UL
+#define DX_CHACHA_BUSY_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_BUSY_VALUE_BIT_SIZE 0x1UL
+#define DX_CHACHA_HW_FLAGS_REG_OFFSET 0x03B4UL
+#define DX_CHACHA_HW_FLAGS_CHACHA_EXISTS_BIT_SHIFT 0x0UL
+#define DX_CHACHA_HW_FLAGS_CHACHA_EXISTS_BIT_SIZE 0x1UL
+#define DX_CHACHA_HW_FLAGS_SALSA_EXISTS_BIT_SHIFT 0x1UL
+#define DX_CHACHA_HW_FLAGS_SALSA_EXISTS_BIT_SIZE 0x1UL
+#define DX_CHACHA_HW_FLAGS_FAST_CHACHA_BIT_SHIFT 0x2UL
+#define DX_CHACHA_HW_FLAGS_FAST_CHACHA_BIT_SIZE 0x1UL
+#define DX_CHACHA_BLOCK_CNT_LSB_REG_OFFSET 0x03B8UL
+#define DX_CHACHA_BLOCK_CNT_LSB_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_BLOCK_CNT_LSB_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_BLOCK_CNT_MSB_REG_OFFSET 0x03BCUL
+#define DX_CHACHA_BLOCK_CNT_MSB_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_BLOCK_CNT_MSB_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_SW_RESET_REG_OFFSET 0x03C0UL
+#define DX_CHACHA_SW_RESET_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_SW_RESET_VALUE_BIT_SIZE 0x1UL
+#define DX_CHACHA_FOR_POLY_KEY0_REG_OFFSET 0x03C4UL
+#define DX_CHACHA_FOR_POLY_KEY0_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_FOR_POLY_KEY0_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_FOR_POLY_KEY1_REG_OFFSET 0x03C8UL
+#define DX_CHACHA_FOR_POLY_KEY1_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_FOR_POLY_KEY1_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_FOR_POLY_KEY2_REG_OFFSET 0x03CCUL
+#define DX_CHACHA_FOR_POLY_KEY2_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_FOR_POLY_KEY2_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_FOR_POLY_KEY3_REG_OFFSET 0x03D0UL
+#define DX_CHACHA_FOR_POLY_KEY3_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_FOR_POLY_KEY3_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_FOR_POLY_KEY4_REG_OFFSET 0x03D4UL
+#define DX_CHACHA_FOR_POLY_KEY4_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_FOR_POLY_KEY4_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_FOR_POLY_KEY5_REG_OFFSET 0x03D8UL
+#define DX_CHACHA_FOR_POLY_KEY5_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_FOR_POLY_KEY5_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_FOR_POLY_KEY6_REG_OFFSET 0x03DCUL
+#define DX_CHACHA_FOR_POLY_KEY6_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_FOR_POLY_KEY6_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_FOR_POLY_KEY7_REG_OFFSET 0x03E0UL
+#define DX_CHACHA_FOR_POLY_KEY7_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_FOR_POLY_KEY7_VALUE_BIT_SIZE 0x20UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_REG_OFFSET 0x03E4UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_CHACHA_DIN_WORD_ORDER_BIT_SHIFT 0x0UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_CHACHA_DIN_WORD_ORDER_BIT_SIZE 0x1UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_CHACHA_DIN_BYTE_ORDER_BIT_SHIFT 0x1UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_CHACHA_DIN_BYTE_ORDER_BIT_SIZE 0x1UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_CHACHA_CORE_MATRIX_LBE_ORDER_BIT_SHIFT 0x2UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_CHACHA_CORE_MATRIX_LBE_ORDER_BIT_SIZE 0x1UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_CHACHA_DOUT_WORD_ORDER_BIT_SHIFT 0x3UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_CHACHA_DOUT_WORD_ORDER_BIT_SIZE 0x1UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_CHACHA_DOUT_BYTE_ORDER_BIT_SHIFT 0x4UL
+#define DX_CHACHA_BYTE_WORD_ORDER_CNTL_REG_CHACHA_DOUT_BYTE_ORDER_BIT_SIZE 0x1UL
+#define DX_CHACHA_DEBUG_REG_REG_OFFSET 0x03E8UL
+#define DX_CHACHA_DEBUG_REG_VALUE_BIT_SHIFT 0x0UL
+#define DX_CHACHA_DEBUG_REG_VALUE_BIT_SIZE 0x2UL
+
+#endif // __DX_CRYS_KERNEL_H__
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_env.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_env.h
new file mode 100644
index 0000000..2656a37
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_env.h
@@ -0,0 +1,220 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __DX_ENV_H__
+#define __DX_ENV_H__
+
+// --------------------------------------
+// BLOCK: FPGA_ENV_REGS
+// --------------------------------------
+#define DX_ENV_PKA_DEBUG_MODE_REG_OFFSET 0x024UL
+#define DX_ENV_PKA_DEBUG_MODE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_PKA_DEBUG_MODE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_SCAN_MODE_REG_OFFSET 0x030UL
+#define DX_ENV_SCAN_MODE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SCAN_MODE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_ALLOW_SCAN_REG_OFFSET 0x034UL
+#define DX_ENV_CC_ALLOW_SCAN_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_ALLOW_SCAN_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_HOST_INT_REG_OFFSET 0x0A0UL
+#define DX_ENV_CC_HOST_INT_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_HOST_INT_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_PUB_HOST_INT_REG_OFFSET 0x0A4UL
+#define DX_ENV_CC_PUB_HOST_INT_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_PUB_HOST_INT_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_RST_N_REG_OFFSET 0x0A8UL
+#define DX_ENV_CC_RST_N_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_RST_N_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_RST_OVERRIDE_REG_OFFSET 0x0ACUL
+#define DX_ENV_RST_OVERRIDE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_RST_OVERRIDE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_POR_N_ADDR_REG_OFFSET 0x0E0UL
+#define DX_ENV_CC_POR_N_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_POR_N_ADDR_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_COLD_RST_REG_OFFSET 0x0FCUL
+#define DX_ENV_CC_COLD_RST_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_COLD_RST_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_DUMMY_ADDR_REG_OFFSET 0x108UL
+#define DX_ENV_DUMMY_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_DUMMY_ADDR_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_COUNTER_CLR_REG_OFFSET 0x118UL
+#define DX_ENV_COUNTER_CLR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_COUNTER_CLR_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_COUNTER_RD_REG_OFFSET 0x11CUL
+#define DX_ENV_COUNTER_RD_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_COUNTER_RD_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_RNG_DEBUG_ENABLE_REG_OFFSET 0x430UL
+#define DX_ENV_RNG_DEBUG_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_RNG_DEBUG_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_LCS_REG_OFFSET 0x43CUL
+#define DX_ENV_CC_LCS_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_LCS_VALUE_BIT_SIZE 0x8UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_REG_OFFSET 0x440UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_CM_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_CM_BIT_SIZE 0x1UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_DM_BIT_SHIFT 0x1UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_DM_BIT_SIZE 0x1UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_SECURE_BIT_SHIFT 0x2UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_SECURE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_RMA_BIT_SHIFT 0x3UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_RMA_BIT_SIZE 0x1UL
+#define DX_ENV_DCU_EN_REG_OFFSET 0x444UL
+#define DX_ENV_DCU_EN_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_DCU_EN_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_CC_LCS_IS_VALID_REG_OFFSET 0x448UL
+#define DX_ENV_CC_LCS_IS_VALID_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_LCS_IS_VALID_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_POWER_DOWN_REG_OFFSET 0x478UL
+#define DX_ENV_POWER_DOWN_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_POWER_DOWN_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_DCU_H_EN_REG_OFFSET 0x484UL
+#define DX_ENV_DCU_H_EN_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_DCU_H_EN_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_VERSION_REG_OFFSET 0x488UL
+#define DX_ENV_VERSION_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_VERSION_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_ROSC_WRITE_REG_OFFSET 0x48CUL
+#define DX_ENV_ROSC_WRITE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_ROSC_WRITE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_ROSC_ADDR_REG_OFFSET 0x490UL
+#define DX_ENV_ROSC_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_ROSC_ADDR_VALUE_BIT_SIZE 0x8UL
+#define DX_ENV_RESET_SESSION_KEY_REG_OFFSET 0x494UL
+#define DX_ENV_RESET_SESSION_KEY_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_RESET_SESSION_KEY_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_SESSION_KEY_0_REG_OFFSET 0x4A0UL
+#define DX_ENV_SESSION_KEY_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SESSION_KEY_0_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_SESSION_KEY_1_REG_OFFSET 0x4A4UL
+#define DX_ENV_SESSION_KEY_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SESSION_KEY_1_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_SESSION_KEY_2_REG_OFFSET 0x4A8UL
+#define DX_ENV_SESSION_KEY_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SESSION_KEY_2_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_SESSION_KEY_3_REG_OFFSET 0x4ACUL
+#define DX_ENV_SESSION_KEY_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SESSION_KEY_3_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_SESSION_KEY_VALID_REG_OFFSET 0x4B0UL
+#define DX_ENV_SESSION_KEY_VALID_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SESSION_KEY_VALID_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_SPIDEN_REG_OFFSET 0x4D0UL
+#define DX_ENV_SPIDEN_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SPIDEN_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_AXIM_USER_PARAMS_REG_OFFSET 0x600UL
+#define DX_ENV_AXIM_USER_PARAMS_ARUSER_BIT_SHIFT 0x0UL
+#define DX_ENV_AXIM_USER_PARAMS_ARUSER_BIT_SIZE 0x5UL
+#define DX_ENV_AXIM_USER_PARAMS_AWUSER_BIT_SHIFT 0x5UL
+#define DX_ENV_AXIM_USER_PARAMS_AWUSER_BIT_SIZE 0x5UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_REG_OFFSET 0x604UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_AWPROT_NS_BIT_BIT_SHIFT 0x0UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_AWPROT_NS_BIT_BIT_SIZE 0x1UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_AWPROT_NS_OVERRIDE_BIT_SHIFT 0x1UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_AWPROT_NS_OVERRIDE_BIT_SIZE 0x1UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_ARPROT_NS_BIT_BIT_SHIFT 0x2UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_ARPROT_NS_BIT_BIT_SIZE 0x1UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_ARPROT_NS_OVERRIDE_BIT_SHIFT 0x3UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_ARPROT_NS_OVERRIDE_BIT_SIZE 0x1UL
+#define DX_ENV_SRAM_ENABLE_REG_OFFSET 0x608UL
+#define DX_ENV_SRAM_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SRAM_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_APB_FIPS_ADDR_REG_OFFSET 0x650UL
+#define DX_ENV_APB_FIPS_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_ADDR_VALUE_BIT_SIZE 0xCUL
+#define DX_ENV_APB_FIPS_VAL_REG_OFFSET 0x654UL
+#define DX_ENV_APB_FIPS_VAL_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_VAL_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APB_FIPS_MASK_REG_OFFSET 0x658UL
+#define DX_ENV_APB_FIPS_MASK_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_MASK_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APB_FIPS_CNT_REG_OFFSET 0x65CUL
+#define DX_ENV_APB_FIPS_CNT_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_CNT_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APB_FIPS_NEW_ADDR_REG_OFFSET 0x660UL
+#define DX_ENV_APB_FIPS_NEW_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_NEW_ADDR_VALUE_BIT_SIZE 0xCUL
+#define DX_ENV_APB_FIPS_NEW_VAL_REG_OFFSET 0x664UL
+#define DX_ENV_APB_FIPS_NEW_VAL_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_NEW_VAL_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APB_PPROT_OVERRIDE_REG_OFFSET 0x668UL
+#define DX_ENV_APB_PPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_PPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SIZE 0x3UL
+#define DX_ENV_APB_PPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SHIFT 0x3UL
+#define DX_ENV_APB_PPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SIZE 0x1UL
+#define DX_ENV_APBSC_FIPS_ADDR_REG_OFFSET 0x670UL
+#define DX_ENV_APBSC_FIPS_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_ADDR_VALUE_BIT_SIZE 0xCUL
+#define DX_ENV_APBSC_FIPS_VAL_REG_OFFSET 0x674UL
+#define DX_ENV_APBSC_FIPS_VAL_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_VAL_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APBSC_FIPS_MASK_REG_OFFSET 0x678UL
+#define DX_ENV_APBSC_FIPS_MASK_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_MASK_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APBSC_FIPS_CNT_REG_OFFSET 0x67CUL
+#define DX_ENV_APBSC_FIPS_CNT_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_CNT_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APBSC_FIPS_NEW_ADDR_REG_OFFSET 0x680UL
+#define DX_ENV_APBSC_FIPS_NEW_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_NEW_ADDR_VALUE_BIT_SIZE 0xCUL
+#define DX_ENV_APBSC_FIPS_NEW_VAL_REG_OFFSET 0x684UL
+#define DX_ENV_APBSC_FIPS_NEW_VAL_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_NEW_VAL_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APBSC_PPROT_OVERRIDE_REG_OFFSET 0x688UL
+#define DX_ENV_APBSC_PPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_PPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SIZE 0x3UL
+#define DX_ENV_APBSC_PPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SHIFT 0x3UL
+#define DX_ENV_APBSC_PPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SIZE 0x1UL
+#define DX_ENV_AO_CC_GPPC_REG_OFFSET 0x700UL
+#define DX_ENV_AO_CC_GPPC_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_AO_CC_GPPC_VALUE_BIT_SIZE 0x8UL
+#define DX_ENV_AHBM_HPROT_OVERRIDE_REG_OFFSET 0x704UL
+#define DX_ENV_AHBM_HPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SHIFT 0x0UL
+#define DX_ENV_AHBM_HPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SIZE 0x3UL
+#define DX_ENV_AHBM_HPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SHIFT 0x3UL
+#define DX_ENV_AHBM_HPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SIZE 0x1UL
+#define DX_ENV_CC_IS_IDLE_REG_OFFSET 0x708UL
+#define DX_ENV_CC_IS_IDLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_IS_IDLE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_POWERDOWN_RDY_REG_OFFSET 0x70CUL
+#define DX_ENV_CC_POWERDOWN_RDY_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_POWERDOWN_RDY_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_STATIC_CFG_REG_OFFSET 0x710UL
+#define DX_ENV_CC_STATIC_CFG_USER_OTP_FILTERING_DISABLE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_STATIC_CFG_USER_OTP_FILTERING_DISABLE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_STATIC_CFG_REMOVE_GHASH_ENGINE_BIT_SHIFT 0x1UL
+#define DX_ENV_CC_STATIC_CFG_REMOVE_GHASH_ENGINE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_STATIC_CFG_REMOVE_CHACHA_ENGINE_BIT_SHIFT 0x2UL
+#define DX_ENV_CC_STATIC_CFG_REMOVE_CHACHA_ENGINE_BIT_SIZE 0x1UL
+#define DX_ENV_FUSE_AIB_1K_OFFSET_REG_OFFSET 0x714UL
+#define DX_ENV_FUSE_AIB_1K_OFFSET_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_FUSE_AIB_1K_OFFSET_VALUE_BIT_SIZE 0x2UL
+#define DX_ENV_CC_IS_IDLE_CNTR_REG_OFFSET 0x720UL
+#define DX_ENV_CC_IS_IDLE_CNTR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_IS_IDLE_CNTR_VALUE_BIT_SIZE 0x20UL
+
+// --------------------------------------
+// BLOCK: ENV_CC_MEMORIES
+// --------------------------------------
+#define DX_ENV_FUSE_READY_REG_OFFSET 0x0000UL
+#define DX_ENV_FUSE_READY_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_FUSE_READY_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_PERF_RAM_MASTER_REG_OFFSET 0x00ECUL
+#define DX_ENV_PERF_RAM_MASTER_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_PERF_RAM_MASTER_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_PERF_RAM_ADDR_HIGH4_REG_OFFSET 0x00F0UL
+#define DX_ENV_PERF_RAM_ADDR_HIGH4_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_PERF_RAM_ADDR_HIGH4_VALUE_BIT_SIZE 0x2UL
+#define DX_ENV_FUSES_RAM_REG_OFFSET 0x03ECUL
+#define DX_ENV_FUSES_RAM_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_FUSES_RAM_VALUE_BIT_SIZE 0x20UL
+// --------------------------------------
+// BLOCK: ENV_PERF_RAM_BASE
+// --------------------------------------
+#define DX_ENV_PERF_RAM_BASE_REG_OFFSET 0x0000UL
+#define DX_ENV_PERF_RAM_BASE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_PERF_RAM_BASE_VALUE_BIT_SIZE 0x20UL
+
+#endif /*__DX_ENV_H__*/
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_fpga_env.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_fpga_env.h
new file mode 100644
index 0000000..5be5a6e
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_fpga_env.h
@@ -0,0 +1,213 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+// --------------------------------------
+// BLOCK: FPGA_ENV_REGS
+// --------------------------------------
+#define DX_ENV_PKA_DEBUG_MODE_REG_OFFSET 0x024UL
+#define DX_ENV_PKA_DEBUG_MODE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_PKA_DEBUG_MODE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_SCAN_MODE_REG_OFFSET 0x030UL
+#define DX_ENV_SCAN_MODE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SCAN_MODE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_ALLOW_SCAN_REG_OFFSET 0x034UL
+#define DX_ENV_CC_ALLOW_SCAN_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_ALLOW_SCAN_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_HOST_INT_REG_OFFSET 0x0A0UL
+#define DX_ENV_CC_HOST_INT_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_HOST_INT_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_PUB_HOST_INT_REG_OFFSET 0x0A4UL
+#define DX_ENV_CC_PUB_HOST_INT_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_PUB_HOST_INT_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_RST_N_REG_OFFSET 0x0A8UL
+#define DX_ENV_CC_RST_N_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_RST_N_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_RST_OVERRIDE_REG_OFFSET 0x0ACUL
+#define DX_ENV_RST_OVERRIDE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_RST_OVERRIDE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_POR_N_ADDR_REG_OFFSET 0x0E0UL
+#define DX_ENV_CC_POR_N_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_POR_N_ADDR_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_COLD_RST_REG_OFFSET 0x0FCUL
+#define DX_ENV_CC_COLD_RST_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_COLD_RST_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_DUMMY_ADDR_REG_OFFSET 0x108UL
+#define DX_ENV_DUMMY_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_DUMMY_ADDR_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_COUNTER_CLR_REG_OFFSET 0x118UL
+#define DX_ENV_COUNTER_CLR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_COUNTER_CLR_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_COUNTER_RD_REG_OFFSET 0x11CUL
+#define DX_ENV_COUNTER_RD_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_COUNTER_RD_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_RNG_DEBUG_ENABLE_REG_OFFSET 0x430UL
+#define DX_ENV_RNG_DEBUG_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_RNG_DEBUG_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_LCS_REG_OFFSET 0x43CUL
+#define DX_ENV_CC_LCS_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_LCS_VALUE_BIT_SIZE 0x8UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_REG_OFFSET 0x440UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_CM_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_CM_BIT_SIZE 0x1UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_DM_BIT_SHIFT 0x1UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_DM_BIT_SIZE 0x1UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_SECURE_BIT_SHIFT 0x2UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_SECURE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_RMA_BIT_SHIFT 0x3UL
+#define DX_ENV_CC_IS_CM_DM_SECURE_RMA_IS_RMA_BIT_SIZE 0x1UL
+#define DX_ENV_DCU_EN_REG_OFFSET 0x444UL
+#define DX_ENV_DCU_EN_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_DCU_EN_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_CC_LCS_IS_VALID_REG_OFFSET 0x448UL
+#define DX_ENV_CC_LCS_IS_VALID_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_LCS_IS_VALID_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_POWER_DOWN_REG_OFFSET 0x478UL
+#define DX_ENV_POWER_DOWN_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_POWER_DOWN_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_DCU_H_EN_REG_OFFSET 0x484UL
+#define DX_ENV_DCU_H_EN_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_DCU_H_EN_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_VERSION_REG_OFFSET 0x488UL
+#define DX_ENV_VERSION_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_VERSION_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_ROSC_WRITE_REG_OFFSET 0x48CUL
+#define DX_ENV_ROSC_WRITE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_ROSC_WRITE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_ROSC_ADDR_REG_OFFSET 0x490UL
+#define DX_ENV_ROSC_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_ROSC_ADDR_VALUE_BIT_SIZE 0x8UL
+#define DX_ENV_RESET_SESSION_KEY_REG_OFFSET 0x494UL
+#define DX_ENV_RESET_SESSION_KEY_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_RESET_SESSION_KEY_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_SESSION_KEY_0_REG_OFFSET 0x4A0UL
+#define DX_ENV_SESSION_KEY_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SESSION_KEY_0_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_SESSION_KEY_1_REG_OFFSET 0x4A4UL
+#define DX_ENV_SESSION_KEY_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SESSION_KEY_1_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_SESSION_KEY_2_REG_OFFSET 0x4A8UL
+#define DX_ENV_SESSION_KEY_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SESSION_KEY_2_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_SESSION_KEY_3_REG_OFFSET 0x4ACUL
+#define DX_ENV_SESSION_KEY_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SESSION_KEY_3_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_SESSION_KEY_VALID_REG_OFFSET 0x4B0UL
+#define DX_ENV_SESSION_KEY_VALID_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SESSION_KEY_VALID_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_SPIDEN_REG_OFFSET 0x4D0UL
+#define DX_ENV_SPIDEN_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SPIDEN_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_AXIM_USER_PARAMS_REG_OFFSET 0x600UL
+#define DX_ENV_AXIM_USER_PARAMS_ARUSER_BIT_SHIFT 0x0UL
+#define DX_ENV_AXIM_USER_PARAMS_ARUSER_BIT_SIZE 0x5UL
+#define DX_ENV_AXIM_USER_PARAMS_AWUSER_BIT_SHIFT 0x5UL
+#define DX_ENV_AXIM_USER_PARAMS_AWUSER_BIT_SIZE 0x5UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_REG_OFFSET 0x604UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_AWPROT_NS_BIT_BIT_SHIFT 0x0UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_AWPROT_NS_BIT_BIT_SIZE 0x1UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_AWPROT_NS_OVERRIDE_BIT_SHIFT 0x1UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_AWPROT_NS_OVERRIDE_BIT_SIZE 0x1UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_ARPROT_NS_BIT_BIT_SHIFT 0x2UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_ARPROT_NS_BIT_BIT_SIZE 0x1UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_ARPROT_NS_OVERRIDE_BIT_SHIFT 0x3UL
+#define DX_ENV_SECURITY_MODE_OVERRIDE_ARPROT_NS_OVERRIDE_BIT_SIZE 0x1UL
+#define DX_ENV_SRAM_ENABLE_REG_OFFSET 0x608UL
+#define DX_ENV_SRAM_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_SRAM_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_APB_FIPS_ADDR_REG_OFFSET 0x650UL
+#define DX_ENV_APB_FIPS_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_ADDR_VALUE_BIT_SIZE 0xCUL
+#define DX_ENV_APB_FIPS_VAL_REG_OFFSET 0x654UL
+#define DX_ENV_APB_FIPS_VAL_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_VAL_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APB_FIPS_MASK_REG_OFFSET 0x658UL
+#define DX_ENV_APB_FIPS_MASK_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_MASK_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APB_FIPS_CNT_REG_OFFSET 0x65CUL
+#define DX_ENV_APB_FIPS_CNT_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_CNT_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APB_FIPS_NEW_ADDR_REG_OFFSET 0x660UL
+#define DX_ENV_APB_FIPS_NEW_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_NEW_ADDR_VALUE_BIT_SIZE 0xCUL
+#define DX_ENV_APB_FIPS_NEW_VAL_REG_OFFSET 0x664UL
+#define DX_ENV_APB_FIPS_NEW_VAL_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_FIPS_NEW_VAL_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APB_PPROT_OVERRIDE_REG_OFFSET 0x668UL
+#define DX_ENV_APB_PPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SHIFT 0x0UL
+#define DX_ENV_APB_PPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SIZE 0x3UL
+#define DX_ENV_APB_PPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SHIFT 0x3UL
+#define DX_ENV_APB_PPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SIZE 0x1UL
+#define DX_ENV_APBSC_FIPS_ADDR_REG_OFFSET 0x670UL
+#define DX_ENV_APBSC_FIPS_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_ADDR_VALUE_BIT_SIZE 0xCUL
+#define DX_ENV_APBSC_FIPS_VAL_REG_OFFSET 0x674UL
+#define DX_ENV_APBSC_FIPS_VAL_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_VAL_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APBSC_FIPS_MASK_REG_OFFSET 0x678UL
+#define DX_ENV_APBSC_FIPS_MASK_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_MASK_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APBSC_FIPS_CNT_REG_OFFSET 0x67CUL
+#define DX_ENV_APBSC_FIPS_CNT_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_CNT_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APBSC_FIPS_NEW_ADDR_REG_OFFSET 0x680UL
+#define DX_ENV_APBSC_FIPS_NEW_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_NEW_ADDR_VALUE_BIT_SIZE 0xCUL
+#define DX_ENV_APBSC_FIPS_NEW_VAL_REG_OFFSET 0x684UL
+#define DX_ENV_APBSC_FIPS_NEW_VAL_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_FIPS_NEW_VAL_VALUE_BIT_SIZE 0x20UL
+#define DX_ENV_APBSC_PPROT_OVERRIDE_REG_OFFSET 0x688UL
+#define DX_ENV_APBSC_PPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SHIFT 0x0UL
+#define DX_ENV_APBSC_PPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SIZE 0x3UL
+#define DX_ENV_APBSC_PPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SHIFT 0x3UL
+#define DX_ENV_APBSC_PPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SIZE 0x1UL
+#define DX_ENV_AO_CC_GPPC_REG_OFFSET 0x700UL
+#define DX_ENV_AO_CC_GPPC_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_AO_CC_GPPC_VALUE_BIT_SIZE 0x8UL
+#define DX_ENV_AHBM_HPROT_OVERRIDE_REG_OFFSET 0x704UL
+#define DX_ENV_AHBM_HPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SHIFT 0x0UL
+#define DX_ENV_AHBM_HPROT_OVERRIDE_PPROT_OVERRIDE_VAL_BIT_SIZE 0x3UL
+#define DX_ENV_AHBM_HPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SHIFT 0x3UL
+#define DX_ENV_AHBM_HPROT_OVERRIDE_PPROT_OVERRIDE_CNTL_BIT_SIZE 0x1UL
+#define DX_ENV_CC_IS_IDLE_REG_OFFSET 0x708UL
+#define DX_ENV_CC_IS_IDLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_IS_IDLE_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_POWERDOWN_RDY_REG_OFFSET 0x70CUL
+#define DX_ENV_CC_POWERDOWN_RDY_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_POWERDOWN_RDY_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_STATIC_CFG_REG_OFFSET 0x710UL
+#define DX_ENV_CC_STATIC_CFG_USER_OTP_FILTERING_DISABLE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_STATIC_CFG_USER_OTP_FILTERING_DISABLE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_STATIC_CFG_REMOVE_GHASH_ENGINE_BIT_SHIFT 0x1UL
+#define DX_ENV_CC_STATIC_CFG_REMOVE_GHASH_ENGINE_BIT_SIZE 0x1UL
+#define DX_ENV_CC_STATIC_CFG_REMOVE_CHACHA_ENGINE_BIT_SHIFT 0x2UL
+#define DX_ENV_CC_STATIC_CFG_REMOVE_CHACHA_ENGINE_BIT_SIZE 0x1UL
+#define DX_ENV_FUSE_AIB_1K_OFFSET_REG_OFFSET 0x714UL
+#define DX_ENV_FUSE_AIB_1K_OFFSET_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_FUSE_AIB_1K_OFFSET_VALUE_BIT_SIZE 0x2UL
+#define DX_ENV_CC_IS_IDLE_CNTR_REG_OFFSET 0x720UL
+#define DX_ENV_CC_IS_IDLE_CNTR_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_CC_IS_IDLE_CNTR_VALUE_BIT_SIZE 0x20UL
+
+// --------------------------------------
+// BLOCK: ENV_CC_MEMORIES
+// --------------------------------------
+#define DX_ENV_FUSE_READY_REG_OFFSET 0x0000UL
+#define DX_ENV_FUSE_READY_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_FUSE_READY_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_PERF_RAM_MASTER_REG_OFFSET 0x00ECUL
+#define DX_ENV_PERF_RAM_MASTER_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_PERF_RAM_MASTER_VALUE_BIT_SIZE 0x1UL
+#define DX_ENV_PERF_RAM_ADDR_HIGH4_REG_OFFSET 0x00F0UL
+#define DX_ENV_PERF_RAM_ADDR_HIGH4_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_PERF_RAM_ADDR_HIGH4_VALUE_BIT_SIZE 0x2UL
+#define DX_ENV_FUSES_RAM_REG_OFFSET 0x03ECUL
+#define DX_ENV_FUSES_RAM_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_FUSES_RAM_VALUE_BIT_SIZE 0x20UL
+// --------------------------------------
+// BLOCK: ENV_PERF_RAM_BASE
+// --------------------------------------
+#define DX_ENV_PERF_RAM_BASE_REG_OFFSET 0x0000UL
+#define DX_ENV_PERF_RAM_BASE_VALUE_BIT_SHIFT 0x0UL
+#define DX_ENV_PERF_RAM_BASE_VALUE_BIT_SIZE 0x20UL
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_host.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_host.h
new file mode 100644
index 0000000..f2e3dbc
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_host.h
@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __DX_HOST_H__
+#define __DX_HOST_H__
+
+// --------------------------------------
+// BLOCK: HOST
+// --------------------------------------
+#define DX_HOST_IRR_REG_OFFSET 0x0A00UL
+#define DX_HOST_IRR_SRAM_TO_DIN_INT_BIT_SHIFT 0x4UL
+#define DX_HOST_IRR_SRAM_TO_DIN_INT_BIT_SIZE 0x1UL
+#define DX_HOST_IRR_DOUT_TO_SRAM_INT_BIT_SHIFT 0x5UL
+#define DX_HOST_IRR_DOUT_TO_SRAM_INT_BIT_SIZE 0x1UL
+#define DX_HOST_IRR_MEM_TO_DIN_INT_BIT_SHIFT 0x6UL
+#define DX_HOST_IRR_MEM_TO_DIN_INT_BIT_SIZE 0x1UL
+#define DX_HOST_IRR_DOUT_TO_MEM_INT_BIT_SHIFT 0x7UL
+#define DX_HOST_IRR_DOUT_TO_MEM_INT_BIT_SIZE 0x1UL
+#define DX_HOST_IRR_AHB_ERR_INT_BIT_SHIFT 0x8UL
+#define DX_HOST_IRR_AHB_ERR_INT_BIT_SIZE 0x1UL
+#define DX_HOST_IRR_PKA_EXP_INT_BIT_SHIFT 0x9UL
+#define DX_HOST_IRR_PKA_EXP_INT_BIT_SIZE 0x1UL
+#define DX_HOST_IRR_RNG_INT_BIT_SHIFT 0xAUL
+#define DX_HOST_IRR_RNG_INT_BIT_SIZE 0x1UL
+#define DX_HOST_IRR_SYM_DMA_COMPLETED_BIT_SHIFT 0xBUL
+#define DX_HOST_IRR_SYM_DMA_COMPLETED_BIT_SIZE 0x1UL
+#define DX_HOST_IMR_REG_OFFSET 0x0A04UL
+#define DX_HOST_IMR_SRAM_TO_DIN_MASK_BIT_SHIFT 0x4UL
+#define DX_HOST_IMR_SRAM_TO_DIN_MASK_BIT_SIZE 0x1UL
+#define DX_HOST_IMR_DOUT_TO_SRAM_MASK_BIT_SHIFT 0x5UL
+#define DX_HOST_IMR_DOUT_TO_SRAM_MASK_BIT_SIZE 0x1UL
+#define DX_HOST_IMR_MEM_TO_DIN_MASK_BIT_SHIFT 0x6UL
+#define DX_HOST_IMR_MEM_TO_DIN_MASK_BIT_SIZE 0x1UL
+#define DX_HOST_IMR_DOUT_TO_MEM_MASK_BIT_SHIFT 0x7UL
+#define DX_HOST_IMR_DOUT_TO_MEM_MASK_BIT_SIZE 0x1UL
+#define DX_HOST_IMR_AXI_ERR_MASK_BIT_SHIFT 0x8UL
+#define DX_HOST_IMR_AXI_ERR_MASK_BIT_SIZE 0x1UL
+#define DX_HOST_IMR_PKA_EXP_MASK_BIT_SHIFT 0x9UL
+#define DX_HOST_IMR_PKA_EXP_MASK_BIT_SIZE 0x1UL
+#define DX_HOST_IMR_RNG_INT_MASK_BIT_SHIFT 0xAUL
+#define DX_HOST_IMR_RNG_INT_MASK_BIT_SIZE 0x1UL
+#define DX_HOST_IMR_SYM_DMA_COMPLETED_MASK_BIT_SHIFT 0xBUL
+#define DX_HOST_IMR_SYM_DMA_COMPLETED_MASK_BIT_SIZE 0x1UL
+#define DX_HOST_ICR_REG_OFFSET 0x0A08UL
+#define DX_HOST_ICR_SRAM_TO_DIN_CLEAR_BIT_SHIFT 0x4UL
+#define DX_HOST_ICR_SRAM_TO_DIN_CLEAR_BIT_SIZE 0x1UL
+#define DX_HOST_ICR_DOUT_TO_SRAM_CLEAR_BIT_SHIFT 0x5UL
+#define DX_HOST_ICR_DOUT_TO_SRAM_CLEAR_BIT_SIZE 0x1UL
+#define DX_HOST_ICR_MEM_TO_DIN_CLEAR_BIT_SHIFT 0x6UL
+#define DX_HOST_ICR_MEM_TO_DIN_CLEAR_BIT_SIZE 0x1UL
+#define DX_HOST_ICR_DOUT_TO_MEM_CLEAR_BIT_SHIFT 0x7UL
+#define DX_HOST_ICR_DOUT_TO_MEM_CLEAR_BIT_SIZE 0x1UL
+#define DX_HOST_ICR_AXI_ERR_CLEAR_BIT_SHIFT 0x8UL
+#define DX_HOST_ICR_AXI_ERR_CLEAR_BIT_SIZE 0x1UL
+#define DX_HOST_ICR_PKA_EXP_CLEAR_BIT_SHIFT 0x9UL
+#define DX_HOST_ICR_PKA_EXP_CLEAR_BIT_SIZE 0x1UL
+#define DX_HOST_ICR_RNG_INT_CLEAR_BIT_SHIFT 0xAUL
+#define DX_HOST_ICR_RNG_INT_CLEAR_BIT_SIZE 0x1UL
+#define DX_HOST_ICR_SYM_DMA_COMPLETED_CLEAR_BIT_SHIFT 0xBUL
+#define DX_HOST_ICR_SYM_DMA_COMPLETED_CLEAR_BIT_SIZE 0x1UL
+#define DX_HOST_ENDIAN_REG_OFFSET 0x0A0CUL
+#define DX_HOST_ENDIAN_DOUT_WR_BG_BIT_SHIFT 0x3UL
+#define DX_HOST_ENDIAN_DOUT_WR_BG_BIT_SIZE 0x1UL
+#define DX_HOST_ENDIAN_DIN_RD_BG_BIT_SHIFT 0x7UL
+#define DX_HOST_ENDIAN_DIN_RD_BG_BIT_SIZE 0x1UL
+#define DX_HOST_ENDIAN_DOUT_WR_WBG_BIT_SHIFT 0xBUL
+#define DX_HOST_ENDIAN_DOUT_WR_WBG_BIT_SIZE 0x1UL
+#define DX_HOST_ENDIAN_DIN_RD_WBG_BIT_SHIFT 0xFUL
+#define DX_HOST_ENDIAN_DIN_RD_WBG_BIT_SIZE 0x1UL
+#define DX_HOST_SIGNATURE_REG_OFFSET 0x0A24UL
+#define DX_HOST_SIGNATURE_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_SIGNATURE_VALUE_BIT_SIZE 0x20UL
+#define DX_HOST_BOOT_REG_OFFSET 0x0A28UL
+#define DX_HOST_BOOT_SYNTHESIS_CONFIG_BIT_SHIFT 0x0UL
+#define DX_HOST_BOOT_SYNTHESIS_CONFIG_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_LARGE_RKEK_LOCAL_BIT_SHIFT 0x1UL
+#define DX_HOST_BOOT_LARGE_RKEK_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_HASH_IN_FUSES_LOCAL_BIT_SHIFT 0x2UL
+#define DX_HOST_BOOT_HASH_IN_FUSES_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_EXT_MEM_SECURED_LOCAL_BIT_SHIFT 0x3UL
+#define DX_HOST_BOOT_EXT_MEM_SECURED_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_RKEK_ECC_EXISTS_LOCAL_N_BIT_SHIFT 0x5UL
+#define DX_HOST_BOOT_RKEK_ECC_EXISTS_LOCAL_N_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_SRAM_SIZE_LOCAL_BIT_SHIFT 0x6UL
+#define DX_HOST_BOOT_SRAM_SIZE_LOCAL_BIT_SIZE 0x3UL
+#define DX_HOST_BOOT_DSCRPTR_EXISTS_LOCAL_BIT_SHIFT 0x9UL
+#define DX_HOST_BOOT_DSCRPTR_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_PAU_EXISTS_LOCAL_BIT_SHIFT 0xAUL
+#define DX_HOST_BOOT_PAU_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_RNG_EXISTS_LOCAL_BIT_SHIFT 0xBUL
+#define DX_HOST_BOOT_RNG_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_PKA_EXISTS_LOCAL_BIT_SHIFT 0xCUL
+#define DX_HOST_BOOT_PKA_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_RC4_EXISTS_LOCAL_BIT_SHIFT 0xDUL
+#define DX_HOST_BOOT_RC4_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_SHA_512_PRSNT_LOCAL_BIT_SHIFT 0xEUL
+#define DX_HOST_BOOT_SHA_512_PRSNT_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_SHA_256_PRSNT_LOCAL_BIT_SHIFT 0xFUL
+#define DX_HOST_BOOT_SHA_256_PRSNT_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_MD5_PRSNT_LOCAL_BIT_SHIFT 0x10UL
+#define DX_HOST_BOOT_MD5_PRSNT_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_HASH_EXISTS_LOCAL_BIT_SHIFT 0x11UL
+#define DX_HOST_BOOT_HASH_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_C2_EXISTS_LOCAL_BIT_SHIFT 0x12UL
+#define DX_HOST_BOOT_C2_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_DES_EXISTS_LOCAL_BIT_SHIFT 0x13UL
+#define DX_HOST_BOOT_DES_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_AES_XCBC_MAC_EXISTS_LOCAL_BIT_SHIFT 0x14UL
+#define DX_HOST_BOOT_AES_XCBC_MAC_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_AES_CMAC_EXISTS_LOCAL_BIT_SHIFT 0x15UL
+#define DX_HOST_BOOT_AES_CMAC_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_AES_CCM_EXISTS_LOCAL_BIT_SHIFT 0x16UL
+#define DX_HOST_BOOT_AES_CCM_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_AES_XEX_HW_T_CALC_LOCAL_BIT_SHIFT 0x17UL
+#define DX_HOST_BOOT_AES_XEX_HW_T_CALC_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_AES_XEX_EXISTS_LOCAL_BIT_SHIFT 0x18UL
+#define DX_HOST_BOOT_AES_XEX_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_CTR_EXISTS_LOCAL_BIT_SHIFT 0x19UL
+#define DX_HOST_BOOT_CTR_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_AES_DIN_BYTE_RESOLUTION_LOCAL_BIT_SHIFT 0x1AUL
+#define DX_HOST_BOOT_AES_DIN_BYTE_RESOLUTION_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_TUNNELING_ENB_LOCAL_BIT_SHIFT 0x1BUL
+#define DX_HOST_BOOT_TUNNELING_ENB_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_SUPPORT_256_192_KEY_LOCAL_BIT_SHIFT 0x1CUL
+#define DX_HOST_BOOT_SUPPORT_256_192_KEY_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_ONLY_ENCRYPT_LOCAL_BIT_SHIFT 0x1DUL
+#define DX_HOST_BOOT_ONLY_ENCRYPT_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_BOOT_AES_EXISTS_LOCAL_BIT_SHIFT 0x1EUL
+#define DX_HOST_BOOT_AES_EXISTS_LOCAL_BIT_SIZE 0x1UL
+#define DX_HOST_CRYPTOKEY_SEL_REG_OFFSET 0x0A38UL
+#define DX_HOST_CRYPTOKEY_SEL_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_CRYPTOKEY_SEL_VALUE_BIT_SIZE 0x3UL
+#define DX_HOST_CORE_CLK_GATING_ENABLE_REG_OFFSET 0x0A78UL
+#define DX_HOST_CORE_CLK_GATING_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_CORE_CLK_GATING_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_HOST_CC_IS_IDLE_REG_OFFSET 0x0A7CUL
+#define DX_HOST_CC_IS_IDLE_HOST_CC_IS_IDLE_BIT_SHIFT 0x0UL
+#define DX_HOST_CC_IS_IDLE_HOST_CC_IS_IDLE_BIT_SIZE 0x1UL
+#define DX_HOST_CC_IS_IDLE_HOST_CC_IS_IDLE_EVENT_BIT_SHIFT 0x1UL
+#define DX_HOST_CC_IS_IDLE_HOST_CC_IS_IDLE_EVENT_BIT_SIZE 0x1UL
+#define DX_HOST_CC_IS_IDLE_SYM_IS_BUSY_BIT_SHIFT 0x2UL
+#define DX_HOST_CC_IS_IDLE_SYM_IS_BUSY_BIT_SIZE 0x1UL
+#define DX_HOST_CC_IS_IDLE_AHB_IS_IDLE_BIT_SHIFT 0x3UL
+#define DX_HOST_CC_IS_IDLE_AHB_IS_IDLE_BIT_SIZE 0x1UL
+#define DX_HOST_CC_IS_IDLE_NVM_ARB_IS_IDLE_BIT_SHIFT 0x4UL
+#define DX_HOST_CC_IS_IDLE_NVM_ARB_IS_IDLE_BIT_SIZE 0x1UL
+#define DX_HOST_CC_IS_IDLE_NVM_IS_IDLE_BIT_SHIFT 0x5UL
+#define DX_HOST_CC_IS_IDLE_NVM_IS_IDLE_BIT_SIZE 0x1UL
+#define DX_HOST_CC_IS_IDLE_FATAL_WR_BIT_SHIFT 0x6UL
+#define DX_HOST_CC_IS_IDLE_FATAL_WR_BIT_SIZE 0x1UL
+#define DX_HOST_CC_IS_IDLE_RNG_IS_IDLE_BIT_SHIFT 0x7UL
+#define DX_HOST_CC_IS_IDLE_RNG_IS_IDLE_BIT_SIZE 0x1UL
+#define DX_HOST_CC_IS_IDLE_PKA_IS_IDLE_BIT_SHIFT 0x8UL
+#define DX_HOST_CC_IS_IDLE_PKA_IS_IDLE_BIT_SIZE 0x1UL
+#define DX_HOST_CC_IS_IDLE_CRYPTO_IS_IDLE_BIT_SHIFT 0x9UL
+#define DX_HOST_CC_IS_IDLE_CRYPTO_IS_IDLE_BIT_SIZE 0x1UL
+#define DX_HOST_POWERDOWN_REG_OFFSET 0x0A80UL
+#define DX_HOST_POWERDOWN_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_POWERDOWN_VALUE_BIT_SIZE 0x1UL
+#define DX_HOST_REMOVE_GHASH_ENGINE_REG_OFFSET 0x0A84UL
+#define DX_HOST_REMOVE_GHASH_ENGINE_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_REMOVE_GHASH_ENGINE_VALUE_BIT_SIZE 0x1UL
+#define DX_HOST_REMOVE_CHACHA_ENGINE_REG_OFFSET 0x0A88UL
+#define DX_HOST_REMOVE_CHACHA_ENGINE_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_REMOVE_CHACHA_ENGINE_VALUE_BIT_SIZE 0x1UL
+// --------------------------------------
+// BLOCK: HOST_SRAM
+// --------------------------------------
+#define DX_SRAM_DATA_REG_OFFSET 0x0F00UL
+#define DX_SRAM_DATA_VALUE_BIT_SHIFT 0x0UL
+#define DX_SRAM_DATA_VALUE_BIT_SIZE 0x20UL
+#define DX_SRAM_ADDR_REG_OFFSET 0x0F04UL
+#define DX_SRAM_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_SRAM_ADDR_VALUE_BIT_SIZE 0xFUL
+#define DX_SRAM_DATA_READY_REG_OFFSET 0x0F08UL
+#define DX_SRAM_DATA_READY_VALUE_BIT_SHIFT 0x0UL
+#define DX_SRAM_DATA_READY_VALUE_BIT_SIZE 0x1UL
+#endif //__DX_HOST_H__
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_id_registers.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_id_registers.h
new file mode 100644
index 0000000..737ae51
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_id_registers.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __DX_ID_REGS_H__
+#define __DX_ID_REGS_H__
+
+// --------------------------------------
+// BLOCK: ID_REGISTERS
+// --------------------------------------
+#define DX_PERIPHERAL_ID_4_REG_OFFSET 0x0FD0UL
+#define DX_PERIPHERAL_ID_4_VALUE_BIT_SHIFT 0x0UL
+#define DX_PERIPHERAL_ID_4_VALUE_BIT_SIZE 0x4UL
+#define DX_PIDRESERVED0_REG_OFFSET 0x0FD4UL
+#define DX_PIDRESERVED1_REG_OFFSET 0x0FD8UL
+#define DX_PIDRESERVED2_REG_OFFSET 0x0FDCUL
+#define DX_PERIPHERAL_ID_0_REG_OFFSET 0x0FE0UL
+#define DX_PERIPHERAL_ID_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_PERIPHERAL_ID_0_VALUE_BIT_SIZE 0x8UL
+#define DX_PERIPHERAL_ID_1_REG_OFFSET 0x0FE4UL
+#define DX_PERIPHERAL_ID_1_PART_1_BIT_SHIFT 0x0UL
+#define DX_PERIPHERAL_ID_1_PART_1_BIT_SIZE 0x4UL
+#define DX_PERIPHERAL_ID_1_DES_0_JEP106_BIT_SHIFT 0x4UL
+#define DX_PERIPHERAL_ID_1_DES_0_JEP106_BIT_SIZE 0x4UL
+#define DX_PERIPHERAL_ID_2_REG_OFFSET 0x0FE8UL
+#define DX_PERIPHERAL_ID_2_DES_1_JEP106_BIT_SHIFT 0x0UL
+#define DX_PERIPHERAL_ID_2_DES_1_JEP106_BIT_SIZE 0x3UL
+#define DX_PERIPHERAL_ID_2_JEDEC_BIT_SHIFT 0x3UL
+#define DX_PERIPHERAL_ID_2_JEDEC_BIT_SIZE 0x1UL
+#define DX_PERIPHERAL_ID_2_REVISION_BIT_SHIFT 0x4UL
+#define DX_PERIPHERAL_ID_2_REVISION_BIT_SIZE 0x4UL
+#define DX_PERIPHERAL_ID_3_REG_OFFSET 0x0FECUL
+#define DX_PERIPHERAL_ID_3_CMOD_BIT_SHIFT 0x0UL
+#define DX_PERIPHERAL_ID_3_CMOD_BIT_SIZE 0x4UL
+#define DX_PERIPHERAL_ID_3_REVAND_BIT_SHIFT 0x4UL
+#define DX_PERIPHERAL_ID_3_REVAND_BIT_SIZE 0x4UL
+#define DX_COMPONENT_ID_0_REG_OFFSET 0x0FF0UL
+#define DX_COMPONENT_ID_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_COMPONENT_ID_0_VALUE_BIT_SIZE 0x8UL
+#define DX_COMPONENT_ID_1_REG_OFFSET 0x0FF4UL
+#define DX_COMPONENT_ID_1_PRMBL_1_BIT_SHIFT 0x0UL
+#define DX_COMPONENT_ID_1_PRMBL_1_BIT_SIZE 0x4UL
+#define DX_COMPONENT_ID_1_CLASS_BIT_SHIFT 0x4UL
+#define DX_COMPONENT_ID_1_CLASS_BIT_SIZE 0x4UL
+#define DX_COMPONENT_ID_2_REG_OFFSET 0x0FF8UL
+#define DX_COMPONENT_ID_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_COMPONENT_ID_2_VALUE_BIT_SIZE 0x8UL
+#define DX_COMPONENT_ID_3_REG_OFFSET 0x0FFCUL
+#define DX_COMPONENT_ID_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_COMPONENT_ID_3_VALUE_BIT_SIZE 0x8UL
+
+#endif //__DX_ID_REGS_H__
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_nvm.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_nvm.h
new file mode 100644
index 0000000..3122261
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_nvm.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __DX_NVM_H__
+#define __DX_NVM_H__
+
+// --------------------------------------
+// BLOCK: NVM
+// --------------------------------------
+#define DX_AIB_FUSE_PROG_COMPLETED_REG_OFFSET 0x1F04UL
+#define DX_AIB_FUSE_PROG_COMPLETED_VALUE_BIT_SHIFT 0x0UL
+#define DX_AIB_FUSE_PROG_COMPLETED_VALUE_BIT_SIZE 0x1UL
+#define DX_NVM_DEBUG_STATUS_REG_OFFSET 0x1F08UL
+#define DX_NVM_DEBUG_STATUS_VALUE_BIT_SHIFT 0x1UL
+#define DX_NVM_DEBUG_STATUS_VALUE_BIT_SIZE 0x3UL
+#define DX_LCS_IS_VALID_REG_OFFSET 0x1F0CUL
+#define DX_LCS_IS_VALID_VALUE_BIT_SHIFT 0x0UL
+#define DX_LCS_IS_VALID_VALUE_BIT_SIZE 0x1UL
+#define DX_NVM_IS_IDLE_REG_OFFSET 0x1F10UL
+#define DX_NVM_IS_IDLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_NVM_IS_IDLE_VALUE_BIT_SIZE 0x1UL
+#define DX_LCS_REG_REG_OFFSET 0x1F14UL
+#define DX_LCS_REG_LCS_REG_BIT_SHIFT 0x0UL
+#define DX_LCS_REG_LCS_REG_BIT_SIZE 0x3UL
+#define DX_LCS_REG_ERROR_KDR_ZERO_CNT_BIT_SHIFT 0x8UL
+#define DX_LCS_REG_ERROR_KDR_ZERO_CNT_BIT_SIZE 0x1UL
+#define DX_LCS_REG_ERROR_PROV_ZERO_CNT_BIT_SHIFT 0x9UL
+#define DX_LCS_REG_ERROR_PROV_ZERO_CNT_BIT_SIZE 0x1UL
+#define DX_LCS_REG_ERROR_KCE_ZERO_CNT_BIT_SHIFT 0xAUL
+#define DX_LCS_REG_ERROR_KCE_ZERO_CNT_BIT_SIZE 0x1UL
+#define DX_LCS_REG_ERROR_KPICV_ZERO_CNT_BIT_SHIFT 0xBUL
+#define DX_LCS_REG_ERROR_KPICV_ZERO_CNT_BIT_SIZE 0x1UL
+#define DX_LCS_REG_ERROR_KCEICV_ZERO_CNT_BIT_SHIFT 0xCUL
+#define DX_LCS_REG_ERROR_KCEICV_ZERO_CNT_BIT_SIZE 0x1UL
+#define DX_HOST_SHADOW_KDR_REG_REG_OFFSET 0x1F18UL
+#define DX_HOST_SHADOW_KDR_REG_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_SHADOW_KDR_REG_VALUE_BIT_SIZE 0x1UL
+#define DX_HOST_SHADOW_KCP_REG_REG_OFFSET 0x1F1CUL
+#define DX_HOST_SHADOW_KCP_REG_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_SHADOW_KCP_REG_VALUE_BIT_SIZE 0x1UL
+#define DX_HOST_SHADOW_KCE_REG_REG_OFFSET 0x1F20UL
+#define DX_HOST_SHADOW_KCE_REG_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_SHADOW_KCE_REG_VALUE_BIT_SIZE 0x1UL
+#define DX_HOST_SHADOW_KPICV_REG_REG_OFFSET 0x1F24UL
+#define DX_HOST_SHADOW_KPICV_REG_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_SHADOW_KPICV_REG_VALUE_BIT_SIZE 0x1UL
+#define DX_HOST_SHADOW_KCEICV_REG_REG_OFFSET 0x1F28UL
+#define DX_HOST_SHADOW_KCEICV_REG_VALUE_BIT_SHIFT 0x0UL
+#define DX_HOST_SHADOW_KCEICV_REG_VALUE_BIT_SIZE 0x1UL
+#define DX_OTP_ADDR_WIDTH_DEF_REG_OFFSET 0x1F2CUL
+#define DX_OTP_ADDR_WIDTH_DEF_VALUE_BIT_SHIFT 0x0UL
+#define DX_OTP_ADDR_WIDTH_DEF_VALUE_BIT_SIZE 0x4UL
+
+#endif //__DX_NVM_H__
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_reg_base_host.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_reg_base_host.h
new file mode 100644
index 0000000..001de06
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_reg_base_host.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef __DX_REG_BASE_HOST_H__
+#define __DX_REG_BASE_HOST_H__
+
+/* Identify platform: Xilinx Zynq7000 ZC706 */
+#define DX_PLAT_ZYNQ7000 1
+#define DX_PLAT_ZYNQ7000_ZC706 1
+
+#define DX_BASE_CC 0x60000000
+
+#define DX_BASE_ENV_REGS 0x40008000
+#define DX_BASE_ENV_CC_MEMORIES 0x40008000
+#define DX_BASE_ENV_PERF_RAM 0x40009000
+
+#define DX_BASE_HOST_RGF 0x0UL
+#define DX_BASE_CRY_KERNEL 0x0UL
+#define DX_BASE_ROM 0x40000000
+
+#define DX_BASE_RNG 0x0000UL
+#endif /*__DX_REG_BASE_HOST_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_reg_common.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_reg_common.h
new file mode 100644
index 0000000..b865651
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_reg_common.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef __DX_REG_COMMON_H__
+#define __DX_REG_COMMON_H__
+
+#define DX_DEV_SIGNATURE 0x10E00000UL
+
+#endif /*__DX_REG_COMMON_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_rng.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_rng.h
new file mode 100644
index 0000000..4de479d
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/dx_rng.h
@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __DX_RNG_H__
+#define __DX_RNG_H__
+
+// --------------------------------------
+// BLOCK: RNG
+// --------------------------------------
+#define DX_RNG_IMR_REG_OFFSET 0x0100UL
+#define DX_RNG_IMR_EHR_VALID_INT_MASK_BIT_SHIFT 0x0UL
+#define DX_RNG_IMR_EHR_VALID_INT_MASK_BIT_SIZE 0x1UL
+#define DX_RNG_IMR_AUTOCORR_ERR_INT_MASK_BIT_SHIFT 0x1UL
+#define DX_RNG_IMR_AUTOCORR_ERR_INT_MASK_BIT_SIZE 0x1UL
+#define DX_RNG_IMR_CRNGT_ERR_INT_MASK_BIT_SHIFT 0x2UL
+#define DX_RNG_IMR_CRNGT_ERR_INT_MASK_BIT_SIZE 0x1UL
+#define DX_RNG_IMR_VN_ERR_INT_MASK_BIT_SHIFT 0x3UL
+#define DX_RNG_IMR_VN_ERR_INT_MASK_BIT_SIZE 0x1UL
+#define DX_RNG_IMR_WATCHDOG_INT_MASK_BIT_SHIFT 0x4UL
+#define DX_RNG_IMR_WATCHDOG_INT_MASK_BIT_SIZE 0x1UL
+#define DX_RNG_IMR_RNG_DMA_DONE_INT_BIT_SHIFT 0x5UL
+#define DX_RNG_IMR_RNG_DMA_DONE_INT_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_REG_OFFSET 0x0104UL
+#define DX_RNG_ISR_EHR_VALID_BIT_SHIFT 0x0UL
+#define DX_RNG_ISR_EHR_VALID_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_AUTOCORR_ERR_BIT_SHIFT 0x1UL
+#define DX_RNG_ISR_AUTOCORR_ERR_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_CRNGT_ERR_BIT_SHIFT 0x2UL
+#define DX_RNG_ISR_CRNGT_ERR_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_VN_ERR_BIT_SHIFT 0x3UL
+#define DX_RNG_ISR_VN_ERR_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_RNG_DMA_DONE_BIT_SHIFT 0x5UL
+#define DX_RNG_ISR_RNG_DMA_DONE_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_RESEEDING_DONE_BIT_SHIFT 0x10UL
+#define DX_RNG_ISR_RESEEDING_DONE_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_INSTANTIATION_DONE_BIT_SHIFT 0x11UL
+#define DX_RNG_ISR_INSTANTIATION_DONE_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_FINAL_UPDATE_DONE_BIT_SHIFT 0x12UL
+#define DX_RNG_ISR_FINAL_UPDATE_DONE_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_OUTPUT_READY_BIT_SHIFT 0x13UL
+#define DX_RNG_ISR_OUTPUT_READY_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_RESEED_CNTR_FULL_BIT_SHIFT 0x14UL
+#define DX_RNG_ISR_RESEED_CNTR_FULL_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_RESEED_CNTR_TOP_40_BIT_SHIFT 0x15UL
+#define DX_RNG_ISR_RESEED_CNTR_TOP_40_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_PRNG_CRNGT_ERR_BIT_SHIFT 0x16UL
+#define DX_RNG_ISR_PRNG_CRNGT_ERR_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_REQ_SIZE_BIT_SHIFT 0x17UL
+#define DX_RNG_ISR_REQ_SIZE_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_KAT_ERR_BIT_SHIFT 0x18UL
+#define DX_RNG_ISR_KAT_ERR_BIT_SIZE 0x1UL
+#define DX_RNG_ISR_WHICH_KAT_ERR_BIT_SHIFT 0x19UL
+#define DX_RNG_ISR_WHICH_KAT_ERR_BIT_SIZE 0x2UL
+#define DX_RNG_ICR_REG_OFFSET 0x0108UL
+#define DX_RNG_ICR_EHR_VALID_BIT_SHIFT 0x0UL
+#define DX_RNG_ICR_EHR_VALID_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_AUTOCORR_ERR_BIT_SHIFT 0x1UL
+#define DX_RNG_ICR_AUTOCORR_ERR_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_CRNGT_ERR_BIT_SHIFT 0x2UL
+#define DX_RNG_ICR_CRNGT_ERR_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_VN_ERR_BIT_SHIFT 0x3UL
+#define DX_RNG_ICR_VN_ERR_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_RNG_WATCHDOG_BIT_SHIFT 0x4UL
+#define DX_RNG_ICR_RNG_WATCHDOG_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_RNG_DMA_DONE_BIT_SHIFT 0x5UL
+#define DX_RNG_ICR_RNG_DMA_DONE_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_RESEEDING_DONE_BIT_SHIFT 0x10UL
+#define DX_RNG_ICR_RESEEDING_DONE_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_INSTANTIATION_DONE_BIT_SHIFT 0x11UL
+#define DX_RNG_ICR_INSTANTIATION_DONE_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_FINAL_UPDATE_DONE_BIT_SHIFT 0x12UL
+#define DX_RNG_ICR_FINAL_UPDATE_DONE_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_OUTPUT_READY_BIT_SHIFT 0x13UL
+#define DX_RNG_ICR_OUTPUT_READY_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_RESEED_CNTR_FULL_BIT_SHIFT 0x14UL
+#define DX_RNG_ICR_RESEED_CNTR_FULL_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_RESEED_CNTR_TOP_40_BIT_SHIFT 0x15UL
+#define DX_RNG_ICR_RESEED_CNTR_TOP_40_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_PRNG_CRNGT_ERR_BIT_SHIFT 0x16UL
+#define DX_RNG_ICR_PRNG_CRNGT_ERR_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_REQ_SIZE_BIT_SHIFT 0x17UL
+#define DX_RNG_ICR_REQ_SIZE_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_KAT_ERR_BIT_SHIFT 0x18UL
+#define DX_RNG_ICR_KAT_ERR_BIT_SIZE 0x1UL
+#define DX_RNG_ICR_WHICH_KAT_ERR_BIT_SHIFT 0x19UL
+#define DX_RNG_ICR_WHICH_KAT_ERR_BIT_SIZE 0x2UL
+#define DX_TRNG_CONFIG_REG_OFFSET 0x010CUL
+#define DX_TRNG_CONFIG_RND_SRC_SEL_BIT_SHIFT 0x0UL
+#define DX_TRNG_CONFIG_RND_SRC_SEL_BIT_SIZE 0x2UL
+#define DX_TRNG_CONFIG_SOP_SEL_BIT_SHIFT 0x2UL
+#define DX_TRNG_CONFIG_SOP_SEL_BIT_SIZE 0x1UL
+#define DX_TRNG_VALID_REG_OFFSET 0x0110UL
+#define DX_TRNG_VALID_VALUE_BIT_SHIFT 0x0UL
+#define DX_TRNG_VALID_VALUE_BIT_SIZE 0x1UL
+#define DX_EHR_DATA_0_REG_OFFSET 0x0114UL
+#define DX_EHR_DATA_0_VALUE_BIT_SHIFT 0x0UL
+#define DX_EHR_DATA_0_VALUE_BIT_SIZE 0x20UL
+#define DX_EHR_DATA_1_REG_OFFSET 0x0118UL
+#define DX_EHR_DATA_1_VALUE_BIT_SHIFT 0x0UL
+#define DX_EHR_DATA_1_VALUE_BIT_SIZE 0x20UL
+#define DX_EHR_DATA_2_REG_OFFSET 0x011CUL
+#define DX_EHR_DATA_2_VALUE_BIT_SHIFT 0x0UL
+#define DX_EHR_DATA_2_VALUE_BIT_SIZE 0x20UL
+#define DX_EHR_DATA_3_REG_OFFSET 0x0120UL
+#define DX_EHR_DATA_3_VALUE_BIT_SHIFT 0x0UL
+#define DX_EHR_DATA_3_VALUE_BIT_SIZE 0x20UL
+#define DX_EHR_DATA_4_REG_OFFSET 0x0124UL
+#define DX_EHR_DATA_4_VALUE_BIT_SHIFT 0x0UL
+#define DX_EHR_DATA_4_VALUE_BIT_SIZE 0x20UL
+#define DX_EHR_DATA_5_REG_OFFSET 0x0128UL
+#define DX_EHR_DATA_5_VALUE_BIT_SHIFT 0x0UL
+#define DX_EHR_DATA_5_VALUE_BIT_SIZE 0x20UL
+#define DX_RND_SOURCE_ENABLE_REG_OFFSET 0x012CUL
+#define DX_RND_SOURCE_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_RND_SOURCE_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_SAMPLE_CNT1_REG_OFFSET 0x0130UL
+#define DX_SAMPLE_CNT1_VALUE_BIT_SHIFT 0x0UL
+#define DX_SAMPLE_CNT1_VALUE_BIT_SIZE 0x20UL
+#define DX_AUTOCORR_STATISTIC_REG_OFFSET 0x0134UL
+#define DX_AUTOCORR_STATISTIC_AUTOCORR_TRYS_BIT_SHIFT 0x0UL
+#define DX_AUTOCORR_STATISTIC_AUTOCORR_TRYS_BIT_SIZE 0xEUL
+#define DX_AUTOCORR_STATISTIC_AUTOCORR_FAILS_BIT_SHIFT 0xEUL
+#define DX_AUTOCORR_STATISTIC_AUTOCORR_FAILS_BIT_SIZE 0x8UL
+#define DX_TRNG_DEBUG_CONTROL_REG_OFFSET 0x0138UL
+#define DX_TRNG_DEBUG_CONTROL_VNC_BYPASS_BIT_SHIFT 0x1UL
+#define DX_TRNG_DEBUG_CONTROL_VNC_BYPASS_BIT_SIZE 0x1UL
+#define DX_TRNG_DEBUG_CONTROL_TRNG_CRNGT_BYPASS_BIT_SHIFT 0x2UL
+#define DX_TRNG_DEBUG_CONTROL_TRNG_CRNGT_BYPASS_BIT_SIZE 0x1UL
+#define DX_TRNG_DEBUG_CONTROL_AUTO_CORRELATE_BYPASS_BIT_SHIFT 0x3UL
+#define DX_TRNG_DEBUG_CONTROL_AUTO_CORRELATE_BYPASS_BIT_SIZE 0x1UL
+#define DX_RNG_SW_RESET_REG_OFFSET 0x0140UL
+#define DX_RNG_SW_RESET_VALUE_BIT_SHIFT 0x0UL
+#define DX_RNG_SW_RESET_VALUE_BIT_SIZE 0x1UL
+#define DX_RNG_DEBUG_EN_INPUT_REG_OFFSET 0x01B4UL
+#define DX_RNG_DEBUG_EN_INPUT_VALUE_BIT_SHIFT 0x0UL
+#define DX_RNG_DEBUG_EN_INPUT_VALUE_BIT_SIZE 0x1UL
+#define DX_RNG_BUSY_REG_OFFSET 0x01B8UL
+#define DX_RNG_BUSY_RNG_BUSY_BIT_SHIFT 0x0UL
+#define DX_RNG_BUSY_RNG_BUSY_BIT_SIZE 0x1UL
+#define DX_RNG_BUSY_TRNG_BUSY_BIT_SHIFT 0x1UL
+#define DX_RNG_BUSY_TRNG_BUSY_BIT_SIZE 0x1UL
+#define DX_RNG_BUSY_PRNG_BUSY_BIT_SHIFT 0x2UL
+#define DX_RNG_BUSY_PRNG_BUSY_BIT_SIZE 0x1UL
+#define DX_RST_BITS_COUNTER_REG_OFFSET 0x01BCUL
+#define DX_RST_BITS_COUNTER_VALUE_BIT_SHIFT 0x0UL
+#define DX_RST_BITS_COUNTER_VALUE_BIT_SIZE 0x1UL
+#define DX_RNG_VERSION_REG_OFFSET 0x01C0UL
+#define DX_RNG_VERSION_EHR_WIDTH_192_BIT_SHIFT 0x0UL
+#define DX_RNG_VERSION_EHR_WIDTH_192_BIT_SIZE 0x1UL
+#define DX_RNG_VERSION_CRNGT_EXISTS_BIT_SHIFT 0x1UL
+#define DX_RNG_VERSION_CRNGT_EXISTS_BIT_SIZE 0x1UL
+#define DX_RNG_VERSION_AUTOCORR_EXISTS_BIT_SHIFT 0x2UL
+#define DX_RNG_VERSION_AUTOCORR_EXISTS_BIT_SIZE 0x1UL
+#define DX_RNG_VERSION_TRNG_TESTS_BYPASS_EN_BIT_SHIFT 0x3UL
+#define DX_RNG_VERSION_TRNG_TESTS_BYPASS_EN_BIT_SIZE 0x1UL
+#define DX_RNG_VERSION_PRNG_EXISTS_BIT_SHIFT 0x4UL
+#define DX_RNG_VERSION_PRNG_EXISTS_BIT_SIZE 0x1UL
+#define DX_RNG_VERSION_KAT_EXISTS_BIT_SHIFT 0x5UL
+#define DX_RNG_VERSION_KAT_EXISTS_BIT_SIZE 0x1UL
+#define DX_RNG_VERSION_RESEEDING_EXISTS_BIT_SHIFT 0x6UL
+#define DX_RNG_VERSION_RESEEDING_EXISTS_BIT_SIZE 0x1UL
+#define DX_RNG_VERSION_RNG_USE_5_SBOXES_BIT_SHIFT 0x7UL
+#define DX_RNG_VERSION_RNG_USE_5_SBOXES_BIT_SIZE 0x1UL
+#define DX_RNG_CLK_ENABLE_REG_OFFSET 0x01C4UL
+#define DX_RNG_CLK_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_RNG_CLK_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_RNG_DMA_ENABLE_REG_OFFSET 0x01C8UL
+#define DX_RNG_DMA_ENABLE_VALUE_BIT_SHIFT 0x0UL
+#define DX_RNG_DMA_ENABLE_VALUE_BIT_SIZE 0x1UL
+#define DX_RNG_DMA_SRC_MASK_REG_OFFSET 0x01CCUL
+#define DX_RNG_DMA_SRC_MASK_EN_SRC_SEL0_BIT_SHIFT 0x0UL
+#define DX_RNG_DMA_SRC_MASK_EN_SRC_SEL0_BIT_SIZE 0x1UL
+#define DX_RNG_DMA_SRC_MASK_EN_SRC_SEL1_BIT_SHIFT 0x1UL
+#define DX_RNG_DMA_SRC_MASK_EN_SRC_SEL1_BIT_SIZE 0x1UL
+#define DX_RNG_DMA_SRC_MASK_EN_SRC_SEL2_BIT_SHIFT 0x2UL
+#define DX_RNG_DMA_SRC_MASK_EN_SRC_SEL2_BIT_SIZE 0x1UL
+#define DX_RNG_DMA_SRC_MASK_EN_SRC_SEL3_BIT_SHIFT 0x3UL
+#define DX_RNG_DMA_SRC_MASK_EN_SRC_SEL3_BIT_SIZE 0x1UL
+#define DX_RNG_DMA_SRAM_ADDR_REG_OFFSET 0x01D0UL
+#define DX_RNG_DMA_SRAM_ADDR_VALUE_BIT_SHIFT 0x0UL
+#define DX_RNG_DMA_SRAM_ADDR_VALUE_BIT_SIZE 0xBUL
+#define DX_RNG_DMA_SAMPLES_NUM_REG_OFFSET 0x01D4UL
+#define DX_RNG_DMA_SAMPLES_NUM_VALUE_BIT_SHIFT 0x0UL
+#define DX_RNG_DMA_SAMPLES_NUM_VALUE_BIT_SIZE 0x8UL
+#define DX_RNG_WATCHDOG_VAL_REG_OFFSET 0x01D8UL
+#define DX_RNG_WATCHDOG_VAL_VALUE_BIT_SHIFT 0x0UL
+#define DX_RNG_WATCHDOG_VAL_VALUE_BIT_SIZE 0x20UL
+#define DX_RNG_DMA_STATUS_REG_OFFSET 0x01DCUL
+#define DX_RNG_DMA_STATUS_RNG_DMA_BUSY_BIT_SHIFT 0x0UL
+#define DX_RNG_DMA_STATUS_RNG_DMA_BUSY_BIT_SIZE 0x1UL
+#define DX_RNG_DMA_STATUS_DMA_SRC_SEL_BIT_SHIFT 0x1UL
+#define DX_RNG_DMA_STATUS_DMA_SRC_SEL_BIT_SIZE 0x2UL
+#define DX_RNG_DMA_STATUS_NUM_OF_SAMPLES_BIT_SHIFT 0x3UL
+#define DX_RNG_DMA_STATUS_NUM_OF_SAMPLES_BIT_SIZE 0x8UL
+#endif //__DX_RNG_H__
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/mps2.cm33/dx_reg_base_host.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/mps2.cm33/dx_reg_base_host.h
new file mode 100644
index 0000000..54f0413
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/mps2.cm33/dx_reg_base_host.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __DX_REG_BASE_HOST_H__
+#define __DX_REG_BASE_HOST_H__
+
+/* Identify platform: ARM MPS2 PLUS */
+#define DX_PLAT_MPS2_PLUS 1
+
+#define DX_BASE_CC 0x50088000
+#define DX_BASE_CODE 0x1E000000
+
+#define DX_BASE_ENV_REGS 0x400A8000
+#define DX_BASE_ENV_NVM_LOW 0x400AA000
+#define DX_BASE_ENV_NVM_HI 0x400AB000
+#define DX_BASE_ENV_PERF_RAM 0x400A9000
+
+#define DX_BASE_HOST_RGF 0x0UL
+#define DX_BASE_CRY_KERNEL 0x0UL
+
+#define DX_BASE_RNG 0x0000UL
+
+#endif /*__DX_REG_BASE_HOST_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/mps2/dx_reg_base_host.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/mps2/dx_reg_base_host.h
new file mode 100644
index 0000000..ac957b0
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/mps2/dx_reg_base_host.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __DX_REG_BASE_HOST_H__
+#define __DX_REG_BASE_HOST_H__
+
+/* Identify platform: ARM MPS2 PLUS */
+#define DX_PLAT_MPS2_PLUS 1
+
+#define DX_BASE_CC 0x50010000
+#define DX_BASE_CODE 0x50030000
+
+#define DX_BASE_ENV_REGS 0x50028000
+#define DX_BASE_ENV_NVM_LOW 0x5002A000
+#define DX_BASE_ENV_NVM_HI 0x5002B000
+#define DX_BASE_ENV_PERF_RAM 0x40009000
+
+#define DX_BASE_HOST_RGF 0x0UL
+#define DX_BASE_CRY_KERNEL 0x0UL
+
+#define DX_BASE_RNG 0x0000UL
+#endif /*__DX_REG_BASE_HOST_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/musca_b1/dx_reg_base_host.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/musca_b1/dx_reg_base_host.h
new file mode 100644
index 0000000..1d97bf1
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/musca_b1/dx_reg_base_host.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __DX_REG_BASE_HOST_H__
+#define __DX_REG_BASE_HOST_H__
+
+/* Identify platform: ARM MUSCA_B1 */
+#define DX_PLAT_MUSCA_B1 1
+
+#define DX_BASE_CC 0x50088000
+#define DX_BASE_CODE 0x50030000 //# not used
+
+#define DX_BASE_ENV_REGS 0x500A0000 //TODO need confirm
+
+#define DX_BASE_HOST_RGF 0x0UL
+#define DX_BASE_CRY_KERNEL 0x0UL
+
+#define DX_BASE_RNG 0x0000UL
+#endif /*__DX_REG_BASE_HOST_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/hw/include/zynq/dx_reg_base_host.h b/lib/ext/cryptocell-312-runtime/shared/hw/include/zynq/dx_reg_base_host.h
new file mode 100644
index 0000000..001de06
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/hw/include/zynq/dx_reg_base_host.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef __DX_REG_BASE_HOST_H__
+#define __DX_REG_BASE_HOST_H__
+
+/* Identify platform: Xilinx Zynq7000 ZC706 */
+#define DX_PLAT_ZYNQ7000 1
+#define DX_PLAT_ZYNQ7000_ZC706 1
+
+#define DX_BASE_CC 0x60000000
+
+#define DX_BASE_ENV_REGS 0x40008000
+#define DX_BASE_ENV_CC_MEMORIES 0x40008000
+#define DX_BASE_ENV_PERF_RAM 0x40009000
+
+#define DX_BASE_HOST_RGF 0x0UL
+#define DX_BASE_CRY_KERNEL 0x0UL
+#define DX_BASE_ROM 0x40000000
+
+#define DX_BASE_RNG 0x0000UL
+#endif /*__DX_REG_BASE_HOST_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_bitops.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_bitops.h
new file mode 100644
index 0000000..d1b60c5
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_bitops.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*! @file
+@brief This file defines bit-field operations macros.
+*/
+
+#ifndef _CC_BITOPS_H_
+#define _CC_BITOPS_H_
+
+
+/*! Defintion of number of 32bit maximum value. */
+#define CC_32BIT_MAX_VALUE (0xFFFFFFFFUL)
+
+/*! Definition for bitmask */
+#define BITMASK(mask_size) (((mask_size) < 32) ? \
+ ((1UL << (mask_size)) - 1) : 0xFFFFFFFFUL)
+/*! Definition for bitmask in a given offset. */
+#define BITMASK_AT(mask_size, mask_offset) (BITMASK(mask_size) << (mask_offset))
+
+/*! Definition for getting bits value from a word. */
+#define BITFIELD_GET(word, bit_offset, bit_size) \
+ (((word) >> (bit_offset)) & BITMASK(bit_size))
+/*! Definition for setting bits value from a word. */
+#define BITFIELD_SET(word, bit_offset, bit_size, new_val) do { \
+ word = ((word) & ~BITMASK_AT(bit_size, bit_offset)) | \
+ (((new_val) & BITMASK(bit_size)) << (bit_offset)); \
+} while (0)
+
+/*!Definition for is val aligned to "align" ("align" must be power of 2). */
+#ifndef IS_ALIGNED
+#define IS_ALIGNED(val, align) \
+ (((uintptr_t)(val) & ((align) - 1)) == 0)
+#endif
+/*!Definition swap endianity for 32 bits word. */
+#define SWAP_ENDIAN(word) \
+ (((word) >> 24) | (((word) & 0x00FF0000) >> 8) | \
+ (((word) & 0x0000FF00) << 8) | (((word) & 0x000000FF) << 24))
+
+#ifdef BIG__ENDIAN
+#define SWAP_TO_LE(word) SWAP_ENDIAN(word)
+#define SWAP_TO_BE(word) word
+#else
+/*! Definition for swapping to LE. */
+#define SWAP_TO_LE(word) word
+/*! Definition for swapping to BE. */
+#define SWAP_TO_BE(word) SWAP_ENDIAN(word)
+#endif
+
+/*!Align X to uint32_t size. */
+#ifndef ALIGN_TO_4BYTES
+#define ALIGN_TO_4BYTES(x) (((unsigned long)(x) + (CC_32BIT_WORD_SIZE-1)) & ~(CC_32BIT_WORD_SIZE-1))
+#endif
+
+
+
+/*! Definition for is val a multiple of "mult" ("mult" must be power of 2). */
+#define IS_MULT(val, mult) \
+ (((val) & ((mult) - 1)) == 0)
+
+/*! Definition for is NULL address. */
+#define IS_NULL_ADDR(adr) \
+ (!(adr))
+
+#endif /*_CC_BITOPS_H_*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_crypto_ctx.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_crypto_ctx.h
new file mode 100644
index 0000000..9128c71
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_crypto_ctx.h
@@ -0,0 +1,318 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_CRYPTO_CTX_H_
+#define _CC_CRYPTO_CTX_H_
+
+#ifdef __KERNEL__
+#include <linux/types.h>
+#define INT32_MAX 0x7FFFFFFFL
+#else
+#include <stdint.h>
+#endif
+
+
+#ifndef max
+#define max(a, b) ((a) > (b) ? (a) : (b))
+#define min(a, b) ((a) < (b) ? (a) : (b))
+#endif
+
+/* context size */
+#ifndef CC_CTX_SIZE_LOG2
+#if (CC_SUPPORT_SHA > 256)
+#define CC_CTX_SIZE_LOG2 8
+#else
+#define CC_CTX_SIZE_LOG2 7
+#endif
+#endif
+#define CC_CTX_SIZE (1<<CC_CTX_SIZE_LOG2)
+#define CC_DRV_CTX_SIZE_WORDS (CC_CTX_SIZE >> 2)
+
+#define CC_DRV_DES_IV_SIZE 8
+#define CC_DRV_DES_BLOCK_SIZE 8
+
+#define CC_DRV_DES_ONE_KEY_SIZE 8
+#define CC_DRV_DES_DOUBLE_KEY_SIZE 16
+#define CC_DRV_DES_TRIPLE_KEY_SIZE 24
+#define CC_DRV_DES_KEY_SIZE_MAX CC_DRV_DES_TRIPLE_KEY_SIZE
+
+#define CC_AES_IV_SIZE 16
+#define CC_AES_IV_SIZE_WORDS (CC_AES_IV_SIZE >> 2)
+
+#define CC_AES_BLOCK_SIZE 16
+#define CC_AES_BLOCK_SIZE_WORDS 4
+
+#define CC_AES_128_BIT_KEY_SIZE 16
+#define CC_AES_128_BIT_KEY_SIZE_WORDS (CC_AES_128_BIT_KEY_SIZE >> 2)
+#define CC_AES_192_BIT_KEY_SIZE 24
+#define CC_AES_192_BIT_KEY_SIZE_WORDS (CC_AES_192_BIT_KEY_SIZE >> 2)
+#define CC_AES_256_BIT_KEY_SIZE 32
+#define CC_AES_256_BIT_KEY_SIZE_WORDS (CC_AES_256_BIT_KEY_SIZE >> 2)
+#define CC_AES_KEY_SIZE_MAX CC_AES_256_BIT_KEY_SIZE
+#define CC_AES_KEY_SIZE_WORDS_MAX (CC_AES_KEY_SIZE_MAX >> 2)
+
+#define CC_MD5_DIGEST_SIZE 16
+#define CC_SHA1_DIGEST_SIZE 20
+#define CC_SHA224_DIGEST_SIZE 28
+#define CC_SHA256_DIGEST_SIZE 32
+#define CC_SHA256_DIGEST_SIZE_IN_WORDS 8
+#define CC_SHA384_DIGEST_SIZE 48
+#define CC_SHA512_DIGEST_SIZE 64
+
+#define CC_SHA1_BLOCK_SIZE 64
+#define CC_SHA1_BLOCK_SIZE_IN_WORDS 16
+#define CC_MD5_BLOCK_SIZE 64
+#define CC_MD5_BLOCK_SIZE_IN_WORDS 16
+#define CC_SHA224_BLOCK_SIZE 64
+#define CC_SHA256_BLOCK_SIZE 64
+#define CC_SHA256_BLOCK_SIZE_IN_WORDS 16
+#define CC_SHA1_224_256_BLOCK_SIZE 64
+#define CC_SHA384_BLOCK_SIZE 128
+#define CC_SHA512_BLOCK_SIZE 128
+
+#if (CC_SUPPORT_SHA > 256)
+#define CC_DIGEST_SIZE_MAX CC_SHA512_DIGEST_SIZE
+#define CC_HASH_BLOCK_SIZE_MAX CC_SHA512_BLOCK_SIZE /*1024b*/
+#define DRV_HASH_LENGTH_WORDS 4
+#else /* Only up to SHA256 */
+#define CC_DIGEST_SIZE_MAX CC_SHA256_DIGEST_SIZE
+#define CC_HASH_BLOCK_SIZE_MAX CC_SHA256_BLOCK_SIZE /*512b*/
+#define DRV_HASH_LENGTH_WORDS 2
+#endif
+
+#define CC_HMAC_BLOCK_SIZE_MAX CC_HASH_BLOCK_SIZE_MAX
+
+#define CC_MULTI2_SYSTEM_KEY_SIZE 32
+#define CC_MULTI2_DATA_KEY_SIZE 8
+#define CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE (CC_MULTI2_SYSTEM_KEY_SIZE + CC_MULTI2_DATA_KEY_SIZE)
+#define CC_MULTI2_BLOCK_SIZE 8
+#define CC_MULTI2_IV_SIZE 8
+#define CC_MULTI2_MIN_NUM_ROUNDS 8
+#define CC_MULTI2_MAX_NUM_ROUNDS 128
+
+#define CC_DRV_ALG_MAX_BLOCK_SIZE CC_HASH_BLOCK_SIZE_MAX
+
+enum drv_engine_type {
+ DRV_ENGINE_NULL = 0,
+ DRV_ENGINE_AES = 1,
+ DRV_ENGINE_DES = 2,
+ DRV_ENGINE_HASH = 3,
+ DRV_ENGINE_RC4 = 4,
+ DRV_ENGINE_DOUT = 5,
+ DRV_ENGINE_RESERVE32B = INT32_MAX,
+};
+
+enum drv_crypto_alg {
+ DRV_CRYPTO_ALG_NULL = -1,
+ DRV_CRYPTO_ALG_AES = 0,
+ DRV_CRYPTO_ALG_DES = 1,
+ DRV_CRYPTO_ALG_HASH = 2,
+ DRV_CRYPTO_ALG_C2 = 3,
+ DRV_CRYPTO_ALG_HMAC = 4,
+ DRV_CRYPTO_ALG_AEAD = 5,
+ DRV_CRYPTO_ALG_BYPASS = 6,
+ DRV_CRYPTO_ALG_NUM = 7,
+ DRV_CRYPTO_ALG_RESERVE32B = INT32_MAX
+};
+
+enum drv_crypto_direction {
+ DRV_CRYPTO_DIRECTION_NULL = -1,
+ DRV_CRYPTO_DIRECTION_ENCRYPT = 0,
+ DRV_CRYPTO_DIRECTION_DECRYPT = 1,
+ DRV_CRYPTO_DIRECTION_DECRYPT_ENCRYPT = 3,
+ DRV_CRYPTO_DIRECTION_RESERVE32B = INT32_MAX
+};
+
+enum drv_cipher_mode {
+ DRV_CIPHER_NULL_MODE = -1,
+ DRV_CIPHER_ECB = 0,
+ DRV_CIPHER_CBC = 1,
+ DRV_CIPHER_CTR = 2,
+ DRV_CIPHER_CBC_MAC = 3,
+ DRV_CIPHER_XTS = 4,
+ DRV_CIPHER_XCBC_MAC = 5,
+ DRV_CIPHER_OFB = 6,
+ DRV_CIPHER_CMAC = 7,
+ DRV_CIPHER_CCM = 8,
+ DRV_CIPHER_CBC_CTS = 11,
+ DRV_CIPHER_GCTR = 12,
+ DRV_CIPHER_ESSIV = 13,
+ DRV_CIPHER_BITLOCKER = 14,
+ DRV_CIPHER_RESERVE32B = INT32_MAX
+};
+
+enum drv_hash_mode {
+ DRV_HASH_NULL = -1,
+ DRV_HASH_SHA1 = 0,
+ DRV_HASH_SHA256 = 1,
+ DRV_HASH_SHA224 = 2,
+ DRV_HASH_SHA512 = 3,
+ DRV_HASH_SHA384 = 4,
+ DRV_HASH_MD5 = 5,
+ DRV_HASH_CBC_MAC = 6,
+ DRV_HASH_XCBC_MAC = 7,
+ DRV_HASH_CMAC = 8,
+ DRV_HASH_MODE_NUM = 9,
+ DRV_HASH_RESERVE32B = INT32_MAX
+};
+
+enum drv_hash_hw_mode {
+ DRV_HASH_HW_MD5 = 0,
+ DRV_HASH_HW_SHA1 = 1,
+ DRV_HASH_HW_SHA256 = 2,
+ DRV_HASH_HW_SHA224 = 10,
+ DRV_HASH_HW_SHA512 = 4,
+ DRV_HASH_HW_SHA384 = 12,
+ DRV_HASH_HW_GHASH = 6,
+ DRV_HASH_HW_RESERVE32B = INT32_MAX
+};
+
+enum drv_multi2_mode {
+ DRV_MULTI2_NULL = -1,
+ DRV_MULTI2_ECB = 0,
+ DRV_MULTI2_CBC = 1,
+ DRV_MULTI2_OFB = 2,
+ DRV_MULTI2_RESERVE32B = INT32_MAX
+};
+
+
+/* drv_crypto_key_type[1:0] is mapped to cipher_do[1:0] */
+/* drv_crypto_key_type[2] is mapped to cipher_config2 */
+enum drv_crypto_key_type {
+ DRV_NULL_KEY = -1,
+ DRV_USER_KEY = 0, /* 0x000 */
+ DRV_ROOT_KEY = 1, /* 0x001 */
+ DRV_PROVISIONING_KEY = 2, /* 0x010 */
+ DRV_SESSION_KEY = 3, /* 0x011 */
+ DRV_APPLET_KEY = 4, /* NA */
+ DRV_PLATFORM_KEY = 5, /* 0x101 */
+ DRV_CUSTOMER_KEY = 6, /* 0x110 */
+ DRV_END_OF_KEYS = INT32_MAX,
+};
+
+enum drv_crypto_padding_type {
+ DRV_PADDING_NONE = 0,
+ DRV_PADDING_PKCS7 = 1,
+ DRV_PADDING_RESERVE32B = INT32_MAX
+};
+
+
+typedef enum DrvAeadCcmFlow {
+ DRV_AEAD_FLOW_NULL = 0,
+ DRV_AEAD_FLOW_ADATA_INIT,
+ DRV_AEAD_FLOW_ADATA_PROCESS,
+ DRV_AEAD_FLOW_TEXT_DATA_INIT,
+ DRV_AEAD_FLOW_TEXT_DATA_PROCESS,
+ DRV_AEAD_FLOW_RESERVE32B = INT32_MAX,
+} DrvAeadCcmFlow_e;
+
+typedef enum DataBlockType {
+ FIRST_BLOCK,
+ MIDDLE_BLOCK,
+ LAST_BLOCK,
+ RESERVE32B_BLOCK = INT32_MAX
+}DataBlockType_t;
+
+typedef enum DrvAesCoreEngine {
+ DRV_AES_ENGINE1,
+ DRV_AES_ENGINE2,
+ DRV_AES_ENGINES_RESERVE32B = INT32_MAX
+}DrvAesCoreEngine_t;
+
+typedef enum TunnelOp {
+ TUNNEL_OP_INVALID = -1,
+ TUNNEL_OFF = 0,
+ TUNNEL_ON = 1,
+ TunnelOp_OPTIONS,
+ TunnelOp_END = INT32_MAX,
+} TunnelOp_t;
+
+/*******************************************************************/
+/***************** DESCRIPTOR BASED CONTEXTS ***********************/
+/*******************************************************************/
+
+struct drv_ctx_hash {
+ uint8_t digest[CC_DIGEST_SIZE_MAX];
+ uint32_t CurrentDigestedLength[DRV_HASH_LENGTH_WORDS];
+ uint32_t k0[CC_HMAC_BLOCK_SIZE_MAX/sizeof(uint32_t)]; /* not used in hash operation */
+ uint32_t k0_size;
+ enum drv_crypto_alg alg; /* ssi_drv_crypto_alg_HASH */
+ enum drv_hash_mode mode;
+ uint32_t dataCompleted;
+ uint32_t hmacFinalization;
+ /* reserve to end of allocated context size */
+ uint32_t reserved[CC_DRV_CTX_SIZE_WORDS - 5 -
+ DRV_HASH_LENGTH_WORDS - CC_DIGEST_SIZE_MAX/sizeof(uint32_t) - CC_HMAC_BLOCK_SIZE_MAX/sizeof(uint32_t)];
+};
+
+struct drv_ctx_cipher {
+ /* block_state is the AES engine block state.
+ * It is used by the host to pass IV or counter at initialization.
+ * It is used by SeP for intermediate block chaining state and for
+ * returning MAC algorithms results. */
+ uint8_t block_state[CC_AES_BLOCK_SIZE];
+ uint8_t key[CC_AES_KEY_SIZE_MAX];
+ uint8_t xex_key[CC_AES_KEY_SIZE_MAX];
+ enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_AES */
+ enum drv_cipher_mode mode;
+ enum drv_crypto_direction direction;
+ enum drv_crypto_key_type crypto_key_type;
+ enum drv_crypto_padding_type padding_type;
+ uint32_t key_size; /* numeric value in bytes */
+ uint32_t data_unit_size; /* required for XTS */
+ /* this flag indicates whether the user processed at least
+ one data block:
+ "0" no data blocks processed
+ "1" at least one data block processed */
+ DataBlockType_t dataBlockType;
+ TunnelOp_t isTunnelOp;
+ DrvAesCoreEngine_t engineCore;
+ uint32_t tunnetDir;
+ /* reserve to end of allocated context size */
+ uint32_t reserved[CC_DRV_CTX_SIZE_WORDS - 11 -
+ CC_AES_BLOCK_SIZE/sizeof(uint32_t) - 2 *
+ (CC_AES_KEY_SIZE_MAX/sizeof(uint32_t))];
+};
+
+/* authentication and encryption with associated data class */
+struct drv_ctx_aead {
+ /* block_state1/2 is the AES engine block state */
+ uint8_t block_state[CC_AES_BLOCK_SIZE];
+ uint8_t key[CC_AES_KEY_SIZE_MAX];
+ uint8_t mac_state[CC_AES_BLOCK_SIZE]; /* MAC result */
+ uint8_t nonce[CC_AES_BLOCK_SIZE]; /* nonce buffer */
+ enum drv_crypto_alg alg; /* ssi_drv_crypto_alg_AES */
+ enum drv_cipher_mode mode;
+ enum drv_crypto_direction direction;
+ uint32_t key_size; /* numeric value in bytes */
+ uint32_t nonce_size; /* nonce size (octets) */
+ uint32_t header_size; /* finit additional data size (octets) */
+ uint32_t text_size; /* finit text data size (octets) */
+ uint32_t tag_size; /* mac size, element of {4, 6, 8, 10, 12, 14, 16} */
+ uint32_t internalMode; /* auth/encrypt/decrypt modes */
+ uint32_t q; /* an element of {2, 3, 4, 5, 6, 7, 8}; */
+ uint32_t headerRemainingBytes; /* associated data remaining bytes */
+ DrvAeadCcmFlow_e nextProcessingState; /* points to the next machine state */
+ /* reserve to end of allocated context size */
+ uint32_t reserved[CC_DRV_CTX_SIZE_WORDS - 12 -
+ 3 * (CC_AES_BLOCK_SIZE/sizeof(uint32_t)) -
+ CC_AES_KEY_SIZE_MAX/sizeof(uint32_t)];
+};
+
+/*******************************************************************/
+/***************** MESSAGE BASED CONTEXTS **************************/
+/*******************************************************************/
+
+
+/* Get the address of a @member within a given @ctx address
+ @ctx: The context address
+ @type: Type of context structure
+ @member: Associated context field */
+#define GET_CTX_FIELD_ADDR(ctx, type, member) (ctx + offsetof(type, member))
+
+#endif /* _CC_CRYPTO_CTX_H_ */
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_crypto_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_crypto_defs.h
new file mode 100644
index 0000000..6808261
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_crypto_defs.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/** \file
+ * \brief This file contains common cryptographic definitions.
+ *
+ */
+
+#ifndef _CC_CRYPTO_DEFS_H
+#define _CC_CRYPTO_DEFS_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Hash Definitions ******************************/
+
+#define HASH_MD5_DIGEST_SIZE_IN_BYTES 16
+#define HASH_SHA1_DIGEST_SIZE_IN_BYTES 20
+#define HASH_SHA224_DIGEST_SIZE_IN_BYTES 28
+#define HASH_SHA256_DIGEST_SIZE_IN_BYTES 32
+#define HASH_SHA384_DIGEST_SIZE_IN_BYTES 48
+#define HASH_SHA512_DIGEST_SIZE_IN_BYTES 64
+
+#define HASH_MD5_BLOCK_SIZE_IN_BYTES 64
+#define HASH_SHA1_BLOCK_SIZE_IN_BYTES 64
+#define HASH_SHA224_BLOCK_SIZE_IN_BYTES 64
+#define HASH_SHA256_BLOCK_SIZE_IN_BYTES 64
+#define HASH_SHA384_BLOCK_SIZE_IN_BYTES 128
+#define HASH_SHA512_BLOCK_SIZE_IN_BYTES 128
+
+
+
+/************************ AES Definitions ******************************/
+
+#define AES_BLOCK_SIZE_IN_BYTES 16
+
+#define AES_IV_SIZE_IN_BYTES AES_BLOCK_SIZE_IN_BYTES
+
+
+/* AES-CCM Definitions */
+#define AES_CCM_NONCE_LENGTH_MIN 7
+#define AES_CCM_NONCE_LENGTH_MAX 13
+
+#define AES_CCM_TAG_LENGTH_MIN 4
+#define AES_CCM_TAG_LENGTH_MAX 16
+
+
+
+/************************ DES Definitions ******************************/
+
+#define DES_IV_SIZE_IN_BYTES 8
+
+
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_hal.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_hal.h
new file mode 100644
index 0000000..fd52354
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_hal.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef __CC_HAL_H__
+#define __CC_HAL_H__
+
+/*!
+@file
+@brief This file contains HAL definitions and APIs.
+*/
+
+#include <stdint.h>
+#include "cc_hal_plat.h"
+#include "cc_pal_types_plat.h"
+
+/*! HAL return code definitions. */
+typedef enum {
+ CC_HAL_OK = 0,
+ CC_HAL_ENODEV, /* Device not opened or does not exist */
+ CC_HAL_EINTERNAL, /* Internal driver error (check system log) */
+ CC_HAL_MAPFAILED,
+ CC_HAL_ENOTSUP, /* Unsupported function/option */
+ CC_HAL_ENOPERM, /* Not enough permissions for request */
+ CC_HAL_EINVAL, /* Invalid parameters */
+ CC_HAL_ENORSC, /* No resources available (e.g., memory) */
+ CC_HAL_RESERVE32B = 0x7FFFFFFFL
+} CCHalRetCode_t;
+
+/*!
+ * @brief This function is used to map ARM TrustZone CryptoCell TEE registers to Host virtual address space.
+ It is called by ::CC_LibInit, and returns a non-zero value in case of failure.
+ The existing implementation supports Linux environment. In case virtual addressing is not used, the function can be minimized to contain only the
+ following line, and return OK:
+ gCcRegBase = (uint32_t)DX_BASE_CC;
+ @return CC_HAL_OK on success.
+ @return A non-zero value in case of failure.
+*/
+int CC_HalInit(void);
+
+
+/*!
+ * @brief This function is used to wait for the IRR interrupt signal.
+ *
+ * @return CCError_t - return CC_OK upon success
+ */
+CCError_t CC_HalWaitInterrupt(uint32_t data /*!< [in] The interrupt bits to wait upon. */ );
+
+/*!
+ * @brief This function is used to wait for the IRR interrupt signal.
+ * The existing implementation performs a "busy wait" on the IRR.
+ *
+ * @return CCError_t - return CC_OK upon success
+ */
+CCError_t CC_HalWaitInterruptRND(uint32_t data);
+
+/*!
+ * @brief This function clears the DSCRPTR_COMPLETION bit in the ICR signal.
+ */
+void CC_HalClearInterrupt(uint32_t data);
+
+/*!
+ * @brief This function is called by CC_LibInit and is used for initializing the ARM TrustZone CryptoCell TEE cache settings registers.
+ The existing implementation sets the registers to their default values in HCCC cache coherency mode
+ (ARCACHE = 0x2, AWCACHE = 0x7, AWCACHE_LAST = 0x7).
+ These values should be changed by the customer in case the customer's platform requires different HCCC values, or in case SCCC is needed
+ (the values for SCCC are ARCACHE = 0x3, AWCACHE = 0x3, AWCACHE_LAST = 0x3).
+
+ * @return void
+ */
+void CC_HalInitHWCacheParams(void);
+
+/*!
+ * @brief This function is used to unmap ARM TrustZone CryptoCell TEE registers' virtual address.
+ It is called by CC_LibFini, and returns a non-zero value in case of failure.
+ In case virtual addressing is not used, the function can be minimized to be an empty function returning OK.
+ @return CC_HAL_OK on success.
+ @return A non-zero value in case of failure.
+ */
+int CC_HalTerminate(void);
+
+/*!
+ * @brief This function is used to clear the interrupt vector.
+
+ * @return void.
+ */
+void CC_HalClearInterruptBit(uint32_t data /*!< [in] The interrupt bits to clear. */);
+
+/*!
+ * @brief This function is used to mask IRR interrupts.
+
+ * @return void.
+ */
+void CC_HalMaskInterrupt(uint32_t data /*!< [in] The interrupt bits to mask. */);
+
+
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_lli_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_lli_defs.h
new file mode 100644
index 0000000..ff74c8c
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_lli_defs.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_LLI_DEFS_H_
+#define _CC_LLI_DEFS_H_
+#ifdef __KERNEL__
+#include <linux/types.h>
+#else
+#include <stdint.h>
+#endif
+#include "cc_bitops.h"
+
+/* Max DLLI size */
+#define DLLI_SIZE_BIT_SIZE 0x18 // DX_DSCRPTR_QUEUE_WORD1_DIN_SIZE_BIT_SIZE
+
+#define CC_MAX_MLLI_ENTRY_SIZE 0x10000
+
+#define LLI_SET_ADDR(lli_p, addr) \
+ BITFIELD_SET(((uint32_t *)(lli_p))[LLI_WORD0_OFFSET], LLI_LADDR_BIT_OFFSET, LLI_LADDR_BIT_SIZE, (addr & UINT32_MAX)); \
+ BITFIELD_SET(((uint32_t *)(lli_p))[LLI_WORD1_OFFSET], LLI_HADDR_BIT_OFFSET, LLI_HADDR_BIT_SIZE, ((addr >> 32) & UINT16_MAX));
+
+#define LLI_SET_SIZE(lli_p, size) \
+ BITFIELD_SET(((uint32_t *)(lli_p))[LLI_WORD1_OFFSET], LLI_SIZE_BIT_OFFSET, LLI_SIZE_BIT_SIZE, size)
+
+
+/* Size of entry */
+#define LLI_ENTRY_WORD_SIZE 2
+#define LLI_ENTRY_BYTE_SIZE (LLI_ENTRY_WORD_SIZE * sizeof(uint32_t))
+
+/* Word0[31:0] = ADDR[31:0] */
+#define LLI_WORD0_OFFSET 0
+#define LLI_LADDR_BIT_OFFSET 0
+#define LLI_LADDR_BIT_SIZE 32
+/* Word1[31:16] = ADDR[47:32]; Word1[15:0] = SIZE */
+#define LLI_WORD1_OFFSET 1
+#define LLI_SIZE_BIT_OFFSET 0
+#define LLI_SIZE_BIT_SIZE 16
+#define LLI_HADDR_BIT_OFFSET 16
+#define LLI_HADDR_BIT_SIZE 16
+
+
+#endif /*_CC_LLI_DEFS_H_*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_mng/mbedtls_cc_mng.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_mng/mbedtls_cc_mng.h
new file mode 100644
index 0000000..4c4691b
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_mng/mbedtls_cc_mng.h
@@ -0,0 +1,333 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_management
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains all CryptoCell Management APIs and definitions.
+
+ The following terms, used throughout this module, are defined in
+ <em>Arm® v8-M Architecture Reference Manual</em>:
+ <ul><li>Privileged and unprivileged modes.</li>
+ <li>Secure and Non-secure modes.</li></ul>
+ */
+
+
+
+#ifndef _MBEDTLS_CC_MNG_H
+#define _MBEDTLS_CC_MNG_H
+
+/* *********************** Includes ***************************** */
+#include "cc_pal_types_plat.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/* *********************** Defines ***************************** */
+/* LCS. */
+/*! Chip manufacturer (CM LCS). */
+#define CC_MNG_LCS_CM 0x0
+/*! Device manufacturer (DM LCS). */
+#define CC_MNG_LCS_DM 0x1
+/*! Security enabled (Secure LCS). */
+#define CC_MNG_LCS_SEC_ENABLED 0x5
+/*! RMA (RMA LCS). */
+#define CC_MNG_LCS_RMA 0x7
+
+/* *********************** Macros ***************************** */
+
+
+/* *********************** Enums ***************************** */
+/*! RMA statuses. */
+typedef enum {
+ /*! Non-RMA: bit [30] = 0, bit [31] = 0. */
+ CC_MNG_NON_RMA = 0,
+ /*! Pending RMA: bit [30] = 1, bit [31] = 0. */
+ CC_MNG_PENDING_RMA = 1,
+ /*! Illegal state: bit [30] = 0, bit [31] = 1. */
+ CC_MNG_ILLEGAL_STATE = 2,
+ /*! RMA: bit [30] = 1, bit [31] = 1. */
+ CC_MNG_RMA = 3,
+ /*! Reserved. */
+ CC_MNG_END_OF_RMA_STATUS = 0x7FFFFFFF
+}mbedtls_mng_rmastatus;
+
+/*! AES HW key types. */
+typedef enum {
+ /*! Device root key (HUK). */
+ CC_MNG_HUK_KEY = 0,
+ /*! Platform key (Krtl). */
+ CC_MNG_RTL_KEY = 1,
+ /*! ICV provisioning key (Kcp). */
+ CC_MNG_PROV_KEY = 2,
+ /*! OEM code-encryption key (Kce). */
+ CC_MNG_CE_KEY = 3,
+ /*! OEM provisioning key (Kpicv). */
+ CC_MNG_ICV_PROV_KEY = 4,
+ /*! ICV code-encryption key (Kceicv). */
+ CC_MNG_ICV_CE_KEY = 5,
+ /*! Total number of HW Keys. */
+ CC_MNG_TOTAL_HW_KEYS = 6,
+ /*! Reserved. */
+ CC_MNG_END_OF_KEY_TYPE = 0x7FFFFFFF
+}mbedtls_mng_keytype;
+
+/*! APB-C only part IDs. */
+typedef enum {
+ /*! Secure accesses. */
+ CC_MNG_APBC_SEC_ID = 0,
+ /*! Privileged accesses. */
+ CC_MNG_APBC_PRIV_ID = 1,
+ /*! Instruction accesses. */
+ CC_MNG_APBC_INST_ID = 2,
+ /*! Total part IDs. */
+ CC_MNG_APBC_TOTAL_ID = 3,
+ /*! Reserved. */
+ CC_MNG_APBC_END_OF_ID = 0x7FFFFFFF
+}mbedtls_mng_apbc_parts;
+
+/*! APB-C part configuration. */
+typedef enum {
+ /*! Use APB-C as an input when there is no need to change bits.
+ Modify bit = 0. */
+ CC_MNG_APBC_NO_CHANGE = 0,
+ /*! Use APB-C as an input when you need to set the 'Allow' bit to '0' and
+ leave this part unlocked. Modify bit = 1, Allow bit = 0, Allow Lock
+ bit = 0. */
+ CC_MNG_APBC_ALLOW_0_ALLOWLOCK_0 = 1,
+ /*! Use APB-C as an input when you need to set the 'Allow' bit to '0' and
+ lock this part. Modify bit = 1, Allow bit = 0, Allow Lock bit = 1. */
+ CC_MNG_APBC_ALLOW_0_ALLOWLOCK_1 = 2,
+ /*! Use APB-C as an input when you need to set the 'Allow' bit to '1' and
+ leave this part unlocked. Modify bit = 1, Allow bit = 1, Allow Lock
+ bit = 0. */
+ CC_MNG_APBC_ALLOW_1_ALLOWLOCK_0 = 3,
+ /*! Use APB-C as an input when you need to set the 'Allow' bit to '1' and
+ lock this part. Modify bit = 1, Allow bit = 1, Allow Lock bit = 1. */
+ CC_MNG_APBC_ALLOW_1_ALLOWLOCK_1 = 4,
+ /*! Total parts. */
+ CC_MNG_APBC_TOTAL_PARTS_CONFIG = 5,
+ /*! Reserved. */
+ CC_MNG_APBC_END_OF_PARTS_CONFIG = 0x7FFFFFFF
+}mbedtls_mng_apbc_parts_config;
+
+/************************ Typedefs ****************************/
+
+/*! A uint8_t representation for the APB-C parts in the AO_APB_FILTERING
+register. */
+typedef union mbedtls_mng_apbc_part{
+ /*! A representation of the APB-C value in the AO_APB_FILTERING register.*/
+ uint8_t apbcPartVal;
+ /*! A representation of the APB-C parts in the AO_APB_FILTERING register.*/
+ struct {
+ /*! APB-C accepts only 'mbedtls_mng_apbc_parts' accesses. */
+ uint8_t accessAllow : 1;
+ /*! APB-C \p accessAllow cannot be modified. */
+ uint8_t accessAllowLock : 1;
+ /*! User decided to modify the upper couple. */
+ uint8_t accessModify : 1;
+ /*! APB-C part access bits. */
+ uint8_t rfu : 5;
+ }apbcPartBits;
+}mbedtls_mng_apbc_part;
+
+/*! Input to the mbedtls_mng_apbc_config_set() function. */
+typedef union mbedtls_mng_apbcconfig{
+ /*! APB-C configuration values. */
+ uint32_t apbcConfigVal;
+ /*! An array of the configuration bits for the Secure, Privileged, and
+ Instruction parts. */
+ mbedtls_mng_apbc_part apbcPart[CC_MNG_APBC_TOTAL_ID + 1];
+}mbedtls_mng_apbcconfig;
+
+
+/* ****************************************** Public Functions **************************************** */
+/*
+Management APIs enable to set, get or obtain device status by reading or writing the
+appropriate registers or the OTP.
+*/
+/* ********************************************************************************************** */
+/*!
+ @brief This function reads the OTP word of the OEM flags,
+ and returns the OEM RMA flag status: TRUE or FALSE.
+
+ The function returns the value only in DM LCS or Secure LCS.
+ It validates the device RoT configuration, and returns the
+ value only if both HBK0 and HBK1 are supported.
+ Otherwise, it returns FALSE regardless of the OTP status.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_pending_rma_status_get(
+ /*! [out] The RMA status. */
+ uint32_t *rmaStatus
+ );
+
+/*!
+ @brief This function verifies and returns the CryptoCell HW version.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_hw_version_get(
+ /*! [out] The part number. */
+ uint32_t *partNumber,
+ /*! [out] The HW version. */
+ uint32_t *revision
+);
+
+/*!
+ @brief This function sets CryptoCell to Secured mode.
+
+ Setting CryptoCell to Secured mode can only be done while CryptoCell is idle.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_cc_sec_mode_set(
+ /*! [in] True: Set CryptoCell to Secured mode. False: Set CryptoCell
+ to non-Secured mode. */
+ CCBool_t isSecAccessMode,
+ /*! [in] True: Lock CryptoCell to current mode. False: Do not lock
+ CryptoCell to current mode. Allows calling this function again. */
+ CCBool_t isSecModeLock
+);
+
+/*!
+ @brief This function sets CryptoCell to Privileged mode.
+
+ Setting CryptoCell to Privileged mode can only be done while CryptoCell is idle.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_cc_priv_mode_set(
+ /*! [in] True: Set CryptoCell to privileged mode. False: Set
+ CryptoCell to unprivileged mode. */
+ CCBool_t isPrivAccessMode,
+ /*! [in] True: Lock CryptoCell to current mode. False: Do not lock
+ CryptoCell to current mode. Allows calling this function again. */
+ CCBool_t isPrivModeLock
+);
+
+/*!
+ @brief This function sets the shadow register of one of the
+ HW Keys when the device is in CM LCS or DM LCS.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_debug_key_set(
+ /*! [in] The type of the HW key. One of the following values: HUK,
+ Kcp, Kce, Kpicv, or Kceicv. */
+ mbedtls_mng_keytype keyType,
+ /*! [in] A pointer to the buffer holding the HW key. */
+ uint32_t *pHwKey,
+ /*! [in] The size of the HW key in bytes. */
+ size_t keySize
+);
+
+/*!
+ @brief This function retrieves the general configuration from the OTP.
+ See <em>Arm CryptoCell-312 Software Integrators Manual</em>.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_gen_config_get(
+ /*! [out] The OTP configuration word. */
+ uint32_t *pOtpWord
+ );
+
+/*!
+ @brief This function locks the usage of either Kcp, Kce, or both during runtime,
+ in either Secure LCS or RMA LCS.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_oem_key_lock(
+ /*! [in] The flag for locking Kcp usage. */
+ CCBool_t kcpLock,
+ /*! [in] The flag for locking Kce usage. */
+ CCBool_t kceLock
+);
+
+/*!
+ @brief This function sets CryptoCell APB-C into one of the following modes:
+ Secured access mode, Privileged access mode, or Instruction access
+ mode.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_apbc_config_set(
+ /*! Secured access mode. */
+ mbedtls_mng_apbc_parts_config securePartCfg,
+ /*! Privileged access mode.*/
+ mbedtls_mng_apbc_parts_config privPartCfg,
+ /*! Instruction access mode. */
+ mbedtls_mng_apbc_parts_config instPartCfg
+);
+/*!
+ @brief This function requests usage of, or releases, the APB-C.
+
+ @note This function must be called before and after each use of APB-C.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_apbc_access(
+ /*! [in] TRUE: Request usage of APB-C. FALSE: Free APB-C. */
+ CCBool_t isApbcAccessUsed
+ );
+
+/*!
+ @brief This function is called once the external PMU decides to power-down
+ CryptoCell.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_suspend(
+ /*! [in] A pointer to a buffer that can be used for backup. */
+ uint8_t *pBackupBuffer,
+ /*! [in] The size of the backup buffer. Must be at least
+ \c CC_MNG_MIN_BACKUP_SIZE_IN_BYTES. */
+ size_t backupSize
+);
+
+/*!
+ @brief This function is called once the external PMU decides to power-up
+ CryptoCell.
+
+ @return CC_OK on success.
+ @return A non-zero value from mbedtls_cc_mng_error.h on failure.
+ */
+int mbedtls_mng_resume(
+ /*! [in] A pointer to a buffer that can be used for backup. */
+ uint8_t *pBackupBuffer,
+ /*! [in] The size of the backup buffer. Must be at least
+ \c CC_MNG_MIN_BACKUP_SIZE_IN_BYTES. */
+ size_t backupSize
+);
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif // _MBEDTLS_CC_MNG_H
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_mng/mbedtls_cc_mng_error.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_mng/mbedtls_cc_mng_error.h
new file mode 100644
index 0000000..fac6e6b
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_mng/mbedtls_cc_mng_error.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+/*!
+ @addtogroup cc_management_error
+ @{
+*/
+
+/*!
+ @file
+ @brief This file contains the error definitions of the CryptoCell management APIs.
+ */
+
+
+#ifndef _MBEDTLS_CC_MNG_ERROR_H
+#define _MBEDTLS_CC_MNG_ERROR_H
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Defines ******************************/
+
+/* CryptoCell Management module errors. CC_MNG_MODULE_ERROR_BASE = 0x00F02900 */
+
+/*! Illegal input parameter. */
+#define CC_MNG_ILLEGAL_INPUT_PARAM_ERR (CC_MNG_MODULE_ERROR_BASE + 0x00UL)
+/*! Illegal operation. */
+#define CC_MNG_ILLEGAL_OPERATION_ERR (CC_MNG_MODULE_ERROR_BASE + 0x01UL)
+/*! Illegal Peripheral ID. */
+#define CC_MNG_ILLEGAL_PIDR_ERR (CC_MNG_MODULE_ERROR_BASE + 0x02UL)
+/*! Illegal Component ID. */
+#define CC_MNG_ILLEGAL_CIDR_ERR (CC_MNG_MODULE_ERROR_BASE + 0x03UL)
+/*! APB Secure is locked. */
+#define CC_MNG_APB_SECURE_IS_LOCKED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x04UL)
+/*! APB Privilege is locked. */
+#define CC_MNG_APB_PRIVILEGE_IS_LOCKED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x05UL)
+/*! APBC Secure is locked. */
+#define CC_MNG_APBC_SECURE_IS_LOCKED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x06UL)
+/*! APBC Privilege is locked. */
+#define CC_MNG_APBC_PRIVILEGE_IS_LOCKED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x07UL)
+/*! APBC Instruction is locked. */
+#define CC_MNG_APBC_INSTRUCTION_IS_LOCKED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x08UL)
+/*! Invalid Key type. */
+#define CC_MNG_INVALID_KEY_TYPE_ERROR (CC_MNG_MODULE_ERROR_BASE + 0x09UL)
+/*! Illegal size of HUK. */
+#define CC_MNG_ILLEGAL_HUK_SIZE_ERR (CC_MNG_MODULE_ERROR_BASE + 0x0AUL)
+/*! Illegal size for any HW key other than HUK. */
+#define CC_MNG_ILLEGAL_HW_KEY_SIZE_ERR (CC_MNG_MODULE_ERROR_BASE + 0x0BUL)
+/*! HW key is locked. */
+#define CC_MNG_HW_KEY_IS_LOCKED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x0CUL)
+/*! Kcp is locked. */
+#define CC_MNG_KCP_IS_LOCKED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x0DUL)
+/*! Kce is locked. */
+#define CC_MNG_KCE_IS_LOCKED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x0EUL)
+/*! RMA Illegal state. */
+#define CC_MNG_RMA_ILLEGAL_STATE_ERR (CC_MNG_MODULE_ERROR_BASE + 0x0FUL)
+/*! Error returned from AO_APB_FILTERING write operation. */
+#define CC_MNG_AO_APB_WRITE_FAILED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x10UL)
+/*! APBC access failure. */
+#define CC_MNG_APBC_ACCESS_FAILED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x11UL)
+/*! APBC already-off failure. */
+#define CC_MNG_APBC_ACCESS_ALREADY_OFF_ERR (CC_MNG_MODULE_ERROR_BASE + 0x12UL)
+/*! APBC access is on failure. */
+#define CC_MNG_APBC_ACCESS_IS_ON_ERR (CC_MNG_MODULE_ERROR_BASE + 0x13UL)
+/*! PM SUSPEND/RESUME failure. */
+#define CC_MNG_PM_SUSPEND_RESUME_FAILED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x14UL)
+/*! SW version failure. */
+#define CC_MNG_ILLEGAL_SW_VERSION_ERR (CC_MNG_MODULE_ERROR_BASE + 0x15UL)
+/*! Hash Public Key NA. */
+#define CC_MNG_HASH_NOT_PROGRAMMED_ERR (CC_MNG_MODULE_ERROR_BASE + 0x16UL)
+/*! Illegal hash boot key zero count in the OTP error. */
+#define CC_MNG_HBK_ZERO_COUNT_ERR (CC_MNG_MODULE_ERROR_BASE + 0x17UL)
+
+/************************ Enums ********************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Structs *****************************/
+
+/************************ Public Variables *********************/
+
+/************************ Public Functions *********************/
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif // _MBEDTLS_CC_MNG_ERROR_H
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_regs.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_regs.h
new file mode 100644
index 0000000..00e5d74
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_regs.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+/*!
+ * @file
+ * @brief This file contains macro definitions for accessing ARM TrustZone CryptoCell register space.
+ */
+
+#ifndef _CC_REGS_H_
+#define _CC_REGS_H_
+
+#include "cc_bitops.h"
+
+#if !defined(CC_REE) && !defined(CC_IOT) && !defined(CC_SB_SUPPORT_IOT)
+#include "dx_nvm.h"
+#endif
+
+/* Register Offset macro */
+#define CC_REG_OFFSET(unit_name, reg_name) \
+ (DX_BASE_ ## unit_name + DX_ ## reg_name ## _REG_OFFSET)
+
+#define CC_REG_BIT_SHIFT(reg_name, field_name) \
+ (DX_ ## reg_name ## _ ## field_name ## _BIT_SHIFT)
+
+/* Register Offset macros (from registers base address in host) */
+#if defined(CC_REE) || defined(CC_TEE) || defined(CC_IOT) || defined(CC_SB_SUPPORT_IOT)
+
+#include "dx_reg_base_host.h"
+
+/* Read-Modify-Write a field of a register */
+#define MODIFY_REGISTER_FLD(unitName, regName, fldName, fldVal) \
+do { \
+ uint32_t regVal; \
+ regVal = READ_REGISTER(CC_REG_ADDR(unitName, regName)); \
+ CC_REG_FLD_SET(unitName, regName, fldName, regVal, fldVal); \
+ WRITE_REGISTER(CC_REG_ADDR(unitName, regName), regVal); \
+} while (0)
+
+#else
+#error Execution domain is not CC_REE/CC_TEE/CC_IOT
+#endif
+
+/* Registers address macros for ENV registers (development FPGA only) */
+#ifdef DX_BASE_ENV_REGS
+
+/* This offset should be added to mapping address of DX_BASE_ENV_REGS */
+#define CC_ENV_REG_OFFSET(reg_name) (DX_ENV_ ## reg_name ## _REG_OFFSET)
+
+#endif /*DX_BASE_ENV_REGS*/
+
+/*! Bit fields get */
+#define CC_REG_FLD_GET(unit_name, reg_name, fld_name, reg_val) \
+ (DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ? \
+ reg_val /*!< \internal Optimization for 32b fields */ : \
+ BITFIELD_GET(reg_val, DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
+ DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
+
+/*! Bit fields access */
+#define CC_REG_FLD_GET2(unit_name, reg_name, fld_name, reg_val) \
+ (CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ? \
+ reg_val /*!< \internal Optimization for 32b fields */ : \
+ BITFIELD_GET(reg_val, CC_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
+ CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
+
+/*! Bit fields set */
+#define CC_REG_FLD_SET( \
+ unit_name, reg_name, fld_name, reg_shadow_var, new_fld_val) \
+do { \
+ if (DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20) \
+ reg_shadow_var = new_fld_val; /*!< \internal Optimization for 32b fields */\
+ else \
+ BITFIELD_SET(reg_shadow_var, \
+ DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
+ DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE, \
+ new_fld_val); \
+} while (0)
+
+/*! Bit fields set */
+#define CC_REG_FLD_SET2( \
+ unit_name, reg_name, fld_name, reg_shadow_var, new_fld_val) \
+do { \
+ if (CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20) \
+ reg_shadow_var = new_fld_val; /*!< \internal Optimization for 32b fields */\
+ else \
+ BITFIELD_SET(reg_shadow_var, \
+ CC_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
+ CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE, \
+ new_fld_val); \
+} while (0)
+
+/* Usage example:
+ uint32_t reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
+ CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
+ CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
+ WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
+ */
+
+#endif /*_CC_REGS_H_*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_sym_error.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_sym_error.h
new file mode 100644
index 0000000..a808df5
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_sym_error.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __CC_ERROR_H__
+#define __CC_ERROR_H__
+
+#ifdef __KERNEL__
+#include <linux/types.h>
+#define INT32_MAX 0x7FFFFFFFL
+#else
+#include <stdint.h>
+#endif
+
+
+typedef enum CCSymRetCode {
+ CC_RET_OK = 0, /* No error */
+ CC_RET_UNSUPP_ALG, /* Unsupported algorithm */
+ CC_RET_UNSUPP_ALG_MODE, /* Unsupported algorithm mode */
+ CC_RET_UNSUPP_OPERATION, /* Unsupported operation */
+ CC_RET_UNSUPP_HWKEY, /* Unsupported hw key */
+ CC_RET_INV_HWKEY, /* invalid hw key */
+ CC_RET_INVARG, /* Invalid parameter */
+ CC_RET_INVARG_KEY_SIZE, /* Invalid key size */
+ CC_RET_INVARG_CTX_IDX, /* Invalid context index */
+ CC_RET_INVARG_CTX, /* Bad or corrupted context */
+ CC_RET_INVARG_BAD_ADDR, /* Bad address */
+ CC_RET_INVARG_INCONSIST_DMA_TYPE, /* DIN is inconsist with DOUT DMA type */
+ CC_RET_PERM, /* Operation not permitted */
+ CC_RET_NOEXEC, /* Execution format error */
+ CC_RET_BUSY, /* Resource busy */
+ CC_RET_NOMEM, /* Out of memory */
+ CC_RET_OSFAULT, /* Internal TEE_OS error */
+ CCSYMCRYPTO_RET_RESERVE32 = INT32_MAX /* assure this enum is 32b */
+}CCSymRetCode_t;
+
+
+#endif /*__CC_ERROR_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_util/cc_util_asset_prov_int.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/cc_util_asset_prov_int.h
new file mode 100644
index 0000000..a909877
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/cc_util_asset_prov_int.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_UTIL_ASSET_PROV_INT_H
+#define _CC_UTIL_ASSET_PROV_INT_H
+
+/*!
+@file
+@brief This file contains the functions and definitions for the ICV or OEM Asset provisioning in run-time library.
+*/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+#include "cc_pal_types.h"
+#include "cc_bitops.h"
+
+#define CC_ASSET_PROV_MAX_ASSET_SIZE (4*CC_1K_SIZE_IN_BYTES)
+
+#define CC_ASSET_PROV_TOKEN 0x41736574UL
+#define CC_ASSET_PROV_VERSION 0x10000UL
+
+#define CC_ASSET_PROV_NONCE_SIZE 12
+#define CC_ASSET_PROV_RESERVED_SIZE 8
+#define CC_ASSET_PROV_RESERVED_WORD_SIZE (CC_ASSET_PROV_RESERVED_SIZE/CC_32BIT_WORD_SIZE)
+#define CC_ASSET_PROV_TAG_SIZE 16
+#define CC_ASSET_PROV_BLOCK_SIZE 16
+
+#define CC_ASSET_PROV_ADATA_SIZE (3*CC_32BIT_WORD_SIZE+CC_ASSET_PROV_RESERVED_SIZE) // token||version||assetSize||reserved
+
+
+typedef struct {
+ uint32_t token;
+ uint32_t version;
+ uint32_t assetSize;
+ uint32_t reserved[CC_ASSET_PROV_RESERVED_WORD_SIZE];
+ uint8_t nonce[CC_ASSET_PROV_NONCE_SIZE];
+ uint8_t encAsset[CC_ASSET_PROV_MAX_ASSET_SIZE+CC_ASSET_PROV_TAG_SIZE];
+}CCAssetProvPkg_t;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*_CC_UTIL_ASSET_PROV_INT_H*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_util/cc_util_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/cc_util_defs.h
new file mode 100644
index 0000000..c100f6c
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/cc_util_defs.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_UTIL_DEFS_H
+#define _CC_UTIL_DEFS_H
+
+/*!
+@defgroup cc_utils CryptoCell utility APIs
+@{
+@ingroup cryptocell_api
+@brief This group is the utility apis group
+@}
+
+@file
+@brief This file contains CryptoCell Util general definitions.
+@defgroup cc_utils_defs CryptoCell utils general definitions
+@{
+@ingroup cc_utils
+
+*/
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_types_plat.h"
+#include "cc_util_key_derivation_defs.h"
+
+
+/******************************************************************************
+* DEFINITIONS
+******************************************************************************/
+/*! Supported AES key size in bits. */
+#define CC_UTIL_AES_128BIT_SIZE 16 // same as CC_AES_128_BIT_KEY_SIZE
+#define CC_UTIL_AES_192BIT_SIZE 24 // same as CC_AES_192_BIT_KEY_SIZE
+#define CC_UTIL_AES_256BIT_SIZE 32 // same as CC_AES_256_BIT_KEY_SIZE
+/*****************************************/
+/* CMAC derive key definitions*/
+/*****************************************/
+/*! Minimal data size for CMAC derivation operation. */
+#define CC_UTIL_CMAC_DERV_MIN_DATA_IN_SIZE CC_UTIL_FIX_DATA_MIN_SIZE_IN_BYTES+2
+/*! Maximal data size for CMAC derivation operation. */
+#define CC_UTIL_CMAC_DERV_MAX_DATA_IN_SIZE CC_UTIL_MAX_KDF_SIZE_IN_BYTES
+/*! AES CMAC result size in bytes. */
+#define CC_UTIL_AES_CMAC_RESULT_SIZE_IN_BYTES 0x10UL
+/*! AES CMAC result size in words. */
+#define CC_UTIL_AES_CMAC_RESULT_SIZE_IN_WORDS (CC_UTIL_AES_CMAC_RESULT_SIZE_IN_BYTES/sizeof(uint32_t))
+
+/*! Util Error type. */
+typedef uint32_t CCUtilError_t;
+/*! Defines the CMAC result buffer. */
+typedef uint8_t CCUtilAesCmacResult_t[CC_UTIL_AES_CMAC_RESULT_SIZE_IN_BYTES];
+
+
+/*! Key Data. */
+typedef struct CCKeyData_t {
+ uint8_t* pKey; /*!< Pointer to the key. */
+ size_t keySize; /*!< The key size in bytes. */
+}CCKeyData_t;
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif /*_CC_UTIL_DEFS_H*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_util/cc_util_error.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/cc_util_error.h
new file mode 100644
index 0000000..65983ab
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/cc_util_error.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_utils_errors
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the error definitions of the CryptoCell utility APIs.
+ */
+
+#ifndef _CC_UTIL_ERROR_H
+#define _CC_UTIL_ERROR_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/***********************/
+/* Util return codes */
+/***********************/
+/*! Success definition. */
+#define CC_UTIL_OK 0x00UL
+/*! The error base address definition. */
+#define CC_UTIL_MODULE_ERROR_BASE 0x80000000
+/*! Illegal key type. */
+#define CC_UTIL_INVALID_KEY_TYPE (CC_UTIL_MODULE_ERROR_BASE + 0x00UL)
+/*! Illegal data-in pointer. */
+#define CC_UTIL_DATA_IN_POINTER_INVALID_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x01UL)
+/*! Illegal data-in size. */
+#define CC_UTIL_DATA_IN_SIZE_INVALID_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x02UL)
+/*! Illegal data-out pointer. */
+#define CC_UTIL_DATA_OUT_POINTER_INVALID_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x03UL)
+/*! Illegal data-out size. */
+#define CC_UTIL_DATA_OUT_SIZE_INVALID_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x04UL)
+/*! Fatal error. */
+#define CC_UTIL_FATAL_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x05UL)
+/*! Illegal parameters. */
+#define CC_UTIL_ILLEGAL_PARAMS_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x06UL)
+/*! Invalid address given. */
+#define CC_UTIL_BAD_ADDR_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x07UL)
+/*! Illegal domain for endorsement key. */
+#define CC_UTIL_EK_DOMAIN_INVALID_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x08UL)
+/*! HUK is not valid. */
+#define CC_UTIL_KDR_INVALID_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x09UL)
+/*! LCS is not valid. */
+#define CC_UTIL_LCS_INVALID_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x0AUL)
+/*! Session key is not valid. */
+#define CC_UTIL_SESSION_KEY_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x0BUL)
+/*! Illegal user key size. */
+#define CC_UTIL_INVALID_USER_KEY_SIZE (CC_UTIL_MODULE_ERROR_BASE + 0x0DUL)
+/*! Illegal LCS for the required operation. */
+#define CC_UTIL_ILLEGAL_LCS_FOR_OPERATION_ERR (CC_UTIL_MODULE_ERROR_BASE + 0x0EUL)
+/*! Invalid PRF type. */
+#define CC_UTIL_INVALID_PRF_TYPE (CC_UTIL_MODULE_ERROR_BASE + 0x0FUL)
+/*! Invalid hash mode. */
+#define CC_UTIL_INVALID_HASH_MODE (CC_UTIL_MODULE_ERROR_BASE + 0x10UL)
+/*! Unsupported hash mode. */
+#define CC_UTIL_UNSUPPORTED_HASH_MODE (CC_UTIL_MODULE_ERROR_BASE + 0x11UL)
+/*! Key is unusable */
+#define CC_UTIL_KEY_UNUSABLE_ERROR (CC_UTIL_MODULE_ERROR_BASE + 0x12UL)
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif /*_CC_UTIL_ERROR_H*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_util/mbedtls_cc_util_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/mbedtls_cc_util_defs.h
new file mode 100644
index 0000000..b13ed24
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/mbedtls_cc_util_defs.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_utils_defs
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains general definitions of the CryptoCell utility APIs.
+ */
+
+#ifndef _MBEDTLS_CC_UTIL_DEFS_H
+#define _MBEDTLS_CC_UTIL_DEFS_H
+
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_types_plat.h"
+#include "mbedtls_cc_util_key_derivation_defs.h"
+
+
+/******************************************************************************
+* DEFINITIONS
+******************************************************************************/
+/*! The size of the AES 128-bit key in bytes. */
+#define CC_UTIL_AES_128BIT_SIZE 16
+/*! The size of the AES 192-bit key in bytes. */
+#define CC_UTIL_AES_192BIT_SIZE 24
+/*! The size of the AES 256-bit key in bytes. */
+#define CC_UTIL_AES_256BIT_SIZE 32
+/*****************************************/
+/* CMAC derive key definitions*/
+/*****************************************/
+/*! The minimal size of the data for the CMAC derivation operation. */
+#define CC_UTIL_CMAC_DERV_MIN_DATA_IN_SIZE CC_UTIL_FIX_DATA_MIN_SIZE_IN_BYTES+2
+/*! The maximal size of the data for CMAC derivation operation. */
+#define CC_UTIL_CMAC_DERV_MAX_DATA_IN_SIZE CC_UTIL_MAX_KDF_SIZE_IN_BYTES
+/*! The size of the AES CMAC result in bytes. */
+#define CC_UTIL_AES_CMAC_RESULT_SIZE_IN_BYTES 0x10UL
+/*! The size of the AES CMAC result in words. */
+#define CC_UTIL_AES_CMAC_RESULT_SIZE_IN_WORDS (CC_UTIL_AES_CMAC_RESULT_SIZE_IN_BYTES/sizeof(uint32_t))
+
+/*! Util error type. */
+typedef uint32_t CCUtilError_t;
+
+
+
+/*! The key data. */
+typedef struct mbedtls_util_keydata {
+ /*! A pointer to the key. */
+ uint8_t* pKey;
+ /*! The size of the key in bytes. */
+ size_t keySize;
+}mbedtls_util_keydata;
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif /*_MBEDTLS_CC_UTIL_DEFS_H*/
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_util/mbedtls_cc_util_key_derivation.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/mbedtls_cc_util_key_derivation.h
new file mode 100644
index 0000000..18d8b37
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/mbedtls_cc_util_key_derivation.h
@@ -0,0 +1,164 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_utils_key_derivation
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the CryptoCell utility key-derivation function APIs.
+
+ The key-derivation function is defined as specified in the
+ <em>KDF in Counter Mode</em> section in <em>NIST Special Publication
+ 800-108: Recommendation for Key Derivation Using Pseudorandom Functions</em>.
+ */
+
+#ifndef _MBEDTLS_CC_UTIL_KEY_DERIVATION_H
+#define _MBEDTLS_CC_UTIL_KEY_DERIVATION_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+#include "mbedtls_cc_util_defs.h"
+#include "mbedtls_cc_util_key_derivation_defs.h"
+#include "cc_hash_defs.h"
+
+/******************************************************************************
+* DEFINITIONS
+******************************************************************************/
+
+/*! Derivation type of the input key. */
+typedef enum {
+ /*! The user key.*/
+ CC_UTIL_USER_KEY = 0,
+ /*! The device root key (the HUK).*/
+ CC_UTIL_ROOT_KEY = 1,
+ /*! Total number of keys.*/
+ CC_UTIL_TOTAL_KEYS = 2,
+ /*! Reserved.*/
+ CC_UTIL_END_OF_KEY_TYPE = 0x7FFFFFFF
+}mbedtls_util_keytype_t;
+
+/*! Pseudo-random function type for key derivation. */
+typedef enum {
+ /*! The CMAC function.*/
+ CC_UTIL_PRF_CMAC = 0,
+ /*! The HMAC function.*/
+ CC_UTIL_PRF_HMAC = 1,
+ /*! The total number of pseudo-random functions.*/
+ CC_UTIL_TOTAL_PRFS = 2,
+ /*! Reserved.*/
+ CC_UTIL_END_OF_PRF_TYPE = 0x7FFFFFFF
+}mbedtls_util_prftype_t;
+
+
+/*!
+ @brief This function performs key derivation.
+
+ It is defined as specified in the <em>KDF in Counter Mode</em> section in
+ <em>NIST Special Publication 800-108: Recommendation for Key Derivation
+ Using Pseudorandom Functions</em>.
+
+ The derivation is based on length l, label L, context C, and derivation key
+ Ki.
+
+ AES-CMAC or HMAC are used as the pseudo-random function (PRF).
+
+ @note You must define the label and context for each use-case well
+ when using this API.
+
+ @return \c CC_UTIL_OK on success.
+ @return A non-zero value from cc_util_error.h on failure.
+ */
+/* A key-derivation function can iterates n times until l bits of keying material are generated.
+ For each of the iterations of the PRF, i=1 to n, do:
+ result(0) = 0;
+ K(i) = PRF (Ki, [i] || Label || 0x00 || Context || length);
+ results(i) = result(i-1) || K(i);
+
+ concisely, result(i) = K(i) || k(i-1) || .... || k(0)*/
+CCUtilError_t mbedtls_util_key_derivation(
+ /*! [in] The key type that is used as an input to a key-derivation
+ function: \p CC_UTIL_USER_KEY or \p CC_UTIL_ROOT_KEY. */
+ mbedtls_util_keytype_t keyType,
+ /*! [in] A pointer to the key buffer of the user, in case of \p
+ CC_UTIL_USER_KEY. */
+ mbedtls_util_keydata *pUserKey,
+ /*! [in] The PRF type that is used as an input to a key-derivation
+ function: \p CC_UTIL_PRF_CMAC or \p CC_UTIL_PRF_HMAC. */
+ mbedtls_util_prftype_t prfType,
+ /*! [in] One of the supported hash modes that are defined in \p
+ CCHashOperationMode_t. */
+ CCHashOperationMode_t hashMode,
+ /*! [in] A string that identifies the purpose for the derived keying
+ material.*/
+ const uint8_t *pLabel,
+ /*! [in] The label size must be in range of 1 to 64 bytes in length. */
+ size_t labelSize,
+ /*! [in] A binary string containing the information related to the derived
+ keying material. */
+ const uint8_t *pContextData,
+ /*! [in] The context size must be in range of 1 to 64 bytes in length. */
+ size_t contextSize,
+ /*! [out] Keying material output. Must be at least the size of \p
+ derivedKeySize. */
+ uint8_t *pDerivedKey,
+ /*! [in] The size of the derived keying material in bytes, up to 4080
+ bytes. */
+ size_t derivedKeySize
+ );
+
+
+/*!
+ @brief This function performs key derivation using using AES-CMAC.
+
+ It is defined as specified in the <em>KDF in Counter Mode</em> section in
+ <em>NIST Special Publication 800-108: Recommendation for Key Derivation
+ Using Pseudorandom Functions</em>.
+
+ The derivation is based on length l, label L, context C, and derivation key
+ Ki.
+
+ @return \c CC_UTIL_OK on success.
+ @return A non-zero value from cc_util_error.h on failure.
+ */
+#define mbedtls_util_key_derivation_cmac(keyType, pUserKey, pLabel, labelSize, pContextData, contextSize, pDerivedKey, derivedKeySize) \
+ mbedtls_util_key_derivation(keyType, pUserKey, CC_UTIL_PRF_CMAC, CC_HASH_OperationModeLast, pLabel, labelSize, pContextData, contextSize, pDerivedKey, derivedKeySize)
+
+
+/*!
+ @brief This function performs key derivation using HMAC.
+
+ It is defined as specified in the <em>KDF in Counter Mode</em> section in
+ <em>NIST Special Publication 800-108: Recommendation for Key Derivation
+ Using Pseudorandom Functions</em>.
+
+ The derivation is based on length l, label L, context C, and derivation key
+ Ki.
+
+ HMAC is used as the pseudo-random function (PRF).
+
+ @return \c CC_UTIL_OK on success.
+ @return A non-zero value from cc_util_error.h on failure.
+ */
+#define mbedtls_util_key_derivation_hmac(keyType, pUserKey, hashMode, pLabel, labelSize, pContextData, contextSize, pDerivedKey, derivedKeySize) \
+ mbedtls_util_key_derivation(keyType, pUserKey, CC_UTIL_PRF_HMAC, hashMode, pLabel, labelSize, pContextData, contextSize, pDerivedKey, derivedKeySize)
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif /*_MBEDTLS_CC_UTIL_KEY_DERIVATION_H*/
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/cc_util/mbedtls_cc_util_key_derivation_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/mbedtls_cc_util_key_derivation_defs.h
new file mode 100644
index 0000000..4ba96b7
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/cc_util/mbedtls_cc_util_key_derivation_defs.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_utils_key_defs
+ @{
+*/
+
+/*!
+ @file
+ @brief This file contains the definitions for the key-derivation API.
+ */
+
+
+#ifndef _CC_UTIL_KEY_DERIVATION_DEFS_H
+#define _CC_UTIL_KEY_DERIVATION_DEFS_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/******************************************************************************
+* DEFINITIONS
+******************************************************************************/
+
+/*! The maximal length of the label in bytes. */
+#define CC_UTIL_MAX_LABEL_LENGTH_IN_BYTES 64
+/*! The maximal length of the context in bytes. */
+#define CC_UTIL_MAX_CONTEXT_LENGTH_IN_BYTES 64
+/*! The minimal size of the fixed data in bytes. */
+#define CC_UTIL_FIX_DATA_MIN_SIZE_IN_BYTES 3 /*!< \internal counter, 0x00, lengt(-0xff) */
+/*! The maximal size of the fixed data in bytes. */
+#define CC_UTIL_FIX_DATA_MAX_SIZE_IN_BYTES 4 /*!< \internal counter, 0x00, lengt(0x100-0xff0) */
+/*! The maximal size of the derived-key material in bytes. */
+#define CC_UTIL_MAX_KDF_SIZE_IN_BYTES (CC_UTIL_MAX_LABEL_LENGTH_IN_BYTES+CC_UTIL_MAX_CONTEXT_LENGTH_IN_BYTES+CC_UTIL_FIX_DATA_MAX_SIZE_IN_BYTES)
+/*! The maximal size of the derived-key in bytes. */
+#define CC_UTIL_MAX_DERIVED_KEY_SIZE_IN_BYTES 4080
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+*/
+#endif /*_CC_UTIL_KEY_DERIVATION_DEFS_H*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_aes_defs_proj.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_aes_defs_proj.h
new file mode 100644
index 0000000..d2e9cd6
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_aes_defs_proj.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_aes_defs_proj
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains project definitions that are used for CryptoCell
+ AES APIs.
+ */
+
+#ifndef CC_AES_DEFS_PROJ_H
+#define CC_AES_DEFS_PROJ_H
+
+#include "cc_pal_types.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+/*! The size of the context prototype of the user in words.
+See ::CCAesUserContext_t.*/
+#define CC_AES_USER_CTX_SIZE_IN_WORDS (4+8+8+4)
+
+/*! The maximal size of the AES key in words. */
+#define CC_AES_KEY_MAX_SIZE_IN_WORDS 8
+/*! The maximal size of the AES key in bytes. */
+#define CC_AES_KEY_MAX_SIZE_IN_BYTES (CC_AES_KEY_MAX_SIZE_IN_WORDS * sizeof(uint32_t))
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+/*!
+ @}
+ */
+
+#endif /* #ifndef CC_AES_DEFS_PROJ_H */
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_ec_edw_api.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_ec_edw_api.h
new file mode 100644
index 0000000..291c18c
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_ec_edw_api.h
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_EC_EDW_API_H
+#define _CC_EC_EDW_API_H
+
+#include "cc_pal_types.h"
+#include "cc_hash_defs.h"
+#include "cc_rnd_common.h"
+#include "cc_pka_defs_hw.h"
+#include "cc_bitops.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*!
+@file
+@brief This file contains the CryptoCell APIs used for EC EDW (Edwards) ed25519 algorithms.
+@defgroup cryptocell_ec CryptoCell EC 25519 curve APIs
+@{
+@ingroup cryptocell_api
+
+
+@note Algorithms of Montgomery and Edwards elliptic curves cryptography were developed by
+ Daniel.J.Bernstein.
+*/
+
+/*! EC Edwards ed25519 modulus and order sizes in bits, words and bytes. */
+/*! EC Edwards modulus size in bits. */
+#define CC_EC_EDW_MOD_SIZE_IN_BITS 255U /*!<\internal MOD - EC Edw modulus size*/
+/*! EC Edwards order size in bits. */
+#define CC_EC_EDW_ORD_SIZE_IN_BITS 255U /*!<\internal ORD - EC Edw generator order size*/
+/*! EC Edwards modulus size in words. */
+#define CC_EC_EDW_MOD_SIZE_IN_32BIT_WORDS ((CC_EC_EDW_MOD_SIZE_IN_BITS + CC_BITS_IN_32BIT_WORD - 1) / CC_BITS_IN_32BIT_WORD)
+/*! EC Edwards modulus size in bytes. */
+#define CC_EC_EDW_MOD_SIZE_IN_BYTES (CC_EC_EDW_MOD_SIZE_IN_32BIT_WORDS * CC_32BIT_WORD_SIZE)
+/*! EC Edwards order size in words. */
+#define CC_EC_EDW_ORD_SIZE_IN_32BIT_WORDS ((CC_EC_EDW_MOD_SIZE_IN_BITS + CC_BITS_IN_32BIT_WORD - 1) / CC_BITS_IN_32BIT_WORD)
+/*! EC Edwards order size in bytes. */
+#define CC_EC_EDW_ORD_SIZE_IN_BYTES (CC_EC_EDW_ORD_SIZE_IN_32BIT_WORDS * CC_32BIT_WORD_SIZE)
+
+/*! Constant sizes of special EC_MONT buffers and arrays */
+/*! EC Edwards seed size in bytes. */
+#define CC_EC_EDW_SEED_BYTES CC_EC_EDW_MOD_SIZE_IN_BYTES
+/*! EC Edwards secret key size in bytes. */
+#define CC_EC_EDW_SECRET_KEY_BYTES (2 * CC_EC_EDW_MOD_SIZE_IN_BYTES)
+/*! EC Edwards signatue size in bytes. */
+#define CC_EC_EDW_SIGNATURE_BYTES (2 * CC_EC_EDW_ORD_SIZE_IN_BYTES)
+/*! EC Edwards scalar size in bytes. */
+#define CC_EC_EDW_SCALARBYTES CC_EC_EDW_ORD_SIZE_IN_BYTES
+/*! EC Edwards scalar multiplication size in bytes. */
+#define CC_EC_EDW_SCALARMULTBYTES CC_EC_EDW_MOD_SIZE_IN_BYTES
+
+/*! EC_EDW temp buffer size definition. */
+#define CC_EC_EDW_TEMP_BUFF_SIZE_IN_32BIT_WORD (10*CC_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS + (sizeof(CCHashUserContext_t)+CC_32BIT_WORD_SIZE-1)/CC_32BIT_WORD_SIZE)
+
+/*! EC_EDW temp buffer type definition. */
+typedef struct {
+ /*! Internal buffer. */
+ uint32_t buff[CC_EC_EDW_TEMP_BUFF_SIZE_IN_32BIT_WORD];
+ } CCEcEdwTempBuff_t;
+
+
+
+/******************************************************************************/
+/*!
+@brief The function creates EC Edwards signature on the message.
+\note Used detached form of signature, separated from the message.
+ Implemented algorithm of Bernstein D. etc. sign ed25519.
+
+@return CC_OK on success,
+@return A non-zero value on failure as defined cc_ec_mont_edw_error.h or cc_hash_error.h.
+*/
+CIMPORT_C CCError_t CC_EcEdwSign (
+ uint8_t *pSign, /*!< [out] Pointer to the detached signature. */
+ size_t *pSignSize, /*!< [in/out] Pointer to the total size of the signature ;
+ In - the buffer size, which (must be at least 2*EC order size);
+ Out - the actual size of output data. */
+ const uint8_t *pMsg, /*!< [in] Pointer to the message. */
+ size_t msgSize, /*!< [in] Message size in bytes: must be less, than
+ (CC_HASH_UPDATE_DATA_MAX_SIZE_IN_BYTES - 2*(EC_EDW modulus size)). */
+ const uint8_t *pSignSecrKey, /*!< [in] Pointer to the signer secret key (seed || pulKey) */
+ size_t secrKeySize, /*!< [in] Size of signer secret key in bytes: (must be 2*EC order size). */
+ CCEcEdwTempBuff_t *pTempBuff /*!< [in] pointer to the temp buffer. */);
+
+
+
+/******************************************************************************/
+/*!
+@brief The function verifies the EC Edwards ed25519 signature on the message.
+\note The input signature is in detached form, i.e. separated from the message.
+
+@return CC_OK on success,
+@return A non-zero value on failure as defined cc_ec_mont_edw_error.h or cc_hash_error.h.
+*/
+CIMPORT_C CCError_t CC_EcEdwVerify(
+ const uint8_t *pSign, /*!< [in] Pointer to detached signature, i.e. the
+ signature is separated from the message. */
+ size_t signSize, /*!< [in] Size of the signature in bytes, it must be
+ equal to two EC Order size in bytes. */
+ const uint8_t *pSignPublKey, /*!< [in] Pointer to signer public key. */
+ size_t publKeySize, /*!< [in] Size of the signer public key in bytes; must be
+ equal to EC modulus size. */
+ uint8_t *pMsg, /*!< [in] Pointer to the message. */
+ size_t msgSize, /*!< [in] Pointer to the message size in bytes. Must be less than
+ (CC_HASH_UPDATE_DATA_MAX_SIZE_IN_BYTES - 2*(EC_EDW modulus size)). */
+ CCEcEdwTempBuff_t *pEcEdwTempBuff /*!< [in] Pointer to temp buffer. */);
+
+
+
+/*******************************************************************/
+/*!
+@brief The function randomly generates Ec ed25519 private and public keys
+ using given seed.
+ The generation is performed using EC Edwards ed25519 algorithm.
+
+@return CC_OK on success,
+@return A non-zero value on failure as defined cc_ec_mont_edw_error.h or cc_hash_error.h.
+*/
+CIMPORT_C CCError_t CC_EcEdwSeedKeyPair (
+ const uint8_t *pSeed, /*!< [in] Pointer to the given seed. */
+ size_t seedSize, /*!< [in] Size of the seed in bytes, must be equal the EC order size
+ in bytes. */
+ uint8_t *pSecrKey, /*!< [out] Pointer to the secret key, including the seed, concatenated
+ with the public key. */
+ size_t *pSecrKeySize, /*!< [in/out] Pointer to the size of the secret key buffer in bytes
+ (must be at least 2*EC order size). */
+ uint8_t *pPublKey, /*!< [out] Pointer to the public key. */
+ size_t *pPublKeySize, /*!< [in/out] Pointer to the size of the public key in bytes.
+ In - the size of buffer must be at least EC modulus size;
+ Out - the actual size. */
+ CCEcEdwTempBuff_t *pTempBuff /*!< [in] Pointer to the temp buffer, for internal use. */);
+
+/*******************************************************************/
+/*!
+ @brief The function randomly generates the EC Edwards ed25519 private and
+ public keys.
+ The generation is performed using EC Edwards ed25519 algorithm.
+
+@return CC_OK on success,
+@return A non-zero value on failure as defined cc_ec_mont_edw_error.h, cc_hash_error.h or cc_rnd_error.
+*/
+CIMPORT_C CCError_t CC_EcEdwKeyPair (
+ uint8_t *pSecrKey, /*!< [out] Pointer to the secret key (including seed and public key). */
+ size_t *pSecrKeySize, /*!< [in/out] Pointer to the size of the secret key in bytes,
+ (must be at least 2*EC order size). */
+ uint8_t *pPublKey, /*!< [out] Pointer to the public key. */
+ size_t *pPublKeySize, /*!< [in/out] - Pointer to the size of the public key in bytes.
+ In - the size of buffer must be at least EC modulus size;
+ Out - the actual size. */
+ CCRndContext_t *pRndContext, /*!< [in/out] Pointer to the RND context buffer. */
+ CCEcEdwTempBuff_t *pTempBuff /*!< [in] Pointer to the temp buffer. */);
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+
+#endif
+
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_ec_mont_api.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_ec_mont_api.h
new file mode 100644
index 0000000..062d8ca
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_ec_mont_api.h
@@ -0,0 +1,218 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef CC_EC_MONT_API_TW_H
+#define CC_EC_MONT_API_TW_H
+
+#include "cc_pal_types.h"
+#include "cc_rnd_common.h"
+#include "cc_pka_defs_hw.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*!
+@file
+@brief This file contains the CryptoCell APIs used for EC MONT (Montgomery Curve25519) algorithms.
+@defgroup cc_ec_mont CryptoCell EC Montgomery APIs
+@{
+@ingroup cryptocell_ec
+
+
+
+\note Implemented algorithms according to Montgomery elliptic curves cryptography,
+ developed by Daniel J.Bernstein etc.
+*/
+
+/*! EC Montgomery curve25519 modulus size in bits, words and bytes */
+/*! EC Montgomery modulus size in bits. */
+#define CC_EC_MONT_MOD_SIZE_IN_BITS 255U
+/*! EC Montgomery modulus size in words. */
+#define CC_EC_MONT_MOD_SIZE_IN_32BIT_WORDS ((CC_EC_MONT_MOD_SIZE_IN_BITS + CC_BITS_IN_32BIT_WORD - 1) / CC_BITS_IN_32BIT_WORD)
+/*! EC Montgomery modulus size in bytes. */
+#define CC_EC_MONT_MOD_SIZE_IN_BYTES ((CC_EC_MONT_MOD_SIZE_IN_BITS + CC_BITS_IN_BYTE - 1) / CC_BITS_IN_BYTE)
+
+/*! Constant sizes of special EC_MONT buffers and arrays */
+/*! EC Montgomery scalar size in bytes. */
+#define CC_EC_MONT_SCALARBYTES (CC_EC_MONT_MOD_SIZE_IN_32BIT_WORDS * CC_32BIT_WORD_SIZE)
+/*! EC Montgomery scalar multiplication size in bytes. */
+#define CC_EC_MONT_SCALARMULTBYTES (CC_EC_MONT_MOD_SIZE_IN_32BIT_WORDS * CC_32BIT_WORD_SIZE)
+/*! EC Montgomery scalar seed size in bytes. */
+#define CC_EC_MONT_SEEDBYTES (CC_EC_MONT_MOD_SIZE_IN_32BIT_WORDS * CC_32BIT_WORD_SIZE)
+
+/*! EC Montgomery domains ID-s enumerator. */
+typedef enum
+{
+ CC_EC_MONT_DOMAIN_CURVE_25519, /*!< EC Curve25519 */
+ /*! EC Montgomery last domain. */
+ CC_EC_MONT_DOMAIN_OFF_MODE,
+ /*! Reserved. */
+ CC_EC_MONT_DOMAIN_LAST = 0x7FFFFFFF
+}CCEcMontDomainId_t;
+
+
+/*! EC_MONT scalar mult temp buffer type definition */
+typedef struct {
+ /*! Internal temporary buffer. */
+ uint32_t ecMontScalarMultTempBuff[CC_EC_MONT_TEMP_BUFF_SIZE_IN_32BIT_WORDS]; //! ! Change as needed
+} CCEcMontScalrMultTempBuff_t;
+
+/*! EC_MONT temp buffer type definition */
+typedef struct {
+ /* Don't change sequence order of the buffers */
+ /*! Internal temporary buffer. */
+ uint32_t ecMontScalar[CC_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS];
+ /*! Internal temporary buffer. */
+ uint32_t ecMontResPoint[CC_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS];
+ /*! Internal temporary buffer. */
+ uint32_t ecMontInPoint[CC_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS];
+ /*! Internal temporary buffer. */
+ CCEcMontScalrMultTempBuff_t ecMontScalrMultTempBuff;// if needed ?
+} CCEcMontTempBuff_t;
+
+
+/*********************************************************************/
+/*!
+@brief The function performs EC Montgomery (Curve25519) scalar multiplication:
+ resPoint = scalar * point.
+
+@return CC_OK on success,
+@return A non-zero value on failure as defined cc_ec_mont_edw_error.h.
+*/
+CIMPORT_C CCError_t CC_EcMontScalarmult(
+ uint8_t *pResPoint, /*!< [out] Pointer to the public (secret) key. */
+ size_t *pResPointSize, /*!< [in/out] Pointer to the size of the public key in bytes.
+ In - the size of the buffer. must be at least EC modulus
+ size (for curve25519 - 32 bytes).
+ Out - the actual size. */
+ const uint8_t *pScalar, /*!< [in] Pointer to the secret (private) key. */
+ size_t scalarSize, /*!< [in] Pointer to the size of the secret key in bytes;
+ must be equal to EC order size (for curve25519 - 32 bytes). */
+ const uint8_t *pInPoint, /*!< [in] Pointer to the input point (compressed). */
+ size_t inPointSize, /*!< [in] Size of the point - must be equal to CC_EC_MONT_MOD_SIZE_IN_BYTES. */
+ CCEcMontTempBuff_t *ecMontTempBuff /*!< [in] Pointer to temp buffer, for internal use. */);
+
+
+
+/*********************************************************************/
+/*!
+@brief The function performs EC Montgomery (Curve25519) scalar multiplication of base point:
+ res = scalar * base_point.
+
+ Note: all byte arrays have LE order of bytes, i.e. LS byte is on left most place.
+
+@return CC_OK on success,
+@return A non-zero value on failure as defined cc_ec_mont_edw_error.h.
+*/
+CIMPORT_C CCError_t CC_EcMontScalarmultBase(
+ uint8_t *pResPoint, /*!< [out] Pointer to the public (secret) key. */
+ size_t *pResPointSize, /*!< [in/out] Pointer to the size of the public key in bytes.
+ In - the size of buffer must be at least EC modulus size
+ (for curve25519 - 32 bytes);
+ Out - the actual size. */
+ const uint8_t *pScalar, /*!< [in] Pointer to the secret (private) key. */
+ size_t scalarSize, /*!< [in] Pointer to the size of the scalar in bytes -
+ must be equal to EC order size (for curve25519 - 32 bytes). */
+ CCEcMontTempBuff_t *pEcMontTempBuff /*!< [in] Pointer to temp buffer, for internal use. */);
+
+
+/*******************************************************************/
+/*!
+@brief The function randomly generates private and public keys for Montgomery
+ Curve25519. it uses CC_EcMontKeyPair with the Generator point of the Curve
+
+
+\note All byte arrays are in LE order of bytes, i.e. LS byte is on the left most place.\par
+\note LS and MS bits of the Secret key are set according to EC Montgomery scalar mult. algorithm:
+ secrKey[0] &= 248; secrKey[31] &= 127; secrKey[31] |= 64;
+
+@return CC_OK on success,
+@return A non-zero value on failure as defined cc_ec_mont_edw_error.h or cc_rnd_error.h.
+
+*/
+CIMPORT_C CCError_t CC_EcMontKeyPair (
+ uint8_t *pPublKey, /*!< [out] Pointer to the public key. */
+ size_t *pPublKeySize, /*!< [in/out] Pointer to the size of the public key in bytes.
+ In - the size of the buffer must be at least EC order size
+ (for curve25519 - 32 bytes);
+ Out - the actual size. */
+ uint8_t *pSecrKey, /*!< [out] Pointer to the secret key, including. */
+ size_t *pSecrKeySize, /*!< [in/out] Pointer to the size of buffer for the secret key in bytes -
+ must be at least EC order size (for curve25519 - 32 bytes). */
+ CCRndContext_t *pRndContext, /*!< [in/out] Pointer to the RND context buffer. */
+ CCEcMontTempBuff_t *pEcMontTempBuff /*!< [in] Pointer to the temp buffer, for internal use. */);
+
+
+/*******************************************************************/
+
+/*!
+@brief The function randomly generates private and public keys for Montgomery
+ Curve25519, using a configurable base point
+
+
+\note All byte arrays are in LE order of bytes, i.e. LS byte is on the left most place.\par
+\note LS and MS bits of the Secret key are set according to EC Montgomery scalar mult. algorithm:
+ secrKey[0] &= 248; secrKey[31] &= 127; secrKey[31] |= 64;
+
+@return CC_OK on success,
+@return A non-zero value on failure as defined cc_ec_mont_edw_error.h or cc_rnd_error.h.
+
+*/
+CIMPORT_C CCError_t CC_EcMontKeyPairBase (
+ uint8_t *pPublKey, /*!< [out] Pointer to the public key. */
+ size_t *pPublKeySize, /*!< [in/out] Pointer to the size of the public key in bytes.
+ In - the size of the buffer must be at least EC order size
+ (for curve25519 - 32 bytes);
+ Out - the actual size. */
+ uint8_t *pSecrKey, /*!< [out] Pointer to the secret key, including. */
+ size_t *pSecrKeySize, /*!< [in/out] Pointer to the size of buffer for the secret key in bytes -
+ must be at least EC order size (for curve25519 - 32 bytes). */
+ const uint8_t *pInPoint, /*!< [in] Pointer to the input point (compressed). */
+ size_t inPointSize, /*!< [in] Size of the point - must be equal to CC_EC_MONT_MOD_SIZE_IN_BYTES. */
+ CCRndContext_t *pRndContext, /*!< [in/out] Pointer to the RND context buffer. */
+ CCEcMontTempBuff_t *pEcMontTempBuff /*!< [in] Pointer to the temp buffer, for internal use. */);
+
+
+/*******************************************************************/
+
+/*!
+@brief The function generates private and public keys for Montgomery algorithms.
+
+ The generation performed using given seed.
+
+
+@return CC_OK on success,
+@return A non-zero value on failure as defined cc_ec_mont_edw_error.h or cc_hash_error.h.
+*/
+CIMPORT_C CCError_t CC_EcMontSeedKeyPair (
+ uint8_t *pPublKey, /*!< [out] Pointer to the public (secret) key. */
+ size_t *pPublKeySize, /*!< [in/out] Pointer to the size of the public key in bytes.
+ In - the size of buffer must be at least EC order size
+ (for curve25519 - 32 bytes);
+ Out - the actual size. */
+ uint8_t *pSecrKey, /*!< [out] Pointer to the secret (private) key. */
+ size_t *pSecrKeySize, /*!< [in/out] Pointer to the size of the secret key in bytes
+ In - the size of buffer must be at least EC order size
+ (for curve25519 - 32 bytes);
+ Out - the actual size. */
+ const uint8_t *pSeed, /*!< [in] Pointer to the given seed - 32 bytes. */
+ size_t seedSize, /*!< [in/] Size of the seed in bytes (must be equal to CC_EC_MONT_SEEDBYTES). */
+ CCEcMontTempBuff_t *pEcMontTempBuff /*!< [in] Pointer to a temp buffer, for internal use. */);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
+
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_ecpki_domain.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_ecpki_domain.h
new file mode 100644
index 0000000..59ce0c4
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_ecpki_domain.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef CC_ECPKI_DOMAIN_H
+#define CC_ECPKI_DOMAIN_H
+
+
+/*!
+@file
+@brief This file defines the ecpki build domain API.
+@defgroup cc_ecpki_domain CryptoCell ECC domain APIs
+@{
+@ingroup cryptocell_ecpki
+
+*/
+
+
+#include "cc_error.h"
+#include "cc_ecpki_types.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+
+
+/**********************************************************************************
+ * CC_EcpkiGetEcDomain function *
+ **********************************************************************************/
+
+/*!
+ * @brief The function returns a pointer to an ECDSA saved domain (one of the supported domains).
+ *
+ * @return Domain pointer on success.
+ * @return NULL on failure.
+ */
+
+const CCEcpkiDomain_t *CC_EcpkiGetEcDomain(CCEcpkiDomainID_t domainId /*!< [in] Index of one of the domain Id (must be one of the supported domains). */);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_hash_defs_proj.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_hash_defs_proj.h
new file mode 100644
index 0000000..80d10c6
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_hash_defs_proj.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_hash_defs_proj
+ @{
+ */
+
+
+/*!
+ @file
+ @brief This file contains the project-specific definitions of hash APIs.
+ */
+
+#ifndef _CC_HASH_DEFS_PROJ_H
+#define _CC_HASH_DEFS_PROJ_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Defines ******************************/
+
+/*! The size of the context prototype of the user in words.
+See ::CCHashUserContext_t. */
+#define CC_HASH_USER_CTX_SIZE_IN_WORDS 60
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_pka_defs_hw.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_pka_defs_hw.h
new file mode 100644
index 0000000..a567017
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_pka_defs_hw.h
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pka_defs_hw
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains all of the enums and definitions that are used in
+ PKA APIs.
+ */
+
+#ifndef _CC_PKA_DEFS_HW_H_
+#define _CC_PKA_DEFS_HW_H_
+
+#include "cc_pal_types.h"
+#include "cc_pka_hw_plat_defs.h"
+
+/* The valid key sizes in bits for RSA primitives (exponentiation) */
+/*! The maximal RSA modulus size. */
+#define CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS ((CC_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS + CC_PKA_WORD_SIZE_IN_BITS) / CC_BITS_IN_32BIT_WORD )
+/*! The maximal EC modulus size. */
+#define CC_ECPKI_MODUL_MAX_LENGTH_IN_BITS 521
+
+/*! The size of the buffers for Barrett modulus tag NP, used in PKI
+algorithms. */
+#define CC_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS 5
+/*! The size of the buffers for Barrett modulus tag NP, used in ECC. */
+#define CC_PKA_ECPKI_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS CC_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS
+/*! The actual size of Barrett modulus tag NP in words for current
+HW platform. */
+#define CC_PKA_BARRETT_MOD_TAG_SIZE_IN_WORDS \
+ (((CC_PKA_WORD_SIZE_IN_BITS + PKA_EXTRA_BITS - 1) + (CC_BITS_IN_32BIT_WORD - 1)) / CC_BITS_IN_32BIT_WORD )
+/*! The maximal size of the PKA modulus. */
+#define CC_PKA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS
+/*! The maximal size of the PKA public-key in words. */
+#define CC_PKA_PUB_KEY_BUFF_SIZE_IN_WORDS (2*CC_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS)
+/*! The maximal size of the PKA private-key in words. */
+#define CC_PKA_PRIV_KEY_BUFF_SIZE_IN_WORDS (2*CC_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS)
+/*! The maximal size of the PKA KG buffer in words */
+#define CC_PKA_KGDATA_BUFF_SIZE_IN_WORDS (3*CC_PKA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS + 3*CC_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS)
+
+/*! The maximal size of the EC modulus in words. */
+#define CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS 18 /*!< \internal [(CC_ECPKI_MODUL_MAX_LENGTH_IN_BITS + 31)/(sizeof(uint32_t)) + 1] */
+/*! The maximal size of the EC order in words. */
+#define CC_ECPKI_ORDER_MAX_LENGTH_IN_WORDS (CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS + 1)
+/*! The maximal size of the EC domain in words. */
+#define CC_PKA_DOMAIN_BUFF_SIZE_IN_WORDS (2*CC_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS)
+
+/*! The ECC NAF buffer definitions. */
+#define COUNT_NAF_WORDS_PER_KEY_WORD 8 /*!< \internal Change according to NAF representation (? 2)*/
+/*! The maximal length of the ECC NAF buffer. */
+#define CC_PKA_ECDSA_NAF_BUFF_MAX_LENGTH_IN_WORDS (COUNT_NAF_WORDS_PER_KEY_WORD*CC_ECPKI_ORDER_MAX_LENGTH_IN_WORDS + 1)
+
+#ifndef CC_SUPPORT_ECC_SCA_SW_PROTECT
+/* on fast SCA non protected mode required additional buffers for NAF key */
+/*! The size of the Scalar buffer in words. */
+#define CC_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS (CC_PKA_ECDSA_NAF_BUFF_MAX_LENGTH_IN_WORDS+CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS+2)
+#else
+/*! The size of the Scalar buffer in words. */
+#define CC_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS 1 /*(4*CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS)*/
+#endif
+/*! The size of the ECC temporary buffer in words. */
+#define CC_PKA_ECPKI_BUILD_TMP_BUFF_MAX_LENGTH_IN_WORDS (3*CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS+CC_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS)
+/*! The size of the ECC sign temporary buffer in words. */
+#define CC_PKA_ECDSA_SIGN_BUFF_MAX_LENGTH_IN_WORDS (6*CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS+CC_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS)
+/*! The size of the ECC ECDH temporary-buffer in words. */
+#define CC_PKA_ECDH_BUFF_MAX_LENGTH_IN_WORDS (2*CC_ECPKI_ORDER_MAX_LENGTH_IN_WORDS + CC_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS)
+/*! The size of the PKA KG temporary-buffer in words. */
+#define CC_PKA_KG_BUFF_MAX_LENGTH_IN_WORDS (2*CC_ECPKI_ORDER_MAX_LENGTH_IN_WORDS + CC_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS)
+/*! The size of the ECC verify temporary-buffer in words. */
+#define CC_PKA_ECDSA_VERIFY_BUFF_MAX_LENGTH_IN_WORDS (3*CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS)
+
+/* *************************************************************************** */
+/*! The maximal size of the modulus buffers for CC_EC_MONT and EC_EDW in
+bytes.*/
+#define CC_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_BYTES 32U /*!< \internal for Curve25519 */
+/*! The maximal size of the modulus buffers for CC_EC_MONT and EC_EDW in
+words. */
+#define CC_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS 8U /*!< \internal for Curve25519 */
+/*! The size of the ECC Montgomery temporary buffer in words. */
+#define CC_EC_MONT_TEMP_BUFF_SIZE_IN_32BIT_WORDS (8 * CC_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS) /*!< \internal Change according to actual requirements */
+/*! The size of the ECC Edwards temporary buffer in words. */
+#define CC_EC_EDW_TEMP_BUFF_SIZE_IN_32BIT_WORDS (8*CC_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS + (sizeof(CCHashUserContext_t)+CC_32BIT_WORD_SIZE-1)/CC_32BIT_WORD_SIZE)
+
+/*!
+ @}
+ */
+#endif /*_CC_PKA_DEFS_HW_H_*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_rnd_common.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_rnd_common.h
new file mode 100644
index 0000000..9ec29b6
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/cc_rnd_common.h
@@ -0,0 +1,246 @@
+/**************************************************************************************
+* Copyright (c) 2016-2019, Arm Limited (or its affiliates). All rights reserved *
+* *
+* This file and the related binary are licensed under the following license: *
+* *
+* ARM Object Code and Header Files License, v1.0 Redistribution. *
+* *
+* Redistribution and use of object code, header files, and documentation, without *
+* modification, are permitted provided that the following conditions are met: *
+* *
+* 1) Redistributions must reproduce the above copyright notice and the *
+* following disclaimer in the documentation and/or other materials *
+* provided with the distribution. *
+* *
+* 2) Unless to the extent explicitly permitted by law, no reverse *
+* engineering, decompilation, or disassembly of is permitted. *
+* *
+* 3) Redistribution and use is permitted solely for the purpose of *
+* developing or executing applications that are targeted for use *
+* on an ARM-based product. *
+* *
+* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
+* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
+* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
+* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
+* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
+* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
+**************************************************************************************/
+
+/*!
+ @addtogroup cc_rnd
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the CryptoCell random-number generation (RNG) APIs.
+
+ The random-number generation module implements <em>NIST Special Publication
+ 800-90A: Recommendation for Random Number Generation Using Deterministic
+ Random Bit Generators.</em>
+ */
+
+
+#ifndef _CC_RND_COMMON_H
+#define _CC_RND_COMMON_H
+
+#include "cc_error.h"
+#include "cc_aes_defs.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+/* RND seed and additional input sizes */
+/*! The maximal size of the random seed in words. */
+#define CC_RND_SEED_MAX_SIZE_WORDS 12
+#ifndef USE_MBEDTLS_CRYPTOCELL
+#ifndef CC_RND_ADDITINAL_INPUT_MAX_SIZE_WORDS
+/*! The maximal size of the additional input-data in words. */
+#define CC_RND_ADDITINAL_INPUT_MAX_SIZE_WORDS CC_RND_SEED_MAX_SIZE_WORDS
+#endif
+#endif
+/* maximal requested size counter (12 bits active) - maximal count
+of generated random 128 bit blocks allowed per one request of
+Generate function according NIST 800-90 it is (2^12 - 1) = 0x3FFFF */
+/* Max size for one RNG generation (in bits) =
+ max_num_of_bits_per_request = 2^19 (FIPS 800-90 Tab.3) */
+/*! The maximal size of the generated vector in bits. */
+#define CC_RND_MAX_GEN_VECTOR_SIZE_BITS 0x7FFFF
+/*! The maximal size of the generated random vector in bytes. */
+#define CC_RND_MAX_GEN_VECTOR_SIZE_BYTES 0xFFFF
+/*! The maximal size of the generated vector in bytes. */
+#define CC_RND_REQUESTED_SIZE_COUNTER 0x3FFFF
+
+/* Definitions of temp buffer for RND_DMA */
+/*******************************************************************/
+/* Definitions of temp buffer for DMA */
+/*! The size of the temporary buffer in words. */
+#define CC_RND_WORK_BUFFER_SIZE_WORDS 136
+
+/*! The definition of the RAM buffer, for internal use in instantiation or
+reseeding operations. */
+typedef struct
+{
+ /*! The internal buffer. */
+ uint32_t ccRndIntWorkBuff[CC_RND_WORK_BUFFER_SIZE_WORDS];
+}CCRndWorkBuff_t;
+
+
+/* RND source buffer inner (entrpopy) offset */
+/*! The definition of the internal offset in words. */
+#define CC_RND_TRNG_SRC_INNER_OFFSET_WORDS 2
+/*! The definition of the internal offset in bytes. */
+#define CC_RND_TRNG_SRC_INNER_OFFSET_BYTES (CC_RND_TRNG_SRC_INNER_OFFSET_WORDS*sizeof(uint32_t))
+
+
+/************************ Enumerators ****************************/
+
+/*! The definition of the random operation modes. */
+typedef enum
+{
+ /*! HW entropy estimation: 800-90B or full. */
+ CC_RND_FE = 1,
+ /*! Reserved. */
+ CC_RND_ModeLast = 0x7FFFFFFF,
+} CCRndMode_t;
+
+
+/************************ Structs *****************************/
+
+
+/* The internal state of DRBG mechanism based on AES CTR and CBC-MAC
+ algorithms. It is set as global data defined by the following
+ structure */
+/*!
+
+ @brief The structure for the RND state.
+ This includes internal data that must be saved by the user between boots.
+ */
+typedef struct
+{
+#ifndef USE_MBEDTLS_CRYPTOCELL
+ /* Seed buffer, consists from concatenated Key||V: max size 12 words */
+ /*! The random-seed buffer. */
+ uint32_t Seed[CC_RND_SEED_MAX_SIZE_WORDS];
+ /* Previous value for continuous test */
+ /*! The previous random data, used for continuous test. */
+ uint32_t PreviousRandValue[CC_AES_CRYPTO_BLOCK_SIZE_IN_WORDS];
+ /* AdditionalInput buffer max size = seed max size words + 4w for padding*/
+ /*! The previous additional-input buffer. */
+ uint32_t PreviousAdditionalInput[CC_RND_ADDITINAL_INPUT_MAX_SIZE_WORDS+3];
+ /*! The additional-input buffer. */
+ uint32_t AdditionalInput[CC_RND_ADDITINAL_INPUT_MAX_SIZE_WORDS+4];
+ /*! The size of the additional input in words. */
+ uint32_t AddInputSizeWords;
+ /*! The size of the entropy source in words. */
+ uint32_t EntropySourceSizeWords;
+ /*! The Reseed counter (32-bit active). Indicates the number of requests
+ for entropy since instantiation or reseeding. */
+ uint32_t ReseedCounter;
+ /*! The key size in words, according to security strength: 128 bits:
+ 4 words. 256 bits: 8 words. */
+ uint32_t KeySizeWords;
+ /* State flag (see definition of StateFlag above), containing bit-fields, defining:
+ - b'0: instantiation steps: 0 - not done, 1 - done;
+ - 2b'9,8: working or testing mode: 0 - working, 1 - KAT DRBG test, 2 -
+ KAT TRNG test;
+ b'16: flag defining is Previous random valid or not:
+ 0 - not valid, 1 - valid */
+ /*! The state flag used internally in the code. */
+ uint32_t StateFlag;
+ /* validation tag */
+ /*! The validation tag used internally in the code. */
+ uint32_t ValidTag;
+ /*! The size of the RND source entropy in bits. */
+ uint32_t EntropySizeBits;
+
+#endif
+ /*! The TRNG process state used internally in the code. */
+ uint32_t TrngProcesState;
+
+} CCRndState_t;
+
+
+/*! The RND vector-generation function pointer. */
+typedef int (*CCRndGenerateVectWorkFunc_t)( \
+ /*! A pointer to the RND-state context. */
+ void *rndState_ptr, \
+ /*! A pointer to the output buffer. */
+ unsigned char *out_ptr, \
+ /*! The size of the output in bytes. */
+ size_t outSizeBytes
+ );
+
+
+/*! The definition of the RND context that includes the CryptoCell
+ RND state structure, and a function pointer for the RND-generation
+ function. */
+typedef struct
+{
+ /*! A pointer to the internal state of the RND.
+ Note: This pointer should be allocated in a physical and contiguous
+ memory, that is accessible to the CryptoCell DMA. This pointer should
+ be allocated and assigned before calling CC_LibInit(). */
+ void * rndState;
+ /*! A pointer to the entropy context. Note: This pointer should be
+ allocated and assigned before calling CC_LibInit(). */
+ void * entropyCtx;
+ /*! A pointer to the user-given function for generation a random
+ vector. */
+ CCRndGenerateVectWorkFunc_t rndGenerateVectFunc;
+} CCRndContext_t;
+
+
+
+
+
+/*****************************************************************************/
+/********************** Public Functions *************************/
+/*****************************************************************************/
+
+
+/****************************************************************************************/
+/*!
+ @brief This function sets the RND vector-generation function into the RND
+ context.
+
+ It is called as part of Arm CryptoCell library initialization, to
+ set the RND vector generation function into the primary RND context.
+
+ @note It must be called before any other API that requires the RND context as
+ a parameter.
+
+ @return \c CC_OK on success.
+ @return A non-zero value from cc_rnd_error.h on failure.
+ */
+CCError_t CC_RndSetGenerateVectorFunc(
+ /*! [in/out] A pointer to the RND context buffer that is allocated
+ by the user, which is used to maintain the RND state, as well as
+ pointers to the functions used for random vector generation. */
+ CCRndContext_t *rndContext_ptr,
+ /*! [in] A pointer to the \c CC_RndGenerateVector random
+ vector-generation function. */
+ CCRndGenerateVectWorkFunc_t rndGenerateVectFunc
+);
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif /* #ifndef _CC_RND_COMMON_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_aes_ext_dma.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_aes_ext_dma.h
new file mode 100644
index 0000000..093febb
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_aes_ext_dma.h
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+/*!
+ @addtogroup aes_ext_dma
+ @{
+*/
+
+/*!
+ @file
+ @brief This file contains all the CryptoCell AES external DMA APIs, their
+ enums and definitions.
+ */
+
+
+#ifndef _MBEDTLS_AES_EXT_DMA_H
+#define _MBEDTLS_AES_EXT_DMA_H
+
+#include "cc_aes_defs_proj.h"
+#include "cc_pal_types.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+ @brief This function initializes the external DMA Control. It configures the
+ AES mode, the direction (encryption or decryption), and the data size.
+
+ @return \c CC_OK on success.
+ @return A non-zero value from cc_aes_error.h on failure.
+ */
+int mbedtls_aes_ext_dma_init(
+ /*! [in] AES key size. Valid values are: 128 bits, 192 bits, or 256 bits. */
+ unsigned int keybits,
+ /*! [in] 0: Encrypt. 1: Decrypt. */
+ int encryptDecryptFlag,
+ /*! [in] AES mode. Supported modes are: ECB, CBC, CTR, CBC_MAC, CMAC,
+ or OFB. */
+ CCAesOperationMode_t operationMode
+ );
+
+
+/*!
+ @brief This function configures the key.
+
+ @return \c CC_OK on success.
+ @return A non-zero value from cc_aes_error.h on failure.
+ */
+int mbedtls_aes_ext_dma_set_key(
+ /*! [in] AES mode. Supported modes are: ECB, CBC, CTR, CBC_MAC, CMAC or
+ OFB. */
+ CCAesOperationMode_t operationMode,
+ /*! [in] The AES key buffer. */
+ const unsigned char *key,
+ /*! [in] The size of the AES Key. Valid values are: 128 bits, 192 bits, or
+ 256 bits. */
+ unsigned int keybits
+ );
+
+
+/*!
+ @brief This function configures the IV.
+
+ @return \c CC_OK on success.
+ @return A non-zero value from cc_aes_error.h on failure.
+ */
+int mbedtls_aes_ext_dma_set_iv(
+ /*! [in] AES mode. Supported modes are: ECB, CBC, CTR, CBC_MAC, CMAC or
+ OFB. */
+ CCAesOperationMode_t operationMode,
+ /*! [in] The AES IV buffer. */
+ unsigned char *iv,
+ /*! [in] The size of the IV. Must be 16 bytes. */
+ unsigned int iv_size
+ );
+
+/*!
+ @brief This function configures data size which will be written to external
+ DMA interface.
+
+ @return \c CC_OK on success.
+ @return A non-zero value from cc_aes_error.h on failure.
+ */
+int mbedtls_aes_ext_dma_set_data_size(
+ /*! [in] Size of input data in bytes. */
+ uint32_t dataSize,
+ /*! [in] The AES mode. Supported modes are: ECB, CBC, CTR, CBC_MAC, CMAC
+ or OFB. */
+ CCAesOperationMode_t operationMode
+);
+
+
+/*!
+ @brief This function returns the IV after an AES CMAC or a CBCMAC operation.
+
+ @return \c CC_OK on success.
+ @return A non-zero value from cc_aes_error.h on failure.
+ */
+int mbedtls_aes_ext_dma_finish(
+ /*! [in] The AES mode. Supported modes are: ECB, CBC, CTR, CBC_MAC, CMAC or OFB. */
+ CCAesOperationMode_t operationMode,
+ /*! [out] The AES IV buffer. */
+ unsigned char *iv,
+ /*! [in] The size of the IV. Must be 16 bytes. */
+ unsigned int iv_size
+ );
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+*/
+
+#endif /* #ifndef MBEDTLS_AES_EXT_DMA_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_aes_key_wrap.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_aes_key_wrap.h
new file mode 100644
index 0000000..9b9ce42
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_aes_key_wrap.h
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @file
+ @brief This file contains all of the CryptoCell key-wrapping APIs, their enums and definitions.
+
+ The APIs support AES key wrapping as defined in <em>NIST SP 800-38F: Recommendation for
+ Block Cipher Modes of Operation: Methods for Key Wrapping</em>.
+ */
+
+/*!
+ @defgroup cc_aes_keywrap CryptoCell AES key-wrapping APIs
+ @brief Contains CryptoCell key-wrapping APIs.
+
+ See mbedtls_cc_aes_key_wrap.h.
+ @{
+ @ingroup cc_aes
+ @}
+ */
+
+#ifndef _MBEDTLS_CC_AES_KEY_WRAP_H
+#define _MBEDTLS_CC_AES_KEY_WRAP_H
+
+#include "cc_pal_types.h"
+#include "cc_error.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/************************ Defines ******************************/
+/*! The size of the AES key-wrapping semiblock in Bytes. */
+#define CC_AES_KEYWRAP_SEMIBLOCK_SIZE_BYTES (CC_AES_BLOCK_SIZE_IN_BYTES >> 1)
+/*! The size of the AES key-wrapping semiblock in words. */
+#define CC_AES_KEYWRAP_SEMIBLOCK_SIZE_WORDS (CC_AES_KEYWRAP_SEMIBLOCK_SIZE_BYTES >> 2)
+/*! The AES key-wrapping semiblock to Bytes shift. */
+#define CC_AES_KEYWRAP_SEMIBLOCK_TO_BYTES_SHFT 3
+/*! AES key-wrapping with padding (KWP) maximum Bytes of padding. */
+#define CC_AES_KEYWRAP_MAX_PAD_LEN 7
+
+/**********************************/
+/** ICVs - Integrity Check Value **/
+/**********************************/
+
+/*! The 64-bit default ICV for KW mode. */
+#define CC_AES_KEYWRAP_ICV1 {0xA6A6A6A6, 0xA6A6A6A6}
+/*! The 32-bit default ICV for KWP mode. */
+#define CC_AES_KEYWRAP_ICV2 {0xA65959A6, 0x00000000}
+
+/************************ Typedefs ****************************/
+/*! Supported modes of the AES key-wrapping operation: KW and KWP, as defined in
+ <em>NIST SP 800-38F: Recommendation for Block Cipher Modes of Operation: Methods for Key Wrapping</em>. */
+typedef enum keyWrapMode {
+ CC_AES_KEYWRAP_KW_MODE = 0, /*!< KW mode. */
+ CC_AES_KEYWRAP_KWP_MODE = 1, /*!< KWP mode. */
+ CC_AES_KEYWRAP_NUM_OF_MODES = 2, /*!< Allowed number of AES key-wrapping modes. */
+ CC_AES_KEYWRAP_RESERVE32B = INT32_MAX /*!< Reserved. */
+}mbedtls_keywrap_mode_t;
+
+
+/******************************************* Public Functions *****************************************/
+
+/******************************************************************************************************/
+/******** AES key-wrapping FUNCTION *********/
+/******************************************************************************************************/
+
+/*!
+ @brief This is the AES wrapping or encryption function.
+
+ AES key-wrapping specifies a deterministic authenticated-encryption mode of operation of the
+ AES, according to <em>NIST SP 800-38F: Recommendation for Block Cipher Modes of Operation: Methods for Key Wrapping</em>.
+ Its purpose is to protect cryptographic keys.
+ It uses units of 8 Bytes called semiblocks. The minimal number of input semiblocks is:
+ <ul><li>For KW mode: 2 semiblocks.</li>
+ <li>For KWP mode: 1 semiblock.</li></ul>
+
+ The maximal size of the output in Bytes is 64KB. This is a system restriction.
+ The input to key-wrapping includes the following elements:
+ <ul><li>Payload - text data that is both authenticated and encrypted.</li>
+ <li>Key - The encryption key for the AES operation.</li></ul>
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure, as defined in mbedtls_cc_aes_key_wrap_error.h.
+ */
+CCError_t mbedtls_aes_key_wrap(
+ mbedtls_keywrap_mode_t keyWrapFlag, /*!< [in] The key-wrapping mode: KW or KWP. */
+ uint8_t* keyBuf, /*!< [in] A pointer to AES key-wrapping key. */
+ size_t keySize, /*!< [in] The size of the key in Bytes. Valid values are:
+ 16 Bytes, 24 Bytes, or 32 Bytes. */
+ uint8_t* pPlainText, /*!< [in] A pointer to the plain-text data for encryption. The buffer must be contiguous. */
+ size_t plainTextSize, /*!< [in] The size of the plain-text data in Bytes. */
+ uint8_t* pCipherText, /*!< [out] A pointer to the cipher-text output data. The buffer must be contiguous. */
+ size_t* pCipherTextSize /*!< [in/out] Input: A pointer to the size of the cipher-text output data buffer.
+ Output: The actual size of the cipher-text output data in Bytes. */
+);
+
+/*!
+ @brief This is the AES unwrapping or decryption function.
+
+ AES key-wrapping specifies a deterministic authenticated-encryption mode of operation of the
+ AES, according to <em>NIST SP 800-38F: Recommendation for Block Cipher Modes of Operation: Methods for Key Wrapping</em>.
+ Its purpose is to protect cryptographic keys.
+ It uses units of 8 Bytes called semiblocks. The minimal number of input semiblocks is:
+ <ul><li>For KW mode: 2 semiblocks.</li>
+ <li>For KWP mode: 1 semiblock.</li></ul>
+ The maximal size of the output in bytes is 64KB. This is a system restriction.
+ Input to key-wrapping includes the following elements:
+ <ul><li>Payload - text data that is both authenticated and encrypted.</li>
+ <li>Key - The encryption key for the AES operation.</li></ul>
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure, as defined in mbedtls_cc_aes_key_wrap_error.h.
+ */
+CCError_t mbedtls_aes_key_unwrap(
+ mbedtls_keywrap_mode_t keyWrapFlag, /*!< [in] The enumerator defining the key-wrapping mode: KW or KWP. */
+ uint8_t* keyBuf, /*!< [in] A pointer to AES key-wrapping key. */
+ size_t keySize, /*!< [in] The size of the key in Bytes. Valid values are:
+ 16 Bytes, 24 Bytes, or 32 Bytes. */
+ uint8_t* pCipherText, /*!< [in] A pointer to the cipher-text data for decryption. The buffer must be contiguous. */
+ size_t cipherTextSize, /*!< [in] The size of the cipher-text data in Bytes. */
+ uint8_t* pPlainText, /*!< [out] A pointer to the plain-text output data. The buffer must be contiguous. */
+ size_t* pPlainTextSize /*!< [in/out] Input: A pointer to the size of the plain-text output data buffer.
+ Output: The actual size of the plain-text output data in Bytes. */
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*#ifndef _MBEDTLS_CC_AES_KEY_WRAP_H*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_aes_key_wrap_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_aes_key_wrap_error.h
new file mode 100644
index 0000000..db48f86
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_aes_key_wrap_error.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @file mbedtls_cc_aes_key_wrap_error.h
+ @brief This file contains the error definitions of the CryptoCell AES key-wrapping APIs.
+ */
+
+/*!
+ @defgroup cc_aes_keywrap_error Specific errors of the CryptoCell AES key-wrapping APIs
+ @brief Contains the CryptoCell AES key-wrapping-API error definitions.
+
+ See mbedtls_cc_aes_key_wrap_error.h.
+ @{
+ @ingroup cc_aes_keywrap
+ @}
+ */
+
+#ifndef _CC_AES_KEYWRAP_ERROR_H
+#define _CC_AES_KEYWRAP_ERROR_H
+
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Defines ******************************/
+
+/* CryptoCell AES key-wrapping module errors. #CC_AES_KEYWRAP_MODULE_ERROR_BASE = 0x00F02800 */
+
+/*! Invalid data-in text pointer. */
+#define CC_AES_KEYWRAP_DATA_IN_POINTER_INVALID_ERROR (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x00UL)
+/*! Invalid data-out text pointer. */
+#define CC_AES_KEYWRAP_DATA_OUT_POINTER_INVALID_ERROR (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x01UL)
+/*! Invalid key pointer. */
+#define CC_AES_KEYWRAP_INVALID_KEY_POINTER_ERROR (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x02UL)
+/*! Invalid key size. */
+#define CC_AES_KEYWRAP_ILLEGAL_KEY_SIZE_ERROR (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x03UL)
+/*! Illegal semiblocks number. */
+#define CC_AES_KEYWRAP_SEMIBLOCKS_NUM_ILLEGAL (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x04UL)
+/*! Invalid parameter pointer. */
+#define CC_AES_KEYWRAP_ILLEGAL_PARAMETER_PTR_ERROR (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x05UL)
+/*! Invalid encryption mode. */
+#define CC_AES_KEYWRAP_INVALID_ENCRYPT_MODE_ERROR (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x06UL)
+/*! Illegal data-in size. */
+#define CC_AES_KEYWRAP_DATA_IN_SIZE_ILLEGAL (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x07UL)
+/*! Illegal data-out size. */
+#define CC_AES_KEYWRAP_DATA_OUT_SIZE_ILLEGAL (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x08UL)
+/*! Illegal key-wrapping mode. */
+#define CC_AES_KEYWRAP_INVALID_KEYWRAP_MODE_ERROR (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x09UL)
+/*! Key Unwrap comparison failure. */
+#define CC_AES_KEYWRAP_UNWRAP_COMPARISON_ERROR (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0x0AUL)
+
+/*! Not supported. */
+#define CC_AES_KEYWRAP_IS_NOT_SUPPORTED (CC_AES_KEYWRAP_MODULE_ERROR_BASE + 0xFFUL)
+
+/************************ Enums ********************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Structs *****************************/
+
+/************************ Public Variables *********************/
+
+/************************ Public Functions *********************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _CC_AES_KEYWRAP_ERROR_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ccm_star.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ccm_star.h
new file mode 100644
index 0000000..59642fb
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ccm_star.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_aesccm_star
+ @{
+ */
+
+/*!
+ @file
+
+ @brief This file contains the CryptoCell AES-CCM star APIs, their enums and
+ definitions.
+
+ This API supports AES-CCM*, as defined in <em>IEEE 802.15.4: IEEE Standard
+ for Local and metropolitan area networks— Part 15.4: Low-Rate Wireless
+ Personal Area Networks (LR-WPANs)</em>, with the instantiations defined in
+ section B.3.2, and the nonce defined in section 7.3.2.
+ */
+
+
+#ifndef _MBEDTLS_AES_CCM_STAR_H
+#define _MBEDTLS_AES_CCM_STAR_H
+
+
+#include "cc_pal_types.h"
+#include "cc_error.h"
+
+#include "mbedtls/ccm.h"
+#include "mbedtls_ccm_common.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Defines ******************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Enums ********************************/
+
+/************************ Structs ******************************/
+
+/************************ context Structs ******************************/
+
+/*!
+ @brief This function receives the MAC source address, the frame counter,
+ and the MAC size, and returns the required nonce for AES-CCM*, as
+ defined in <em>IEEE 802.15.4: IEEE Standard for Local and
+ metropolitan area networks— Part 15.4: Low-Rate Wireless Personal
+ Area Networks (LR-WPANs)</em>.
+
+ @note This API should be called before mbedtls_ccm_star_encrypt_and_tag()
+ or mbedtls_ccm_star_auth_decrypt(). The generated nonce should
+ be provided to these functions. \par
+
+ @return \c zero on success.
+ @return A non-zero value on failure, as defined in ccm.h.
+ */
+int mbedtls_ccm_star_nonce_generate(
+ /*! The MAC address in EUI-64 format. */
+ unsigned char * src_addr,
+ /*! The MAC frame counter. */
+ uint32_t frame_counter,
+ /*! The size of the AES-CCM* MAC tag in bytes:
+ 4, 6, 8, 10, 12, 14 or 16. */
+ uint8_t size_of_t,
+ /*! The required nonce for AES-CCM*. */
+ unsigned char * nonce_buf);
+
+
+ #ifdef __cplusplus
+}
+#endif
+
+#endif /* _MBEDTLS_AES_CCM_STAR_H */
+
+/*!
+@}
+ */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha.h
new file mode 100644
index 0000000..9562bfb
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha.h
@@ -0,0 +1,202 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @file
+ @brief This file contains all of the CryptoCell ChaCha APIs, their enums and definitions.
+ */
+
+/*!
+ @defgroup cc_chacha CryptoCell ChaCha APIs
+ @brief Contains all CryptoCell ChaCha APIs. See mbedtls_cc_chacha.h.
+
+ The ChaCha family of stream ciphers is a variant of the Salsa20 family of stream ciphers.
+ For more information, see <em>ChaCha, a variant of Salsa20</em>.
+ @{
+ @ingroup cryptocell_api
+ @}
+ */
+
+#ifndef _MBEDTLS_CC_CHACHA_H
+#define _MBEDTLS_CC_CHACHA_H
+
+
+#include "cc_pal_types.h"
+#include "cc_error.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+/*! The size of the ChaCha user-context in words. */
+#define CC_CHACHA_USER_CTX_SIZE_IN_WORDS 17
+
+/*! The size of the ChaCha block in words. */
+#define CC_CHACHA_BLOCK_SIZE_IN_WORDS 16
+/*! The size of the ChaCha block in Bytes. */
+#define CC_CHACHA_BLOCK_SIZE_IN_BYTES (CC_CHACHA_BLOCK_SIZE_IN_WORDS * sizeof(uint32_t))
+
+/*! The maximal size of the nonce buffer in words. */
+#define CC_CHACHA_NONCE_MAX_SIZE_IN_WORDS 3
+/*! The maximal size of the nonce buffer in Bytes. */
+#define CC_CHACHA_NONCE_MAX_SIZE_IN_BYTES (CC_CHACHA_NONCE_MAX_SIZE_IN_WORDS * sizeof(uint32_t))
+
+/*! The maximal size of the ChaCha key in words. */
+#define CC_CHACHA_KEY_MAX_SIZE_IN_WORDS 8
+/*! The maximal size of the ChaCha key in Bytes. */
+#define CC_CHACHA_KEY_MAX_SIZE_IN_BYTES (CC_CHACHA_KEY_MAX_SIZE_IN_WORDS * sizeof(uint32_t))
+
+/************************ Enums ********************************/
+
+/*! The ChaCha operation:<ul><li>Encrypt</li><li>Decrypt</li></ul>. */
+typedef enum {
+ CC_CHACHA_Decrypt = 0, /*!< A ChaCha decrypt operation. */
+ CC_CHACHA_Encrypt = 1, /*!< A ChaCha encrypt operation. */
+ CC_CHACHA_EncryptNumOfOptions, /*!< The maximal number of encrypt or decrypt operations for the ChaCha engine. */
+ CC_CHACHA_EncryptModeLast = 0x7FFFFFFF, /*!< Reserved. */
+
+}mbedtls_chacha_encrypt_mode_t;
+
+/*! The allowed nonce-size values of the ChaCha engine in bits. */
+typedef enum {
+ CC_CHACHA_Nonce64BitSize = 0, /*!< A 64-bit nonce size. */
+ CC_CHACHA_Nonce96BitSize = 1, /*!< A 96-bit nonce size. */
+ CC_CHACHA_NonceSizeNumOfOptions, /*!< The maximal number of nonce sizes for the ChaCha engine. */
+ CC_CHACHA_NonceSizeLast = 0x7FFFFFFF, /*!< Reserved. */
+}mbedtls_chacha_nonce_size_t;
+
+/************************ Typedefs ****************************/
+
+/*! The definition of the 12-Byte array of the nonce buffer. */
+typedef uint8_t mbedtls_chacha_nonce[CC_CHACHA_NONCE_MAX_SIZE_IN_BYTES];
+
+/*! The definition of the key buffer of the ChaCha engine. */
+typedef uint8_t mbedtls_chacha_key[CC_CHACHA_KEY_MAX_SIZE_IN_BYTES];
+
+
+/************************ context Structs ******************************/
+
+/*!
+ @brief The context prototype of the user.
+
+ The argument type that is passed by the user to the ChaCha API.
+
+ The context saves the state of the operation. It must be saved by the user
+ until the end of the API flow, for example, until ::mbedtls_chacha_free is called.
+*/
+typedef struct mbedtls_chacha_user_context {
+ /* The allocated buffer must be double the size of the actual context
+ * + 1 word for offset management */
+ uint32_t buff[CC_CHACHA_USER_CTX_SIZE_IN_WORDS]; /*!< The context buffer for internal use */
+}mbedtls_chacha_user_context;
+
+/************************ Public Variables **********************/
+
+
+/************************ Public Functions **********************/
+
+/****************************************************************************************************/
+
+/*!
+ @brief This function initializes the context for ChaCha-engine operations.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure as defined in mbedtls_cc_chacha_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_chacha_init(
+ mbedtls_chacha_user_context *pContextID, /*!< [in] A pointer to the ChaCha context buffer that is allocated by the user and used for the ChaCha operation. */
+ mbedtls_chacha_nonce pNonce, /*!< [in] A buffer containing a nonce. */
+ mbedtls_chacha_nonce_size_t nonceSize, /*!< [in] An enumerator defining the nonce size. Valid values are: 64bits or 96bits. */
+ mbedtls_chacha_key pKey, /*!< [in] A pointer to the key buffer of the user. */
+ uint32_t initialCounter, /*!< [in] An initial counter. */
+ mbedtls_chacha_encrypt_mode_t EncryptDecryptFlag /*!< [in] A flag specifying whether the ChaCha engine should perform an Encrypt operation or a Decrypt operation. */
+);
+
+
+/*!
+ @brief This function processes aligned blocks of the ChaCha engine.
+
+ The data-in size should be a multiple of the ChaCha block size.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure as defined in mbedtls_cc_chacha_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_chacha_block(
+ mbedtls_chacha_user_context *pContextID, /*!< [in] A pointer to the context buffer. */
+ uint8_t *pDataIn, /*!< [in] A pointer to the buffer of the input data to the ChaCha engine.
+ The pointer does not need to be aligned. Must not be null. */
+ size_t dataInSize, /*!< [in] The size of the input data.
+ Must be a multiple of ::CC_CHACHA_BLOCK_SIZE_IN_BYTES Bytes, and must not be zero. */
+ uint8_t *pDataOut /*!< [out] A pointer to the buffer of the output data from the ChaCha engine.
+ The pointer does not need to be aligned. Must not be null. */
+ );
+
+
+/*!
+ @brief This function processes the remaining ChaCha data.
+
+ The data-in size should be smaller than the ChaCha block size.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure as defined in mbedtls_cc_chacha_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_chacha_finish(
+ mbedtls_chacha_user_context *pContextID, /*!< [in] A pointer to the context buffer. */
+ uint8_t *pDataIn, /*!< [in] A pointer to the buffer of the input data to the ChaCha engine.
+ The pointer does not need to be aligned. If dataInSize = 0,
+ an input buffer is not required. */
+ size_t dataInSize, /*!< [in] The size of the input data. Valid values are:Zero or
+ values that are not multiples of ::CC_CHACHA_BLOCK_SIZE_IN_BYTES. */
+ uint8_t *pDataOut /*!< [out] A pointer to the buffer of the output data from the ChaCha engine.
+ The pointer does not need to be aligned. If dataInSize = 0,
+ an output buffer is not required. */
+);
+
+
+/*!
+ @brief This function frees the context used for ChaCha operations.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure as defined in mbedtls_cc_chacha_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_chacha_free(
+ mbedtls_chacha_user_context *pContextID /*!< [in] A pointer to the context buffer. */
+);
+
+
+/*!
+ @brief This function performs the ChaCha operation in one integrated process.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure as defined in mbedtls_cc_chacha_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_chacha(
+ mbedtls_chacha_nonce pNonce, /*!< [in] A buffer containing a nonce. */
+ mbedtls_chacha_nonce_size_t nonceSize, /*!< [in] An enumerator defining the size of the nonce.
+ Valid values are: 64bits or 96bits. */
+ mbedtls_chacha_key pKey, /*!< [in] A pointer to the key buffer of the user. */
+ uint32_t initialCounter, /*!< [in] An initial counter. */
+ mbedtls_chacha_encrypt_mode_t encryptDecryptFlag, /*!< [in] A flag specifying which operation the ChaCha engine should
+ perform: encrypt or decrypt. */
+ uint8_t *pDataIn, /*!< [in] A pointer to the buffer of the input-data to the ChaCha engine.
+ The pointer does not need to be aligned. Must not be null. */
+ size_t dataInSize, /*!< [in] The size of the input data. Must not be zero. */
+ uint8_t *pDataOut /*!< [out] A pointer to the buffer of the output data from the ChaCha.
+ The pointer does not need to be aligned. Must not be null. */
+);
+
+
+/***********************************************************************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _MBEDTLS_CC_CHACHA_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha_error.h
new file mode 100644
index 0000000..3b8e303
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha_error.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @file
+ @brief This file contains the error definitions of the CryptoCell ChaCha APIs.
+ */
+
+/*!
+ @defgroup cc_chacha_error Specific errors of the CryptoCell ChaCha APIs
+ @brief Contains the CryptoCell ChaCha-API error definitions. See mbedtls_cc_chacha_error.h.
+
+ @{
+ @ingroup cc_chacha
+ @}
+ */
+
+#ifndef _MBEDTLS_CC_CHACHA_ERROR_H
+#define _MBEDTLS_CC_CHACHA_ERROR_H
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+
+
+
+/************************ Defines ******************************/
+
+/* The base address of errors for the ChaCha module - 0x00F02200. */
+/*! Illegal Nonce. */
+#define CC_CHACHA_INVALID_NONCE_ERROR (CC_CHACHA_MODULE_ERROR_BASE + 0x01UL)
+/*! Illegal key size. */
+#define CC_CHACHA_ILLEGAL_KEY_SIZE_ERROR (CC_CHACHA_MODULE_ERROR_BASE + 0x02UL)
+/*! Illegal key pointer. */
+#define CC_CHACHA_INVALID_KEY_POINTER_ERROR (CC_CHACHA_MODULE_ERROR_BASE + 0x03UL)
+/*! Illegal operation mode. */
+#define CC_CHACHA_INVALID_ENCRYPT_MODE_ERROR (CC_CHACHA_MODULE_ERROR_BASE + 0x04UL)
+/*! Illegal data-in pointer. */
+#define CC_CHACHA_DATA_IN_POINTER_INVALID_ERROR (CC_CHACHA_MODULE_ERROR_BASE + 0x05UL)
+/*! Illegal data-out pointer. */
+#define CC_CHACHA_DATA_OUT_POINTER_INVALID_ERROR (CC_CHACHA_MODULE_ERROR_BASE + 0x06UL)
+/*! Illegal user context. */
+#define CC_CHACHA_INVALID_USER_CONTEXT_POINTER_ERROR (CC_CHACHA_MODULE_ERROR_BASE + 0x07UL)
+/*! Illegal user context size. */
+#define CC_CHACHA_CTX_SIZES_ERROR (CC_CHACHA_MODULE_ERROR_BASE + 0x08UL)
+/*! Illegal nonce pointer. */
+#define CC_CHACHA_INVALID_NONCE_PTR_ERROR (CC_CHACHA_MODULE_ERROR_BASE + 0x09UL)
+/*! Illegal data-in size. */
+#define CC_CHACHA_DATA_IN_SIZE_ILLEGAL (CC_CHACHA_MODULE_ERROR_BASE + 0x0AUL)
+/*! General error. */
+#define CC_CHACHA_GENERAL_ERROR (CC_CHACHA_MODULE_ERROR_BASE + 0x0BUL)
+/*! ChaCha is not supported. */
+#define CC_CHACHA_IS_NOT_SUPPORTED (CC_CHACHA_MODULE_ERROR_BASE + 0xFFUL)
+
+/************************ Enums ********************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Structs *****************************/
+
+/************************ Public Variables *********************/
+
+/************************ Public Functions *********************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif//_MBEDTLS_CC_CHACHA_ERROR_H
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha_poly.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha_poly.h
new file mode 100644
index 0000000..7e39feb
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha_poly.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @file
+ @brief This file contains all of the CryptoCell ChaCha-POLY APIs, their enums and definitions.
+ */
+
+/*!
+ @defgroup cc_chacha_poly CryptoCell ChaCha-POLY APIs
+ @brief Contains CryptoCell ChaCha-POLY APIs. See mbedtls_cc_chacha_poly.h.
+
+ @{
+ @ingroup cryptocell_api
+ @}
+ */
+
+#ifndef _MBEDTLS_CC_CHACHA_POLY_H
+#define _MBEDTLS_CC_CHACHA_POLY_H
+
+#include "cc_pal_types.h"
+#include "cc_error.h"
+#include "mbedtls_cc_chacha.h"
+#include "mbedtls_cc_poly.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/*!
+ @brief This function performs the ChaCha-POLY encryption and authentication operation.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure as defined in mbedtls_cc_chacha_poly_error.h.
+*/
+CIMPORT_C CCError_t mbedtls_chacha_poly(
+ mbedtls_chacha_nonce pNonce, /*!< [in] A pointer to a buffer containing the nonce value. */
+ mbedtls_chacha_key pKey, /*!< [in] A pointer to the key buffer of the user. */
+ mbedtls_chacha_encrypt_mode_t encryptDecryptFlag, /*!< [in] A flag specifying which operation the ChaCha-POLY module should perform: encrypt or decrypt. */
+ uint8_t *pAddData, /*!< [in] A pointer to the additional data input buffer to the POLY module.
+ This pointer does not need to be aligned. Must not be null. */
+ size_t addDataSize, /*!< [in] The size of the input data. Must not be zero. */
+ uint8_t *pDataIn, /*!< [in] A pointer to the input-data buffer to the ChaCha engine.
+ This pointer does not need to be aligned. Must not be null. */
+ size_t dataInSize, /*!< [in] The size of the input data. Must not be zero. */
+ uint8_t *pDataOut, /*!< [out] A pointer to the output-data buffer from the ChaCha engine.
+ This pointer does not need to be aligned. Must not be null. */
+ mbedtls_poly_mac macRes /*!< [in/out] A pointer to the MAC result buffer.*/
+);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _MBEDTLS_CC_CHACHA_POLY_H */
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha_poly_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha_poly_error.h
new file mode 100644
index 0000000..d174de2
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_chacha_poly_error.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @file
+ @brief This file contains the errors definitions of the CryptoCell ChaCha-POLY APIs.
+ */
+
+/*!
+ @defgroup cc_chacha_poly_error Specific errors of the CryptoCell ChaCha-POLY APIs
+ @brief Contains the CryptoCell ChaCha-POLY-API errors definitions. See mbedtls_cc_chacha_poly_error.h.
+ @{
+ @ingroup cc_chacha_poly
+ @}
+ */
+
+
+#ifndef _MBEDTLS_CC_CHACHA_POLY_ERROR_H
+#define _MBEDTLS_CC_CHACHA_POLY_ERROR_H
+
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Defines ******************************/
+
+/* The base address of errors for the ChaCha-POLY module - 0x00F02400. */
+/*! Invalid additional data. */
+#define CC_CHACHA_POLY_ADATA_INVALID_ERROR (CC_CHACHA_POLY_MODULE_ERROR_BASE + 0x01UL)
+/*! Invalid input data. */
+#define CC_CHACHA_POLY_DATA_INVALID_ERROR (CC_CHACHA_POLY_MODULE_ERROR_BASE + 0x02UL)
+/*! Illegal encryption mode. */
+#define CC_CHACHA_POLY_ENC_MODE_INVALID_ERROR (CC_CHACHA_POLY_MODULE_ERROR_BASE + 0x03UL)
+/*! Illegal data size. */
+#define CC_CHACHA_POLY_DATA_SIZE_INVALID_ERROR (CC_CHACHA_POLY_MODULE_ERROR_BASE + 0x04UL)
+/*! Key-generation error. */
+#define CC_CHACHA_POLY_GEN_KEY_ERROR (CC_CHACHA_POLY_MODULE_ERROR_BASE + 0x05UL)
+/*! ChaCha key-generation error. */
+#define CC_CHACHA_POLY_ENCRYPTION_ERROR (CC_CHACHA_POLY_MODULE_ERROR_BASE + 0x06UL)
+/*! Authentication error. */
+#define CC_CHACHA_POLY_AUTH_ERROR (CC_CHACHA_POLY_MODULE_ERROR_BASE + 0x07UL)
+/*! MAC comparison error. */
+#define CC_CHACHA_POLY_MAC_ERROR (CC_CHACHA_POLY_MODULE_ERROR_BASE + 0x08UL)
+
+/************************ Enums ********************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Structs *****************************/
+
+/************************ Public Variables *********************/
+
+/************************ Public Functions *********************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_MBEDTLS_CC_CHACHA_POLY_ERROR_H
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ec_mont_edw_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ec_mont_edw_error.h
new file mode 100644
index 0000000..bc86295
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ec_mont_edw_error.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _MBEDTLS_CC_EC_MONT_EDW_ERROR_H
+#define _MBEDTLS_CC_EC_MONT_EDW_ERROR_H
+
+
+/*!
+@file
+@brief This file contains the definitions of the CryptoCell ECC-25519 errors.
+@defgroup cc_ecmontedw_error CryptoCell ECC-25519 errors
+@{
+@ingroup cryptocell_api
+*/
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Defines ******************************/
+
+/**********************************************************************************************************
+ * CryptoCell ECC-25519 MODULE ERRORS base address - 0x00F02100 *
+ **********************************************************************************************************/
+/*! Illegal input pointer */
+#define CC_EC_EDW_INVALID_INPUT_POINTER_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x00UL)
+/*! Illegal input size */
+#define CC_EC_EDW_INVALID_INPUT_SIZE_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x01UL)
+/*! Illegal scalar size */
+#define CC_EC_EDW_INVALID_SCALAR_SIZE_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x02UL)
+/*! Illegal scalar data */
+#define CC_EC_EDW_INVALID_SCALAR_DATA_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x03UL)
+/*! Invalid RND context pointer */
+#define CC_EC_EDW_RND_CONTEXT_PTR_INVALID_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x04UL)
+/*! Invalid RND generate vector functions pointer */
+#define CC_EC_EDW_RND_GEN_VECTOR_FUNC_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x05UL)
+/*! Signing or verification operation failed */
+#define CC_EC_EDW_SIGN_VERIFY_FAILED_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x20UL)
+/*! Illegal input pointer */
+#define CC_EC_MONT_INVALID_INPUT_POINTER_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x30UL)
+/*! Illegal input size */
+#define CC_EC_MONT_INVALID_INPUT_SIZE_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x31UL)
+/*! Illegal domain id */
+#define CC_EC_MONT_INVALID_DOMAIN_ID_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x32UL)
+/*! Internal PKI error */
+#define CC_ECEDW_INTERNAL_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x33UL)
+/*! Internal PKI error */
+#define CC_ECMONT_INTERNAL_ERROR (CC_EC_MONT_EDW_MODULE_ERROR_BASE + 0x34UL)
+
+
+/************************************************************************************************************
+ * NOT SUPPORTED MODULES ERROR IDs *
+ ************************************************************************************************************/
+/*! EC montgomery is not supported */
+#define CC_EC_MONT_IS_NOT_SUPPORTED (CC_ECPKI_MODULE_ERROR_BASE + 0xFEUL)
+/*! EC edwards is not supported */
+#define CC_EC_EDW_IS_NOT_SUPPORTED (CC_ECPKI_MODULE_ERROR_BASE + 0xFFUL)
+
+
+
+/************************ Enums ********************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Structs ******************************/
+
+/************************ Public Variables **********************/
+
+/************************ Public Functions **********************/
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+*/
+#endif//_MBEDTLS_CC_EC_MONT_EDW_ERROR_H
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ecdh_edwards.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ecdh_edwards.h
new file mode 100644
index 0000000..c183d1f
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ecdh_edwards.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup ecdh_edwards
+ @}
+ */
+
+/*!
+ @file
+
+ @brief This file contains the CryptoCell ECDH Edwards curve APIs.
+ */
+
+#ifndef ECDH_EDWARDS_H
+#define ECDH_EDWARDS_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+#include "mbedtls/ecp.h"
+
+/*************************** Defines *****************************************/
+
+/*************************** Typedefs ***************************************/
+
+/*************************** Enums *******************************************/
+
+/*************************** Structs ****************************************/
+
+/*************************** context Structs ********************************/
+
+/*!
+ @brief This function generates a public key and a TLS ServerKeyExchange
+ payload.
+
+ This is the first function used by a TLS server for ECDHE ciphersuites.
+
+ @note This function can be used only for curve 25519.
+
+ @note This function assumes that the ECP group (\c grp) of the
+ \p ctx context has already been properly set,
+ for example, using mbedtls_ecp_group_load().
+
+ @see ecp.h
+
+ @return \c 0 on success.
+ @return An \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ */
+
+int mbedtls_ecdh_make_params_edwards(
+ /*! The ECDH context. */
+ mbedtls_ecdh_context *ctx,
+ /*! The number of characters written. */
+ size_t *olen,
+ /*! The destination buffer. */
+ unsigned char *buf,
+ /*! The length of the destination buffer. */
+ size_t blen,
+ /*! The RNG function. */
+ int (*f_rng)(void *, unsigned char *, size_t),
+ /*! The RNG context. */
+ void *p_rng
+ );
+
+/*!
+ @brief This function parses and processes a TLS ServerKeyExhange
+ payload.
+
+ This is the first function used by a TLS client for ECDHE ciphersuites.
+
+ @note This function can be used only for curve 25519.
+
+ @see ecp.h
+
+ @return \c 0 on success.
+ @return An \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ */
+int mbedtls_ecdh_read_params_edwards(
+ /*! The ECDH context. */
+ mbedtls_ecdh_context *ctx,
+ /*! The pointer to the start of the input buffer. */
+ const unsigned char **buf,
+ /*! The address for one byte past the end of the buffer. */
+ const unsigned char *end
+ );
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+@}
+*/
+#endif /* MBEDTLS_ECDH_EDWARDS */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ecdsa_edwards.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ecdsa_edwards.h
new file mode 100644
index 0000000..bb118ca
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ecdsa_edwards.h
@@ -0,0 +1,166 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup eddsa
+ @{
+ */
+
+/*!
+ @file
+
+ @brief This file contains the CryptoCell EDDSA Edwards curve APIs.
+
+ This API supports EDDSA Edwards for generating, signing and verifying keys.
+ This is implemented based on <em>Ed25519: High-speed high-security
+ signatures</em>.
+ */
+
+#ifndef _MBEDTLS_ECDSA_EDWARDS_H
+#define _MBEDTLS_ECDSA_EDWARDS_H
+
+
+#include "cc_pal_types.h"
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/*************************** Defines *****************************************/
+
+/*************************** Typedefs ***************************************/
+
+/*************************** Enums *******************************************/
+
+/*************************** Structs ****************************************/
+
+/*************************** context Structs ********************************/
+
+/*!
+ @brief This function generates an EDDSA keypair on the Edwards 25519 curve.
+
+ @return \c 0 on success.
+ @return An \c MBEDTLS_ERR_ECP_XXX code on failure.
+ */
+int mbedtls_ecdsa_genkey_edwards(
+ /*! The EDDSA context to store the keypair in. */
+ mbedtls_ecdsa_context *ctx,
+ /*! The elliptic curve to use. Currently only 25519 curve is
+ supported. */
+ mbedtls_ecp_group_id gid,
+ /*! The RNG function. */
+ int (*f_rng)(void *, unsigned char *, size_t),
+ /*! The RNG context. */
+ void *p_rng
+ );
+
+/*!
+ @brief This function computes the EDDSA signature of a
+ previously-hashed message.
+
+ @note If the bitlength of the message hash is larger than the
+ bitlength of the group order, then the hash is truncated
+ as defined in <em>Standards for Efficient Cryptography Group
+ (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ 4.1.3, step 5.
+
+ @return \c 0 on success.
+ @return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code
+ on failure.
+ */
+int mbedtls_ecdsa_sign_edwards(
+ /*! The ECP group. */
+ mbedtls_ecp_group *grp,
+ /*! The first output integer. */
+ mbedtls_mpi *r,
+ /*! The second output integer. */
+ mbedtls_mpi *s,
+ /*! The private signing key. */
+ const mbedtls_mpi *d,
+ /*! The message hash. */
+ const unsigned char *buf,
+ /*! The length of \p buf. */
+ size_t blen
+ );
+
+
+/*!
+ @brief This function verifies the EDDSA signature of a
+ previously-hashed message.
+
+ @note If the bitlength of the message hash is larger than the
+ bitlength of the group order, then the hash is truncated as
+ defined in <em>Standards for Efficient Cryptography Group
+ (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ 4.1.4, step 3.
+
+ @return \c 0 on success.
+ @return \c MBEDTLS_ERR_ECP_BAD_INPUT_DATA if signature is invalid.
+ @return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX
+ error code on failure for any other reason.
+ */
+int mbedtls_ecdsa_verify_edwards(
+ /*! The ECP group. */
+ mbedtls_ecp_group *grp,
+ /*!The message hash . */
+ const unsigned char *buf,
+ /*! The length of \p buf. */
+ size_t blen,
+ /*! The public key to use for verification. */
+ const mbedtls_ecp_point *Q,
+ /*! The first integer of the signature. */
+ const mbedtls_mpi *r,
+ /*! The second integer of the signature. */
+ const mbedtls_mpi *s
+ );
+
+/**
+ @brief This function imports an EC Edwards public key.
+
+ @return \c 0 on success.
+ @return \c MBEDTLS_ERR_ECP_BAD_INPUT_DATA
+ or \c MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE on failure.
+ */
+int mbedtls_ecdsa_public_key_read_edwards(
+ /*! [out] The public key to import. */
+ mbedtls_ecp_point *Q,
+ /*! [in] The buffer to read the public key from. */
+ unsigned char *buf,
+ /*! [in] The length of the buffer in bytes. */
+ size_t blen
+ );
+
+/**
+ @brief This function exports an EC Edwards public key.
+
+ @return \c 0 on success.
+ @return \c MBEDTLS_ERR_ECP_BAD_INPUT_DATA
+ or \c MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL on failure.
+ */
+int mbedtls_ecdsa_public_key_write_edwards(
+ /*! [in] The public key to export. */
+ const mbedtls_ecp_point *Q,
+ /*! [out] The length of the data written in bytes. */
+ size_t *olen,
+ /*! [out] The buffer to write the public key to. */
+ unsigned char *buf,
+ /*! [in] The length of the buffer in bytes. */
+ size_t blen
+ );
+
+
+ #ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif /* _MBEDTLS_ECDSA_EDWARDS_H */
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ecies.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ecies.h
new file mode 100644
index 0000000..e364309
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_ecies.h
@@ -0,0 +1,183 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_ecies
+ @{
+*/
+
+/*!
+ @file mbedtls_cc_ecies.h
+
+ @brief This file contains the CryptoCell Elliptic Curve Integrated Encryption Scheme (ECIES) APIs.
+ */
+
+#ifndef _MBEDTLS_CC_ECIES_H
+#define _MBEDTLS_CC_ECIES_H
+
+
+#include "cc_ecpki_types.h"
+#include "cc_pal_types_plat.h"
+#include "cc_kdf.h"
+#include "mbedtls_cc_hkdf.h"
+#include "mbedtls/ecp.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/*! The maximal length of the ECIES cipher in bytes. */
+#define MBEDTLS_ECIES_MAX_CIPHER_LEN_BYTES ((2*CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS + 1) * sizeof(int))
+/*! The minimal length of the ECIES buffer in bytes. */
+#define MBEDTLS_ECIES_MIN_BUFF_LEN_BYTES (sizeof(CCEciesTempData_t))
+
+/*!
+ @brief A macro for creating and encrypting a secret key.
+
+ For a description of the parameters see ::mbedtls_ecies_kem_encrypt_full.
+ */
+#define mbedtls_ecies_kem_encrypt(pGrp, pRecipPublKey, kdfDerivMode, kdfHashMode, \
+ isSingleHashMode, pSecrKey, secrKeySize, \
+ pCipherData, pCipherDataSize, pBuff, buffLen, \
+ f_rng, p_rng) \
+ mbedtls_ecies_kem_encrypt_full((pGrp), (pRecipPublKey), (kdfDerivMode), (kdfHashMode), \
+ (isSingleHashMode), NULL, NULL, (pSecrKey), (secrKeySize), \
+ (pCipherData), (pCipherDataSize), (pBuff), (buffLen), \
+ f_rng, p_rng)
+
+/*!
+ @brief This function creates and encrypts (encapsulates) the secret key of
+ required size, according to <em>ISO/IEC 18033-2:2006: Information technology
+ -- Security techniques -- Encryption algorithms -- Part 2: Asymmetric
+ ciphers</em>, ECIES-KEM Encryption.
+
+ To call this function in applications, the ::mbedtls_ecies_kem_encrypt macro
+ definition must be used. The function itself has the additional input of the
+ external ephemeral key pair, used only for testing purposes.
+
+ @note Use KDF2 function mode for compliance with <em>X9.63-2011: Public Key
+ Cryptography for the Financial Services Industry – Key Agreement and Key
+ Transport Using Elliptic Curve Cryptography</em>. \par
+
+ @note The term "sender" indicates an entity that creates and
+ encapsulates the secret key using this function. The term "recipient"
+ indicates another entity which receives and decrypts the secret key. \par
+
+ @note All public and private keys that are used must relate to the same EC
+ Domain. \par
+
+ @note The user must verify that the public key of the recipient is
+ on the elliptic curve before it is used in this function.
+
+ @return CCError_t \c 0 on success.
+ */
+CCError_t mbedtls_ecies_kem_encrypt_full(
+ /*! [in] The ECP group to use. */
+ mbedtls_ecp_group *pGrp,
+ /*! [in] A pointer to the public key of the recipient. */
+ mbedtls_ecp_point *pRecipUzPublKey,
+ /*! [in] The KDF function mode to use: KDF1 or KDF2. For more
+ information, see CCKdfDerivFuncMode_t() in cc_kdf.h. */
+ CCKdfDerivFuncMode_t kdfDerivMode,
+ /*! [in] The used hash function. */
+ mbedtls_hkdf_hashmode_t kdfHashMode,
+ /*! [in] The specific ECIES mode, according to <em>ISO/IEC 18033-2:2006:
+ Information technology -- Security techniques -- Encryption algorithms
+ -- Part 2: Asymmetric ciphers</em> - section 10.2: 0: Not-single hash,
+ or 1: Single hash. */
+ uint32_t isSingleHashMode,
+ /*! [in] A pointer to the ephemeral public key related to the private
+ key. Must be set to NULL if \p pExtEphUzPrivateKey = NULL. */
+ mbedtls_ecp_point *pExtEphUzPublicKey,
+ /*! [in] The pointer to the external ephemeral private key. This key
+ is used only for testing the function. In regular use, the pointer
+ should be set to NULL and then the random key-pair should be generated
+ internally. */
+ mbedtls_mpi *pExtEphUzPrivateKey,
+ /*! [in] A pointer to the buffer for the secret-key data to be
+ generated. */
+ uint8_t *pSecrKey,
+ /*! [in] The size of the secret-key data in bytes. */
+ size_t secrKeySize,
+ /*! [in] A pointer to the encrypted cipher text. */
+ uint8_t *pCipherData,
+ /*! [in/out] In: A pointer to the size of the buffer for CipherData
+ output, or Out: The size of the buffer for CipherData output in
+ bytes. */
+ size_t *pCipherDataSize,
+ /*! [in] A pointer to the temporary buffer. */
+ void *pBuff,
+ /*! [in] The size of the buffer pointed by \p pBuff. Must not be less
+ than #MBEDTLS_ECIES_MIN_BUFF_LEN_BYTES. */
+ size_t buffLen,
+ /*! [in] The RNG function required for generating a key pair when
+ \p pExtEphUzPublicKey and \p pExtEphUzPrivateKey are NULL */
+ int (*f_rng)(void *, unsigned char *, size_t),
+ /*! [in] The RNG parameter. */
+ void *p_rng
+ );
+
+/*!
+ @brief This function decrypts the encapsulated secret key passed by the
+ sender, according to <em>ISO/IEC 18033-2:2006: Information technology --
+ Security techniques -- Encryption algorithms -- Part 2: Asymmetric
+ ciphers</em>, sec. 10.2.4 - ECIES-KEM Decryption.
+
+ @note The KDF2 function mode must be used for compliance with <em>X9.63-2011:
+ Public Key Cryptography for the Financial Services Industry – Key Agreement
+ and Key Transport Using Elliptic Curve Cryptograph</em>. \par
+
+ @note The term "sender" indicates an entity that creates and
+ encapsulates the secret key using this function. The term "recipient"
+ indicates another entity which receives and decrypts the secret key. \par
+
+ @note All public and private keys that are used must relate to the same EC
+ Domain. \par
+
+ @return CCError_t \c 0 on success.
+ */
+CCError_t mbedtls_ecies_kem_decrypt(
+ /*! [in] The ECP group to use. */
+ mbedtls_ecp_group *pGrp,
+ /*! [in] A pointer to the private key of the recipient. */
+ mbedtls_mpi *pRecipUzPrivKey,
+ /*! [in] The KDF function mode to use: KDF1 or KDF2. For more
+ information, see CCKdfDerivFuncMode_t() in cc_kdf.h. */
+ CCKdfDerivFuncMode_t kdfDerivMode,
+ /*! [in] The used hash function. */
+ mbedtls_hkdf_hashmode_t kdfHashMode,
+ /*! [in] The specific ECIES mode definition: 0,1, according to
+ <em>ISO/IEC 18033-2:2006: Information technology -- Security techniques
+ -- Encryption algorithms -- Part 2: Asymmetric ciphers</em> -
+ section 10.2. */
+ uint32_t isSingleHashMode,
+ /*! [in] A pointer to the received encrypted cipher data. */
+ uint8_t *pCipherData,
+ /*! [in] The size of the cipher data in bytes. */
+ size_t cipherDataSize,
+ /*! [in] A pointer to the buffer for the secret-key data to be
+ generated. */
+ uint8_t *pSecrKey,
+ /*! [in] The size of the secret-key data in bytes. */
+ size_t secrKeySize,
+ /*! [in] A pointer to the temporary buffer. */
+ void *pBuff,
+ /*! [in] The size of the buffer pointed by \p pBuff. Must not be
+ less than #MBEDTLS_ECIES_MIN_BUFF_LEN_BYTES. */
+ size_t buffLen
+ );
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_hkdf.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_hkdf.h
new file mode 100644
index 0000000..56d9e90
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_hkdf.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @file
+ @brief This file contains the CryptoCell HKDF key-derivation function API.
+
+ This function is as defined in
+ <em>RFC-5869: HMAC-based Extract-and-Expand Key Derivation Function (HKDF)</em>.
+ */
+
+/*!
+ @defgroup cc_hkdf CryptoCell HKDF key-derivation function API
+ @brief Contains the CryptoCell HMAC key-derivation function API. See mbedtls_cc_hkdf.h.
+
+ @{
+ @ingroup cryptocell_api
+ @}
+ */
+
+#ifndef _MBEDTLS_CC_HKDF_H
+#define _MBEDTLS_CC_HKDF_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_types.h"
+
+/*! The maximal size of the HKDF key in words. */
+#define CC_HKDF_MAX_HASH_KEY_SIZE_IN_BYTES 512
+
+/*! The maximal size of the HKDF hash-digest in Bytes. */
+#define CC_HKDF_MAX_HASH_DIGEST_SIZE_IN_BYTES CC_HASH_SHA512_DIGEST_SIZE_IN_BYTES
+
+/************************ Defines ******************************/
+
+/************************ Enums ********************************/
+/*! Supported HKDF hash modes. */
+typedef enum
+{
+ /*! SHA-1 mode. */
+ CC_HKDF_HASH_SHA1_mode = 0,
+ /*! SHA-224 mode. */
+ CC_HKDF_HASH_SHA224_mode = 1,
+ /*! SHA-256 mode. */
+ CC_HKDF_HASH_SHA256_mode = 2,
+ /*! SHA-384 mode. */
+ CC_HKDF_HASH_SHA384_mode = 3,
+ /*! SHA-512 mode. */
+ CC_HKDF_HASH_SHA512_mode = 4,
+ /*! The maximal number of hash modes. */
+ CC_HKDF_HASH_NumOfModes,
+ /*! Reserved. */
+ CC_HKDF_HASH_OpModeLast = 0x7FFFFFFF,
+
+}mbedtls_hkdf_hashmode_t;
+
+/************************ Typedefs ****************************/
+
+/************************ Structs ******************************/
+
+/************************ Public Variables **********************/
+
+/************************ Public Functions **********************/
+
+/****************************************************************/
+
+
+/*********************************************************************************************************/
+/*!
+ @brief mbedtls_hkdf_key_derivation() performs the HMAC-based key derivation, as define by
+ <em>RFC-5869: HMAC-based Extract-and-Expand Key Derivation Function (HKDF)</em>.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure as defined in cc_kdf_error.h, or in md.h.
+*/
+CCError_t mbedtls_hkdf_key_derivation(
+ mbedtls_hkdf_hashmode_t HKDFhashMode, /*!< [in] The HKDF identifier of the hash function to be used. */
+ uint8_t* Salt_ptr, /*!< [in] A pointer to a non-secret random value. Can be NULL. */
+ size_t SaltLen, /*!< [in] The size of the \p Salt_ptr. */
+ uint8_t* Ikm_ptr, /*!< [in] A pointer to an input key message. */
+ uint32_t IkmLen, /*!< [in] The size of the input key message */
+ uint8_t* Info, /*!< [in] A pointer to an optional context and application-specific information. Can be NULL */
+ uint32_t InfoLen, /*!< [in] The size of the application-specific information. */
+ uint8_t* Okm, /*!< [in] A pointer to an output key material. */
+ uint32_t OkmLen, /*!< [in] The size of the output key material. */
+ CCBool IsStrongKey /*!< [in] If TRUE, no need to perform the extraction phase. */
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_hkdf_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_hkdf_error.h
new file mode 100644
index 0000000..3649fda
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_hkdf_error.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @file
+ @brief This file contains the error definitions of the CryptoCell HKDF APIs.
+ */
+
+/*!
+ @defgroup cc_hkdf_error Specific errors of the HKDF key-derivation APIs
+ @brief Contains the CryptoCell HKDF-API error definitions. See mbedtls_cc_hkdf_error.h.
+ @{
+ @ingroup cc_hkdf
+ @}
+ */
+
+#ifndef _MBEDTLS_CC_HKDF_ERROR_H
+#define _MBEDTLS_CC_HKDF_ERROR_H
+
+#include "cc_error.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines *******************************/
+
+/* The base address for the CryptoCell HKDF module errors - 0x00F01100. */
+/*! Invalid argument. */
+#define CC_HKDF_INVALID_ARGUMENT_POINTER_ERROR (CC_HKDF_MODULE_ERROR_BASE + 0x0UL)
+/*! Invalid argument size. */
+#define CC_HKDF_INVALID_ARGUMENT_SIZE_ERROR (CC_HKDF_MODULE_ERROR_BASE + 0x1UL)
+/*! Illegal hash mode. */
+#define CC_HKDF_INVALID_ARGUMENT_HASH_MODE_ERROR (CC_HKDF_MODULE_ERROR_BASE + 0x3UL)
+/*! HKDF not supported. */
+#define CC_HKDF_IS_NOT_SUPPORTED (CC_HKDF_MODULE_ERROR_BASE + 0xFFUL)
+
+/************************ Enums *********************************/
+
+/************************ Typedefs *****************************/
+
+/************************ Structs ******************************/
+
+/************************ Public Variables **********************/
+
+/************************ Public Functions **********************/
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_MBEDTLS_CC_HKDF_ERROR_H
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_poly.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_poly.h
new file mode 100644
index 0000000..f43d41f
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_poly.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @file
+ @brief This file contains all of the CryptoCell POLY APIs, their enums and definitions.
+ */
+
+ /*!
+ @defgroup cc_poly CryptoCell POLY APIs
+ @brief Contains all CryptoCell POLY APIs. See mbedtls_cc_poly.h.
+
+ @{
+ @ingroup cryptocell_api
+ @}
+ */
+
+#ifndef _MBEDTLS_CC_POLY_H
+#define _MBEDTLS_CC_POLY_H
+
+
+#include "cc_pal_types.h"
+#include "cc_error.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+/*! The size of the POLY key in words. */
+#define CC_POLY_KEY_SIZE_IN_WORDS 8
+/*! The size of the POLY key in Bytes. */
+#define CC_POLY_KEY_SIZE_IN_BYTES (CC_POLY_KEY_SIZE_IN_WORDS*CC_32BIT_WORD_SIZE)
+/*! The size of the POLY MAC in words. */
+#define CC_POLY_MAC_SIZE_IN_WORDS 4
+/*! The size of the POLY MAC in Bytes. */
+#define CC_POLY_MAC_SIZE_IN_BYTES (CC_POLY_MAC_SIZE_IN_WORDS*CC_32BIT_WORD_SIZE)
+
+/************************ Typedefs ****************************/
+
+/*! The definition of the ChaCha-MAC buffer. */
+typedef uint32_t mbedtls_poly_mac[CC_POLY_MAC_SIZE_IN_WORDS];
+
+/*! The definition of the ChaCha-key buffer. */
+typedef uint32_t mbedtls_poly_key[CC_POLY_KEY_SIZE_IN_WORDS];
+
+/************************ Public Functions **********************/
+
+/****************************************************************************************************/
+/*!
+ @brief This function performs the POLY MAC Calculation.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure, as defined in mbedtls_cc_poly_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_poly(
+ mbedtls_poly_key pKey, /*!< [in] A pointer to the key buffer of the user. */
+ uint8_t *pDataIn, /*!< [in] A pointer to the buffer of the input data to the ChaCha. Must not be null. */
+ size_t dataInSize, /*!< [in] The size of the input data. Must not be zero. */
+ mbedtls_poly_mac macRes /*!< [in/out] A pointer to the MAC-result buffer.*/
+);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _MBEDTLS_CC_POLY_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_poly_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_poly_error.h
new file mode 100644
index 0000000..1044da4
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_poly_error.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @file
+ @brief This file contains the error definitions of the CryptoCell POLY APIs.
+
+ @defgroup cc_poly_errors Specific errors of the CryptoCell POLY APIs
+ @brief Contains the CryptoCell POLY-API error definitions. See mbedtls_cc_poly_error.h.
+ @{
+ @ingroup cc_poly
+ @}
+ */
+
+#ifndef _MBEDTLS_CC_POLY_ERROR_H
+#define _MBEDTLS_CC_POLY_ERROR_H
+
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+/* The base address of errors for the CryptoCell POLY module - 0x00F02500 */
+/*! Invalid key. */
+#define CC_POLY_KEY_INVALID_ERROR (CC_POLY_MODULE_ERROR_BASE + 0x01UL)
+/*! Invalid input data. */
+#define CC_POLY_DATA_INVALID_ERROR (CC_POLY_MODULE_ERROR_BASE + 0x02UL)
+/*! Illegal input data size. */
+#define CC_POLY_DATA_SIZE_INVALID_ERROR (CC_POLY_MODULE_ERROR_BASE + 0x03UL)
+/*! MAC calculation error. */
+#define CC_POLY_RESOURCES_ERROR (CC_POLY_MODULE_ERROR_BASE + 0x04UL)
+
+/************************ Enums ********************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Structs *****************************/
+
+/************************ Public Variables *********************/
+
+/************************ Public Functions *********************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_MBEDTLS_CC_POLY_ERROR_H
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_sha512_t.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_sha512_t.h
new file mode 100644
index 0000000..64ccaf8
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_sha512_t.h
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_sha512_t_h
+ @{
+ */
+
+
+/*!
+ @file
+ @brief This file contains all of the CryptoCell SHA-512 truncated APIs, their
+ enums and definitions.
+ */
+
+#ifndef _MBEDTLS_CC_SHA512_T_H
+#define _MBEDTLS_CC_SHA512_T_H
+
+#include <sha512.h>
+
+/*!
+ @brief This function initializes the SHA-512_t context.
+ */
+void mbedtls_sha512_t_init(
+ /*! The SHA-512_t context to initialize. */
+ mbedtls_sha512_context *ctx
+ );
+
+/*!
+ @brief This function clears the SHA-512_t context.
+ */
+void mbedtls_sha512_t_free(
+ /*! The SHA-512_t context to clear. */
+ mbedtls_sha512_context *ctx
+ );
+
+/*!
+ @brief This function starts a SHA-512_t checksum calculation.
+ */
+void mbedtls_sha512_t_starts(
+ /*! The SHA-512_t context to initialize. */
+ mbedtls_sha512_context *ctx,
+ /*! Determines which function to use: 0: Use SHA-512/256, or 1:
+ Use SHA-512/224. */
+ int is224
+ );
+
+/*!
+ @brief This function feeds an input buffer into an ongoing SHA-512_t
+ checksum calculation.
+ */
+void mbedtls_sha512_t_update(
+ /*! The SHA-512_t context. */
+ mbedtls_sha512_context *ctx,
+ /*! The buffer holding the input data. */
+ const unsigned char *input,
+ /*! The length of the input data. */
+ size_t ilen
+ );
+
+/*!
+ @brief This function finishes the SHA-512_t operation, and writes
+ the result to the output buffer.
+
+ <ul><li>For SHA512/224, the output buffer will include
+ the 28 leftmost bytes of the SHA-512 digest.</li>
+ <li>For SHA512/256, the output buffer will include
+ the 32 leftmost bytes of the SHA-512 digest.</li></ul>
+ */
+void mbedtls_sha512_t_finish(
+ /*! The SHA-512_t context. */
+ mbedtls_sha512_context *ctx,
+ /*! The SHA-512/256 or SHA-512/224 checksum result. */
+ unsigned char output[32],
+ /*! Determines which function to use: 0: Use SHA-512/256, or 1:
+ Use SHA-512/224. */
+ int is224
+ );
+
+/*!
+ @brief This function calculates the SHA-512 checksum of a buffer.
+
+ The function performs the following operations:
+ <ul><li>Allocates the context.<li><li>Calculates
+ the checksum.</li><li>Frees the context.</li></ul>
+ The SHA-512 result is calculated as
+ output = SHA-512(input buffer).
+*/
+void mbedtls_sha512_t(
+ /*! The buffer holding the input data. */
+ const unsigned char *input,
+ /*! The length of the input data. */
+ size_t ilen,
+ /*! The SHA-512/256 or SHA-512/224 checksum result. */
+ unsigned char output[32],
+ /*! Determines which function to use: 0: Use SHA-512/256, or 1:
+ Use SHA-512/224. */
+ int is224
+ );
+
+/*!
+ @}
+ */
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_srp.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_srp.h
new file mode 100644
index 0000000..7282e17
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_srp.h
@@ -0,0 +1,397 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+ /*!
+ @addtogroup cc_srp
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains all of the CryptoCell SRP APIs, their enums and
+ definitions.
+ */
+
+#ifndef _MBEDTLS_CC_SRP_H
+#define _MBEDTLS_CC_SRP_H
+
+#include "cc_pal_types.h"
+#include "cc_error.h"
+#include "cc_pka_defs_hw.h"
+#include "cc_hash_defs.h"
+#include "cc_rnd_common.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!\internal The following describes the SRP APIs usage for the Device and the Accessory :*
+
+ Device (User) Accessory (Host)
+* -------------- -----------------
+
+ 1. CC_SRP_HK_INIT(CC_SRP_USER, .......) CC_SRP_HK_INIT(CC_SRP_HOST, .....)
+
+ 2. CC_SrpPwdVerCreate(..)
+
+ 3. CC_SrpUserPubKeyCreate(..) CC_SrpHostPubKeyCreate(..)
+
+ 4. CC_SrpUserProofCalc(..)
+
+ 5. CC_SrpHostProofVerifyAndCalc(..)
+
+ 6. CC_SrpUserProofVerify(..)
+
+ 7. CC_SrpClear(..) CC_SrpClear(..)
+
+ */
+
+/************************ Defines ******************************/
+/* The SRP modulus sizes. */
+/*! SRP modulus size of 1024 bits. */
+#define CC_SRP_MODULUS_SIZE_1024_BITS 1024
+/*! SRP modulus size of 1536 bits. */
+#define CC_SRP_MODULUS_SIZE_1536_BITS 1536
+/*! SRP modulus size of 2048 bits. */
+#define CC_SRP_MODULUS_SIZE_2048_BITS 2048
+/*! SRP modulus size of 3072 bits. */
+#define CC_SRP_MODULUS_SIZE_3072_BITS 3072
+
+/*! The maximal size of the SRP modulus in bits. */
+#define CC_SRP_MAX_MODULUS_IN_BITS CC_SRP_MODULUS_SIZE_3072_BITS
+/*! The maximal size of the SRP modulus in bytes. */
+#define CC_SRP_MAX_MODULUS (CC_SRP_MAX_MODULUS_IN_BITS/CC_BITS_IN_BYTE)
+/*! The maximal size of the SRP modulus in words. */
+#define CC_SRP_MAX_MODULUS_IN_WORDS (CC_SRP_MAX_MODULUS_IN_BITS/CC_BITS_IN_32BIT_WORD)
+
+/* SRP private number size range. */
+/*! The minimal size of the SRP private number in bits. */
+#define CC_SRP_PRIV_NUM_MIN_SIZE_IN_BITS (256)
+/*! The minimal size of the SRP private number in bytes. */
+#define CC_SRP_PRIV_NUM_MIN_SIZE (CC_SRP_PRIV_NUM_MIN_SIZE_IN_BITS/CC_BITS_IN_BYTE)
+/*! The minimal size of the SRP private number in words. */
+#define CC_SRP_PRIV_NUM_MIN_SIZE_IN_WORDS (CC_SRP_PRIV_NUM_MIN_SIZE_IN_BITS/CC_BITS_IN_32BIT_WORD)
+/*! The maximal size of the SRP private number in bits. */
+#define CC_SRP_PRIV_NUM_MAX_SIZE_IN_BITS (CC_SRP_MAX_MODULUS_IN_BITS)
+/*! The maximal size of the SRP private number in bytes. */
+#define CC_SRP_PRIV_NUM_MAX_SIZE (CC_SRP_PRIV_NUM_MAX_SIZE_IN_BITS/CC_BITS_IN_BYTE)
+/*! The maximal size of the SRP private number in words. */
+#define CC_SRP_PRIV_NUM_MAX_SIZE_IN_WORDS (CC_SRP_PRIV_NUM_MAX_SIZE_IN_BITS/CC_BITS_IN_32BIT_WORD)
+
+/*! The maximal size of the SRP hash digest in words. */
+#define CC_SRP_MAX_DIGEST_IN_WORDS CC_HASH_RESULT_SIZE_IN_WORDS
+/*! The maximal size of the SRP hash digest in bytes. */
+#define CC_SRP_MAX_DIGEST (CC_SRP_MAX_DIGEST_IN_WORDS*CC_32BIT_WORD_SIZE)
+
+/*! The minimal size of the salt in bytes. */
+#define CC_SRP_MIN_SALT_SIZE (8)
+/*! The minimal size of the salt in words. */
+#define CC_SRP_MIN_SALT_SIZE_IN_WORDS (CC_SRP_MIN_SALT_SIZE/CC_32BIT_WORD_SIZE)
+/*! The maximal size of the salt in bytes. */
+#define CC_SRP_MAX_SALT_SIZE (64)
+/*! The maximal size of the salt in words. */
+#define CC_SRP_MAX_SALT_SIZE_IN_WORDS (CC_SRP_MAX_SALT_SIZE/CC_32BIT_WORD_SIZE)
+
+/************************ Typedefs ****************************/
+/*! The definition of the SRP modulus buffer. */
+typedef uint8_t mbedtls_srp_modulus[CC_SRP_MAX_MODULUS];
+
+/*! The definition of the SRP digest buffer. */
+typedef uint8_t mbedtls_srp_digest[CC_SRP_MAX_DIGEST];
+
+/*! The definition of the SRP session key. */
+typedef uint8_t mbedtls_srp_sessionKey[2*CC_SRP_MAX_DIGEST];
+
+/************************ Enums ********************************/
+
+/*! Supported SRP versions. */
+typedef enum {
+ /*! SRP version 3. */
+ CC_SRP_VER_3 = 0,
+ /*! SRP version 6. */
+ CC_SRP_VER_6 = 1,
+ /*! SRP version 6A. */
+ CC_SRP_VER_6A = 2,
+ /*! SRP version HK. */
+ CC_SRP_VER_HK = 3,
+/*! The maximal number of supported versions. */
+ CC_SRP_NumOfVersions,
+ /*! Reserved.*/
+ CC_SRP_VersionLast= 0x7FFFFFFF,
+}mbedtls_srp_version_t;
+
+/*! SRP entity types. */
+typedef enum {
+ /*! The host entity, also known as server, verifier, or accessory. */
+ CC_SRP_HOST = 1,
+ /*! The user entity, also known as client, or device. */
+ CC_SRP_USER = 2,
+ /*! The maximal number of entities types. */
+ CC_SRP_NumOfEntityType,
+ /*! Reserved. */
+ CC_SRP_EntityLast= 0x7FFFFFFF,
+}mbedtls_srp_entity_t;
+
+/************************ Structs ******************************/
+
+/*!
+ @brief Group parameters for the SRP.
+
+ Defines the modulus and the generator used.
+ */
+typedef struct mbedtls_srp_group_param {
+ /*! The SRP modulus. */
+ mbedtls_srp_modulus modulus;
+ /*! The SRP generator. */
+ uint8_t gen;
+ /*! The size of the SRP modulus in bits. */
+ size_t modSizeInBits;
+ /*! The valid SRP Np. */
+ uint32_t validNp;
+ /*! The SRP Np buffer. */
+ uint32_t Np[CC_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS];
+}mbedtls_srp_group_param;
+
+/************************ context Structs ******************************/
+/*! The SRP context prototype */
+typedef struct mbedtls_srp_context {
+ /*! The SRP entitiy type. */
+ mbedtls_srp_entity_t srpType;
+ /*! The SRP version. */
+ mbedtls_srp_version_t srpVer;
+ /*! The group parameter including the modulus information. */// N, g, Np
+ mbedtls_srp_group_param groupParam;
+ /*! The hash mode. */
+ CCHashOperationMode_t hashMode;
+ /*! The hash digest size. */
+ size_t hashDigestSize;
+ /*! The session key size. */
+ size_t sessionKeySize;
+ /*! A pointer to the RND context. */
+ CCRndContext_t *pRndCtx;
+ /*! The modulus. */ // a or b
+ mbedtls_srp_modulus ephemPriv;
+ /*! The modulus size. */
+ size_t ephemPrivSize;
+ /*! The user-name digest. */// M
+ mbedtls_srp_digest userNameDigest;
+ /*! The cred digest. */ // p
+ mbedtls_srp_digest credDigest;
+ /*! The SRP K multiplier. */ // k multiplier
+ mbedtls_srp_digest kMult;
+}mbedtls_srp_context;
+
+
+/************************ SRP common Functions **********************/
+/*****************************************************************************/
+/*!
+ @brief This function initiates the SRP context.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure as defined in mbedtls_cc_srp_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_srp_init(
+ /*! [in] The SRP entity type. */
+ mbedtls_srp_entity_t srpType,
+ /*! [in] The SRP version. */
+ mbedtls_srp_version_t srpVer,
+ /*! [in] A pointer to the SRP modulus, BE Byte buffer. */
+ mbedtls_srp_modulus srpModulus,
+ /*! [in] The SRP generator param. */
+ uint8_t srpGen,
+ /*! [in] The size of the SRP modulus in bits. Valid values are: 1024
+ bits, 1536 bits, 2048 bits, or 3072 bits. */
+ size_t modSizeInBits,
+ /*! [in] The hash mode. */
+ CCHashOperationMode_t hashMode,
+ /*! [in] A pointer to the username. */
+ uint8_t *pUserName,
+ /*! [in] The size of the username buffer. Must be larger than 0. */
+ size_t userNameSize,
+ /*! [in] A pointer to the user password. */
+ uint8_t *pPwd,
+ /*! [in] The size of the user-password buffer. Must be larger than 0
+ if \p pPwd is valid. */
+ size_t pwdSize,
+ /*! [in] A pointer to the RND context. */
+ CCRndContext_t *pRndCtx,
+ /*! [out] A pointer to the SRP host context. */
+ mbedtls_srp_context *pCtx
+);
+
+/*! Macro definition for a specific SRP-initialization function. */
+#define CC_SRP_HK_INIT(srpType, srpModulus, srpGen, modSizeInBits, pUserName, userNameSize, pPwd, pwdSize, pRndCtx, pCtx) \
+ mbedtls_srp_init(srpType, CC_SRP_VER_HK, srpModulus, srpGen, modSizeInBits, CC_HASH_SHA512_mode, pUserName, userNameSize, pPwd, pwdSize, pRndCtx, pCtx)
+
+
+/*****************************************************************************/
+/*!
+ @brief This function calculates \p pSalt and \p pwdVerifier.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure, as defined in mbedtls_cc_srp_error.h,
+ cc_rnd_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_srp_pwd_ver_create(
+ /*! [in] The size of the random salt to generate. The range is between
+ #CC_SRP_MIN_SALT_SIZE and #CC_SRP_MAX_SALT_SIZE. */
+ size_t saltSize,
+ /*! [out] A pointer to the \p pSalt number (s). */
+ uint8_t *pSalt,
+ /*! [out] A pointer to the password verifier (v). */
+ mbedtls_srp_modulus pwdVerifier,
+ /*! [out] A pointer to the SRP context. */
+ mbedtls_srp_context *pCtx
+);
+
+
+/*****************************************************************************/
+/*!
+ @brief This function clears the SRP context.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure, as defined in mbedtls_cc_srp_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_srp_clear(
+ /*! [in/out] A pointer to the SRP context. */
+ mbedtls_srp_context *pCtx
+);
+
+
+/************************ SRP Host Functions **********************/
+/*****************************************************************************/
+/*!
+ @brief This function generates the public and private host ephemeral keys,
+ known as B and b in <em>RFC 5054 Using the Secure Remote Password (SRP)
+ Protocol for TLS Authentication</em>.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure, as defined in mbedtls_cc_srp_error.h or
+ cc_rnd_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_srp_host_pub_key_create(
+ /*! [in] The size of the generated ephemeral private key (b). The range
+ is between #CC_SRP_PRIV_NUM_MIN_SIZE and #CC_SRP_PRIV_NUM_MAX_SIZE */
+ size_t ephemPrivSize,
+ /*! [in] A pointer to the verifier (v). */
+ mbedtls_srp_modulus pwdVerifier,
+ /*! [out] A pointer to the host ephemeral public key (B). */
+ mbedtls_srp_modulus hostPubKeyB,
+ /*! [in/out] A pointer to the SRP context. */
+ mbedtls_srp_context *pCtx
+);
+
+
+/*!
+ @brief This function verifies the user proof, and calculates the host-message
+ proof.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure, as defined in mbedtls_cc_srp_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_srp_host_proof_verify_and_calc(
+ /*! [in] The size of the random salt. The range is between
+ #CC_SRP_MIN_SALT_SIZE and #CC_SRP_MAX_SALT_SIZE. */
+ size_t saltSize,
+ /*! [in] A pointer to the pSalt number. */
+ uint8_t *pSalt,
+ /*! [in] A pointer to the password verifier (v). */
+ mbedtls_srp_modulus pwdVerifier,
+ /*! [in] A pointer to the ephemeral public key of the user (A). */
+ mbedtls_srp_modulus userPubKeyA,
+ /*! [in] A pointer to the ephemeral public key of the host (B). */
+ mbedtls_srp_modulus hostPubKeyB,
+ /*! [in] A pointer to the SRP user-proof buffer (M1). */
+ mbedtls_srp_digest userProof,
+ /*! [out] A pointer to the SRP host-proof buffer (M2). */
+ mbedtls_srp_digest hostProof,
+ /*! [out] A pointer to the SRP session key (K). */
+ mbedtls_srp_sessionKey sessionKey,
+ /*! [in] A pointer to the SRP context. */
+ mbedtls_srp_context *pCtx
+);
+
+
+
+/************************ SRP User Functions **********************/
+/*****************************************************************************/
+/*!
+ @brief This function generates public and private user ephemeral keys, known
+ as A and a in <em>RFC 5054 Using the Secure Remote Password (SRP) Protocol
+ for TLS Authentication</em>.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure, as defined in mbedtls_cc_srp_error.h or
+ cc_rnd_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_srp_user_pub_key_create(
+ /*! [in] The size of the generated ephemeral private key (a). The range
+ is between #CC_SRP_PRIV_NUM_MIN_SIZE and #CC_SRP_PRIV_NUM_MAX_SIZE.
+ The size must be 32 bit aligned */
+ size_t ephemPrivSize,
+ /*! [out] A pointer to the user ephemeral public key (A). */
+ mbedtls_srp_modulus userPubKeyA,
+ /*! [in/out] A pointer to the SRP context. */
+ mbedtls_srp_context *pCtx
+);
+
+
+/*****************************************************************************/
+/*!
+ @brief This function calculates the user proof.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure, as defined in mbedtls_cc_srp_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_srp_user_proof_calc(
+ /*! [in] The size of the random salt. The range is between
+ #CC_SRP_MIN_SALT_SIZE and #CC_SRP_MAX_SALT_SIZE. */
+ size_t saltSize,
+ /*! [in] A pointer to the pSalt number. */
+ uint8_t *pSalt,
+ /*! [in] A pointer to the public ephmeral key of the user (A). */
+ mbedtls_srp_modulus userPubKeyA,
+ /*! [in] A pointer to the public ephmeral key of the host (B). */
+ mbedtls_srp_modulus hostPubKeyB,
+ /*! [out] A pointer to the SRP user proof buffer (M1). */
+ mbedtls_srp_digest userProof,
+ /*! [out] A pointer to the SRP session key (K). */
+ mbedtls_srp_sessionKey sessionKey,
+ /*! [out] A pointer to the SRP context. */
+ mbedtls_srp_context *pCtx
+);
+
+/*****************************************************************************/
+/*!
+ @brief This function verifies the host proof.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure, as defined in mbedtls_cc_srp_error.h.
+ */
+CIMPORT_C CCError_t mbedtls_srp_user_proof_verify(
+ /*! [in] A pointer to the SRP session key (K). */
+ mbedtls_srp_sessionKey sessionKey,
+ /*! [in] A pointer to the public ephmeral key of the user (A). */
+ mbedtls_srp_modulus userPubKeyA,
+ /*! [in] A pointer to the SRP user proof buffer (M1). */
+ mbedtls_srp_digest userProof,
+ /*! [in] A pointer to the SRP host proof buffer (M2). */
+ mbedtls_srp_digest hostProof,
+ /*! [out] A pointer to the SRP user context. */
+ mbedtls_srp_context *pCtx
+);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif /* #ifndef _MBEDTLS_CC_SRP_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_srp_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_srp_error.h
new file mode 100644
index 0000000..fd13351
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_cc_srp_error.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_srp_errors
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the error definitions of the CryptoCell SRP APIs.
+ */
+
+
+#ifndef _MBEDTLS_CC_SRP_ERROR_H
+#define _MBEDTLS_CC_SRP_ERROR_H
+
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+/* The base address errors of the CryptoCell SRP module - 0x00F02600 */
+/*! Illegal parameter. */
+#define CC_SRP_PARAM_INVALID_ERROR (CC_SRP_MODULE_ERROR_BASE + 0x01UL)
+/*! Illegal modulus size. */
+#define CC_SRP_MOD_SIZE_INVALID_ERROR (CC_SRP_MODULE_ERROR_BASE + 0x02UL)
+/*! Illegal state (uninitialized) . */
+#define CC_SRP_STATE_UNINITIALIZED_ERROR (CC_SRP_MODULE_ERROR_BASE + 0x03UL)
+/*! Result validation error. */
+#define CC_SRP_RESULT_ERROR (CC_SRP_MODULE_ERROR_BASE + 0x04UL)
+/*! Invalid parameter. */
+#define CC_SRP_PARAM_ERROR (CC_SRP_MODULE_ERROR_BASE + 0x05UL)
+/*! Internal PKI error. */
+#define CC_SRP_INTERNAL_ERROR (CC_SRP_MODULE_ERROR_BASE + 0x06UL)
+
+/************************ Enums ********************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Structs *****************************/
+
+/************************ Public Variables *********************/
+
+/************************ Public Functions *********************/
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif //_MBEDTLS_CC_SRP_ERROR_H
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_chacha_ext_dma.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_chacha_ext_dma.h
new file mode 100644
index 0000000..598f858
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_chacha_ext_dma.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup chacha_ext_dma
+
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains all the CryptoCell ChaCha external DMA APIs, their
+ enums and definitions.
+ */
+
+#ifndef _MBEDTLS_CHACHA_EXT_DMA_H
+#define _MBEDTLS_CHACHA_EXT_DMA_H
+
+#include "cc_pal_types.h"
+#include "mbedtls_cc_chacha.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+ @brief This function initializes the external DMA control.
+
+ It configures the ChaCha mode, the initial hash value, and other
+ configurations in the ChaCha engine.
+
+ @return \c 0 on success.
+ @return A non-zero value from mbedtls_ext_dma_error.h on failure.
+ */
+int mbedtls_ext_dma_chacha_init(
+ /*! [in] The nonce buffer. */
+ uint8_t * pNonce,
+ /*! [in] The nonce size flag. */
+ mbedtls_chacha_nonce_size_t nonceSizeFlag,
+ /*! [in] The key buffer. */
+ uint8_t * pKey,
+ /*! [in] The size of the key buffer. Must be 32 bytes. */
+ uint32_t keySizeBytes,
+ /*! [in] Initial counter value. */
+ uint32_t initialCounter,
+ /*! [in] The ChaCha operation: Encrypt or Decrypt. */
+ mbedtls_chacha_encrypt_mode_t EncryptDecryptFlag,
+ /*! [in] Input data length in bytes */
+ uint32_t dataSize
+ );
+
+
+/*!
+ @brief This function frees used resources.
+
+ @return \c CC_OK on success.
+ @return A non-zero value from mbedtls_ext_dma_error.h on failure.
+ */
+int mbedtls_chacha_ext_dma_finish(void);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif /* #ifndef _MBEDTLS_CHACHA_EXT_DMA_H */
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_ext_dma_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_ext_dma_error.h
new file mode 100644
index 0000000..dfe6f01
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_ext_dma_error.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup ext_dma_errors
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the error definitions of the CryptoCell external
+ DMA APIs.
+ */
+
+#ifndef _MBEDTLS_EXT_DMA_ERROR_H
+#define _MBEDTLS_EXT_DMA_ERROR_H
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+/* The base address for errors of the CryptoCell external DMA. CC_EXT_DMA_MODULE_ERROR_BASE = 0x00F02D00 */
+/* AES errors */
+/*! Illegal mode. */
+#define EXT_DMA_AES_ILLEGAL_OPERATION_MODE_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0x00UL)
+/*! Illegal encryption mode. */
+#define EXT_DMA_AES_INVALID_ENCRYPT_MODE_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0x01UL)
+/*! Illegal decryption mode. */
+#define EXT_DMA_AES_DECRYPTION_NOT_ALLOWED_ON_THIS_MODE (CC_EXT_DMA_MODULE_ERROR_BASE + 0x02UL)
+/*! Illegal key size. */
+#define EXT_DMA_AES_ILLEGAL_KEY_SIZE_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0x03UL)
+/*! Illegal IV. */
+#define EXT_DMA_AES_INVALID_IV_OR_TWEAK_PTR_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0x04UL)
+
+/* Hash errors */
+/*! Illegal hash operation mode. */
+#define EXT_DMA_HASH_ILLEGAL_OPERATION_MODE_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0x05UL)
+/*! Illegal result buffer. */
+#define EXT_DMA_HASH_INVALID_RESULT_BUFFER_POINTER_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0x06UL)
+/*! Illegal parameters. */
+#define EXT_DMA_HASH_ILLEGAL_PARAMS_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0x07UL)
+
+/* Chacha errors */
+/*! Invalid nonce. */
+#define EXT_DMA_CHACHA_INVALID_NONCE_PTR_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0x08UL)
+/*! Invalid encrypt or decrypt mode. */
+#define EXT_DMA_CHACHA_INVALID_ENCRYPT_MODE_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0x09UL)
+/*! Invalid key pointer. */
+#define EXT_DMA_CHACHA_INVALID_KEY_POINTER_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0xAUL)
+/*! Invalid key size. */
+#define EXT_DMA_CHACHA_ILLEGAL_KEY_SIZE_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0xBUL)
+/*! Invalid nonce size flag. */
+#define EXT_DMA_CHACHA_INVALID_NONCE_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0xCUL)
+/*! Illegal input size. */
+#define EXT_DMA_CHACHA_ILLEGAL_INPUT_SIZE_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0xDUL)
+
+/* External DMA modules errors */
+/*! Illegal input size. */
+#define EXT_DMA_ILLEGAL_INPUT_SIZE_ERROR (CC_EXT_DMA_MODULE_ERROR_BASE + 0xF0UL)
+
+/************************ Public Functions *********************/
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif // _MBEDTLS_EXT_DMA_ERROR_H
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_hash_ext_dma.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_hash_ext_dma.h
new file mode 100644
index 0000000..90c417e
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc3x/mbedtls_hash_ext_dma.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+/*!
+ @addtogroup hash_ext_dma
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains all the CryptoCell hash external DMA APIs, their
+ enums and definitions.
+ */
+
+#ifndef _MBEDTLS_HASH_EXT_DMA_H
+#define _MBEDTLS_HASH_EXT_DMA_H
+
+#include "cc_pal_types.h"
+#include "cc_hash_defs.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+ @brief This function initializes the External DMA Control.
+
+ It configures the hash mode, the initial hash value, and other configurations.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure.
+ */
+int mbedtls_hash_ext_dma_init(
+ /*! [in] The hash mode. Supported modes are: SHA1, SHA224 or SHA256. */
+ CCHashOperationMode_t operationMode,
+ /*! [in] Input data size in bytes. */
+ uint32_t dataSize
+ );
+
+/*!
+ @brief This function returns the digest after the hash operation, and frees
+ used resources.
+
+ @return \c CC_OK on success.
+ @return A non-zero value on failure.
+ */
+int mbedtls_hash_ext_dma_finish(
+ /*! [in] The hash mode. Supported modes are: SHA1, SHA224 or SHA256. */
+ CCHashOperationMode_t operationMode,
+ /*! [in] The size of the hash digest in bytes. */
+ uint32_t digestBufferSize,
+ /*! [out] The output digest buffer. */
+ uint32_t *digestBuffer
+ );
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif /* #ifndef MBEDTLS_HASH_EXT_DMA_H_ */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_aes_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_aes_defs.h
new file mode 100644
index 0000000..b9d6689
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_aes_defs.h
@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+ /*!
+ @addtogroup cc_aes_defs
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the type definitions that are used by the CryptoCell
+ AES APIs.
+ */
+
+
+#ifndef CC_AES_DEFS_H
+#define CC_AES_DEFS_H
+
+#include "cc_pal_types.h"
+#include "cc_aes_defs_proj.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Defines ******************************/
+/*! The size of the AES block in words. */
+#define CC_AES_CRYPTO_BLOCK_SIZE_IN_WORDS 4
+/*! The size of the AES block in bytes. */
+#define CC_AES_BLOCK_SIZE_IN_BYTES (CC_AES_CRYPTO_BLOCK_SIZE_IN_WORDS * sizeof(uint32_t))
+
+/*! The size of the IV buffer in words. */
+#define CC_AES_IV_SIZE_IN_WORDS CC_AES_CRYPTO_BLOCK_SIZE_IN_WORDS
+/*! The size of the IV buffer in bytes. */
+#define CC_AES_IV_SIZE_IN_BYTES (CC_AES_IV_SIZE_IN_WORDS * sizeof(uint32_t))
+
+
+/************************ Enums ********************************/
+/*! The AES operation:<ul><li>Encrypt</li><li>Decrypt</li></ul>. */
+typedef enum {
+ /*! An AES encrypt operation. */
+ CC_AES_ENCRYPT = 0,
+ /*! An AES decrypt operation. */
+ CC_AES_DECRYPT = 1,
+ /*! The maximal number of operations. */
+ CC_AES_NUM_OF_ENCRYPT_MODES,
+ /*! Reserved. */
+ CC_AES_ENCRYPT_MODE_LAST = 0x7FFFFFFF
+}CCAesEncryptMode_t;
+
+/*! The AES operation mode. */
+typedef enum {
+ /*! ECB mode. */
+ CC_AES_MODE_ECB = 0,
+ /*! CBC mode. */
+ CC_AES_MODE_CBC = 1,
+ /*! CBC-MAC mode. */
+ CC_AES_MODE_CBC_MAC = 2,
+ /*! CTR mode. */
+ CC_AES_MODE_CTR = 3,
+ /*! XCBC-MAC mode. */
+ CC_AES_MODE_XCBC_MAC = 4,
+ /*! CMAC mode. */
+ CC_AES_MODE_CMAC = 5,
+ /*! XTS mode. */
+ CC_AES_MODE_XTS = 6,
+ /*! CBC-CTS mode. */
+ CC_AES_MODE_CBC_CTS = 7,
+ /*! OFB mode. */
+ CC_AES_MODE_OFB = 8,
+
+ /*! The maximal number of AES modes. */
+ CC_AES_NUM_OF_OPERATION_MODES,
+ /*! Reserved. */
+ CC_AES_OPERATION_MODE_LAST = 0x7FFFFFFF
+}CCAesOperationMode_t;
+
+/*! The AES padding type. */
+typedef enum {
+ /*! No padding. */
+ CC_AES_PADDING_NONE = 0,
+ /*! PKCS7 padding. */
+ CC_AES_PADDING_PKCS7 = 1,
+ /*! The maximal number of AES padding modes. */
+ CC_AES_NUM_OF_PADDING_TYPES,
+ /*! Reserved. */
+ CC_AES_PADDING_TYPE_LAST = 0x7FFFFFFF
+}CCAesPaddingType_t;
+
+/*! The AES key type. */
+typedef enum {
+ /*! The user key. */
+ CC_AES_USER_KEY = 0,
+ /*! The Kplt hardware key. */
+ CC_AES_PLATFORM_KEY = 1,
+ /*! The Kcst hardware key. */
+ CC_AES_CUSTOMER_KEY = 2,
+ /*! The maximal number of AES key types. */
+ CC_AES_NUM_OF_KEY_TYPES,
+ /*! Reserved. */
+ CC_AES_KEY_TYPE_LAST = 0x7FFFFFFF
+}CCAesKeyType_t;
+
+/************************ Typedefs ****************************/
+
+/*! Defines the IV buffer. A 16-byte array. */
+typedef uint8_t CCAesIv_t[CC_AES_IV_SIZE_IN_BYTES];
+
+/*! Defines the AES key data buffer. */
+typedef uint8_t CCAesKeyBuffer_t[CC_AES_KEY_MAX_SIZE_IN_BYTES];
+
+/************************ Structs ******************************/
+
+/*!
+ The context prototype of the user.
+
+ The argument type that is passed by the user to the AES APIs. The context
+ saves the state of the operation, and must be saved by the user until
+ the end of the API flow.
+ */
+typedef struct CCAesUserContext_t {
+ /*! The context buffer for internal usage. */
+ uint32_t buff[CC_AES_USER_CTX_SIZE_IN_WORDS] ;
+}CCAesUserContext_t;
+
+
+/*! The AES key data of the user. */
+typedef struct CCAesUserKeyData_t {
+ /*! A pointer to the key. */
+ uint8_t * pKey;
+ /*! The size of the key in bytes. Valid values for XTS mode, if supported:
+ 32 bytes or 64 bytes, indicating the full size of the double key (2x128 or
+ 2x256 bit). Valid values for XCBC-MAC mode: 16 bytes, as limited by the
+ standard. Valid values for all other modes: 16 bytes, 24 bytes, or
+ 32 bytes. */
+ size_t keySize;
+}CCAesUserKeyData_t;
+
+/*! The AES HW key Data. */
+typedef struct CCAesHwKeyData_t {
+ /*! Slot number. */
+ size_t slotNumber;
+}CCAesHwKeyData_t;
+
+#endif /* CC_AES_DEFS_H */
+
+#ifdef __cplusplus
+}
+
+#endif
+
+/*!
+ @}
+*/
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_aes_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_aes_error.h
new file mode 100644
index 0000000..cd662f9
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_aes_error.h
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+@file
+@brief This file contains the definitions of the CryptoCell AES errors.
+@defgroup cc_aes_error CryptoCell AES specific errors
+@{
+@ingroup cc_aes
+*/
+
+#ifndef CC_AES_ERROR_H
+#define CC_AES_ERROR_H
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+/*! CC_AES_MODULE_ERROR_BASE - 0x00F00000 */
+/*! Illegal user context. */
+#define CC_AES_INVALID_USER_CONTEXT_POINTER_ERROR (CC_AES_MODULE_ERROR_BASE + 0x00UL)
+/*! Illegal IV or tweak pointer. */
+#define CC_AES_INVALID_IV_OR_TWEAK_PTR_ERROR (CC_AES_MODULE_ERROR_BASE + 0x01UL)
+/*! Illegal operation. */
+#define CC_AES_ILLEGAL_OPERATION_MODE_ERROR (CC_AES_MODULE_ERROR_BASE + 0x02UL)
+/*! Illegal key size. */
+#define CC_AES_ILLEGAL_KEY_SIZE_ERROR (CC_AES_MODULE_ERROR_BASE + 0x03UL)
+/*! Illegal key pointer. */
+#define CC_AES_INVALID_KEY_POINTER_ERROR (CC_AES_MODULE_ERROR_BASE + 0x04UL)
+/*! Unsupported key type. */
+#define CC_AES_KEY_TYPE_NOT_SUPPORTED_ERROR (CC_AES_MODULE_ERROR_BASE + 0x05UL)
+/*! Illegal operation. */
+#define CC_AES_INVALID_ENCRYPT_MODE_ERROR (CC_AES_MODULE_ERROR_BASE + 0x06UL)
+/*! User context corrupted. */
+#define CC_AES_USER_CONTEXT_CORRUPTED_ERROR (CC_AES_MODULE_ERROR_BASE + 0x07UL)
+/*! Illegal data in pointer. */
+#define CC_AES_DATA_IN_POINTER_INVALID_ERROR (CC_AES_MODULE_ERROR_BASE + 0x08UL)
+/*! Illegal data out pointer. */
+#define CC_AES_DATA_OUT_POINTER_INVALID_ERROR (CC_AES_MODULE_ERROR_BASE + 0x09UL)
+/*! Illegal data in size. */
+#define CC_AES_DATA_IN_SIZE_ILLEGAL (CC_AES_MODULE_ERROR_BASE + 0x0AUL)
+/*! Illegal data out address. */
+#define CC_AES_DATA_OUT_DATA_IN_OVERLAP_ERROR (CC_AES_MODULE_ERROR_BASE + 0x0BUL)
+/*! Illegal data in buffer size. */
+#define CC_AES_DATA_IN_BUFFER_SIZE_ERROR (CC_AES_MODULE_ERROR_BASE + 0x0CUL)
+/*! Illegal data out buffer size. */
+#define CC_AES_DATA_OUT_BUFFER_SIZE_ERROR (CC_AES_MODULE_ERROR_BASE + 0x0DUL)
+/*! Illegal padding type. */
+#define CC_AES_ILLEGAL_PADDING_TYPE_ERROR (CC_AES_MODULE_ERROR_BASE + 0x0EUL)
+/*! Incorrect padding. */
+#define CC_AES_INCORRECT_PADDING_ERROR (CC_AES_MODULE_ERROR_BASE + 0x0FUL)
+/*! Output is corrupted. */
+#define CC_AES_CORRUPTED_OUTPUT_ERROR (CC_AES_MODULE_ERROR_BASE + 0x10UL)
+/*! Illegal output size. */
+#define CC_AES_DATA_OUT_SIZE_POINTER_INVALID_ERROR (CC_AES_MODULE_ERROR_BASE + 0x11UL)
+/*! Decryption operation is not permitted in this mode. */
+#define CC_AES_DECRYPTION_NOT_ALLOWED_ON_THIS_MODE (CC_AES_MODULE_ERROR_BASE + 0x12UL)
+/*! Additional block operation is not permitted. */
+#define CC_AES_ADDITIONAL_BLOCK_NOT_PERMITTED_ERROR (CC_AES_MODULE_ERROR_BASE + 0x15UL)
+/*! Illegal context size. */
+#define CC_AES_CTX_SIZES_ERROR (CC_AES_MODULE_ERROR_BASE + 0x16UL)
+/*! Illegal parameters. */
+#define CC_AES_ILLEGAL_PARAMS_ERROR (CC_AES_MODULE_ERROR_BASE + 0x60UL)
+/*! Illegal CTR block offset. */
+#define CC_AES_CTR_ILLEGAL_BLOCK_OFFSET_ERROR (CC_AES_MODULE_ERROR_BASE + 0x70UL)
+/*! Illegal counter (in CTR mode). */
+#define CC_AES_CTR_ILLEGAL_COUNTER_ERROR (CC_AES_MODULE_ERROR_BASE + 0x71UL)
+/*! AES is not supported. */
+#define CC_AES_IS_NOT_SUPPORTED (CC_AES_MODULE_ERROR_BASE + 0xFFUL)
+
+/************************ Enums ********************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Structs *****************************/
+
+/************************ Public Variables *********************/
+
+/************************ Public Functions *********************/
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+
+#endif /* #ifndef CC_AES_ERROR_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_aesccm_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_aesccm_error.h
new file mode 100644
index 0000000..2f19d83
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_aesccm_error.h
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_AESCCM_ERROR_H
+#define _CC_AESCCM_ERROR_H
+
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+@file
+@brief This file contains the definitions of the CryptoCell AESCCM errors.
+@defgroup cc_aesccm_error CryptoCell AES-CCM specific errors
+@{
+@ingroup cc_aesccm
+
+*/
+
+/************************ Defines ******************************/
+
+/*! CryptoCell AESCCM module errors. CC_AESCCM_MODULE_ERROR_BASE = 0x00F01500 */
+/*! Invalid context pointer. */
+#define CC_AESCCM_INVALID_USER_CONTEXT_POINTER_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x00UL)
+/*! Illegal key size. */
+#define CC_AESCCM_ILLEGAL_KEY_SIZE_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x01UL)
+/*! Invalid key pointer. */
+#define CC_AESCCM_INVALID_KEY_POINTER_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x02UL)
+/*! Invalid encryption mode. */
+#define CC_AESCCM_INVALID_ENCRYPT_MODE_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x03UL)
+/*! Context is corrupted. */
+#define CC_AESCCM_USER_CONTEXT_CORRUPTED_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x04UL)
+/*! Invalid data in pointer. */
+#define CC_AESCCM_DATA_IN_POINTER_INVALID_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x05UL)
+/*! Invalid data out pointer. */
+#define CC_AESCCM_DATA_OUT_POINTER_INVALID_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x06UL)
+/*! Illegal data in size. */
+#define CC_AESCCM_DATA_IN_SIZE_ILLEGAL (CC_AESCCM_MODULE_ERROR_BASE + 0x07UL)
+/*! Illegal data in or data out address. */
+#define CC_AESCCM_DATA_OUT_DATA_IN_OVERLAP_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x08UL)
+/*! Illegal data out size. */
+#define CC_AESCCM_DATA_OUT_SIZE_INVALID_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x09UL)
+/*! Illegal call to process additional data. */
+#define CC_AESCCM_ADDITIONAL_BLOCK_NOT_PERMITTED_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x0AUL)
+/*! Illegal dma buffer type. */
+#define CC_AESCCM_ILLEGAL_DMA_BUFF_TYPE_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x0BUL)
+/*! Illegal parameter size. */
+#define CC_AESCCM_ILLEGAL_PARAMETER_SIZE_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x0CUL)
+/*! Invalid parameter pointer. */
+#define CC_AESCCM_ILLEGAL_PARAMETER_PTR_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x0DUL)
+/*! Invalid data type. */
+#define CC_AESCCM_ILLEGAL_DATA_TYPE_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x0EUL)
+/*! CCM MAC compare failure. */
+#define CC_AESCCM_CCM_MAC_INVALID_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x0FUL)
+/*! Illegal operation. */
+#define CC_AESCCM_LAST_BLOCK_NOT_PERMITTED_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x10UL)
+/*! Illegal parameter. */
+#define CC_AESCCM_ILLEGAL_PARAMETER_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x11UL)
+/*! Additional data input size is incorrect. */
+#define CC_AESCCM_NOT_ALL_ADATA_WAS_PROCESSED_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x13UL)
+/*! Text data input size is incorrect. */
+#define CC_AESCCM_NOT_ALL_DATA_WAS_PROCESSED_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x14UL)
+/*! Additional data was already processed (must be processed only once). */
+#define CC_AESCCM_ADATA_WAS_PROCESSED_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x15UL)
+/*! Illegal Nonce size. */
+#define CC_AESCCM_ILLEGAL_NONCE_SIZE_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x16UL)
+/*! Illegal tag (MAC) size. */
+#define CC_AESCCM_ILLEGAL_TAG_SIZE_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x17UL)
+/*! Illegal context size. */
+#define CC_AESCCM_CTX_SIZES_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x28UL)
+/*! Illegal parameters. */
+#define CC_AESCCM_ILLEGAL_PARAMS_ERROR (CC_AESCCM_MODULE_ERROR_BASE + 0x29UL)
+/*! AESCCM is not supported. */
+#define CC_AESCCM_IS_NOT_SUPPORTED (CC_AESCCM_MODULE_ERROR_BASE + 0xFFUL)
+
+/************************ Enums ********************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Structs *****************************/
+
+/************************ Public Variables *********************/
+
+/************************ Public Functions *********************/
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+
+
+#endif /* _CC_AESCCM_ERROR_H */
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_build.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_build.h
new file mode 100644
index 0000000..15cda09
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_build.h
@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_ECPKI_BUILD_H
+#define _CC_ECPKI_BUILD_H
+
+/*!
+@file
+@brief This file defines functions for building key structures used in Elliptic Curves Cryptography (ECC).
+@defgroup cryptocell_ecpki CryptoCell ECC APIs
+@{
+@ingroup cryptocell_api
+
+*/
+
+
+#include "cc_error.h"
+#include "cc_ecpki_types.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**********************************************************************************
+ * CC_EcpkiPrivKeyBuild function *
+ **********************************************************************************/
+/*!
+@brief Builds (imports) the user private key structure from an existing private key so
+that this structure can be used by other EC primitives.
+This function should be called before using of the private key. Input
+domain structure must be initialized by EC parameters and auxiliary
+values, using CC_EcpkiGetDomain or CC_EcpkiSetDomain functions.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_ecpki_error.h.
+*/
+CIMPORT_C CCError_t CC_EcpkiPrivKeyBuild(
+ const CCEcpkiDomain_t *pDomain, /*!< [in] The EC domain (curve). */
+ const uint8_t *pPrivKeyIn, /*!< [in] Pointer to private key data. */
+ size_t PrivKeySizeInBytes, /*!< [in] Size of private key data (in bytes). */
+ CCEcpkiUserPrivKey_t *pUserPrivKey /*!< [out] Pointer to the private key structure.
+ This structure is used as input to the ECPKI cryptographic primitives. */
+ );
+
+/**********************************************************************************
+ * CC_EcpkiPublKeyBuildAndCheck function *
+ **********************************************************************************/
+/*!
+@brief Builds a user public key structure from an imported public key,
+so it can be used by other EC primitives.
+When operating the EC cryptographic algorithms with imported EC public
+key, this function should be called before using of the public key.
+
+\note The Incoming public key PublKeyIn structure is big endian bytes array, containing
+concatenation of PC||X||Y. \par
+\note PC - point control single byte, defining the type of point: 0x4 - uncompressed,
+06,07 - hybrid, 2,3 - compressed. \par
+\note X,Y - EC point coordinates of public key (y is omitted in compressed form),
+size of X and Y must be equal to size of EC modulus.
+
+The user may call this function by appropriate macros, according to the necessary validation level in section SEC1. ECC standard: 3.2 of Standards for
+Efficient Cryptography Group (SECG): SEC1 Elliptic Curve Cryptography and ANSI X9.62-2005: Public Key Cryptography for the Financial Services Industry,
+The Elliptic Curve Digital Signature Algorithm (ECDSA):
+<ul><li>Checking the input pointers and sizes only - ::CC_EcpkiPubKeyBuild.</li>
+<li>Partially checking of public key - ::CC_EcpkiPubKeyBuildAndPartlyCheck. </li>
+<li>Full checking of public key - ::CC_EcpkiPubKeyBuildAndFullCheck. </li></ul>
+
+\note Full check mode takes long time and should be used only when it is actually needed.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_ecpki_error.h.
+*/
+/*
+The function performs the following operations:
+- Checks validity of incoming variables and pointers;
+- Converts incoming key data from big endian into little endian;
+- If public key is given in compressed form (i.e. byte[0] = 2 or 3 and
+ coordinate Y is omitted), then the function uncompress it;
+- Performs checking of input key according to CheckMode parameter.
+- Initializes variables and structures.
+*/
+CIMPORT_C CCError_t CC_EcpkiPublKeyBuildAndCheck(
+ const CCEcpkiDomain_t *pDomain, /*!< [in] The EC domain (curve). */
+ uint8_t *pPubKeyIn, /*!< [in] Pointer to the input public key data, in compressed or
+ uncompressed or hybrid form:
+ [PC||X||Y] Big-Endian representation, structured according to
+ [IEEE1363], where:
+ <ul><li>X and Y are the public key's EC point coordinates.
+ In compressed form, Y is omitted.</li>
+ <li> The sizes of X and Y are equal to the size of the EC modulus.</li>
+ <li> PC is a one-byte point control that defines the type of point
+ compression. </li></ul>*/
+ size_t PublKeySizeInBytes, /*!< [in] The size of public key data (in bytes). */
+ ECPublKeyCheckMode_t CheckMode, /*!< [in] The required level of public key verification
+ (higher verification level means longer verification time):
+ <ul><li> 0 = preliminary validation. </li>
+ <li> 1 = partial validation. </li>
+ <li> 2 = full validation. </li></ul>*/
+ CCEcpkiUserPublKey_t *pUserPublKey, /*!< [out] Pointer to the output public key structure.
+ This structure is used as input to the ECPKI cryptographic primitives. */
+ CCEcpkiBuildTempData_t *pTempBuff /*!< [in] Pointer for a temporary buffer required for the build function. */
+ );
+
+
+/**********************************************************************************
+ * CC_EcpkiPubKeyBuild macro *
+ **********************************************************************************/
+/*!
+@brief This macro calls CC_EcpkiPublKeyBuildAndCheck function for building the public key
+while checking input pointers and sizes. For a description of the parameters see ::CC_EcpkiPublKeyBuildAndCheck.
+*/
+#define CC_EcpkiPubKeyBuild(pDomain, pPubKeyIn, PublKeySizeInBytes, pUserPublKey) \
+ CC_EcpkiPublKeyBuildAndCheck((pDomain), (pPubKeyIn), (PublKeySizeInBytes), CheckPointersAndSizesOnly, (pUserPublKey), NULL)
+
+
+/**********************************************************************************
+ * CC_EcpkiPubKeyBuildAndPartlyCheck macro *
+ **********************************************************************************/
+/*!
+@brief This macro calls CC_EcpkiPublKeyBuildAndCheck function for building the public key with partial validation of the key [SEC1] - 3.2.3.
+For a description of the parameters see ::CC_EcpkiPublKeyBuildAndCheck.
+*/
+#define CC_EcpkiPubKeyBuildAndPartlyCheck(pDomain, pPubKeyIn, PublKeySizeInBytes, pUserPublKey, pTempBuff) \
+ CC_EcpkiPublKeyBuildAndCheck((pDomain), (pPubKeyIn), (PublKeySizeInBytes), ECpublKeyPartlyCheck, (pUserPublKey), (pTempBuff))
+
+
+/**********************************************************************************
+ * CC_EcpkiPubKeyBuildAndFullCheck macro *
+ **********************************************************************************/
+/*!
+@brief This macro calls CC_EcpkiPublKeyBuildAndCheck function for building the public key with full validation of the key [SEC1] - 3.2.2.
+For a description of the parameters and return values see CC_EcpkiPublKeyBuildAndCheck.
+*/
+#define CC_EcpkiPubKeyBuildAndFullCheck(pDomain, pPubKeyIn, PublKeySizeInBytes, pUserPublKey, pTempBuff) \
+ CC_EcpkiPublKeyBuildAndCheck((pDomain), (pPubKeyIn), (PublKeySizeInBytes), (ECpublKeyFullCheck), (pUserPublKey), (pTempBuff))
+
+
+/***********************************************************************************
+ * CC_EcpkiPubKeyExport function *
+ ***********************************************************************************/
+/*!
+@brief Converts an existing public key from internal representation to Big-Endian export representation.
+The function converts the X,Y coordinates of public key EC point to big endianness,
+and sets the public key as follows:
+<ul><li>In case "Uncompressed" point: PubKey = PC||X||Y, PC = 0x4 - single byte;</li>
+<li>In case of "Hybrid" key PC = 0x6.</li>
+<li>In case of "Compressed" key PC = 0x2.</li></ul>
+\note Size of output X and Y coordinates is equal to ModSizeInBytes.
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_ecpki_error.h.
+*/
+CIMPORT_C CCError_t CC_EcpkiPubKeyExport(
+ CCEcpkiUserPublKey_t *pUserPublKey, /*!< [in] Pointer to the input public key structure (in Little-Endian form). */
+ CCEcpkiPointCompression_t compression, /*!< [in] Compression mode: Compressed, Uncompressed or Hybrid. */
+ uint8_t *pExternPublKey, /*!< [out] Pointer to the exported public key array, in compressed or uncompressed
+ or hybrid form:
+ [PC||X||Y] Big-Endian representation, structured according to [IEEE1363].
+ In compressed form, Y is omitted. */
+ size_t *pPublKeySizeBytes /*!< [in/out] Pointer used for the input of the user public key buffer size
+ (in bytes), and the output of the size of the converted public key in bytes. */
+ );
+
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_dh.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_dh.h
new file mode 100644
index 0000000..fac3085
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_dh.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_ECPKI_DH_H
+#define _CC_ECPKI_DH_H
+
+/*! @file
+@brief This file defines the API that supports EC Diffie-Hellman shared secret value derivation primitives.
+@defgroup cc_ecpki_dh CryptoCell ECC Diffie-Hellman APIs
+@{
+@ingroup cryptocell_ecpki
+
+*/
+
+
+#include "cc_ecpki_types.h"
+#include "cc_ecpki_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/***********************************************************************
+ * CC_EcdhSvdpDh function *
+ ***********************************************************************/
+/*!
+@brief Creates the shared secret value according to IEEE 1363-2000: IEEE Standard for Standard Specifications for Public-Key Cryptography standard
+and ANSI X9.63-2011: Public Key Cryptography for the Financial Services Industry - Key Agreement and Key Transport Using
+Elliptic Curve Cryptography standard:
+<ol><li> Checks input-parameter pointers and EC Domain in public and private
+keys.</li>
+<li> Derives the partner public key and calls the EcWrstDhDeriveSharedSecret
+function, which performs EC SVDP operations.</li></ol>
+\note The term "User"
+refers to any party that calculates a shared secret value using this primitive.
+The term "Partner" refers to any other party of shared secret value calculation.
+Partner's public key shall be validated before using in this primitive.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_ecpki_error.h.
+*/
+CIMPORT_C CCError_t CC_EcdhSvdpDh(
+ CCEcpkiUserPublKey_t *PartnerPublKey_ptr, /*!< [in] Pointer to a partner public key. */
+ CCEcpkiUserPrivKey_t *UserPrivKey_ptr, /*!< [in] Pointer to a user private key. */
+ uint8_t *SharedSecretValue_ptr, /*!< [out] Pointer to an output buffer that contains the shared
+ secret value. */
+ size_t *SharedSecrValSize_ptr, /*!< [in/out] Pointer to the size of user-passed buffer (in) and
+ actual size of output of calculated shared secret value
+ (out). */
+ CCEcdhTempData_t *TempBuff_ptr /*!< [in] Pointer to a temporary buffer. */);
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_ecdsa.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_ecdsa.h
new file mode 100644
index 0000000..09e4390
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_ecdsa.h
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_ECPKI_ECDSA_H
+#define _CC_ECPKI_ECDSA_H
+
+/*!
+@file
+@brief This file defines the APIs that support the ECDSA functions.
+@defgroup cc_ecpki_ecdsa CryptoCell ECDSA APIs
+@{
+@ingroup cryptocell_ecpki
+
+*/
+
+#include "cc_error.h"
+#include "cc_ecpki_types.h"
+#include "cc_hash_defs.h"
+#include "cc_rnd_common.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+
+/**************************************************************************
+ * CC_EcdsaSign - integrated function
+ **************************************************************************/
+/*!
+@brief This function performs an ECDSA sign operation in integrated form.
+
+\note Using of HASH functions with HASH size greater than EC modulus size, is not recommended!.
+Algorithm according to the ANSI X9.62-2005: Public Key Cryptography for the Financial Services Industry, The Elliptic
+Curve Digital Signature Algorithm (ECDSA) standard.
+
+The message data may be either a non-hashed data or a digest of a hash function.
+For a non-hashed data, the message data will be hashed using the hash function indicated by ::CCEcpkiHashOpMode_t.
+For a digest, ::CCEcpkiHashOpMode_t should indicate the hash function that the message data was created by, and it will not be hashed.
+
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_ecpki_error.h, cc_hash_error.h or cc_rnd_error.h.
+**/
+CIMPORT_C CCError_t CC_EcdsaSign(
+ CCRndContext_t *pRndContext, /*!< [in/out] Pointer to the RND context buffer. */
+ CCEcdsaSignUserContext_t *pSignUserContext, /*!< [in/out] Pointer to the user buffer for signing the database. */
+ CCEcpkiUserPrivKey_t *pSignerPrivKey, /*!< [in] A pointer to a user private key structure. */
+ CCEcpkiHashOpMode_t hashMode, /*!< [in] One of the supported SHA-x HASH modes, as defined in
+ ::CCEcpkiHashOpMode_t.
+ \note MD5 is not supported. */
+ uint8_t *pMessageDataIn, /*!< [in] Pointer to the input data to be signed.
+ The size of the scatter/gather list representing the data buffer
+ is limited to 128 entries, and the size of each entry is limited
+ to 64KB (fragments larger than 64KB are broken into
+ fragments <= 64KB). */
+ size_t messageSizeInBytes, /*!< [in] Size of message data in bytes. */
+ uint8_t *pSignatureOut, /*!< [in] Pointer to a buffer for output of signature. */
+ size_t *pSignatureOutSize /*!< [in/out] Pointer to the signature size. Used to pass the size of
+ the SignatureOut buffer (in), which must be >=
+ 2 * OrderSizeInBytes. When the API returns,
+ it is replaced with the size of the actual signature (out). */
+ );
+
+
+
+/**************************************************************************
+ * CC_EcdsaVerify integrated function
+ **************************************************************************/
+/*!
+@brief This function performs an ECDSA verify operation in integrated form.
+Algorithm according to the ANSI X9.62-2005: Public Key Cryptography for the Financial Services Industry,
+The Elliptic Curve Digital Signature Algorithm (ECDSA) standard.
+
+The message data may be either a non-hashed data or a digest of a hash function.
+For a non-hashed data, the message data will be hashed using the hash function indicated by ::CCEcpkiHashOpMode_t.
+For a digest, ::CCEcpkiHashOpMode_t should indicate the hash function that the message data was created by, and it will not be hashed.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_ecpki_error.h or cc_hash_error.h.
+*/
+CIMPORT_C CCError_t CC_EcdsaVerify (
+ CCEcdsaVerifyUserContext_t *pVerifyUserContext, /*!< [in] Pointer to the user buffer for signing the database. */
+ CCEcpkiUserPublKey_t *pUserPublKey, /*!< [in] Pointer to a user public key structure. */
+ CCEcpkiHashOpMode_t hashMode, /*!< [in] One of the supported SHA-x HASH modes, as defined in
+ ::CCEcpkiHashOpMode_t.
+ \note MD5 is not supported. */
+ uint8_t *pSignatureIn, /*!< [in] Pointer to the signature to be verified. */
+ size_t SignatureSizeBytes, /*!< [in] Size of the signature (in bytes). */
+ uint8_t *pMessageDataIn, /*!< [in] Pointer to the input data that was signed (same as given to
+ the signing function). The size of the scatter/gather list representing
+ the data buffer is limited to 128 entries, and the size of each entry is
+ limited to 64KB (fragments larger than 64KB are broken into fragments <= 64KB). */
+ size_t messageSizeInBytes /*!< [in] Size of the input data (in bytes). */
+ );
+
+
+/**********************************************************************************************************/
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_error.h
new file mode 100644
index 0000000..c9a3beb
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_error.h
@@ -0,0 +1,283 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_ECPKI_ERROR_H
+#define _CC_ECPKI_ERROR_H
+
+
+/*!
+@file
+@brief This file contains the definitions of the CryptoCell ECPKI errors.
+@defgroup cc_ecpki_error CryptoCell ECC specific errors
+@{
+@ingroup cryptocell_ecpki
+
+*/
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Defines ******************************/
+
+/* CC_ECPKI_MODULE_ERROR_BASE = 0x00F00800 */
+
+/*********************************************************************************************
+ * CryptoCell ECPKI MODULE ERRORS *
+ *********************************************************************************************/
+/*! Illegal domain ID. */
+#define CC_ECPKI_ILLEGAL_DOMAIN_ID_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x1UL)
+/*! Illegal domain pointer. */
+#define CC_ECPKI_DOMAIN_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x2UL)
+/* The CryptoCell ECPKI GEN KEY PAIR module errors */
+/*! Illegal private key pointer. */
+#define CC_ECPKI_GEN_KEY_INVALID_PRIVATE_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x3UL)
+/*! Illegal public key pointer. */
+#define CC_ECPKI_GEN_KEY_INVALID_PUBLIC_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x4UL)
+/*! Illegal temporary buffer pointer. */
+#define CC_ECPKI_GEN_KEY_INVALID_TEMP_DATA_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x5UL)
+/*! Illegal RND context pointer. */
+#define CC_ECPKI_RND_CONTEXT_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x6UL)
+
+/************************************************************************************************************
+* The CryptoCell ECPKI BUILD KEYS MODULE ERRORS *
+*************************************************************************************************************/
+/*! Illegal compression mode. */
+#define CC_ECPKI_BUILD_KEY_INVALID_COMPRESSION_MODE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x07UL)
+/*! Illegal domain ID. */
+#define CC_ECPKI_BUILD_KEY_ILLEGAL_DOMAIN_ID_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x08UL)
+/*! Illegal private key pointer. */
+#define CC_ECPKI_BUILD_KEY_INVALID_PRIV_KEY_IN_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x09UL)
+/*! Illegal private key structure pointer. */
+#define CC_ECPKI_BUILD_KEY_INVALID_USER_PRIV_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x0AUL)
+/*! Illegal private key size. */
+#define CC_ECPKI_BUILD_KEY_INVALID_PRIV_KEY_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x0BUL)
+/*! Illegal private key data. */
+#define CC_ECPKI_BUILD_KEY_INVALID_PRIV_KEY_DATA_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x0CUL)
+/*! Illegal public key pointer. */
+#define CC_ECPKI_BUILD_KEY_INVALID_PUBL_KEY_IN_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x0DUL)
+/*! Illegal public key structure pointer. */
+#define CC_ECPKI_BUILD_KEY_INVALID_USER_PUBL_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x0EUL)
+/*! Illegal public key size. */
+#define CC_ECPKI_BUILD_KEY_INVALID_PUBL_KEY_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x0FUL)
+/*! Illegal public key data. */
+#define CC_ECPKI_BUILD_KEY_INVALID_PUBL_KEY_DATA_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x10UL)
+/*! Illegal EC build check mode option. */
+#define CC_ECPKI_BUILD_KEY_INVALID_CHECK_MODE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x11UL)
+/*! Illegal temporary buffer pointer. */
+#define CC_ECPKI_BUILD_KEY_INVALID_TEMP_BUFF_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x12UL)
+
+
+
+/* The CryptoCell ECPKI EXPORT PUBLIC KEY MODULE ERRORS */
+/*! Illegal public key structure pointer. */
+#define CC_ECPKI_EXPORT_PUBL_KEY_INVALID_USER_PUBL_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x14UL)
+/*! Illegal public key compression mode. */
+#define CC_ECPKI_EXPORT_PUBL_KEY_ILLEGAL_COMPRESSION_MODE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x15UL)
+/*! Illegal output public key pointer. */
+#define CC_ECPKI_EXPORT_PUBL_KEY_INVALID_EXTERN_PUBL_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x16UL)
+/*! Illegal output public key size pointer. */
+#define CC_ECPKI_EXPORT_PUBL_KEY_INVALID_PUBL_KEY_SIZE_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x17UL)
+/*! Illegal output public key size. */
+#define CC_ECPKI_EXPORT_PUBL_KEY_INVALID_PUBL_KEY_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x18UL)
+/*! Illegal domain ID. */
+#define CC_ECPKI_EXPORT_PUBL_KEY_ILLEGAL_DOMAIN_ID_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x19UL)
+/*! Validation of public key failed. */
+#define CC_ECPKI_EXPORT_PUBL_KEY_ILLEGAL_VALIDATION_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x1AUL)
+/*! Validation of public key failed. */
+#define CC_ECPKI_EXPORT_PUBL_KEY_INVALID_PUBL_KEY_DATA_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x1BUL)
+
+/* The CryptoCell ECPKI BUILD ECC DOMAIN ERRORS */
+/*! Illegal domain ID. */
+#define CC_ECPKI_BUILD_DOMAIN_ID_IS_NOT_VALID_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x20UL)
+/*! Illegal domain ID pointer. */
+#define CC_ECPKI_BUILD_DOMAIN_DOMAIN_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x21UL)
+/*! Illegal domain parameter pointer. */
+#define CC_ECPKI_BUILD_DOMAIN_EC_PARAMETR_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x22UL)
+/*! Illegal domain parameter size. */
+#define CC_ECPKI_BUILD_DOMAIN_EC_PARAMETR_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x23UL)
+/*! Illegal domain cofactor parameters. */
+#define CC_ECPKI_BUILD_DOMAIN_COFACTOR_PARAMS_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x24UL)
+/*! Insufficient strength. */
+#define CC_ECPKI_BUILD_DOMAIN_SECURITY_STRENGTH_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x25UL)
+/*! SCA resistance error. */
+#define CC_ECPKI_BUILD_SCA_RESIST_ILLEGAL_MODE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x26UL)
+
+
+/*! Internal error */
+#define CC_ECPKI_INTERNAL_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x30UL)
+/************************************************************************************************************
+ * CryptoCell EC DIFFIE-HELLMAN MODULE ERRORS
+*************************************************************************************************************/
+/* The CryptoCell EC SVDP_DH Function errors */
+/*! Illegal partner's public key pointer. */
+#define CC_ECDH_SVDP_DH_INVALID_PARTNER_PUBL_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x31UL)
+/*! Partner's public key validation failed. */
+#define CC_ECDH_SVDP_DH_PARTNER_PUBL_KEY_VALID_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x32UL)
+/*! Illegal user private key pointer. */
+#define CC_ECDH_SVDP_DH_INVALID_USER_PRIV_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x33UL)
+/*! Private key validation failed. */
+#define CC_ECDH_SVDP_DH_USER_PRIV_KEY_VALID_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x34UL)
+/*! Illegal shared secret pointer. */
+#define CC_ECDH_SVDP_DH_INVALID_SHARED_SECRET_VALUE_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x35UL)
+/*! Illegal temporary buffer pointer. */
+#define CC_ECDH_SVDP_DH_INVALID_TEMP_DATA_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x36UL)
+/*! Illegal shared secret size pointer. */
+#define CC_ECDH_SVDP_DH_INVALID_SHARED_SECRET_VALUE_SIZE_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x37UL)
+/*! Illegal shared secret size. */
+#define CC_ECDH_SVDP_DH_INVALID_SHARED_SECRET_VALUE_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x38UL)
+/*! Illegal domain ID. */
+#define CC_ECDH_SVDP_DH_ILLEGAL_DOMAIN_ID_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x39UL)
+/*! Illegal private and public domain ID are different. */
+#define CC_ECDH_SVDP_DH_NOT_CONCENT_PUBL_AND_PRIV_DOMAIN_ID_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x3AUL)
+
+
+/************************************************************************************************************
+ * CryptoCell ECDSA MODULE ERRORS
+ ************************************************************************************************************/
+/* The CryptoCell ECDSA Signing errors */
+/*! Illegal domain ID. */
+#define CC_ECDSA_SIGN_INVALID_DOMAIN_ID_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x50UL)
+/*! Illegal context pointer. */
+#define CC_ECDSA_SIGN_INVALID_USER_CONTEXT_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x51UL)
+/*! Illegal private key pointer. */
+#define CC_ECDSA_SIGN_INVALID_USER_PRIV_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x52UL)
+/*! Illegal hash operation mode. */
+#define CC_ECDSA_SIGN_ILLEGAL_HASH_OP_MODE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x53UL)
+/*! Illegal data in pointer. */
+#define CC_ECDSA_SIGN_INVALID_MESSAGE_DATA_IN_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x54UL)
+/*! Illegal data in size. */
+#define CC_ECDSA_SIGN_INVALID_MESSAGE_DATA_IN_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x55UL)
+/*! Context validation failed. */
+#define CC_ECDSA_SIGN_USER_CONTEXT_VALIDATION_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x57UL)
+/*! User's private key validation failed. */
+#define CC_ECDSA_SIGN_USER_PRIV_KEY_VALIDATION_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x58UL)
+/*! Illegal signature pointer. */
+#define CC_ECDSA_SIGN_INVALID_SIGNATURE_OUT_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x60UL)
+/*! Illegal signature size pointer. */
+#define CC_ECDSA_SIGN_INVALID_SIGNATURE_OUT_SIZE_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x61UL)
+/*! Illegal signature size. */
+#define CC_ECDSA_SIGN_INVALID_SIGNATURE_OUT_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x62UL)
+/*! Ephemeral key error. */
+#define CC_ECDSA_SIGN_INVALID_IS_EPHEMER_KEY_INTERNAL_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x63UL)
+/*! Illegal ephemeral key pointer. */
+#define CC_ECDSA_SIGN_INVALID_EPHEMERAL_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x64UL)
+/*! Illegal RND context pointer. */
+#define CC_ECDSA_SIGN_INVALID_RND_CONTEXT_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x65UL)
+/*! Illegal RND function pointer. */
+#define CC_ECDSA_SIGN_INVALID_RND_FUNCTION_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x66UL)
+/*! Signature calculation failed. */
+#define CC_ECDSA_SIGN_SIGNING_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x67UL)
+
+/* The CryptoCell ECDSA Verifying errors */
+/*! Illegal domain ID. */
+#define CC_ECDSA_VERIFY_INVALID_DOMAIN_ID_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x70UL)
+/*! Illegal user's context pointer. */
+#define CC_ECDSA_VERIFY_INVALID_USER_CONTEXT_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x71UL)
+/*! Illegal public key pointer. */
+#define CC_ECDSA_VERIFY_INVALID_SIGNER_PUBL_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x72UL)
+/*! Illegal hash operation mode. */
+#define CC_ECDSA_VERIFY_ILLEGAL_HASH_OP_MODE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x73UL)
+/*! Illegal signature pointer. */
+#define CC_ECDSA_VERIFY_INVALID_SIGNATURE_IN_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x76UL)
+/*! Illegal signature size. */
+#define CC_ECDSA_VERIFY_INVALID_SIGNATURE_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x77UL)
+/*! Illegal data in pointer. */
+#define CC_ECDSA_VERIFY_INVALID_MESSAGE_DATA_IN_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x80UL)
+/*! Illegal data in size. */
+#define CC_ECDSA_VERIFY_INVALID_MESSAGE_DATA_IN_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x81UL)
+/*! Context validation failed. */
+#define CC_ECDSA_VERIFY_USER_CONTEXT_VALIDATION_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x82UL)
+/*! public key validation failed. */
+#define CC_ECDSA_VERIFY_SIGNER_PUBL_KEY_VALIDATION_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x83UL)
+/*! Verification failed. */
+#define CC_ECDSA_VERIFY_INCONSISTENT_VERIFY_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x84UL)
+
+
+
+/*! Illegal hash mode. */
+#define CC_ECC_ILLEGAL_HASH_MODE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x85UL)
+
+
+/************************************************************************************************************
+ * CryptoCell ECPKI MODULE COMMON ERRORS
+*************************************************************************************************************/
+/*! Illegal RND function pointer. */
+#define CC_ECPKI_INVALID_RND_FUNC_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x90UL)
+/*! Illegal RND context pointer. */
+#define CC_ECPKI_INVALID_RND_CTX_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x91UL)
+/*! Illegal domain ID. */
+#define CC_ECPKI_INVALID_DOMAIN_ID_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x92UL)
+/*! Private key validation failed. */
+#define CC_ECPKI_INVALID_PRIV_KEY_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x93UL)
+/*! Public key validation failed. */
+#define CC_ECPKI_INVALID_PUBL_KEY_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x94UL)
+/*! Illegal data in. */
+#define CC_ECPKI_INVALID_DATA_IN_PASSED_STRUCT_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x95UL)
+/*! Illegal Base point pointer. */
+#define CC_ECPKI_INVALID_BASE_POINT_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0x96UL)
+
+/************************************************************************************************************
+ * CryptoCell ECIES MODULE ERRORS
+*************************************************************************************************************/
+/*! Illegal public key pointer. */
+#define CC_ECIES_INVALID_PUBL_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xE0UL)
+/*! Public key validation failed. */
+#define CC_ECIES_INVALID_PUBL_KEY_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xE1UL)
+/*! Illegal private key pointer. */
+#define CC_ECIES_INVALID_PRIV_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xE2UL)
+/*! Private key validation failed. */
+#define CC_ECIES_INVALID_PRIV_KEY_TAG_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xE3UL)
+/*! Illegal private key value. */
+#define CC_ECIES_INVALID_PRIV_KEY_VALUE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xE4UL)
+/*! Illegal KDF derivation mode. */
+#define CC_ECIES_INVALID_KDF_DERIV_MODE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xE5UL)
+/*! Illegal KDF hash mode. */
+#define CC_ECIES_INVALID_KDF_HASH_MODE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xE6UL)
+/*! Illegal secret key pointer. */
+#define CC_ECIES_INVALID_SECRET_KEY_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xE7UL)
+/*! Illegal secret key size. */
+#define CC_ECIES_INVALID_SECRET_KEY_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xE8UL)
+/*! Illegal cipher data pointer. */
+#define CC_ECIES_INVALID_CIPHER_DATA_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xE9UL)
+/*! Illegal cipher data size pointer. */
+#define CC_ECIES_INVALID_CIPHER_DATA_SIZE_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xEAUL)
+/*! Illegal cipher data size. */
+#define CC_ECIES_INVALID_CIPHER_DATA_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xEBUL)
+/*! Illegal temporary buffer pointer. */
+#define CC_ECIES_INVALID_TEMP_DATA_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xECUL)
+/*! Illegal temporary buffe size */
+#define CC_ECIES_INVALID_TEMP_DATA_SIZE_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xEDUL)
+/*! Illegal ephemeral key pointer */
+#define CC_ECIES_INVALID_EPHEM_KEY_PAIR_PTR_ERROR (CC_ECPKI_MODULE_ERROR_BASE + 0xEEUL)
+/*! NULL ptr */
+#define CC_ECIES_INVALID_PTR (CC_ECPKI_MODULE_ERROR_BASE + 0xEFUL)
+
+/************************ Enums ********************************/
+
+/************************ Typedefs ****************************/
+
+/************************ Structs ******************************/
+
+/************************ Public Variables **********************/
+
+/************************ Public Functions **********************/
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_kg.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_kg.h
new file mode 100644
index 0000000..ede7bb3
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_kg.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_ECPKI_KG_H
+#define _CC_ECPKI_KG_H
+
+/*! @file
+@brief This file defines the API for generation of ECC private and public keys.
+@defgroup cc_ecpki_kg CryptoCell ECC Key Generation APIs
+@{
+@ingroup cryptocell_ecpki
+
+*/
+
+
+#include "cc_error.h"
+#include "cc_rnd_common.h"
+#include "cc_ecpki_types.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/***************** CC_EcpkiKeyPairGenerate function **********************/
+/*!
+@brief Generates a pair of private and public keys in internal representation according to ANSI X9.62-2005: Public Key Cryptography for the
+Financial Services Industry, The Elliptic Curve Digital Signature Algorithm (ECDSA) standard.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_ecpki_error.h or cc_rnd_error.h
+*/
+CIMPORT_C CCError_t CC_EcpkiKeyPairGenerate(
+ CCRndContext_t *pRndContext, /*!< [in/out] Pointer to the RND context buffer. */
+ const CCEcpkiDomain_t *pDomain, /*!< [in] Pointer to EC domain (curve). */
+ CCEcpkiUserPrivKey_t *pUserPrivKey, /*!< [out] Pointer to the private key structure. This structure is used as input to the
+ ECPKI cryptographic primitives. */
+ CCEcpkiUserPublKey_t *pUserPublKey, /*!< [out] Pointer to the public key structure. This structure is used as input to the
+ ECPKI cryptographic primitives. */
+ CCEcpkiKgTempData_t *pTempData, /*!< [in] Temporary buffers for internal use, defined in ::CCEcpkiKgTempData_t. */
+ CCEcpkiKgFipsContext_t *pFipsCtx /*!< [in] Pointer to temporary buffer used in case FIPS certification if required
+ (may be NULL for all other cases). */
+);
+
+/***************** CC_EcpkiKeyPairGenerateBase function **********************/
+/*!
+@brief Generates a pair of private and public keys using a configurable base point
+in internal representation according to ANSI X9.62-2005: Public Key Cryptography for the
+Financial Services Industry, The Elliptic Curve Digital Signature Algorithm (ECDSA) standard.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_ecpki_error.h or cc_rnd_error.h
+*/
+CIMPORT_C CCError_t CC_EcpkiKeyPairGenerateBase(
+ CCRndContext_t *pRndContext, /*!< [in/out] Pointer to RND context. */
+ const CCEcpkiDomain_t *pDomain, /*!< [in] Pointer to EC domain (curve). */
+ const uint32_t *ecX_ptr, /*!< [in] The X cordinate of the base point. */
+ const uint32_t *ecY_ptr, /*!< [in] The Y cordinate of the base point. */
+ CCEcpkiUserPrivKey_t *pUserPrivKey, /*!< [out] Pointer to the private key structure. This structure is used as input to the
+ ECPKI cryptographic primitives. */
+ CCEcpkiUserPublKey_t *pUserPublKey, /*!< [out] Pointer to the public key structure. This structure is used as input to the
+ ECPKI cryptographic primitives. */
+ CCEcpkiKgTempData_t *pTempData, /*!< [in] Temporary buffers for internal use, defined in ::CCEcpkiKgTempData_t. */
+ CCEcpkiKgFipsContext_t *pFipsCtx /*!< [in] Pointer to temporary buffer used in case FIPS certification if required
+ (may be NULL for all other cases). */
+);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
+
+
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_types.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_types.h
new file mode 100644
index 0000000..92ad69d
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ecpki_types.h
@@ -0,0 +1,506 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_ecpki_types
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains all the type definitions that are used for the
+ CryptoCell ECPKI APIs.
+ */
+
+#ifndef _CC_ECPKI_TYPES_H
+#define _CC_ECPKI_TYPES_H
+
+
+#include "cc_bitops.h"
+#include "cc_pal_types_plat.h"
+#include "cc_hash_defs.h"
+#include "cc_pka_defs_hw.h"
+#include "cc_pal_compiler.h"
+#ifdef USE_MBEDTLS_CRYPTOCELL
+#include "mbedtls/md.h"
+#endif
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Defines ******************************/
+/*! The size of the internal buffer in words. */
+#define CC_PKA_DOMAIN_LLF_BUFF_SIZE_IN_WORDS (10 + 3*CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS)
+
+/**************************************************************************************
+ * Enumerators
+ ***************************************************************************************/
+
+/*------------------------------------------------------------------*/
+/*! @brief EC domain idetifiers.
+
+ For more information, see <em>Standards for Efficient Cryptography Group
+ (SECG): SEC2 Recommended Elliptic Curve Domain Parameters, Version 1.0</em>.
+*/
+typedef enum
+{
+ /* For prime field */
+ /*! EC secp192k1. */
+ CC_ECPKI_DomainID_secp192k1,
+ /*! EC secp192r1. */
+ CC_ECPKI_DomainID_secp192r1,
+ /*! EC secp224k1. */
+ CC_ECPKI_DomainID_secp224k1,
+ /*! EC secp224r1. */
+ CC_ECPKI_DomainID_secp224r1,
+ /*! EC secp256k1. */
+ CC_ECPKI_DomainID_secp256k1,
+ /*! EC secp256r1. */
+ CC_ECPKI_DomainID_secp256r1,
+ /*! EC secp384r1. */
+ CC_ECPKI_DomainID_secp384r1,
+ /*! EC secp521r1. */
+ CC_ECPKI_DomainID_secp521r1,
+ /*! Reserved.*/
+ CC_ECPKI_DomainID_OffMode,
+ /*! Reserved.*/
+ CC_ECPKI_DomainIDLast = 0x7FFFFFFF,
+
+}CCEcpkiDomainID_t;
+
+
+/*------------------------------------------------------------------*/
+/*!
+ @brief Hash operation mode.
+
+ Defines hash modes according to <em>IEEE 1363-2000: IEEE Standard for
+ Standard Specifications for Public-Key Cryptography</em>.
+ */
+typedef enum
+{
+ /*! The message data will be hashed with SHA-1. */
+ CC_ECPKI_HASH_SHA1_mode = 0,
+ /*! The message data will be hashed with SHA-224. */
+ CC_ECPKI_HASH_SHA224_mode = 1,
+ /*! The message data will be hashed with SHA-256. */
+ CC_ECPKI_HASH_SHA256_mode = 2,
+ /*! The message data will be hashed with SHA-384. */
+ CC_ECPKI_HASH_SHA384_mode = 3,
+ /*! The message data will be hashed with SHA-512. */
+ CC_ECPKI_HASH_SHA512_mode = 4,
+ /*! The message data is a digest of SHA-1 and will not be hashed. */
+ CC_ECPKI_AFTER_HASH_SHA1_mode = 5,
+ /*! The message data is a digest of SHA-224 and will not be hashed. */
+ CC_ECPKI_AFTER_HASH_SHA224_mode = 6,
+ /*! The message data is a digest of SHA-256 and will not be hashed. */
+ CC_ECPKI_AFTER_HASH_SHA256_mode = 7,
+ /*! The message data is a digest of SHA-384 and will not be hashed. */
+ CC_ECPKI_AFTER_HASH_SHA384_mode = 8,
+ /*! The message data is a digest of SHA-512 and will not be hashed. */
+ CC_ECPKI_AFTER_HASH_SHA512_mode = 9,
+ /*! The maximal number of hash modes. */
+ CC_ECPKI_HASH_NumOfModes,
+ /*! Reserved. */
+ CC_ECPKI_HASH_OpModeLast = 0x7FFFFFFF,
+
+}CCEcpkiHashOpMode_t;
+
+
+/*---------------------------------------------------*/
+/*! EC point-compression identifiers.
+*/
+typedef enum
+{
+ /*! A compressed point. */
+ CC_EC_PointCompressed = 2,
+ /*! An uncompressed point. */
+ CC_EC_PointUncompressed = 4,
+ /*! An incorrect point-control value. */
+ CC_EC_PointContWrong = 5,
+ /*! A hybrid point. */
+ CC_EC_PointHybrid = 6,
+ /*! Reserved. */
+ CC_EC_PointCompresOffMode = 8,
+ /*! Reserved. */
+ CC_ECPKI_PointCompressionLast= 0x7FFFFFFF,
+}CCEcpkiPointCompression_t;
+
+/*----------------------------------------------------*/
+/*! EC key checks. */
+typedef enum {
+ /*! Check only preliminary input parameters. */
+ CheckPointersAndSizesOnly = 0,
+ /*! Check preliminary input parameters and verify that the EC public-key
+ point is on the curve. */
+ ECpublKeyPartlyCheck = 1,
+ /*! Check preliminary input parameters, verify that the EC public-key
+ point is on the curve, and verify that \c EC_GeneratorOrder*PubKey = 0 */
+ ECpublKeyFullCheck = 2,
+ /*! Reserved. */
+ PublKeyChecingOffMode,
+ /*! Reserved. */
+ EC_PublKeyCheckModeLast = 0x7FFFFFFF,
+}ECPublKeyCheckMode_t;
+
+/*----------------------------------------------------*/
+/*! SW SCA protection type. */
+typedef enum {
+ /*! SCA protection inactive. */
+ SCAP_Inactive,
+ /*! SCA protection active. */
+ SCAP_Active,
+ /*! Reserved. */
+ SCAP_OFF_MODE,
+ /*! Reserved. */
+ SCAP_LAST = 0x7FFFFFFF
+}CCEcpkiScaProtection_t;
+
+/**************************************************************************************
+ * EC Domain structure definition
+ ***************************************************************************************/
+
+/*!
+ @brief The structure containing the EC domain parameters in little-endian
+ form.
+
+ EC equation: \c Y^2 = \c X^3 + \c A*X + \c B over prime field \p GFp.
+ */
+typedef struct {
+ /*! EC modulus: P. */
+ uint32_t ecP [CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
+ /*! EC equation parameter A. */
+ uint32_t ecA [CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
+ /*! EC equation parameter B. */
+ uint32_t ecB [CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
+ /*! Order of generator. */
+ uint32_t ecR [CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS + 1];
+ /*! EC cofactor EC_Cofactor_K. The coordinates of the EC base point
+ generator in projective form. */
+ uint32_t ecGx [CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
+ /*! EC cofactor EC_Cofactor_K. The coordinates of the EC base point
+ generator in projective form. */
+ uint32_t ecGy [CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
+ /*! EC cofactor EC_Cofactor_K. The coordinates of the EC base point
+ generator in projective form. */
+ uint32_t ecH;
+ /*! Specific fields that are used by the low-level functions.*/
+ uint32_t llfBuff[CC_PKA_DOMAIN_LLF_BUFF_SIZE_IN_WORDS];
+ /*! The size of fields in bits. */
+ uint32_t modSizeInBits;
+ /*! The size of the order in bits. */
+ uint32_t ordSizeInBits;
+ /*! The size of each inserted Barret tag in words. Zero if not inserted.*/
+ uint32_t barrTagSizeInWords;
+ /*! The EC Domain identifier. */
+ CCEcpkiDomainID_t DomainID;
+ /*! Internal buffer. */
+ int8_t name[20];
+}CCEcpkiDomain_t;
+
+
+
+/**************************************************************************************
+ * EC point structures definitions
+ ***************************************************************************************/
+
+/*! The structure containing the EC point in affine coordinates
+ and little endian form. */
+typedef struct
+{
+ /*! The X coordinate of the point. */
+ uint32_t x[CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
+ /*! The Y coordinate of the point. */
+ uint32_t y[CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
+
+}CCEcpkiPointAffine_t;
+
+
+/**************************************************************************************
+ * ECPKI public and private key Structures
+ ***************************************************************************************/
+
+/* --------------------------------------------------------------------- */
+/* .................. The public key structures definitions ............ */
+/* --------------------------------------------------------------------- */
+
+/*! The structure containing the public key in affine coordinates.*/
+typedef struct
+{
+ /*! The X coordinate of the public key.*/
+ uint32_t x[CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
+ /*! The Y coordinate of the public key.*/
+ uint32_t y[CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
+ /*! The EC Domain.*/
+ CCEcpkiDomain_t domain;
+ /*! The point type.*/
+ uint32_t pointType;
+} CCEcpkiPublKey_t;
+
+
+/*!
+@brief The user structure prototype of the EC public key.
+
+This structure must be saved by the user. It is used as input to ECC functions,
+for example, CC_EcdsaVerify().
+*/
+typedef struct CCEcpkiUserPublKey_t
+{
+ /*! The validation tag. */
+ uint32_t valid_tag;
+ /*! The data of the public key. */
+ uint32_t PublKeyDbBuff[(sizeof(CCEcpkiPublKey_t)+3)/4];
+} CCEcpkiUserPublKey_t;
+
+
+/* --------------------------------------------------------------------- */
+/* .................. The private key structures definitions ........... */
+/* --------------------------------------------------------------------- */
+
+/*! The structure containing the data of the private key. */
+typedef struct
+{
+ /*! The data of the private key. */
+ uint32_t PrivKey[CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS + 1];
+ /*! The EC domain. */
+ CCEcpkiDomain_t domain;
+ /*! The SCA protection mode. */
+ CCEcpkiScaProtection_t scaProtection;
+}CCEcpkiPrivKey_t;
+
+
+/*!
+ @brief The user structure prototype of the EC private key.
+
+ This structure must be saved by the user. It is used as input to ECC functions,
+ for example, CC_EcdsaSign().
+ */
+typedef struct CCEcpkiUserPrivKey_t
+{
+ /*! The validation tag. */
+ uint32_t valid_tag;
+ /*! The data of the private key. */
+ uint32_t PrivKeyDbBuff[(sizeof(CCEcpkiPrivKey_t)+3)/4];
+} CCEcpkiUserPrivKey_t;
+
+/*! The type of the ECDH temporary data. */
+typedef struct CCEcdhTempData_t
+{
+ /*! Temporary buffers. */
+ uint32_t ccEcdhIntBuff[CC_PKA_ECDH_BUFF_MAX_LENGTH_IN_WORDS];
+}CCEcdhTempData_t;
+
+/*! EC build temporary data. */
+typedef struct CCEcpkiBuildTempData_t
+{
+ /*! Temporary buffers. */
+ uint32_t ccBuildTmpIntBuff[CC_PKA_ECPKI_BUILD_TMP_BUFF_MAX_LENGTH_IN_WORDS];
+}CCEcpkiBuildTempData_t;
+
+
+
+/**************************************************************************
+ * CryptoCell ECDSA context structures
+ **************************************************************************/
+
+/* --------------------------------------------------------------------- */
+/* CryptoCell ECDSA Signing context structure */
+/* --------------------------------------------------------------------- */
+/*! The internal buffer used in the signing process. */
+typedef uint32_t CCEcdsaSignIntBuff_t[CC_PKA_ECDSA_SIGN_BUFF_MAX_LENGTH_IN_WORDS];
+
+/*! The context definition for the signing operation. */
+typedef struct
+{
+ /*! The data of the private key. */
+ CCEcpkiUserPrivKey_t ECDSA_SignerPrivKey;
+
+#ifdef USE_MBEDTLS_CRYPTOCELL
+ /*! The hash context. */
+ mbedtls_md_context_t hash_ctx;
+#else
+ /*! The hash context. */
+ CCHashUserContext_t hashUserCtxBuff;
+#endif
+ /*! The hash result buffer. */
+ CCHashResultBuf_t hashResult;
+ /*! The size of the hash result in words. */
+ uint32_t hashResultSizeWords;
+ /*! The hash mode. */
+ CCEcpkiHashOpMode_t hashMode;
+ /*! Internal buffer. */
+ CCEcdsaSignIntBuff_t ecdsaSignIntBuff;
+}EcdsaSignContext_t;
+
+
+/* --------------------------------------------------------------------- */
+/* ECDSA Signing User context database */
+/* --------------------------------------------------------------------- */
+
+/*!
+ @brief The context definition of the user for the signing operation.
+
+ This context saves the state of the operation, and must be saved by the user
+ until the end of the API flow.
+ */
+typedef struct CCEcdsaSignUserContext_t
+{
+ /*! The data of the signing process. */
+ uint32_t context_buff [(sizeof(EcdsaSignContext_t)+3)/4];
+ /*! The validation tag. */
+ uint32_t valid_tag;
+} CCEcdsaSignUserContext_t;
+
+
+
+/****************************************************************************/
+
+/* --------------------------------------------------------------------- */
+/* ECDSA Verifying context structure */
+/* --------------------------------------------------------------------- */
+/*! The internal buffer used in the verification process. */
+typedef uint32_t CCEcdsaVerifyIntBuff_t[CC_PKA_ECDSA_VERIFY_BUFF_MAX_LENGTH_IN_WORDS];
+
+/*! The context definition for verification operation. */
+typedef struct
+{
+ /*! The data of the public key. */
+ CCEcpkiUserPublKey_t ECDSA_SignerPublKey;
+
+#ifdef USE_MBEDTLS_CRYPTOCELL
+ /*! The hash context. */
+ mbedtls_md_context_t hash_ctx;
+#else
+ /*! The hash context. */
+ CCHashUserContext_t hashUserCtxBuff;
+#endif
+ /*! The hash result. */
+ CCHashResultBuf_t hashResult;
+ /*! The size of the hash result in words. */
+ uint32_t hashResultSizeWords;
+ /*! The hash mode. */
+ CCEcpkiHashOpMode_t hashMode;
+ /*! Internal buffer. */
+ CCEcdsaVerifyIntBuff_t ccEcdsaVerIntBuff;
+}EcdsaVerifyContext_t;
+
+
+/* --------------------------------------------------------------------- */
+/* ECDSA Verifying User context database */
+/* --------------------------------------------------------------------- */
+/*!
+ @brief The context definition of the user for the verification operation.
+
+ The context saves the state of the operation, and must be saved by the user
+ until the end of the API flow.
+ */
+typedef struct CCEcdsaVerifyUserContext_t
+{
+ /*! The data of the verification process. */
+ uint32_t context_buff[(sizeof(EcdsaVerifyContext_t)+3)/4];
+ /*! The validation tag. */
+ uint32_t valid_tag;
+}CCEcdsaVerifyUserContext_t;
+
+
+/* --------------------------------------------------------------------- */
+/* .................. key generation temp buffer ........... */
+/* --------------------------------------------------------------------- */
+
+/*! The temporary data type of the ECPKI KG. */
+typedef struct CCEcpkiKgTempData_t
+{
+ /*! Internal buffer. */
+ uint32_t ccKGIntBuff[CC_PKA_KG_BUFF_MAX_LENGTH_IN_WORDS];
+}CCEcpkiKgTempData_t;
+
+/*! The temporary data definition of the ECIES. */
+typedef struct CCEciesTempData_t {
+ /*! The data of the private key. */
+ CCEcpkiUserPrivKey_t PrivKey;
+ /*! The data of the public key. */
+ CCEcpkiUserPublKey_t PublKey;
+ /*! The public-key data used by conversion from Mbed TLS to CryptoCell. */
+ CCEcpkiUserPublKey_t ConvPublKey;
+ /*! Internal buffer. */
+ uint32_t zz[3*CC_ECPKI_MODUL_MAX_LENGTH_IN_WORDS + 1];
+ /*! Internal buffers. */
+ union {
+ CCEcpkiBuildTempData_t buildTempbuff;
+ CCEcpkiKgTempData_t KgTempBuff;
+ CCEcdhTempData_t DhTempBuff;
+ } tmp;
+}CCEciesTempData_t;
+
+
+/* --------------------------------------------------------------------- */
+/* .................. defines for FIPS ........... */
+/* --------------------------------------------------------------------- */
+
+/*! The order length for FIPS ECC tests. */
+#define CC_ECPKI_FIPS_ORDER_LENGTH (256/CC_BITS_IN_BYTE) // the order of secp256r1 in bytes
+
+/*! ECPKI data structures for FIPS certification. */
+typedef struct CCEcpkiKgFipsContext_t
+{
+ /*! Signing and verification data. */
+ union {
+ CCEcdsaSignUserContext_t signCtx;
+ CCEcdsaVerifyUserContext_t verifyCtx;
+ }operationCtx;
+ /*! Internal buffer. */
+ uint32_t signBuff[2*CC_ECPKI_ORDER_MAX_LENGTH_IN_WORDS] ;
+}CCEcpkiKgFipsContext_t;
+
+/*! ECDSA KAT data structures for FIPS certification.
+ The ECDSA KAT tests are defined for domain 256r1. */
+typedef struct CCEcdsaFipsKatContext_t{
+ /*! The key data. */
+ union {
+ /*! The private key data. */
+ struct {
+ CCEcpkiUserPrivKey_t PrivKey;
+ CCEcdsaSignUserContext_t signCtx;
+ }userSignData;
+ /*! The public key data. */
+ struct {
+ CCEcpkiUserPublKey_t PublKey;
+ union {
+ CCEcdsaVerifyUserContext_t verifyCtx;
+ CCEcpkiBuildTempData_t tempData;
+ }buildOrVerify;
+ }userVerifyData;
+ }keyContextData;
+ /*! Internal buffer. */
+ uint8_t signBuff[2*CC_ECPKI_FIPS_ORDER_LENGTH];
+}CCEcdsaFipsKatContext_t;
+
+/*! ECDH KAT data structures for FIPS certification. */
+typedef struct CCEcdhFipsKatContext_t{
+ /*! The public key data. */
+ CCEcpkiUserPublKey_t pubKey;
+ /*! The private key data. */
+ CCEcpkiUserPrivKey_t privKey;
+ /*! Internal buffers. */
+ union {
+ CCEcpkiBuildTempData_t ecpkiTempData;
+ CCEcdhTempData_t ecdhTempBuff;
+ }tmpData;
+ /*! The buffer for the secret key. */
+ uint8_t secretBuff[CC_ECPKI_FIPS_ORDER_LENGTH];
+}CCEcdhFipsKatContext_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_error.h
new file mode 100644
index 0000000..fc24358
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_error.h
@@ -0,0 +1,299 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+
+/*!
+ @addtogroup cc_error
+ @{
+ */
+
+/*!
+ @file
+ @brief This file defines the error return code types and the numbering spaces
+ for each module of the layers listed.
+*/
+
+
+#ifndef _CC_ERROR_H
+#define _CC_ERROR_H
+
+#include "cc_pal_types.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*! The definitions of the error number-space used for the different modules */
+
+/* ........... Error base numeric mapping definitions ................... */
+/* ----------------------------------------------------------------------- */
+
+ /*! The error base number for CryptoCell. */
+#define CC_ERROR_BASE 0x00F00000UL
+
+/*! The error range number assigned for each layer. */
+#define CC_ERROR_LAYER_RANGE 0x00010000UL
+
+/*! The error range number assigned to each module on its specified layer. */
+#define CC_ERROR_MODULE_RANGE 0x00000100UL
+
+/* Defines the layer index for the error mapping. */
+/*! The CryptoCell error-layer index. */
+#define CC_LAYER_ERROR_IDX 0x00UL
+/*! The error-layer index for low-level functions. */
+#define LLF_LAYER_ERROR_IDX 0x01UL
+/*! The generic error-layer index. */
+#define GENERIC_ERROR_IDX 0x05UL
+
+/* Defines the module index for error mapping */
+/*! The AES error index.*/
+#define AES_ERROR_IDX 0x00UL
+/*! The DES error index.*/
+#define DES_ERROR_IDX 0x01UL
+/*! The hash error index.*/
+#define HASH_ERROR_IDX 0x02UL
+/*! The HMAC error index.*/
+#define HMAC_ERROR_IDX 0x03UL
+/*! The RSA error index.*/
+#define RSA_ERROR_IDX 0x04UL
+/*! The DH error index.*/
+#define DH_ERROR_IDX 0x05UL
+/*! The ECPKI error index.*/
+#define ECPKI_ERROR_IDX 0x08UL
+/*! The RND error index.*/
+#define RND_ERROR_IDX 0x0CUL
+/*! The Common error index.*/
+#define COMMON_ERROR_IDX 0x0DUL
+/*! The KDF error index.*/
+#define KDF_ERROR_IDX 0x11UL
+/*! The HKDF error index.*/
+#define HKDF_ERROR_IDX 0x12UL
+/*! The AESCCM error index.*/
+#define AESCCM_ERROR_IDX 0x15UL
+/*! The FIPS error index.*/
+#define FIPS_ERROR_IDX 0x17UL
+/*! The PKA error index.*/
+
+#define PKA_MODULE_ERROR_IDX 0x21UL
+/*! The ChaCha error index.*/
+#define CHACHA_ERROR_IDX 0x22UL
+/*! The EC Montgomery and Edwards error index.*/
+#define EC_MONT_EDW_ERROR_IDX 0x23UL
+/*! The ChaCha-POLY error index.*/
+#define CHACHA_POLY_ERROR_IDX 0x24UL
+/*! The POLY error index.*/
+#define POLY_ERROR_IDX 0x25UL
+/*! The SRP error index.*/
+#define SRP_ERROR_IDX 0x26UL
+
+
+/*! The AESGCM error index.*/
+#define AESGCM_ERROR_IDX 0x27UL
+
+/*! The AES key-wrap error index.*/
+#define AES_KEYWRAP_ERROR_IDX 0x28UL
+
+/*! Management error index.*/
+#define MNG_ERROR_IDX 0x29UL
+
+/*! Production error index.*/
+#define PROD_ERROR_IDX 0x2AUL
+
+/*! The FFCDH error index. */
+#define FFCDH_ERROR_IDX 0x2BUL
+/*! The FFC domain error index. */
+#define FFC_DOMAIN_ERROR_IDX 0x2CUL
+
+/*! Do not change! Error definition, reserved for Secure Boot ECDSA */
+#define SB_ECC_ERROR_IDX_ 0x2DUL
+/*! External DMA error index. */
+#define EXT_DMA_ERROR_IDX 0x2EUL
+
+
+
+/* .......... defining the error spaces for each module on each layer ........... */
+/* ------------------------------------------------------------------------------ */
+
+/*! The error base address of the AES module - 0x00F00000. */
+#define CC_AES_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * AES_ERROR_IDX ) )
+
+/*! The error base address of the DES module - 0x00F00100. */
+#define CC_DES_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * DES_ERROR_IDX ) )
+
+/*! The error base address of the hash module - 0x00F00200. */
+#define CC_HASH_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * HASH_ERROR_IDX ) )
+
+/*! The error base address of the HMAC module - 0x00F00300. */
+#define CC_HMAC_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * HMAC_ERROR_IDX ) )
+
+/*! The error base address of the RSA module - 0x00F00400. */
+#define CC_RSA_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * RSA_ERROR_IDX ) )
+
+/*! The error base address of the DH module - 0x00F00500. */
+#define CC_DH_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * DH_ERROR_IDX ) )
+
+/*! The error base address of the ECPKI module - 0x00F00800. */
+#define CC_ECPKI_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * ECPKI_ERROR_IDX ) )
+
+/*! The error base address of the low-level ECPKI module - 0x00F10800. */
+#define LLF_ECPKI_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * LLF_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * ECPKI_ERROR_IDX ) )
+
+/*! The error base address of the RND module - 0x00F00C00. */
+#define CC_RND_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * RND_ERROR_IDX ) )
+
+/*! The error base address of the low-level RND module - 0x00F10C00. */
+#define LLF_RND_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * LLF_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * RND_ERROR_IDX ) )
+
+/*! The error base address of the common module - 0x00F00D00. */
+#define CC_COMMON_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * COMMON_ERROR_IDX ) )
+
+/*! The error base address of the KDF module - 0x00F01100. */
+#define CC_KDF_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * KDF_ERROR_IDX ) )
+
+/*! The error base address of the HKDF module - 0x00F01100. */
+#define CC_HKDF_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * HKDF_ERROR_IDX ) )
+
+/*! The error base address of the AESCCM module - 0x00F01500. */
+#define CC_AESCCM_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * AESCCM_ERROR_IDX ) )
+
+/*! The error base address of the FIPS module - 0x00F01700. */
+#define CC_FIPS_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * FIPS_ERROR_IDX ) )
+
+/*! The error base address of the PKA module - 0x00F02100. */
+#define PKA_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * PKA_MODULE_ERROR_IDX ) )
+
+/*! The error base address of the ChaCha module - 0x00F02200. */
+#define CC_CHACHA_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * CHACHA_ERROR_IDX ) )
+/*! The error base address of the EC MONT_EDW module - 0x00F02300. */
+#define CC_EC_MONT_EDW_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * EC_MONT_EDW_ERROR_IDX ) )
+
+/*! The error base address of the Chacha-POLY module - 0x00F02400. */
+#define CC_CHACHA_POLY_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * CHACHA_POLY_ERROR_IDX ) )
+/*! The error base address of the POLY module - 0x00F02500. */
+#define CC_POLY_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * POLY_ERROR_IDX ) )
+
+/*! The error base address of the SRP module - 0x00F02600. */
+#define CC_SRP_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * SRP_ERROR_IDX ) )
+
+/*! The error base address of the AESGCM module - 0x00F02700. */
+#define CC_AESGCM_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * AESGCM_ERROR_IDX ) )
+
+/*! The error base address of the AES key-wrap module - 0x00F02800. */
+#define CC_AES_KEYWRAP_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * AES_KEYWRAP_ERROR_IDX ) )
+
+/*! The error base address of the Management module - 0x00F02900. */
+#define CC_MNG_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * MNG_ERROR_IDX ) )
+
+/*! The error base address of the production library - 0x00F02A00 */
+#define CC_PROD_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * PROD_ERROR_IDX ) )
+
+/*! The error base address of the FFCDH module - 0x00F02B00. */
+#define CC_FFCDH_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * FFCDH_ERROR_IDX ) )
+
+/*! The error base address of the FFCDH module - 0x00F02B00. */
+#define CC_FFC_DOMAIN_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * FFC_DOMAIN_ERROR_IDX ) )
+
+/*! The error base address of the External DMA module - 0x00F02B00. */
+#define CC_EXT_DMA_MODULE_ERROR_BASE (CC_ERROR_BASE + \
+ (CC_ERROR_LAYER_RANGE * CC_LAYER_ERROR_IDX) + \
+ (CC_ERROR_MODULE_RANGE * EXT_DMA_ERROR_IDX ) )
+
+/*! The generic error base address of the user - 0x00F50000 */
+#define GENERIC_ERROR_BASE ( CC_ERROR_BASE + (CC_ERROR_LAYER_RANGE * GENERIC_ERROR_IDX) )
+/*! CryptoCell fatal error. */
+#define CC_FATAL_ERROR (GENERIC_ERROR_BASE + 0x00UL)
+/*! CryptoCell out of resources error. */
+#define CC_OUT_OF_RESOURCE_ERROR (GENERIC_ERROR_BASE + 0x01UL)
+/*! CryptoCell illegal resource value error. */
+#define CC_ILLEGAL_RESOURCE_VAL_ERROR (GENERIC_ERROR_BASE + 0x02UL)
+
+
+
+/* ............ The OK (success) definition ....................... */
+
+/*! A macro that defines the CryptoCell return value. */
+#define CC_CRYPTO_RETURN_ERROR(retCode, retcodeInfo, funcHandler) \
+ ((retCode) == 0 ? CC_OK : funcHandler(retCode, retcodeInfo))
+
+/************************ Enums ********************************/
+
+
+/************************ Typedefs ****************************/
+
+
+/************************ Structs ******************************/
+
+
+/************************ Public Variables **********************/
+
+
+/************************ Public Functions **********************/
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+@}
+ */
+
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffc_domain.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffc_domain.h
new file mode 100644
index 0000000..fc8e8b2
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffc_domain.h
@@ -0,0 +1,399 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_FFC_DOMAIN_H
+#define _CC_FFC_DOMAIN_H
+
+#include "cc_pka_defs_hw.h"
+#include "cc_pal_types.h"
+#include "cc_pal_compiler.h"
+#include "cc_hash_defs.h"
+#include "cc_rnd_common.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*! @file
+@brief This file defines the API that supports FFC Domain generation domain.
+@defgroup cc_ffcdh_domain CryptoCell FFC Domain Generation APIs
+@{
+@ingroup cc_ffc_domain
+
+*/
+
+/************************ Defines ******************************/
+
+/*! Maximal prime P (modulus) size .*/
+#define CC_FFC_DOMAIN_MAX_MOD_SIZE_IN_BITS 2048 /* 3072 - for FFC DSA FIPS 186-4 sec. 4.2 . */
+#define CC_FFC_DOMAIN_MAX_MOD_SIZE_IN_BYTES (CC_FFC_DOMAIN_MAX_MOD_SIZE_IN_BITS / CC_BITS_IN_BYTE)
+#define CC_FFC_DOMAIN_MAX_MOD_SIZE_IN_WORDS (CC_FFC_DOMAIN_MAX_MOD_SIZE_IN_BYTES/CC_32BIT_WORD_SIZE)
+/*! Minimal valid key size in bits.*/
+#define CC_FFC_DOMAIN_MIN_VALID_MOD_SIZE_VALUE_IN_BITS 1024 /*!< Size limitation according the same standard */
+
+/*! Prime P (modulus) buffer size in words.*/
+#define CC_FFC_DOMAIN_MAX_MOD_BUFFER_SIZE_IN_WORDS (CC_FFC_DOMAIN_MAX_MOD_SIZE_IN_WORDS + 2)
+#define CC_FFC_DOMAIN_MAX_MOD_BUFFER_SIZE_IN_BYTES (CC_FFC_DOMAIN_MAX_MOD_BUFFER_SIZE_IN_WORDS * CC_32BIT_WORD_SIZE)
+
+/*! Maximal FFC subgroup order size. */
+#define CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_BITS 256
+#define CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_BYTES (CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_BITS / CC_BITS_IN_BYTE)
+#define CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_WORDS (CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_BITS / CC_BITS_IN_32BIT_WORD)
+/*!< Maximal size of buffer for generator order (added 2 words for internal using) */
+#define CC_FFC_DOMAIN_MAX_GENER_ORDER_BUFF_SIZE_IN_WORDS (CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_WORDS + 2)
+
+/*! Minimal and maximal sizes of FFC Seed in bytes. */
+#define CC_FFC_DOMAIN_SEED_MIN_SIZE_IN_BYTES CC_HASH_SHA1_DIGEST_SIZE_IN_BYTES
+#define CC_FFC_DOMAIN_SEED_MAX_SIZE_IN_BYTES CC_HASH_SHA512_DIGEST_SIZE_IN_BYTES
+/*! Minimal size of FFC seed in bits. */
+#define CC_FFC_DOMAIN_SEED_MIN_SIZE_IN_BITS (CC_FFC_DOMAIN_SEED_MIN_SIZE_IN_BYTES * 8)
+
+/*! The size of the buffer for User ID */
+//#define CC_FFCDH_USER_ID_SIZE_IN_BYTES 8
+/*! Buffer for Barrett Tag - special value, used in modular multiplication */
+#define CC_FFC_DOMAIN_BARRETT_TAG_MAX_SIZE_IN_WORDS 5
+#define CC_FFC_DOMAIN_BARRETT_TAG_MAX_SIZE_IN_BYTES (CC_FFC_DOMAIN_BARRETT_TAG_MAX_SIZE_IN_WORDS * CC_32BIT_WORD_SIZE)
+
+
+/* Macros for checking and return errors */
+#define CHECK_ERROR(err) if((err)) goto End
+#define CHECK_AND_SET_ERROR(expr, errMsg) if((expr)) {err = (errMsg); goto End;}
+#define CHECK_AND_RETURN_ERROR(expr, errMsg) if((expr)) {err = (errMsg); return err;}
+
+/* check that ptr != NULL and outSize <= buffSize */
+#define CHECK_PTR_AND_SIZE(pOut, outSize, buffSize) { \
+ if((pOut == NULL) err = CC_FFCDH_INVALID_ARGUMENT_POINTER_ERROR; goto End; \
+ if((outSize > buffSize) err = CC_FFCDH_INVALID_ARGUMENT_SIZE_ERROR; goto End; \
+}
+
+/* primality testing definitions */
+#define CC_FFC_PRIME_TEST_MODE CC_DH_PRIME_TEST_MODE
+#define CCFfcPrimeTestMode_t CCRsaDhPrimeTestMode_t
+
+/*!< the DH Domain user validity TAG */
+#define CC_FFC_DOMAIN_VALIDATION_TAG 0xFFCD8000
+
+#define CC_FFC_DOMAIN_TMP_BUFF_SIZE_IN_WORDS \
+ (5*CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_WORDS + 3*CC_FFC_DOMAIN_MAX_MOD_BUFFER_SIZE_IN_WORDS + 3)
+
+
+/************************ Enums ********************************/
+/*! HASH operation modes. */
+typedef enum
+{
+ CC_FFC_HASH_SHA1_MODE = 0,
+ CC_FFC_HASH_SHA224_MODE = 1,
+ CC_FFC_HASH_SHA256_MODE = 2,
+ CC_FFC_HASH_SHA384_MODE = 3,
+ CC_FFC_HASH_SHA512_MODE = 4,
+ CC_FFC_HASH_NUM_OFF_MODE,
+ CC_FFC_HASH_OP_MODE_LAST = 0x7FFFFFFF
+}CCFfcHashOpMode_t;
+
+
+/*! FFC DH Domain validation mode definitions:
+ NIST SP 56A Rev. 2, */
+typedef enum {
+ CC_FFC_DOMAIN_VALIDAT_FULL_MODE, /*!< full validation */
+ CC_FFC_DOMAIN_TRUSTED_DATA_MODE, /*!< minimal checking: sizes and pointers;
+ this mode may be used on user's responsibility and
+ only when he obtains full assurance about Domain data */
+ CC_FFC_DOMAIN_VALIDAT_NUM_OFF_MODE, /*!< not allowed value */
+ CC_FFC_DOMAIN_VALIDAT_MODE_LAST = 0x7FFFFFFF
+} CCFfcDomainValidMode_t;
+
+/*! FFC DH Domain parameters sets definition: NIST SP 56A Rev. 2, sec. 5.8.1, tab.6. */
+typedef enum
+{
+ /* domain sets according to SP 800-56A rev.2. */
+ CC_FFC_PARAMS_SET_FA, /*!< FA - min. parameters sizes and security strength */
+ CC_FFC_PARAMS_SET_FB, /*!< FB - middle 1 */
+ CC_FFC_PARAMS_SET_FC, /*!< FC - middle 2 (max.sizes allowed for FFC-DH) */
+ /*!< DSA - added for FFC-DSA allowed sizes according to FIPS 186-4 sec.4.2, */
+ CC_FFC_PARAMS_ADD_SET_DSA, /*!< max sizes (allowed for FFC-DSA, not standard for FFC-DH) */
+ CC_FFC_PARAMS_SET_NUM_OFF_MODE, /*!< not allowed value */
+ CC_FFC_PARAMS_SET_LAST = 0x7FFFFFFF
+} CCFfcParamSetId_t;
+
+/*! FFC DH Domain parameters sets definition: NIST SP 56A Rev. 2, sec. 5.8.1, tab.6. */
+typedef enum
+{
+ /* domain sets according to SP 800-56A rev.2. */
+ CC_FFC_USE_GIVEN_SEED, /*!< generate domain from given Seed */
+ CC_FFC_GENERATE_NEW_SEED, /*!< generate new seed and Domain */
+ CC_FFC_SEED_NOT_USED, /*!< seed not used in appropriate function. */
+ CC_FFC_GEN_SEED_NUM_OFF_MODE, /*!< not allowed value */
+ CC_FFC_GEN_SEED_NUM_LAST = 0x7FFFFFFF
+} CCFfcGenerateSeed_t;
+
+
+/************************ Typedefs ****************************/
+
+/* temp buffers, used in different DH KG functions */
+
+/*! Temporary data buffer structure for domain parameters generation in DH. */
+typedef struct CCFfcDomainTmpBuff_t
+{
+ /* The aligned input and output temp buffers */
+ /*! Temporary buffer. */
+ uint32_t TmpBuff[CC_FFC_DOMAIN_TMP_BUFF_SIZE_IN_WORDS];
+}CCFfcDomainTmpBuff_t;
+
+
+/**************************************************************/
+/*! FFC Domain parameters structure (p,q,g,{seed,genCounter}.
+ * NIST SP 800-56A sec.5.5.1.1. Max. size of structure:
+ * 2*(MaxModSize + MaxOrderSize) + 5w*4 + 40bytes = 636 bytes */
+typedef struct CCFfcDomain_t {
+
+ uint32_t prime[CC_FFC_DOMAIN_MAX_MOD_SIZE_IN_WORDS]; /*!< prime modulus. */
+ uint32_t modLenWords; /*!< prime modulus size in bytes */
+ uint32_t genG[CC_FFC_DOMAIN_MAX_MOD_SIZE_IN_WORDS]; /*!< FFC sub-group generator */
+ uint32_t order[CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_WORDS]; /*!< order of FFC sub-group */
+ uint32_t ordLenWords; /*!< group order size in bytes */
+ uint8_t seed[CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_BYTES]; /*!< seed for domain generation and validation */
+ uint32_t seedSizeBytes; /*!< seed size in bytes */
+ uint32_t barrettTag[CC_FFC_DOMAIN_BARRETT_TAG_MAX_SIZE_IN_WORDS]; /*!< buffer for Barrett Tag - special value, used in
+ modular reduction and multiplication. */
+ uint32_t genCounter; /*!< count of iterations, needed for successful domain generation */
+ CCFfcParamSetId_t ffcParamSetId; /*!< enumerator, defining the set of FFC domain parameters
+ according to SP 56A rev.2 section 5.5.1.1, tab.1. */
+ CCFfcHashOpMode_t ffcHashMode; /*!< enumerator ID of HASH mode, chosen for domain generation.
+ Note: HASH SHA1 function allowed only for SA set of domain parameters. */
+ uint32_t hashDigestSize; /*!< size in bytes of HASH digest for chosen mode. */
+ uint32_t hashBlockSize; /*!< size in bytes of HASH block for chosen mode. */
+ uint32_t indexOfGenerator; /*!< index, of currently created FFC Generator (allows create different
+ Generators for existed prime P, Order Q, and Seed). */
+ uint32_t validTag; /*!< validation tag.*/
+}CCFfcDomain_t;
+
+#define FFC_DOMAIN_SIZE_BYTES ((2*CC_FFC_DOMAIN_MAX_MOD_SIZE_IN_WORDS + 2*CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_WORDS + \
+ CC_FFC_DOMAIN_BARRETT_TAG_MAX_SIZE_IN_WORDS + 10) * CC_32BIT_WORD_SIZE)
+
+/***************************************************************************/
+/*!< Set of FFC Domain parameters size approved by NIST SP 800-56A rev.2. tab.6,8
+ * and FIPS 186-4
+ Intended for initialisation of array of structures of following type.
+ Note: Bit-size of each parameters = 8*ByteSize.
+ */
+typedef struct CCFfcDomainParamSizes_t
+{
+ uint32_t maxSecurStrength; /*!< Maximum security strength supported, in bytes. */
+ uint32_t primeSize; /*!< Field (prime P) size in bytes. */
+ uint32_t orderSize; /*!< Subgroup order Q size in bytes. */
+ uint32_t minHashLen; /*!< Minimum length of HASH output in bytes. */
+} CCFfcDomainParamSizes_t;
+
+
+/*!< Set of DH FFC parameters sizes, approved by NIST SP 800-56A rev.2: sec. 5.8.1, 5.9.3.
+ Intended for initialization of array of structures of type CCFfcDhFfcDomainParamSizes_t.
+ All sizes are given in bytes (see CCFfcDomainParamSizes_t struct).
+ \note Index of array is given according to CCFfcDhFfcParamsSetId_t enumerator:
+ {CC_FFCDH_PARAMS_SET_FA, CC_FFCDH_PARAMS_SET_FB, CC_FFCDH_PARAMS_SET_FC} = {0,1,2}.
+*/
+#define CC_FFC_DOMAIN_PARAM_SIZES_SET {{80,1024,160,80},{112,2048,224,112},{112,2048,256,112}}
+/*! Define and init parameters array */
+//CCFfcDomainParamSizes_t ffcDomainParamSizes[(uint32_t)CC_FFC_DOMAIN_PARAMS_SET_NUM_OFF_MODE] = CC_FFC_DOMAIN_PARAM_SIZES_SET;
+
+/*! Array of allowed HASH SHA-x block and digest sizes for all SHA modes (size in bytes).
+ \note Index of array is according to CCFfcDhParamsSetId_t enumerator: {CC_HASH_SHA1_mode, CC_HASH_SHA224_mode, CC_HASH_SHA256_mode,
+ CC_HASH_SHA384_mode, CC_HASH_SHA512_mode} = {0,1,2,3,4}.
+ */
+#define CC_FFC_SHA_PARAMETERS_SIZES_IN_BYTES {{64,20},{64,28},{64,32},{128,48},{128,64}}
+
+/*! Define and initialize HASH parameters array */
+//CCFfcDhHashBlockAndDigestSizes_t DhHashBlockAndDigestSizes[(uint32_t)CC_FFCDH_HASH_NUM_OFF_MODE] =
+// CC_FFC_SHA_PARAMETERS_SIZES_IN_BYTES;
+
+//
+///*! Temporary buffer structure . */
+//typedef struct CCFfcDhKgCheckTemp_t
+//{
+// /*! Temporary buffer. */
+// uint32_t checkTempBuff[3*CC_FFC_DOMAIN_MAX_MOD_SIZE_IN_WORDS];
+// /*! Temporary buffer. */
+// CCFfcDomainTmpBuff_t domainBuff;
+//}CCFfcDomainCheckTemp_t;
+
+
+/************************ Structs ******************************/
+
+/************************ Public Variables **********************/
+
+/************************ Public Functions **********************/
+
+/*******************************************************************************************/
+/*!
+@brief This function generates FFC domain parameters according to NIST SP 56A rev.2, referring to FIPS 184-4 standard.
+\par<ol><li>
+<li> The function generates FFC Domain from given Seed and iterations count and sets them into Domain structure.
+If actual count of iterations is not equalled to given value, then the function returns an error. </li>
+<li> The function calculates prime modulus P, subgroup generator G with order Q using Seed and given Generator
+index, allowing to generate different FFC generators with same P and Q, according to SP 56A rev.2 sec.5.5.1.1
+and FIPS 184-4 A.1.1.2, A.2.3. </li>
+<li> The function allows generation domains only for approved set of parameters sizes (SP 56A rev.2 5.5.1.1),
+given by enumerator ID of type CCFfcDhParamSetId_t. </li></ol>
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_ffc_domain_error.h.
+
+*/
+CIMPORT_C CCError_t CC_FfcGenerateDomainFromSeed(
+ CCFfcDomain_t *pDomain, /*!< [out] pointer to FFC Domain structure. */
+ CCRndContext_t *pRndContext, /*!< [in] random generation function context. */
+ size_t primeSizeBits, /*!< [in] size of domain's prime modulus in bits (see requirements above). */
+ size_t orderSizeBits, /*!< [in] size of domain's sub-group order in bits (see requirements above). */
+ uint8_t *pSeed, /*!< [in] pointer to the seed for domain generation and validation; */
+ size_t seedSizeBytes, /*!< [in] seed size in bytes */
+ uint32_t genCounter, /*!< [in] exact value of count of main loop iterations, required for generation
+ FFC Domain from given Seed. If actual count is not equal to given,
+ then the function returns an error. */
+ CCFfcParamSetId_t ffcParamSetId,/*!< [in] enumerator, defining the set of FFC domain parameters
+ according to SP 56A rev.2 section 5.5.1.1, tab.1. */
+ CCFfcHashOpMode_t ffcHashMode, /*!< [in] enumerator ID of SHAx HASH mode. Note: HASH SHA1 mode may be
+ used only with SA set of domain parameters (sec. 5.8.1, tab.6). */
+ uint8_t generIndex, /*!< [in] an index of FFC Generator, allowing to generate different FFC generators with
+ the same FFC parameters prime P and Order Q, existed in the domain. */
+ CCFfcDomainTmpBuff_t *pTmpBuff /*!< [in] pointer to FFC Domain temp buffer structure. */
+);
+
+/*******************************************************************************************/
+/*!
+@brief This function generates FFC Domain parameters including new Seed Seed according to
+ NIST SP 56A rev.2 with referring to FIPS 184-4 standard.
+\par<ol><li>
+<li> The function generates a new Seed, calculates FFC Domain parameters and sets them into Domain. </li>
+<li> The function calculates prime modulus P, subgroup generator G with order Q using Seed and given Generator
+index, allowing to generate different FFC generators with same P and Q, according to SP 56A rev.2 sec.5.5.1.1
+and FIPS 184-4 A.1.1.2, A.2.3. </li>
+<li> The function allows generation Domain only for approved set of parameters sizes (SP 56A rev.2 5.5.1.1),
+given by enumerator ID of type CCFfcDhParamSetId_t. </li></ol>
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h, cc_rnd_error.h.
+ */
+CIMPORT_C CCError_t CC_FfcGenerateDomainAndSeed(
+ CCFfcDomain_t *pDomain, /*!< [out] pointer to FFC Domain structure. */
+ CCRndContext_t *pRndContext, /*!< [in] random generation function context. */
+ size_t primeSizeBits, /*!< [in] size of domain's prime modulus in bits (see requirements above). */
+ size_t orderSizeBits, /*!< [in] size of domain's sub-group order in bits (see requirements above). */
+ size_t seedSizeBytes, /*!< [in] required size of the seed in bytes; it must be not less than
+ HASH security strength, defined in given ffcParamsSet. */
+ CCFfcParamSetId_t ffcParamSetId,/*!< [in] enumerator, defining the set of FFC domain parameters
+ according to SP 56A rev.2 section 5.5.1.1, tab.1. */
+ CCFfcHashOpMode_t ffcHashMode, /*!< [in] enumerator ID of SHAx HASH mode. Note: HASH SHA1 mode may be
+ used only with SA set of domain parameters (sec. 5.8.1, tab.6). */
+ uint8_t generIndex, /*!< [in] an index of FFC Generator, allowing to generate different FFC generators with
+ the same FFC parameters prime P and Order Q, existed in the domain. */
+ CCFfcDomainTmpBuff_t *pTmpBuff /*!< [in] pointer to FFC Domain temp buffer structure. */
+);
+
+
+/*******************************************************************************************/
+/*!
+@brief The function validates received FFC domain parameters and sets them into Domain structure.
+<ol><li> Validation of performed according to NIST SP 56A rev.2, sec. 5.5.2 and to FIPS 184-4 standard. </li>
+</li> If optional parameters (Seed and pgenCounter) are given, then the function performs full validation by generation
+primes P,Q from the given Seed and compares calculated and received parameters according to the FIPS 184-4, A.1.1.3. </li>
+</li> Generator G is validated according to sec. A.2.3. </li>
+</li> If optional parameters pSeed, seedSize, pgenCounter are zero, and the user explicitly sets validation mode to
+"Trusted Data", then the function performs only checking of pointers, sizes and some relations between parameters. <li>.
+</li> All input byte-arrays should be set with big endianness order of bytes, i.e. MS Byte is a leftmost one. </li></ol>
+@return CC_OK on success.
+@return A non-zero value on failure, as defined in cc_dh_error.h, cc_rnd_error.h.
+ */
+CIMPORT_C CCError_t CC_FfcValidateAndImportDomain(
+ CCFfcDomain_t *pDomain, /*!< [out] pointer to FFC Domain structure. */
+ CCRndContext_t *pRndContext, /*!< [in] optional (used on Full Validation mode only), random generation
+ function context. */
+ uint8_t *pPrime, /*!< [in] pointer to prime modulus of the finite field (P). */
+ size_t primeSizeBits, /*!< [in] prime P size in bits. */
+ uint8_t *pOrder, /*!< [in] pointer to the order Q of the generator. */
+ size_t orderSizeBits, /*!< [in] order size in bits. */
+ uint8_t *pGenerator, /*!< [in] pointer to generator G of subgroup of FFC. */
+ size_t generSizeBytes, /*!< [in] generator G size in bytes (see note bellow). */
+ uint8_t *pSeed, /*!< [in] optional (used on Full Validation mode only), pointer to the Seed,
+ if the Seed is not given, then should be set to NULL. */
+ size_t seedSizeBytes, /*!< [in] optional size of Seed in bytes; if Seed not given, then
+ should be set to 0. */
+ CCFfcParamSetId_t ffcParamSetId, /*!< [in] enumerator, defining the set of FFC domain parameters
+ according to SP 56A rev.2 section 5.5.1.1, tab.1. */
+ CCFfcHashOpMode_t ffcHashMode, /*!< [in] enumerator ID of SHAx HASH mode. Note: HASH SHA1 mode may be
+ used only with SA set of domain parameters (sec. 5.8.1, tab.6). */
+ uint32_t genCounter, /*!< [in] optional, counter of main iterations loop, performed during
+ domain generation with Seed. */
+ uint8_t generIndex, /*!< [in] an index of FFC Generator, allowing to generate different FFC generators with
+ the same FFC parameters prime P and Order Q, existed in the domain. */
+ CCFfcDomainValidMode_t validMode,/*!< [in] enumerator, defining validation mode of of domain parameters:
+ "full" (approved by FIPS standard), "partial"
+ and "trusted" (validated previously); using of both second
+ modes is not approved by standards and is fully on the user
+ responsibility. */
+ CCFfcDomainTmpBuff_t *pTmpBuff /*!< [in] optional pointer to FFC Domain temp buffer structure. Used only
+ on Full validation mode, on Trusted mode may be set to NULL. */
+);
+
+
+/*******************************************************************************************/
+/*!
+@brief This function extracts FFC domain parameters from Domain structure for external using.
+<ol><li> Assumed, that FFC domain is properly generated by CC_FfcGenerateDomain or other function
+according to the FIPS 184-4, A.1.1.2 standard. </li>
+<li> The function checks input/output pointers and buffers sizes, converts the DH Domain parameters
+to big endianness output arrays (with leading zeros if exists). </li>
+<li> Note: Sizes of parameters are given by pointers, were [in/out] values are: in - buffer size,
+out - actual size. </li></ol>
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h, cc_rnd_error.h.
+*/
+CIMPORT_C CCError_t CC_FfcExportDomain(
+ CCFfcDomain_t *pDomain, /*!< [in] pointer to FFC Domain to be exported. */
+ uint8_t *pPrime, /*!< [out] pointer to prime modulus of the finite field (P). */
+ size_t *pPrimeSize, /*!< [in/out] pointer to prime P size in bytes. */
+ uint8_t *pGenerator, /*!< [out] pointer to generator of subgroup (G). */
+ size_t *pGeneratorSize, /*!< [in/out] pointer to generator G size in bytes. */
+ uint8_t *pOrder, /*!< [out] pointer to the order of the generator G. */
+ size_t *pOrderSize, /*!< [in/out] pointer to order of generator Q size in bytes. */
+ uint8_t *pSeed, /*!< [out] optional, pointer to the Seed, used for Domain generation;
+ if Seed is not required, then the pointer and size should be NULL. */
+ size_t *pSeedSize, /*!< [in/out] optional, size of the Seed in bytes - if the Seed not exist,
+ in the Domain, the function sets the size = 0. */
+ CCFfcParamSetId_t *pFfcParamSetId, /*!< [in] pointer to enumerator ID, defining the set of FFC domain parameters
+ parameters according to SP 56A rev.2 section 5.5.1.1, tab.1. */
+ CCFfcHashOpMode_t *pFfcHashMode, /*!< [in] pointer to enumerator ID of SHAx HASH mode. Note: HASH SHA1 mode
+ may be used only with SA set of domain parameters (sec. 5.8.1, tab.6). */
+ uint32_t *pGenCounter, /*!< [out] pointer to count of iterations, which were performed
+ during Domain generation. */
+ uint8_t *pIndexOfGenerator /*!< pointer to index, of FFC Generator existed in the Domain. */
+);
+
+
+/*******************************************************************************************/
+/*!
+@brief The function creates a new FFC subgroup Generator for existed FFC Domain.
+<ol><li> Assumed, that FFC domain is properly generated or imported previously and meets
+to the FIPS 184-4, sec. A.1.1.2 standard. </li>
+<li> The function checks input/output pointers and buffers sizes and creates new Generator
+according to sec. A.2.3. and sets it into Domain structure. </li></ol>
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h, cc_rnd_error.h.
+*/
+CIMPORT_C CCError_t CC_FfcCreateNewGenerator(
+ CCFfcDomain_t *pDomain, /*!< [in/out] pointer to FFC Domain structure. */
+ CCRndContext_t *pRndContext, /*!< [in] random generation function context. */
+ uint8_t index, /*!< [in] index allowing to generate some FFC generators with
+ the same FFC parameters prime P and Order Q, existed in the domain. */
+ CCFfcDomainTmpBuff_t *pTmpBuff /*!< [in] pointer to FFC Domain temp buffer structure. */
+);
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffc_domain_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffc_domain_error.h
new file mode 100644
index 0000000..b48e276
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffc_domain_error.h
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_FFC_DOMAIN_ERROR_H
+#define _CC_FFC_DOMAIN_ERROR_H
+
+
+#include "cc_error.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+@file
+@brief This file contains error codes definitions for CryptoCell FFC_DOMAIN module.
+@defgroup ffccc_dh_error CryptoCell FFC_DOMAIN specific errors
+@{
+@ingroup cc_ffc_domain
+*/
+/************************ Defines ******************************/
+
+/* FFC_DOMAIN module on the CryptoCell layer base address - 0x00F02C00 */
+
+/*! Invalid input pointer.*/
+#define CC_FFC_DOMAIN_INVALID_ARGUMENT_PTR_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x00UL)
+/*! Invalid input size.*/
+#define CC_FFC_DOMAIN_INVALID_ARGUMENT_SIZE_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x01UL)
+/*! A pointer and size of optional parameter not meets one to other: one is zero, but other - not. */
+#define CC_FFC_DOMAIN_INVALID_OPTIONAL_PARAM_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x02UL)
+/*! Invalid pointer to domain structure. */
+#define CC_FFC_DOMAIN_INVALID_DOMAIN_PTR_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x03UL)
+/*! Invalid pointer to random function Context. */
+#define CC_FFC_DOMAIN_INVALID_RND_CTX_PTR_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x04UL)
+/*! Invalid pointer to random function inside the Context. */
+#define CC_FFC_DOMAIN_INVALID_RND_FUNCTION_PTR_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x05UL)
+/*! Invalid Domain validation Tag. */
+#define CC_FFC_DOMAIN_VALIDATION_TAG_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x06UL)
+/*! Invalid enumerator of FFC sizes standard set ID. */
+#define CC_FFC_DOMAIN_INVALID_SIZES_SET_ID_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x07UL)
+/*! Invalid enumerator of hash mode. */
+#define CC_FFC_DOMAIN_INVALID_HASH_MODE_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x08UL)
+/*! Invalid enumerator of seed generation mode. */
+#define CC_FFC_DOMAIN_INVALID_SEED_GENERATION_MODE_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x09UL)
+/*! Invalid enumerator of Domain validation mode. */
+#define CC_FFC_DOMAIN_INVALID_VALIDAT_MODE_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x0AUL)
+/*! Invalid Hash mode: size of Hash too low for required security. */
+#define CC_FFC_DOMAIN_INVALID_LOW_HASH_SIZE_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x0BUL)
+/*! Invalid prime modulus size. */
+#define CC_FFC_DOMAIN_INVALID_PRIME_SIZE_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x10UL)
+/*! Invalid FFC sub-group Order size. */
+#define CC_FFC_DOMAIN_INVALID_ORDER_SIZE_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x11UL)
+/*! Invalid Domain generation Seed pointer. */
+#define CC_FFC_DOMAIN_INVALID_SEED_PTR_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x12UL)
+/*! Invalid Domain generation Seed size. */
+#define CC_FFC_DOMAIN_INVALID_SEED_SIZE_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x13UL)
+/*! Invalid FFC Domain Prime value. */
+#define CC_FFC_DOMAIN_PRIME_NOT_VALID_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x14UL)
+/*! Invalid FFC Domain Order value. */
+#define CC_FFC_DOMAIN_ORDER_NOT_VALID_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x15UL)
+/*! Invalid FFC Domain sub-group Generator. */
+#define CC_FFC_DOMAIN_GENERATOR_NOT_VALID_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x16UL)
+/*! Invalid FFC Domain generation Counter. */
+#define CC_FFC_DOMAIN_GEN_COUNTER_NOT_VALID_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x17UL)
+/*! Seed is not required by given DH Scheme. */
+#define CC_FFC_DOMAIN_SEED_IS_NOT_REQUIRED_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x18UL)
+/*! Domain generation is failed. */
+#define CC_FFC_DOMAIN_GENERATION_FAILURE_ERROR (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0x19UL)
+
+#define CC_FFC_DOMAIN_IS_NOT_SUPPORTED (CC_FFC_DOMAIN_MODULE_ERROR_BASE + 0xFFUL)
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffcdh.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffcdh.h
new file mode 100644
index 0000000..85139be
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffcdh.h
@@ -0,0 +1,883 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_FFCDH_H
+#define _CC_FFCDH_H
+
+#include "cc_pal_types.h"
+#include "cc_pka_defs_hw.h"
+#include "cc_pal_types.h"
+#include "cc_pal_compiler.h"
+#include "cc_hash_defs.h"
+#include "mbedtls_cc_hkdf.h"
+#include "cc_ffc_domain.h"
+#include "cc_rnd_common.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/*!
+@file
+@brief This file defines the API that supports FFC Diffie-Hellman key exchange, as defined in NIST SP 56A rev.2 standard.
+@defgroup cc_ffcdh CryptoCell FFCDH APIs
+@{
+@ingroup cryptocell_api
+
+*/
+
+
+/************************ Defines ******************************/
+
+/*! Definition for DH public key.*/
+
+/*!< Size limitation according to NIST SP 56A ver.2 standard */
+#define CC_FFCDH_MAX_VALID_KEY_SIZE_VALUE_IN_BITS 2048 /*! Maximal valid key size in bits.*/
+/*! Minimal valid key size in bits.*/
+#define CC_FFCDH_MIN_VALID_KEY_SIZE_VALUE_IN_BITS 1024 /*!< Size limitation according to NSI standard */
+/*! Maximal prime P (modulus) size in bytes.*/
+#define CC_FFCDH_MAX_MOD_SIZE_IN_BYTES (CC_FFCDH_MAX_VALID_KEY_SIZE_VALUE_IN_BITS / CC_BITS_IN_BYTE)
+/*! Maximal prime P (modulus) size in words.*/
+#define CC_FFCDH_MAX_MOD_SIZE_IN_WORDS (CC_FFCDH_MAX_MOD_SIZE_IN_BYTES / CC_32BIT_WORD_SIZE)
+/*! Prime P (modulus) buffer size in words.*/
+#define CC_FFCDH_MAX_MOD_BUFFER_SIZE_IN_WORDS (CC_FFCDH_MAX_MOD_SIZE_IN_WORDS + 2)
+#define CC_FFCDH_MAX_MOD_BUFFER_SIZE_IN_BYTES (CC_FFCDH_MAX_MOD_BUFFER_SIZE_IN_WORDS * CC_32BIT_WORD_SIZE)
+
+/*! Maximal FFC subgroup order size. */
+#define CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_BITS CC_FFC_DOMAIN_MAX_GENER_ORDER_SIZE_IN_BITS
+#define CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_BYTES (CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_BITS / CC_BITS_IN_BYTE)
+#define CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_WORDS (CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_BITS / CC_BITS_IN_32BIT_WORD)
+/*!< Maximal size of buffer for Generator order (added 2 words for internal using) */
+#define CC_FFCDH_MAX_GENER_ORDER_BUFF_SIZE_IN_WORDS (CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_WORDS + 2)
+
+/* Size in bytes of Length-counter (used for TLS data transfer etc. in form Len||Data) */
+#define CC_FFCDH_LENGTH_COUNTER_SIZE_IN_BYTES 2
+#define CC_FFCDH_KDF_COUNTER_SIZE_IN_BYTES 4 /* counter used in some KDF functions and concatenated
+ with OtherInfo */
+#define CC_FFCDH_PUBL_KEY_TMP_BUFF_IN_WORDS CC_FFCDH_MAX_MOD_SIZE_IN_WORDS
+#define CC_FFCDH_PRIV_KEY_TMP_BUFF_IN_WORDS (CC_FFCDH_MAX_GENER_ORDER_BUFF_SIZE_IN_WORDS)
+
+/*! Number of other info entries */
+#define CC_FFCDH_COUNT_OF_OTHER_INFO_ENTRIES 13
+
+#define CC_FFCDH_MAX_SIZE_OF_ALG_ID_ENTRY_BYTES 32 /*!< Algorithm ID in bytes.*/
+
+/*! Maximal size of supplied Private or Public data entry. */
+#define CC_FFCDH_MAX_SIZE_OF_OTHER_INFO_SUPPL_ENTRY_BYTES 64 /*!< Size is in bytes */
+#define CC_FFCDH_MAX_SIZE_OF_PARTY_ID_BYTES 32 /*!< implementation limit, in bytes. */
+
+/*! Size of Nonce for Key Confirmation (if it is used) should be equal to FFC sub-group order size (meets to SP 800-56Arev.2, sec. 5.4) */
+#define CC_FFCDH_MAX_SIZE_OF_NONCE_SUB_ENTRY_BYTES CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_BYTES
+#define CC_FFCDH_MAX_SIZE_OF_PUBL_KEY_DATA_BYTES CC_FFCDH_MAX_MOD_SIZE_IN_BYTES /*!< Party Public Key max. size in bytes. */
+#define CC_FFCDH_MAX_SIZE_OF_PARTY_INFO_OTHER_DATA_BYTES 64 /*!< Party Public Keys Info max. size in bytes.*/
+/*!< Count of concatenated sub-entries of Party (U or V) Info */
+#define CC_FFCDH_COUNT_OF_PARTY_INFO_ENTRIES 5
+/*! Maximal size of PartyInfo (U or V). Note: Buffers for Nonce and Ephemeral key
+ * are joined, because only one of them is used actually */
+#define CC_FFCDH_MAX_SIZE_OF_PARTY_INFO_BYTES (CC_FFCDH_MAX_SIZE_OF_PARTY_ID_BYTES + 2*CC_FFCDH_MAX_SIZE_OF_PUBL_KEY_DATA_BYTES + \
+ CC_FFCDH_MAX_SIZE_OF_NONCE_SUB_ENTRY_BYTES + CC_FFCDH_MAX_SIZE_OF_PARTY_INFO_OTHER_DATA_BYTES + \
+ CC_FFCDH_COUNT_OF_PARTY_INFO_ENTRIES * CC_FFCDH_LENGTH_COUNTER_SIZE_IN_BYTES)
+
+/*! Maximal size of OtherInfo buffer, including KDF Counter and all entries of actual OtherInfo data */
+#define CC_FFCDH_MAX_SIZE_OF_OTHER_INFO_DATA_BYTES (CC_FFCDH_LENGTH_COUNTER_SIZE_IN_BYTES + CC_FFCDH_MAX_SIZE_OF_ALG_ID_ENTRY_BYTES + \
+ 2 * (CC_FFCDH_MAX_SIZE_OF_PARTY_INFO_BYTES + CC_FFCDH_LENGTH_COUNTER_SIZE_IN_BYTES + CC_FFCDH_MAX_SIZE_OF_OTHER_INFO_SUPPL_ENTRY_BYTES))
+/*! Extended KDF data buffer: containing: Counter||SharedSecretZZ||OtherInfo */
+#define CC_FFCDH_MAX_SIZE_OF_KDF_DATA_BUFFER_BYTES (CC_FFCDH_KDF_COUNTER_SIZE_IN_BYTES + 2*CC_FFCDH_MAX_MOD_SIZE_IN_BYTES/*ZZ size*/ + \
+CC_FFCDH_MAX_SIZE_OF_OTHER_INFO_DATA_BYTES)
+#define CC_FFCDH_MAX_SIZE_OF_KDF_DATA_BUFFER_WORDS (CC_FFCDH_MAX_SIZE_OF_KDF_DATA_BUFFER_BYTES / CC_32BIT_WORD_SIZE)
+
+#define CC_FFCDH_MAX_SIZE_OF_KEYING_MATERIAL_BYTES 1024 /*!< Size is in bytes*/
+
+/*! Maximal size of Confirmation MacData in bytes.
+ * msg_str || IDp || IDr || EphemDataP || EphemDataR {|| TextP}
+ * (Max.size 614 bytes */
+#define CC_FFCDH_SIZE_OF_CONFIRM_MSG_STRING_BYTES 6 /*!< standard confirmation message string size in bytes. */
+#define CC_FFCDH_MAX_SIZE_OF_CONFIRM_TEXT_DATA_BYTES 32 /*!< party supplied confirmation text size in bytes. */
+#define CC_FFCDH_MAX_SIZE_OF_CONFIRM_MAC_DATA_BYTES (CC_FFCDH_SIZE_OF_CONFIRM_MSG_STRING_BYTES + 2*(CC_FFCDH_MAX_SIZE_OF_PARTY_ID_BYTES + \
+ CC_FFCDH_MAX_MOD_SIZE_IN_BYTES) + CC_FFCDH_MAX_SIZE_OF_CONFIRM_TEXT_DATA_BYTES)
+/*! Maximal size of Confirmation MacTag (according max. HASH output size) */
+#define CC_FFCDH_MAX_SIZE_OF_CONFIRM_MAC_TAG_BYTES CC_HASH_SHA512_DIGEST_SIZE_IN_BYTES
+/*! Minimal size in bytes of Confirmation MacTag (sec 5.9.3, tab.8) */
+#define CC_FFCDH_MIN_SIZE_OF_CONFIRM_MAC_TAG_BYTES 8
+#define CC_FFCDH_MAX_SIZE_OF_HMAC_SALT_BUFF_BYTES CC_HASH_SHA512_BLOCK_SIZE_IN_BYTES
+
+/*! Constant size in bytes of Confirmation MacTag defined in this implementation;
+ * note: minimal size according to standards is 6 bytes (112 bit - sec 5.9.3, tab.8) */
+#define CC_FFCDH_SIZE_OF_CONFIRM_MAC_KEY_IN_BYTES 8
+
+/*! The size of the buffer for User ID */
+//#define CC_FFCDH_USER_ID_SIZE_IN_BYTES 8
+/*! Buffer for Barrett Tag - special value, used in modular multiplication */
+#define CC_FFCDH_BARRETT_TAG_MAX_SIZE_IN_WORDS CC_FFC_DOMAIN_BARRETT_TAG_MAX_SIZE_IN_WORDS
+#define CC_FFCDH_BARRETT_TAG_MAX_SIZE_IN_BYTES (CC_FFCDH_BARRETT_TAG_MAX_SIZE_IN_WORDS * CC_32BIT_WORD_SIZE)
+
+/*! Size (in 32-bit words) of additional buffer used in random generation of vector
+in range according to FIPS 186-4 sec. B.1.1 */
+#define FFCDH_RND_ADDING_SIZE_WORDS 2
+#define FFCDH_RND_ADDING_SIZE_BYTES (FFCDH_RND_ADDING_SIZE_WORDS * CC_32BIT_WORD_SIZE)
+
+/*! Max. size of DH Context temp buffer in words */
+#define CC_FFCDH_CTX_TMP_BUFF_MAX_SIZE_IN_WORDS (CC_FFCDH_MAX_MOD_SIZE_IN_WORDS + CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_WORDS)
+/* Size of FFCDH Context internal buffer */
+#define CC_FFCDH_CONTEXT_BUFF_SIZE_IN_BYTES \
+ ROUNDUP_BYTES_TO_32BIT_WORD((FFC_DOMAIN_SIZE_BYTES + 32/*schemeInfo*/ + CC_FFCDH_MAX_SIZE_OF_HMAC_SALT_BUFF_BYTES + \
+ CC_FFCDH_MAX_SIZE_OF_KEYING_MATERIAL_BYTES + 4*CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_BYTES + 2*CC_FFCDH_MAX_SIZE_OF_PARTY_ID_BYTES + \
+ 4*CC_FFCDH_MAX_MOD_SIZE_IN_BYTES + CC_FFCDH_MAX_SIZE_OF_KDF_DATA_BUFFER_BYTES + 2*CC_HASH_RESULT_SIZE_IN_WORDS*CC_32BIT_WORD_SIZE/*MacTags*/ + \
+ 84/*dataOffsets*/ + 2*CC_FFCDH_MAX_SIZE_OF_CONFIRM_TEXT_DATA_BYTES + 26*CC_32BIT_WORD_SIZE/*separ.words*/ + \
+ CC_FFCDH_CTX_TMP_BUFF_MAX_SIZE_IN_WORDS*CC_32BIT_WORD_SIZE))
+#define CC_FFCDH_CONTEXT_BUFF_SIZE_IN_WORDS (CC_FFCDH_CONTEXT_BUFF_SIZE_IN_BYTES / CC_32BIT_WORD_SIZE)
+
+#define CC_FFCDH_CALC_USER_MAC_TAG FALSE
+#define CC_FFCDH_CALC_PARTN_MAC_TAG TRUE
+
+/*! Key size used for FIPS tests.*/
+#define CC_FFCDH_FIPS_PRIME_SIZE_VALUE_IN_BITS 2048
+#define CC_FFCDH_FIPS_PRIME_SIZE_VALUE_IN_WORDS (CC_FFCDH_FIPS_PRIME_SIZE_VALUE_IN_BITS / CC_BITS_IN_32BIT_WORD)
+#define CC_FFCDH_FIPS_ORDER_SIZE_VALUE_IN_WORDS 32
+
+
+
+/************************ Enums ********************************/
+
+/*! Key derivation modes according NIST SP 800-56A ver.2 sec. 5.8.2 with reference to
+ * SP 800-56C sec. 4, SP 800-108 and RFC 5869. */
+typedef enum
+{
+ CC_FFCDH_KDF_HMAC_RFC5869_MODE, /*!< extraction-then-expansion KDF(RFC 5869), based on HMAC function;
+ note: input salt assumed to be NULL. */
+ CC_FFCDH_KDF_NUM_OFF_MODE, /*!< not allowed value */
+ CC_FFCDH_KDF_MODE_LAST = 0x7FFFFFFF
+} CCFfcDhKdfModeSp56A_t;
+
+
+/*! FFC DH key Agreement Schemes enumeration according to
+ NIST SP 56A Rev. 2, Section 6, tab. 10-12. */
+typedef enum
+{
+ CC_FFCDH_SCHEM_HYBRID1, /*!< dhHybrid1 C(2e, 2s, FFC DH) */
+ CC_FFCDH_SCHEM_HYBRID_ONE_FLOW, /*!< dhHybridOneFlow C(1e, 2s, FFC DH) */
+ CC_FFCDH_SCHEM_EPHEM, /*!< dhEphem C(2e, 0s, FFC DH) */
+ CC_FFCDH_SCHEM_ONE_FLOW, /*!< dhOneFlow C(1e, 1s, FFC DH) */
+ CC_FFCDH_SCHEM_STATIC, /*!< dhStatic C(0e, 2s, FFC DH) */
+ CC_FFCDH_SCHEM_NUM_OFF_MODE, /*!< not allowed value */
+ CC_FFCDH_SCHEM_LAST = 0x7FFFFFFF
+} CCFfcDhSchemeId_t;
+
+/*! An enumeration ID, defining user role in DH Agreement, represented as U, V
+ in NIST SP 56A Rev. 2, Sections 3.1, 5.8.1.2, 5.9.1, 6 */
+typedef enum
+{
+ CC_FFCDH_PARTY_U, /*!< party U of Key Agreement */
+ CC_FFCDH_PARTY_V, /*!< party V of Key Agreement */
+ CC_FFCDH_PARTY_NUM_OFF_MODE, /*!< not allowed value */
+ CC_FFCDH_PARTY_LAST = 0x7FFFFFFF
+} CCFfcDhUserPartyIs_t;
+
+/*! DH Agreement Confirmation mode: which parts is provider or/and receiver.
+ NIST SP 56A Rev. 2, Sections 5.9, 6.1, 6.2, 6.3 */
+typedef enum
+{
+ CC_FFCDH_CONFIRM_U_TO_V, /*!< only party U provides MacTag to V. */
+ CC_FFCDH_CONFIRM_V_TO_U, /*!< only party V provides MacTag to U. */
+ CC_FFCDH_CONFIRM_BILATERAL, /*!< each party provides MacTag to other. */
+ CC_FFCDH_CONFIRM_NOT_USED, /*!< the confirmation is not performed by the scheme */
+ CC_FFCDH_CONFIRM_NUM_OFF_MODE, /*!< not allowed value */
+ CC_FFCDH_CONFIRM_MODE_LAST = 0x7FFFFFFF
+}CCFfcDhUserConfirmMode_t;
+
+
+/*! DH key status according to its life time (or purpose): static/ephemeral */
+typedef enum
+{
+ CC_FFCDH_KEY_STATIC, /*!< static (long term) key */
+ CC_FFCDH_KEY_EPHEMER, /*!< ephemeral (one-time) key */
+ CC_FFCDH_KEY_STATUS_NUM_OFF_MODE, /*!< not allowed value */
+ CC_FFCDH_KEY_STATUS_LAST = 0x7FFFFFFF
+} CCFfcDhKeyStatus_t;
+
+
+/*! FFC DH Public Key validation mode definitions :
+ (such enumerator mode should be given for each key separately). */
+typedef enum {
+ CC_FFCDH_KEY_VALIDAT_FULL_MODE, /*!< full validation (NIST SP 56A Rev. 2) */
+ CC_FFCDH_KEY_VALIDAT_PARTIAL_MODE, /*!< checking of sizes, pointers and ranges;
+ this mode may be used on user's responsibility
+ when he has assurance about received data */
+ CC_FFCDH_KEY_VALIDAT_NUM_OFF_MODE, /*!< not allowed value */
+ CC_FFCDH_KEY_VALIDAT_MODE_LAST = 0x7FFFFFFF
+} CCFfcDhKeyValidMode_t;
+
+/*! FFC DH both PartyInfo (Public Keys) validation mode definitions (NIST SP 56A Rev. 2).
+ Such enumerator mode might be applied to all existed Public keys, belonging to the party,
+ namely: static and ephemeral keys. If full mode for any existed key is not defined,
+ then it will be validated partially (checking of sizes, pointers and ranges). */
+typedef enum {
+ CC_FFCDH_STAT_KEY_FULL_VALIDAT_MODE, /*!< full validation of static key only */
+ CC_FFCDH_EPHEM_KEY_FULL_VALIDAT_MODE, /*!< full validation of ephemeral key only */
+ CC_FFCDH_BOTH_KEYS_FULL_VALIDAT_MODE, /*!< full validation of both keys */
+ CC_FFCDH_NO_FULL_VALIDAT_MODE, /*!< only partial validation of existed keys */
+ CC_FFCDH_KEYS_VALIDAT_NUM_OFF_MODE, /*!< not allowed value */
+ CC_FFCDH_KEYS_VALIDAT_MODE_LAST = 0x7FFFFFFF
+} CCFfcDhPartyInfoValidMode_t;
+
+
+/************************ Structures ***********************************/
+
+/*! FFC Domain parameters structure (p,q,g,{seed,genCounter}. */
+//#define CCFfcDhDomain_t CCFfcDomain_t
+
+/*! FFC DH Domain parameters sets definition: NIST SP 56A Rev. 2, sec. 5.8.1, tab.6,
+ * Note: modulus (prime) size 3072 is not allowed in FFC DH. */
+//#define CCFfcDhParamSetId_t CCFfcParamSetId_t
+
+/**************************************************************/
+/*! Definition of PartyInfo entry structure.
+The structure (buffer) containing data, which should be supplied, to the key agreement
+by any Party (partyU or partyV) and used for derivation of Shared Secret Keying Data. \par
+The data should be constructed according to concatenation method, described in
+NIST SP 56A rev.2 standard sec. 5.8.1, and the following requirements:
+
+<ul><li> PartyInfo = PartyInfoLen||PartyId||PartyNonce{||PartyOtherData}, where
+each sub-entry is formatted as follows: </li>
+<li> - entries in {} parenthesis are optional. </li>
+<li> - each sub-entry is formatted as length (Len), followed by the data: Len||Data; </li>
+<li> - length (Len) is a 2-bytes big endianness counter; </li>
+<li> - actual length of PartyInfo shall be not great than CC_FFCDH_MAX_SIZE_OF_OTHER_INFO_ENTRY bytes. </li>
+<li> - if any explicitly defined there optionally entry or sub-entry is omitted, then its length
+should be set zero and data is empty string. </li></ul>
+\note Said requirements are mandatory and should be agreed by both parties as a part of Key
+Establishment Agreement protocol.
+*/
+typedef struct CCFfcDhPartyInfo_t{
+ uint8_t data[CC_FFCDH_MAX_SIZE_OF_PARTY_INFO_BYTES];
+}CCFfcDhPartyInfo_t;
+
+/**************************************************************/
+/*! Definition of OtherInfo structure.
+This structure containing "other data", shared by both key agreement parties
+and used for derivation of Shared Secret Keying Data. \par
+The data should be constructed according to concatenation method, described in
+NIST SP 56A rev.2 standard sec. 5.8.1, and the following requirements:
+
+<ul><li> OtherInfo data should be concatenated according to the roles, performed by each
+party in the Key Agreement (partyU or partyV), and include the following entries: </li>
+<li> AlgorithmId||PartyUInfo||PartyVInfo {||SuppPubInfo}{||SuppPrivInfo}, where each entry
+is formatted as follows: </li>
+<li> - entries in {} parenthesis are optional. </li>
+<li> - each entry could include some sub-entries, which are formatted as length (Len), followed
+by the data of said length: Len||Data; </li>
+<li> - length (Len) of the data is formatted as 2-bytes big endianness counter; </li>
+<li> - numerical parameters, such as size of HMAC-Key etc., are considered as separate sub-entry
+and formatted accordingly;
+<li> - actual length of OtherInfo shall be not great than CC_FFCDH_MAX_SIZE_OF_OTHER_INFO_DATA_BYTES bytes. </li>
+<li> - if any explicitly defined optionally entry or sub-entry is omitted, then its length
+should be zero and data array remained empty. </li></ul>
+<ul><li> Formatting of separate entries is described below (each sub-entry includes Len||Data): </li>
+<li> - AlgorithmId entry includes information how the extracted keying material should be parsed between
+HMAC Key (used for internal calculation of Confirmation MacTag) and between Key for External Algorithm,
+i.e. output SecretKeyingData. This entry also includes ID of algorithms, for which these keys are intended:
+ AlgorithmId = HmacKeySize||InternalAlgorithmId||ExternalAlgorithmKeySize||ExternalAlgorithmId, where
+first two sub-entries will be set by CC functions as array: 0x00||0x02||0x00||0x04||"HMAC" and
+sub-entries, related to ExternalAlgorithm, should be given by the user as input to appropriate CC functions. </li>
+<li> - PartyUInfo and PartyVInfo should be constructed as described in CCFfcDhPartyInfo_t structure. </li>
+<li> - Optional SuppPubInfo and SuppPrivInfo entries and their sub-entries should be defined in the Key
+Agreement protocol. </li></ul>
+\note Said requirements are mandatory and should be agreed by both parties as a part of Key Establishment
+Agreement protocol.
+*/
+typedef struct CCFfcDhOtherInfo_t{
+ uint8_t data[CC_FFCDH_MAX_SIZE_OF_OTHER_INFO_DATA_BYTES/*884 bytes ???*/];
+}CCFfcDhOtherInfo_t;
+
+/**************************************************************/
+/*! Definition of MAC Data structure, containing data, known to both key agreement
+parties and used for key confirmation. \par
+The data should be constructed according to NIST SP 56A rev.2 standard,
+sec. 5.9, 5.9.1.1 and the following requirements:
+<ul><li> MacData should be concatenated according to the role, performed by the user
+in the Key Agreement: is he partyU or partyV and is he confirmation provider (P)
+or recipient (R): </li>
+<li> MacDataP = messageStringP||IDP||IDR{||EphemDataP}||EphemDataR{||TextP},
+where each entry is formatted as follows: </li>
+<li> - actually, instead letters "P" and "R" must be set "U" or "V" according to parties roles in DH Scheme; </li>
+<li> - EphemData is an EphemeralPublicKey or Nonce, contributed by the party to the Agreement; </li>
+<li> - messageStringP is a 6-byte string, defined in the sec.5.9.1, 5.9.2 according to used DH Scheme; <li>
+<li> - TextP is an optional bit-string about Confirmation, known to both parties; </li>
+<li> - each entry is formatted as length, followed by bytes-array of data: Len||Data; </li>
+<li> - length (Len) of the data is formatted as 2-bytes big endianness counter; </li>
+<li> - if any explicitly defined there optionally sub-entry is omitted, then its length should be
+zero and data array remained empty. </li></ul>
+<li> - total length of MacDataP shall be not great than CC_FFCDH_MAX_SIZE_OF_MAC_DATA bytes. </li></ul>
+\note Confirmation is possible (effective) only if Confirmation Receiver contribute an EphemeralKey or Nonce
+to the Key Agreement.
+\note Said requirements are mandatory and should be agreed by both parties as a part of Key Establishment
+Agreement protocol.
+*/
+typedef struct CCFfcDhConfirmMacData_t{
+ uint32_t sizeInBytes; /*!< actual size of data in the MacData buffer, in bytes */
+ uint8_t macData[CC_FFCDH_MAX_SIZE_OF_CONFIRM_MAC_DATA_BYTES];
+} CCFfcDhConfirmMacData_t;
+
+
+/**************************************************************/
+/*! DH Key Agreement Confirmation MacTag, calculated as HMAC of MacData.
+ See NIST SP 56A rev.2 standard, sec. 5.9. Optionally MacTag may be
+ truncated (sec. 5.9.3) */
+typedef struct CCFfcDhConfirmMacTag_t{
+ uint32_t sizeInBytes;
+ uint8_t macTag[CC_FFCDH_MAX_SIZE_OF_CONFIRM_MAC_TAG_BYTES];
+}CCFfcDhConfirmMacTag_t;
+
+
+typedef struct CCFfcDhHashBlockAndDigestSizes_t{
+ uint32_t blockSizeInBytes; /*!< HASH function block size in bytes */
+ uint32_t digestSizeInBytes; /*!< HASH function digest (output) size in bytes */
+} CCFfcDhHashBlockAndDigestSizes_t;
+
+
+/**************************************************************/
+/*! The structure containing the FFC DH Public Key parameters. */
+typedef struct CCFfcDhPublKey_t
+{
+ size_t keySizeBits;
+ uint32_t pubKey[CC_FFCDH_MAX_MOD_SIZE_IN_WORDS]; /*!< Public Key .*/
+ CCFfcDhKeyStatus_t status; /*! enumerator, defining the key status according to its lifetime
+ or purpose: static/ephemeral/nonce */
+}CCFfcDhPublKey_t;
+
+
+/**************************************************************/
+/*! The FFC DH public key's user structure prototype. This structure must be saved by the user,
+and is used as input to the DH functions (such as ::CC_FfcDhGeneratePubPrv etc.). */
+typedef struct CCFfcDhUserPubKey_t
+{
+ uint32_t validTag; /*!< Validation tag.*/
+ uint32_t publKeyDbBuff[CALC_32BIT_WORDS_FROM_BYTES(sizeof(CCFfcDhPublKey_t))]; /*!< Public key data. */
+}CCFfcDhUserPubKey_t;
+
+#ifdef FFC_FURTHER_USING
+/**************************************************************/
+/*! The structure containing the FFC DH Public Keys parameters. */
+typedef struct CCFfcDhCtxPublKeys_t
+{
+ uint32_t statKeySizeBytes;
+ uint8_t statPublKey[CC_FFCDH_MAX_MOD_SIZE_IN_WORDS];
+ uint32_t ephemKeySizeBytes;
+ uint32_t ephemPublKey[CC_FFCDH_MAX_MOD_SIZE_IN_WORDS];
+ uint32_t nonceSizeBytes;
+ uint32_t userNonce[CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_WORDS];
+}CCFfcDhCtxPublKeys_t;
+
+
+/**************************************************************/
+/*! The structure containing the FFC DH Private Key parameters.
+\note The maximal bit length of private key must be 160, 224 or 256
+according to NIST SP 56A rev.2, sec.5.5.1.1 */
+typedef struct CCFfcDhPrivKey_t
+{
+ /*! Private Key exponent.*/
+ size_t keySizeBits;
+ uint32_t key[CC_FFCDH_MAX_GENER_ORDER_SIZE_IN_WORDS + FFCDH_RND_ADDING_SIZE_BYTES];
+ CCFfcDhKeyStatus_t status; /*! enumerator, defining the key status according to its lifetime
+ or purpose: static/ephemeral/nonce */
+}CCFfcDhPrivKey_t;
+
+
+/**************************************************************/
+/*! The FFC DH public key's user structure prototype. This structure must be saved by the user
+as secret, and is used as input to the DH functions (such as ::CC_FfcDhGeneratePubPrv etc.). */
+typedef struct CCFfcDhUserPrivKey_t
+{
+ uint32_t validTag; /*!< key validation tag. */
+ uint32_t privKeyDbBuff[CALC_32BIT_WORDS_FROM_BYTES(sizeof(CCFfcDhPrivKey_t))]; /*!< Private key data. */
+}CCFfcDhUserPrivKey_t;
+
+
+/**************************************************************/
+/*! The structure defines context temp buffer, used for internal calculations.
+\note The maximal bit length of private key must be 160, 224 or 256
+according to NIST SP 56A rev.2, sec.5.5.1.1 */
+typedef struct CCFfcDhCtxTempBuff_t
+{
+ uint32_t key[CC_FFCDH_CTX_TMP_BUFF_MAX_SIZE_IN_WORDS];
+}CCFfcDhCtxTempBuff_t;
+
+#endif
+
+/* temp buffer structure, used for DH functions */
+typedef struct CCFfcDhTemp_t
+{
+ uint32_t TempBuff[CC_FFCDH_CTX_TMP_BUFF_MAX_SIZE_IN_WORDS];
+} CCFfcDhTemp_t;
+
+
+/* Definition of name of function that translates the FCC Domain and DH Hash modes into
+ * HASH, KDF-Hash modes and gives HASH block and digest sizes (in bytes). Note: the function
+ * sets on output only required parameters, which pointers are not NULL.
+ * */
+#define FfcDhGetHashMode FfcDomainGetHashMode
+
+/***************************************************************************/
+/*!< Set of DH FFC parameters size approved by NIST SP 800-56A rev.2. tab.6,8
+ Intended for initialisation of array of structures of following type.
+*/
+#define CCFfcDhDomainParamSizes_t CCFfcDomainParamSizes_t
+
+/**************************************************************/
+/*! DH Key Agreement user context structure is passed by the user to the DH APIs.
+ The context saves the state of the operations and must be saved by the user
+ till the end of the APIs flow. */
+typedef struct CCFfcDhUserContext_t
+{
+ /*! Validation tag. */
+ uint32_t validTag;
+ /*! Private data context buffer. */
+ uint32_t contextBuff[CC_FFCDH_CONTEXT_BUFF_SIZE_IN_WORDS];
+// uint32_t contextBuff[(sizeof(DhContext_t)+3)/4];
+} CCFfcDhUserContext_t;
+
+
+
+/***************************************************************************/
+/*! Definition of FFC-DH buffer used for FIPS Known Answer Tests. */
+typedef struct
+{
+ /* FFC Domain parameters */
+ uint32_t prime[CC_FFCDH_FIPS_PRIME_SIZE_VALUE_IN_WORDS]; /*!< prime modulus - in KAT used 2048 bit size. */
+ uint32_t generator[CC_FFCDH_FIPS_PRIME_SIZE_VALUE_IN_WORDS]; /*!< FFC sub-group generator */
+ uint32_t order[CC_FFCDH_FIPS_ORDER_SIZE_VALUE_IN_WORDS]; /*!< order of FFC sub-group - in KAT used 256 bit size*/
+ uint32_t privKey[CC_FFCDH_FIPS_ORDER_SIZE_VALUE_IN_WORDS]; /*!< private key */
+ uint32_t pubKey[CC_FFCDH_FIPS_PRIME_SIZE_VALUE_IN_WORDS]; /*!< public key */
+ CCFfcDhTemp_t tmpBuff; /*!< temporary buffer */
+} CCFfcDhFipsKat_t;
+
+
+/************************ Public Variables ******************************/
+/*!< Set of DH FFC parameters sizes, approved by NIST SP 800-56A rev.2: sec. 5.8.1, 5.9.3.
+ Intended for initialization of array of structures of type CCFfcDhFfcDomainParamSizes_t.
+ All sizes are given in bytes.
+ \note Index of array is given according to CCFfcDhFfcParamsSetId_t enumerator:
+ {CC_FFCDH_PARAMS_SET_FA, CC_FFCDH_PARAMS_SET_FB, CC_FFCDH_PARAMS_SET_FC} = {0,1,2}.
+*/
+#define CC_FFCDH_DOMAIN_PARAM_SIZES_SET CC_FFC_DOMAIN_PARAM_SIZES_SET
+//{{80,1024,160,80},{112,2048,224,112},{112,2048,256,112}}
+/*! Define and init parameters array */
+//CCFfcDhDomainParamSizes_t ffcDomainParamSizes[(uint32_t)CC_FFCDH_PARAMS_SET_NUM_OFF_MODE] = FFCDH_DOMAIN_PARAM_SIZES_SET;
+
+/*! Array of allowed HASH SHA-x block and digest sizes for all SHA modes (size in bytes).
+ \note Index of array is according to CCFfcDhParamsSetId_t enumerator: {CC_HASH_SHA1_mode, CC_HASH_SHA224_mode, CC_HASH_SHA256_mode,
+ CC_HASH_SHA384_mode, CC_HASH_SHA512_mode} = {0,1,2,3,4}. */
+#define CC_DH_SHA_PARAMETERS_SIZES_IN_BYTES CC_FFC_SHA_PARAMETERS_SIZES_IN_BYTES
+//{{64,20},{64,28},{64,32},{128,48},{128,64}}
+/*! Define and initialize HASH parameters array */
+//CCFfcDhHashBlockAndDigestSizes_t DhHashBlockAndDigestSizes[(uint32_t)CC_FFCDH_HASH_NUM_OFF_MODE] =
+// DH_SHA_PARAMETERS_SIZES_IN_BYTES;
+
+
+/************************ Public Functions ******************************/
+
+/*******************************************************************************************/
+/*! The functions initializes the DH Context structure:
+<li> zeroes context buffers, initializes 3 MS bytes of validation tag by context ID and sets LS byte
+to zero to prepare it for further indications of setting appropriate parts of data into context
+*/
+CIMPORT_C CCError_t CC_FfcDhInitCtx( CCFfcDhUserContext_t *pDhUserCtx);
+
+
+/*******************************************************************************************/
+/*! The functions destroys (zeroes) the DH Context structure.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h.
+
+*/
+CIMPORT_C CCError_t CC_FfcDhFreeCtx( CCFfcDhUserContext_t *pDhUserCtx);
+
+
+/*******************************************************************************************/
+/*! The function sets into DH context FFCDH Scheme agreed parameters: SchemeId, User role, Confirmation mode etc.
+\note The context is used in DH Agreement functions, implementing NIST SP 800-56A rev.2 standard.
+\note Assumed, that input FFC Domain is properly generated or imported and validated according to
+NIST SP 800-56A and FIPS 186-4 standards.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h.
+*/
+CEXPORT_C CCError_t CC_FfcDhCtxSetSchemeParams(
+ CCFfcDhUserContext_t *pDhUserCtx, /*!< [in/out] pointer to context structure, containing all parameters and data,
+ defining DH Key Agreement Scheme */
+ CCFfcDomain_t *pDomain, /*!< [in] pointer to DH FFC Domain structure. */
+ uint8_t *pAlgId, /*!< [in] pointer to Algorithm ID agreed by both parties and indicates how the derived
+ secret keying material will be parsed and for which algorithms (sec.5.8.1.2).
+ In partial, Algorithm ID should indicate also how much bits are intended for
+ internal confirmation MAC algorithm and how much remaining bits will be
+ returned to the user for external applications/algorithms (the total size should
+ be equal to chosen secretKeyDataSize). */
+ size_t algIdSize, /*!< [in] size of Algorithm ID in bytes, should be less than
+ CC_FFCDH_MAX_SIZE_OF_ALG_ID_SUB_ENTRY. */
+ size_t secretKeyingDataSize, /*!< [in] size in bytes of shared secret keying data, which will be extracted and in
+ the next steps and passed to the user for using in external algorithm(s).
+ It is used for calculation of Derived Keying material size =
+ key size of the used HMAC function + secretKeyingDataSize. */
+ uint8_t *pUserId, /*!< [in] pointer to the user ID - a distinct identifier of the user. */
+ size_t userIdSize, /*!< [in] size of the user ID in bytes. */
+ uint8_t *pPartnId, /*!< [in] pointer to the partner ID - a distinct identifier of the party. */
+ size_t partnIdSize, /*!< [in] size of the partner ID in bytes. */
+ CCFfcDhUserPartyIs_t userParty, /*!< [in] enumerator, defining role of the user (function's caller) in the
+ DH Agreement Scheme: partyU or partyV. */
+ CCFfcDhSchemeId_t dhSchemeId, /*!< [in] enumerator ID of used FFC DH Key Agreement Scheme, as defined
+ in sec. 6, tab. 12. */
+ CCFfcParamSetId_t ffcParamSetId, /*!< [in] enumerator, defining the set of FFC domain parameters
+ according to SP 56A rev.2 section 5.5.1.1, tab.1. */
+ CCFfcDhKdfModeSp56A_t kdfMode, /*!< [in] enumerator ID of used KDF function, based on HASH or HMAC algorithms. In current
+ implementation is allowed only KDF HMAC_RFC5869 mode, according to KDF_HMAC_RFC-5869. */
+ CCFfcHashOpMode_t ffcHashMode, /*!< [in] enumerator ID of used SHAXXX HASH mode, supported by the product.
+ Note: HASH SHA1 function may be used only with SA set of domain parameters
+ (sec. 5.8.1, tab.6); with other sets the function returns an error. */
+ CCFfcDhUserConfirmMode_t confirmMode, /*!< enumerator, defining confirmation mode of each party: provider
+ or/and recipient, according to sec. 5.9. */
+ uint8_t *pHmacSalt, /*!< [in] optional, pointer to the Salt, used as key in HMAC-KDF function on appropriate modes.
+ If HMAC-KDF mode is set, and the pointer and size are zero, then the Salt is
+ treated as full-zero bytes array of size equalled to block-size of used HMAC function.
+ If HMAC-KDF mode is HMAC_RFC5869_MODE, then the Salt is treated as HMAC Key.
+ If only one of parameters (pointer and size) is zero, but other not, then the
+ function returns an error. */
+ size_t hmacSaltSize, /*!< [in] optional, size of Salt in bytes, should be equalled to the HMAC block size if
+ salt is used. */
+ size_t macTagSize /*!< [in] optional, size in bytes ofof confirmation MacTag. Should be in range:
+ [CC_FFCDH_MIN_SIZE_OF_CONFIRM_MAC_TAG_BYTES, CC_FFCDH_MAX_SIZE_OF_CONFIRM_MAC_TAG_BYTES]. */
+);
+
+
+
+/*******************************************************************************************/
+/*!
+@brief The function generates FFC DH key pairs according to DH Scheme and NIST SP 800-56A rev.2 standard:
+<ol><li> - count of required key pairs (one or two is dependent on DH Scheme and user Party (U or V),
+inserted into Context. For each of key pair the function performs the following steps: </li>
+<li> - randomly generates the private key X according to section 5.6.1.1 and FIPS 184-4, B.1.1; </li>
+<li> - the sizes of primes P,Q should be taken from DH FFC sizes set previously inserted into Context; </li>
+<li> - calculates the associated public key Y = G^X mod P; </li>
+<li> - sets private and public keys in appropriate place in the Context according to user party (U,V) and keys
+status (static, ephemeral); </li>
+<li> - exports the public key as big endianness order of bytes. </li></ol>
+\note Before calling of this function, DH context should be initialized, DH Scheme parameters and
+DH Domain are inserted by calling appropriate functions, else the function returns an error.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h, cc_rnd_error.h.
+*/
+CIMPORT_C CCError_t CC_FfcDhGeneratePublPrivKeys(
+ CCFfcDhUserContext_t *pDhUserCtx,/*!< [in/out] pointer to DH FFC User Context structure. */
+ CCRndContext_t *pRndContext /*!< [in] random generation function context. */
+);
+
+/*******************************************************************************************/
+/*!
+@brief This function validates the FFC DH public key according to NIST SP 800-56A rev.2,
+ sec.5.6.2.3.1 and checking mode:
+
+<ul><li> - on "partial" mode - checks the pointers and high/low limits of key value;</li>
+<li> - on "full" mode - checks also that the the key belongs to the FFC subgroup; </li></ul>
+\note Before calling of this function, appropriate FFC Domain parameters should be obtained and validated,
+else the function returns an error.
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h.
+*/
+CIMPORT_C CCError_t CC_FfcDhValidatePublKey(
+ CCFfcDomain_t *pFfcDomain, /*!< [in/out] pointer to DH FFC Context structure. */
+ uint8_t *pPublKeyData, /*!< [in] pointer to given DH FFC public key formatted as big endianness array;
+ it should be in range [2, P-2], where P is the Domain Prime P. */
+ size_t publKeyDataSize, /*!< [in] pointer to public key size, in bytes: should be not great than Prime size. */
+
+ CCFfcDhKeyValidMode_t validatMode, /*!< [in] enumerator ID defining the validation mode:
+ CC_FFCDH_CHECK_FULL_MODE - full validation (sec. 5.6.2.3.1);
+ CC_FFCDH_CHECK_PARTIAL_MODE - check pointers, sizes and range of values. */
+ uint32_t *pTmpBuff); /*!< [in] temporary buffer of size not less 2*Prime size. ??? */
+
+
+
+/*******************************************************************************************/
+/*!
+@brief The function checks and sets the FFC DH partner's public key into DH Context
+according to NIST SP 800-56A rev.2 sec.5.6.2.3.1 and checking mode:
+
+<ul><li> - if the key belongs to user's party, then the function returns an error, meaning
+that the user should use other function to import both public and private keys together;</li>.
+<li> - on "partial" mode - checks the pointers and high/low limits of key value;</li>
+<li> - on "full" mode - checks also that the the key belongs to the FFC subgroup; </li>
+<li> - sets the key data into DH Context according to party's role and key status. </li></ul>
+\note Before calling of this function, DH context should be initialized and Scheme and FFC Domain
+parameters are inserted by calling appropriate functions, else the function returns an error.
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h.
+*/
+CIMPORT_C CCError_t CC_FfcDhValidateAndImportPublKey(
+ CCFfcDhUserContext_t *pDhUserCtx, /*!< [in/out] pointer to DH FFC Context structure. */
+ uint8_t *pPublKeyData, /*!< [in] pointer to given DH FFC public key or Nonce in big endianness;
+ it should be in range [2, P-2], where P is the Domain Prime. */
+ size_t publKeyDataSize, /*!< [in] public key size, in bytes: should be not great than Domain Prime size. */
+ CCFfcDhKeyValidMode_t validatMode, /*!< [in] enumerator ID defining the validation mode:
+ CC_FFCDH_CHECK_FULL_MODE - full validation (sec. 5.6.2.3.1);
+ CC_FFCDH_CHECK_PARTIAL_MODE - check pointers, sizes and range of values;
+ Note: for Nonce only size and range checking is performed. */
+ CCFfcDhKeyStatus_t keyStatus /*!< [in] enumerator, defining the key status according to its life time
+ or purpose: static/ephemeral/nonce */
+);
+
+
+
+
+/*******************************************************************************************/
+/*!
+@brief The function checks and sets the FFC DH user's private/public key pair into DH Context
+according to NIST SP 800-56A rev.2 sec.5.6.2.3.1 and checking mode:
+
+<ul><li> - if the key belongs to partner's party, then the function returns an error, meaning
+that the user should use other function to import only public key;</li>.
+<li> - on "partial" mode - checks the pointers and high/low limits of key value;</li>
+<li> - on "full" mode - checks also that the the public key meets to private key; </li>
+<li> - sets the key data into DH Context according to party's role and key status. </li></ul>
+\note Before calling of this function, DH context should be initialized and Scheme and FFC Domain
+parameters are inserted by calling appropriate functions, else the function returns an error.
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h.
+*/
+CIMPORT_C CCError_t CC_FfcDhValidateAndImportKeyPair(
+ CCFfcDhUserContext_t *pDhUserCtx, /*!< [in/out] pointer to DH FFC Context structure. */
+ uint8_t *pPrivKeyData, /*!< [in] pointer to given DH FFC private key in big endianness;
+ it should be in range [1, n-1], where n is the Domain generator order. */
+ size_t privKeyDataSize, /*!< [in] private key size, in bytes: should be equaled Domain
+ generator order size. */
+ uint8_t *pPublKeyData, /*!< [in] pointer to given DH FFC public key in big endianness;
+ it should be in range [2, P-2], where P is the Domain Prime. */
+ size_t publKeyDataSize, /*!< [in] public key size, in bytes: should be equaled to Domain Prime size,
+ including leading zeros. */
+ CCFfcDhKeyValidMode_t validatMode, /*!< [in] enumerator ID defining the validation mode:
+ CC_FFCDH_CHECK_FULL_MODE - full validation (sec. 5.6.2.3.1);
+ CC_FFCDH_CHECK_PARTIAL_MODE - check pointers, sizes and range of values. */
+ CCFfcDhKeyStatus_t keyStatus /*!< [in] enumerator, defining the key status according to its life time
+ or purpose: static/ephemeral/nonce */
+);
+
+/*******************************************************************************************/
+/*!
+@brief This function generates random Nonce, used in appropriate DH Schemes (NIST SP 56A rev.2 sec.5.9, 6).
+<li> The function generates random vector of given size, sets it into DH context according. </li>
+\note Before calling of this function, DH context should be initialized and Scheme parameters and
+DH Domain are inserted by calling appropriate functions, else the function returns an error.
+\note The Nonce should be generated and the function called only if it is required by DH scheme, and
+the Nonce is not inserted previously, else the function returns an error.
+\note The function is used when the user not generates an ephemeral key, but requires key confirmation and
+therefore Nonce generation.
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h.
+*/
+CIMPORT_C CCError_t CC_FfcDhGenerateRandomNonce(
+ CCFfcDhUserContext_t *pDhUserCtx, /*!< [in/out] pointer to DH FFC Context structure. */
+ CCRndContext_t *pRndContext); /*!< [in] random generation function context. */
+
+
+
+/*******************************************************************************************/
+/*!
+@brief This function formats the UserInfo according to the user role (PartyU or PartyV) and NIST SP 56A rev.2,
+ sec. 5.8.1.2, 5.8.1.2.1.
+
+<ul><li> Input and previously inserted data is concatenated as defined in the CCFfcDhPartyInfo_t structure and
+ sets it into the Context: UserInfo = UserId||UserStatPublKey||UserStatPublKey||UserNonce}{||UserOtherData}, where: </li>
+<li> - UserInfo and each its sub-entry are formatted as length (Len) and then appropriate data: Len||Data,
+where each length is a 2-bytes big endianness counter; </li>
+<li> - If any sub-entry is not used in chosen DH Scheme, than its lengths should be set 0 and the data is empty. </li>
+<li> - total size of PartyInfo, including said lengths, should be not great, than the size of CCDhPartyInfo_t. </li></ul>
+\note Before calling of this function the User should initialize DH Context, insert FFC Domain, DH Scheme parameters and
+all his Private/Public Keys (or Nonce) using appropriate CC functions.
+\note The output from this function will be exported to the other party of the Agreement and vice versa, UserInfo, received
+from other party, will be used as input to DhCtxSetSchemeData() function.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h.
+*/
+CIMPORT_C CCError_t CC_FfcDhCreateUserInfo(
+ CCFfcDhUserContext_t *pDhUserCtx, /*!< [in/out] pointer to context structure, containing all data,
+ used in DH Key Agreement Scheme. */
+ uint8_t *pUserOtherData, /*!< [in] optional, pointer to other data, which the user will
+ insert in addition to its ID, keys and Nonce. */
+ size_t userOtherDataSize, /*!< [in] optional, size of additional data (in bytes), which the
+ user will include into the UserInfo. */
+ uint8_t *pUserConfirmText, /*!< [in] optional, pointer to confirmation Text of the User. */
+ size_t userConfirmTextSize, /*!< [in] optional size of Text data of partyU, in bytes. */
+ CCFfcDhPartyInfo_t *pUserInfo, /*!< [out] pointer to the concatenated UserInfo (i.e. PartyU or PartyV Info). */
+ size_t *pUserInfoSize /*!< [in/out] pointer to the size of UserInfo, in bytes:
+ in - given buffer size (should be not less than CC_FFCDH_MAX_SIZE_OF_OTHER_INFO_ENTRY;
+ out - actual size of UserInfo, including length counters */
+);
+
+
+/*******************************************************************************************/
+/*!
+@brief This function checks and sets given "OtherInfo" entries, calculates shared secret value and
+ derives the "secret keying material".
+ The function's implementation meets to NIST SP 56A rev.2 standard requirements.
+\note Before calling of this function, DH Context should be initialized, DH Scheme, Domain parameters and all
+required user's Private, Public keys or nonces are inserted by calling appropriate CC functions.
+<ul><li> The function sets input data into the Context to form the "OtherInfo" (sec. 5.8.1) according to
+said standard and the implementation requirements:
+<li> - OtherInfo = AlgorithmId||PartyUInfo||PartyVInfo {||SuppPubInfo}{||SuppPrivInfo}, where each PartyInfo is
+formatted as : </li>
+<li> - Remark: AlgorithmId includes information about length in bits of derived Keying Material and its
+ parsing between internal using for confirmation HMAC algorithm and output Secret Keying Data
+ and algorithm, which it is intended for. </li>
+<li> - PartyInfo = PartyId||PartyStatPublKey||PartyEphemKey||PartyNonce{||PartyOtherData}. </li>
+<li> - for detailed description of "OtherInfo" construction and concatenation its sub-entries, see
+CCFfcDhOtherInfo_t structure definition; </li></ul>
+\note - the function performs the following calculations:
+<ul><li> - calculates shared secret value according to DH Scheme:
+ - SharedSecretVal = (PublKey1 ^ PrivKey1) modulo Prime or
+ - SharedSecretVal = (PartnPublKey1 ^ UserPrivKey1) || (PartnPublKey2 ^ UserPrivKey2) modulo Prime; </li>
+<li> - derives the secret keying material of required size from the shared secret value by calling KDF function
+with shared OtherInfo data: DerivedKeyingMaterial = KDF(ZZ, OtherInfo, keyingMaterialSize); </li></ul>
+<ul><li> - If DH Scheme includes Key Confirmation, then the function calculates confirmation HMAC MacTag, which is
+intended to be provided to the partner (sec. 5.2, 5.9, 6); in this case the secret keying material is parsed to MacKey
+of size, equaled to HMAC key size. </li>
+<li> - in our implementation HMAC key size is defined to be equaled to FFC sub-group order (meets to sec.5.9.3). </li>
+<li> - if in the chosen DH Scheme the user is not a Confirmation Provider, then both the pointer and the size of
+appropriate MacTag should be set to NULL. </li>
+<li> - for detailed description of Confirmation "MacData" see CCFfcDhConfirmMacData_t structure definition. </li></ul>
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_dh_error.h.
+*/
+CIMPORT_C CCError_t CC_FfcDhSetAndCalculateSchemeData(
+ CCFfcDhUserContext_t *pDhUserCtx, /*!< [in/out] pointer to context structure, containing all data, used in DH Key
+ Agreement Scheme, required for implementation of said standard. */
+ /*! Partner's Data to be included into OtherInfo entry. Detailed description see in CCFfcDhOtherInfo_t. */
+ uint8_t *pPartnerInfo, /*!< [in] pointer to the concatenated PartnerInfo. Detailed description see in CCFfcDhOtherInfo_t. */
+ size_t sizeOfPartnerInfo, /*!< [in] size of PartnerInfo, in bytes, should be <= CC_FFCDH_MAX_SIZE_OF_PARTY_INFO_BYTES. */
+ CCFfcDhPartyInfoValidMode_t partnInfoValidMode, /*!< enumerator, defining which of public keys (static, ephemeral),
+ included in the PartnerInfo, should be full validated and which partial only. */
+ uint8_t *pSuppPubInfo, /*!< [in] pointer to optional shared public data to be included into SuppPubInfo entry */
+ size_t suppPubInfoSize, /*!< [in] size of SuppPubInfo data, in bytes. */
+ uint8_t *pSuppPrivInfo, /*!< [in] pointer to optional shared private data to be included into SuppPrivInfo entry */
+ size_t suppPrivInfoSize, /*!< [in] size of other SuppPrivInfo data, in bytes (should be not great than
+ CC_FFCDH_MAX_SIZE_OF_OTHER_INFO_SUPPL_ENTRY_BYTES */
+ uint8_t *pUserMacTag, /*!< [out] optional, pointer to the user-provider confirmation MacTag depending
+ on used Key Agreement Scheme. The tag is calculated by HMAC with given
+ hashMode, as described in SP800-56A sec. 5.9. */
+ size_t macTagSize /*!< [in] optional, required size in bytes of confirmation MacTag. */
+);
+
+
+///******************************************************************************************/
+///*!
+//@brief The function calculates user's confirmation MacTags for FFC DH Schemes according to NIST SP 56A rev.2 standard.
+//
+//\note Before calling of this function the user should obtain assurance of used FFC Domain and public, private keys,
+//involved in the key agreement, using one of the methods, described in sec. 5.6.2 of above named standard.
+//<ul><li> - depending on DH Scheme, calculates confirmation HMAC MacTag, which is intended to be provided to the partner
+//(sec. 5.2, 5.9, 6); in this case the secret keying material is parsed to MacKey of size, equaled to HMAC key size. </li>
+//<li> - in our implementation HMAC key size defined equal to FFC sub-group order (meets to sec.5.9.3). </li>
+//<li> - if in the chosen DH Scheme the user is not Confirmation provider, then both the pointer and the size of
+//appropriate MacTag should be set to NULL. </li>
+//<li> - for detailed description of Confirmation "MacData" see CCFfcDhConfirmMacData_t structure definition. </li></ul>
+//
+//@return CC_OK on success.
+//@return A non-zero value on failure as defined in cc_dh_error.h, cc_kdf_error.h or cc_hash_error.h.
+//*/
+//CIMPORT_C CCError_t CC_FfcDhCalcConfirmMacTags(
+// CCFfcDhUserContext_t *pDhUserCtx, /*!< [in] pointer to the user's DH context structure, containing all data, defining
+// DH Key Agreement Scheme. The context shall be initialized for user's roles
+// (U or V; Provider or Receiver) using CC_FfcDhSetCtx function. */
+// uint8_t *pUserMacTag, /*!< [out] optional, pointer to the user (provider) confirmation MacTag depending
+// on used Key Agreement Scheme. The tag is calculated by HMAC with given
+// hashMode, as described in section 5.9. */
+// size_t *pMacTagSize, /*!< [in/out] optional, required size of MacTag, in bytes; maximal allowed size is the
+// HMAC output size; minimal size is 8 bytes according to tab. 8 of said standard. */
+// uint8_t *pUserConfirmText, /*!< [in] optional, pointer to confirmation Text of the User. */
+// uint8_t userConfirmTextSize, /*!< [in] optional size of Text data of partyU, in bytes. */
+// uint8_t *pPartnerConfirmText, /*!< [in] optional, pointer to confirmation Text of the Partner. */
+// uint8_t partnerConfirmTextSize /*!< [in] optional, size of Text data of partyV, in bytes. */
+//);
+
+
+/*******************************************************************************************/
+/*!
+@brief This function performs DH Key Agreement Confirmation and, on success, outputs the shared keying data.
+The function calculates expected partner's confirmation MacTag' and compares it to value,
+received from the partner.
+<li> If the tags are not equaled, then the function returns an error and zeroes the secure
+sensitive data. </li>
+<li> If no errors, the function puts the derived secret keying data into output buffer. </li>
+\note Assumed, that the user yet have obtained assurance of public and private keys,
+involved in the key agreement.
+\note Before calling this function the user should perform all required DH Key Agreement
+operations, including calculation of shared secret keying material by calling
+CC_FfcDhCalcUserConfirmMacTag function.
+\note If according to chosen Scheme the user is not a Confirmation Recipient,
+then all, the pointer and the size of MacTag should be
+set to zero, else the function returns an error.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined in cc_dh_error.h
+*/
+CIMPORT_C CCError_t CC_FfcDhGetSharedSecretKeyingData(
+ CCFfcDhUserContext_t *pDhUserCtx, /*!< [in] pointer to the user's DH context structure, containing all data,
+ defining DH Key Agreement Scheme and its results. */
+ uint8_t *pSecretKeyData, /*!< [out] pointer to the shared secret keying data, extracted
+ from keying material after parsing to . */
+ size_t *pSecretKeyDataSize, /*!< [in/out] the pointer to the size of shared secret key data:
+ in - size of the given output buffer, out - actual size of extracted
+ key data */
+ uint8_t *pPartnerMacTag, /*!< [in] optional, pointer to the confirmation MacTag, provided by the partner */
+ size_t macTagSize /*!< [in] optional, size of partner's MacTag, in bytes */
+);
+
+
+
+/*******************************************************************************************/
+/*!
+@brief This function implements FFC DH primitive according to section 5.7.1.1 of NIST SP 56A rev.2 standard.
+ The function computes the shared secret value: SharedSecretVal = partnerPublKey ^ userPrivKey modulo Prime.
+\note Before calling of this function the user should obtain assurance of FFC Domain, public and private keys, involved in the key
+agreement, using one of methods, described in section 5.6.2 of above named standard.
+\note For assurance of keys validity the user can use appropriate APIs for generating or building and validation,
+of keys, described in cc_ffcdh.h file.
+\note The function intended of-first for internal using in Keying Material derivation inside CC DH functions.
+@return CC_OK on success.
+@return A non-zero value on failure as defined in cc_dh_error.h or cc_rnd_error.h.
+*/
+CIMPORT_C CCError_t CC_FfcDhGetSharedSecretVal(
+ CCFfcDomain_t *pDomain, /*!< [in/out] pointer to DH FFC Context structure. */
+ uint8_t *pSharedSecretVal, /*!< [out] pointer to the shared secret value in big endianness order
+ of bytes in the array (MS-byte is a most left one). This
+ buffer should be at least of prime (modulus) size in bytes. */
+ size_t *pSharedSecretValSize, /*!< [in/out] pointer to the shared secret value size:
+ input - size of the given buffer, it should be at least
+ prime (modulus) size bytes; output - actual size. */
+ uint8_t *pPrivKeyData, /*!< [in] pointer to given DH FFC private key in big endianness;
+ the Key should be in range [1, n-1], where n is the Domain
+ generator order. */
+ size_t privKeyDataSize, /*!< [in] private key size, in bytes: should be not great than Domain
+ generator order size. */
+ uint8_t *pPublKeyData, /*!< [in] pointer to given DH FFC public key in big endianness;
+ the key should be in range [2, P-2], where P is the Domain Prime. */
+ size_t publKeyDataSize, /*!< [in] public key size, in bytes: should be not great than Domain Prime size. */
+ uint32_t *pTmpBuff /*!< [in] pointer to temp buffer of size */
+);
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffcdh_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffcdh_error.h
new file mode 100644
index 0000000..c7ea678
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_ffcdh_error.h
@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_FFCDH_ERROR_H
+#define _CC_FFCDH_ERROR_H
+
+
+#include "cc_error.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+@file
+@brief This file contains error codes definitions for CryptoCell FFCDH module.
+@defgroup ffccc_dh_error CryptoCell FFCDH specific errors
+@{
+@ingroup cc_ffcdh
+*/
+/************************ Defines ******************************/
+
+/* FFCDH module on the CryptoCell layer base address - 0x00F02700 */
+
+/*! The CryptoCell FFCDH module errors */
+
+/*! Invalid input argument pointer. */
+#define CC_FFCDH_INVALID_ARGUMENT_POINTER_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x00UL)
+/*! Invalid input argument size. */
+#define CC_FFCDH_INVALID_ARGUMENT_SIZE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x01UL)
+/*! Invalid pointer to DH Context structure. */
+#define CC_FFCDH_INVALID_CONTEXT_PTR_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x02UL)
+/*! Invalid DH Context validation Tag.*/
+#define CC_FFCDH_CONTEXT_VALIDATION_TAG_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x03UL)
+/*! Invalid FFCDH Scheme ID. */
+#define CC_FFCDH_INVALID_SCHEM_ID_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x04UL)
+/*! Invalid FFCDH parameters set ID. */
+#define CC_FFCDH_INVALID_DOMAIN_SIZES_SET_ID_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x05UL)
+/*! Invalid FFCDH Key confirmation mode. */
+#define CC_FFCDH_INVALID_CONFIRM_MODE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x06UL)
+/*! Invalid FFCDH User party ID. */
+#define CC_FFCDH_INVALID_USER_PARTY_ID_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x07UL)
+/*! Invalid FFCDH key derivation function mode. */
+#define CC_FFCDH_INVALID_KDF_MODE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x08UL)
+/*! Invalid FFCDH Key validation mode. */
+#define CC_FFCDH_INVALID_VALIDAT_MODE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x09UL)
+/*! Invalid HASH operation mode.*/
+#define CC_FFCDH_INVALID_HASH_MODE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x0AUL)
+/*! Invalid HASH operation digest size is too low.*/
+#define CC_FFCDH_INVALID_LOW_HASH_SIZE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x0BUL)
+/*! Invalid HMAC result size is too low.*/
+#define CC_FFCDH_INVALID_HMAC_SALT_PARAMS_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x0CUL)
+/*! Invalid private key size. */
+#define CC_FFCDH_INVALID_PRIVATE_KEY_SIZE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x10UL)
+/*! Invalid private key value. */
+#define CC_FFCDH_INVALID_PRIVATE_KEY_VALUE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x11UL)
+/*! Invalid public key size. */
+#define CC_FFCDH_INVALID_PUBLIC_KEY_SIZE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x12UL)
+/*! Invalid public key value. */
+#define CC_FFCDH_INVALID_PUBLIC_KEY_VALUE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x13UL)
+/*! Invalid key status mode: static or ephemeral. */
+#define CC_FFCDH_INVALID_KEY_STATUS_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x14UL)
+/*! Invalid rewriting of previously inserted parameter. */
+#define CC_FFCDH_ILLEGAL_TRY_REWRITE_PARAM_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x15UL)
+/*! Invalid optional data parameters (pointer, size). */
+#define CC_FFCDH_OPTIONAL_DATA_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x16UL)
+/*! Invalid parameters of Algorithm ID data (pointer, size). */
+#define CC_FFCDH_ALGORITHM_ID_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x17UL)
+/*! Invalid size of any Party Info entry (too great). */
+#define CC_FFCDH_PARTY_INFO_SUB_ENTRY_SIZE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x18UL)
+/*! The User tries to pass Nonce, not required by DH Scheme. */
+#define CC_FFCDH_NONCE_IS_NOT_REQUIRED_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x19UL)
+/*! The User tries to pass some Key, not required by DH Scheme. */
+#define CC_FFCDH_THE_KEY_IS_NOT_REQUIRED_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x1AUL)
+/*! The output buffer is too low */
+#define CC_FFCDH_LOW_OUTPUT_BUFF_SIZE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x1BUL)
+/*! Invalid size of Partner Info entry. */
+#define CC_FFCDH_PARTN_INFO_PARSING_SIZE_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x20UL)
+/*! Error on parsing and comparing of Partner Info data . */
+#define CC_FFCDH_PARTN_INFO_PARSING_DATA_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x21UL)
+/*! Invalid output pointer to Keying Data. */
+#define CC_FFCDH_KEYING_DATA_PTR_INVALID_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x22UL)
+/*! Invalid pointer to Keying Data size. */
+#define CC_FFCDH_KEYING_DATA_SIZE_PTR_INVALID_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x23UL)
+/*! Invalid size of output Keying Data buffer given by the user. */
+#define CC_FFCDH_KEYING_DATA_SIZE_INVALID_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x24UL)
+/*! Invalid pointer to MacTag output buffer. */
+#define CC_FFCDH_MAC_TAG_PTR_INVALID_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x25UL)
+/*! Invalid size of MacTag output buffer. */
+#define CC_FFCDH_MAC_TAG_SIZE_INVALID_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x26UL)
+/*! Calculated MacTag not matches to value, provided by the partner. */
+#define CC_FFCDH_MAC_TAG_DATA_INVALID_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x27UL)
+/* Invalid FFC DH Domain pointer. */
+#define CC_FFCDH_INVALID_DOMAIN_PTR_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x30UL)
+/*! Invalid validation Tag of user passed FFC Domain. */
+#define CC_FFCDH_INVALID_DOMAIN_VALIDAT_TAG_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x31UL)
+/*! FFC Domain parameters not meet to required by input FFC sizes set ID or HASH mode. */
+#define CC_FFCDH_INVALID_DOMAIN_DATA_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x32UL)
+/*! Invalid pointer to FFC DH Shared Secret Value. */
+#define CC_FFCDH_INVALID_SHARED_SECR_VAL_PTR_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x33UL)
+/*! Invalid private key data pointer. */
+#define CC_FFCDH_INVALID_PRIV_KEY_PTR_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x34UL)
+/*! invalid public key size. */
+#define CC_FFCDH_INVALID_PUBL_KEY_PTR_ERROR (CC_FFCDH_MODULE_ERROR_BASE + 0x35UL)
+
+/*! FFC DH is not supported */
+#define CC_FFCDH_IS_NOT_SUPPORTED (CC_FFCDH_MODULE_ERROR_BASE + 0xFFUL)
+
+
+/************************ Enums ********************************/
+
+
+/************************ Typedefs ****************************/
+
+
+/************************ Structs ******************************/
+
+
+/************************ Public Variables **********************/
+
+
+/************************ Public Functions **********************/
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_hash_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_hash_defs.h
new file mode 100644
index 0000000..9a4e4c7
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_hash_defs.h
@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+/*!
+ @addtogroup cc_hash_defs
+ @{
+*/
+
+/*!
+ @file
+ @brief This file contains definitions of the CryptoCell hash APIs.
+ */
+
+#ifndef CC_HASH_DEFS_H
+#define CC_HASH_DEFS_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_types.h"
+#include "cc_error.h"
+#include "cc_hash_defs_proj.h"
+
+/************************ Defines ******************************/
+
+/*! The size of the hash result in words. The maximal size for SHA-512 is
+512 bits. */
+#define CC_HASH_RESULT_SIZE_IN_WORDS 16
+
+/*! The size of the MD5 digest result in bytes. */
+#define CC_HASH_MD5_DIGEST_SIZE_IN_BYTES 16
+
+/*! The size of the MD5 digest result in words. */
+#define CC_HASH_MD5_DIGEST_SIZE_IN_WORDS 4
+
+/*! The size of the SHA-1 digest result in bytes. */
+#define CC_HASH_SHA1_DIGEST_SIZE_IN_BYTES 20
+
+/*! The size of the SHA-1 digest result in words. */
+#define CC_HASH_SHA1_DIGEST_SIZE_IN_WORDS 5
+
+/*! The size of the SHA-224 digest result in words. */
+#define CC_HASH_SHA224_DIGEST_SIZE_IN_WORDS 7
+
+/*! The size of the SHA-256 digest result in words. */
+#define CC_HASH_SHA256_DIGEST_SIZE_IN_WORDS 8
+
+/*! The size of the SHA-384 digest result in words. */
+#define CC_HASH_SHA384_DIGEST_SIZE_IN_WORDS 12
+
+/*! The size of the SHA-512 digest result in words. */
+#define CC_HASH_SHA512_DIGEST_SIZE_IN_WORDS 16
+
+/*! The size of the SHA-256 digest result in bytes. */
+#define CC_HASH_SHA224_DIGEST_SIZE_IN_BYTES 28
+
+/*! The size of the SHA-256 digest result in bytes. */
+#define CC_HASH_SHA256_DIGEST_SIZE_IN_BYTES 32
+
+/*! The size of the SHA-384 digest result in bytes. */
+#define CC_HASH_SHA384_DIGEST_SIZE_IN_BYTES 48
+
+/*! The size of the SHA-512 digest result in bytes. */
+#define CC_HASH_SHA512_DIGEST_SIZE_IN_BYTES 64
+
+/*! The size of the SHA-1 hash block in words. */
+#define CC_HASH_BLOCK_SIZE_IN_WORDS 16
+
+/*! The size of the SHA-1 hash block in bytes. */
+#define CC_HASH_BLOCK_SIZE_IN_BYTES 64
+
+/*! The size of the SHA-2 hash block in words. */
+#define CC_HASH_SHA512_BLOCK_SIZE_IN_WORDS 32
+
+/*! The size of the SHA-2 hash block in bytes. */
+#define CC_HASH_SHA512_BLOCK_SIZE_IN_BYTES 128
+
+/*! The maximal data size for the update operation. */
+#define CC_HASH_UPDATE_DATA_MAX_SIZE_IN_BYTES (1 << 29)
+
+
+/************************ Enums ********************************/
+
+/*! The hash operation mode. */
+typedef enum {
+ /*! SHA-1. */
+ CC_HASH_SHA1_mode = 0,
+ /*! SHA-224. */
+ CC_HASH_SHA224_mode = 1,
+ /*! SHA-256. */
+ CC_HASH_SHA256_mode = 2,
+ /*! SHA-384. */
+ CC_HASH_SHA384_mode = 3,
+ /*! SHA-512. */
+ CC_HASH_SHA512_mode = 4,
+ /*! MD5. */
+ CC_HASH_MD5_mode = 5,
+ /*! The number of hash modes. */
+ CC_HASH_NumOfModes,
+ /*! Reserved. */
+ CC_HASH_OperationModeLast= 0x7FFFFFFF,
+
+}CCHashOperationMode_t;
+
+/************************ Typedefs *****************************/
+
+/*! The hash result buffer. */
+typedef uint32_t CCHashResultBuf_t[CC_HASH_RESULT_SIZE_IN_WORDS];
+
+/************************ Structs ******************************/
+/*!
+ The context prototype of the user.
+ The argument type that is passed by the user to the hash APIs.
+ The context saves the state of the operation, and must be saved by the user
+ until the end of the API flow.
+*/
+typedef struct CCHashUserContext_t {
+ /*! The internal buffer. */
+ uint32_t buff[CC_HASH_USER_CTX_SIZE_IN_WORDS];
+}CCHashUserContext_t;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif /* #ifndef CC_HASH_DEFS_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_kdf.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_kdf.h
new file mode 100644
index 0000000..10eecf6
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_kdf.h
@@ -0,0 +1,200 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_KDF_H
+#define _CC_KDF_H
+
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+@file
+@brief This file defines the API that supports Key derivation function in modes
+ as defined in Public-Key Cryptography Standards (PKCS) #3: Diffie-Hellman Key Agreement Standard,
+ ANSI X9.42-2003: Public Key Cryptography for the Financial Services Industry: Agreement of Symmetric Keys Using Discrete Logarithm Cryptography,
+ and ANSI X9.63-2011: Public Key Cryptography for the Financial Services Industry - Key Agreement and Key Transport Using Elliptic Curve
+ Cryptography.
+@defgroup cc_kdf CryptoCell Key Derivation APIs
+@{
+@ingroup cryptocell_api
+
+*/
+
+#include "cc_hash_defs.h"
+
+/************************ Defines ******************************/
+
+/*! Shared secret value max size in bytes */
+#define CC_KDF_MAX_SIZE_OF_SHARED_SECRET_VALUE 1024
+
+/* Count and max. sizeof OtherInfo entries (pointers to data buffers) */
+/*! Number of other info entries. */
+#define CC_KDF_COUNT_OF_OTHER_INFO_ENTRIES 5
+
+/*! Maximal size of keying data in bytes. */
+#define CC_KDF_MAX_SIZE_OF_KEYING_DATA 2048
+/*! Size of KDF counter in bytes */
+#define CC_KDF_COUNTER_SIZE_IN_BYTES 4
+
+/************************ Enums ********************************/
+
+/*! HASH operation modes */
+typedef enum
+{
+ /*! SHA1 mode.*/
+ CC_KDF_HASH_SHA1_mode = 0,
+ /*! SHA224 mode.*/
+ CC_KDF_HASH_SHA224_mode = 1,
+ /*! SHA256 mode.*/
+ CC_KDF_HASH_SHA256_mode = 2,
+ /*! SHA384 mode.*/
+ CC_KDF_HASH_SHA384_mode = 3,
+ /*! SHA512 mode.*/
+ CC_KDF_HASH_SHA512_mode = 4,
+ /*! Maximal number of HASH modes. */
+ CC_KDF_HASH_NumOfModes,
+ /*! Reserved.*/
+ CC_KDF_HASH_OpModeLast = 0x7FFFFFFF,
+
+}CCKdfHashOpMode_t;
+
+/*! Key derivation modes. */
+typedef enum
+{
+ /*! ASN1 key derivation mode.*/
+ CC_KDF_ASN1_DerivMode = 0,
+ /*! Concatination key derivation mode.*/
+ CC_KDF_ConcatDerivMode = 1,
+ /*! X963 key derivation mode.*/
+ CC_KDF_X963_DerivMode = CC_KDF_ConcatDerivMode,
+ /*! ISO 18033 KDF1 key derivation mode.*/
+ CC_KDF_ISO18033_KDF1_DerivMode = 3,
+ /*! ISO 18033 KDF2 key derivation mode.*/
+ CC_KDF_ISO18033_KDF2_DerivMode = 4,
+ /*! Maximal number of key derivation modes. */
+ CC_KDF_DerivFunc_NumOfModes = 5,
+ /*! Reserved.*/
+ CC_KDF_DerivFuncModeLast= 0x7FFFFFFF,
+
+}CCKdfDerivFuncMode_t;
+
+/*! Enumerator for the additional information given to the KDF. */
+typedef enum
+{
+ CC_KDF_ALGORITHM_ID = 0, /*! An identifier (OID), indicating algorithm for which the keying data is used. */
+ CC_KDF_PARTY_U_INFO = 1, /*! Optional data of party U .*/
+ CC_KDF_PARTY_V_INFO = 2, /*! Optional data of party V. */
+ CC_KDF_SUPP_PRIV_INFO = 3, /*! Optional supplied private shared data. */
+ CC_KDF_SUPP_PUB_INFO = 4, /*! Optional supplied public shared data. */
+
+ CC_KDF_MAX_COUNT_OF_ENTRIES, /*! Maximal allowed number of entries in Other Info structure. */
+ /*! Reserved.*/
+ CC_KDF_ENTRYS_MAX_VAL = 0x7FFFFFFF,
+
+}CCKdfOtherInfoEntries_t;
+/************************ Typedefs ****************************/
+
+/*! KDF structure, containing pointers to OtherInfo data entries and sizes.
+
+ The structure contains two arrays: one for data pointers and one for sizes, placed according
+ to the order given in the the ANSI X9.42-2003: Public Key Cryptography for the Financial Services
+ Industry: Agreement of Symmetric Keys Using Discrete Logarithm Cryptography standard
+ and defined in CCKdfOtherInfoEntries_t enumerator.
+ On KDF ASN1 mode this order is mandatory. On other KDF modes the user may insert
+ optional OtherInfo simply in one (preferably the first) or in some entries.
+ If any data entry is not used, then the pointer value and the size must be set to NULL. */
+typedef struct
+{
+ /*! Pointers to data entries. */
+ uint8_t *dataPointers[CC_KDF_MAX_COUNT_OF_ENTRIES];
+ /*! Sizes of data entries. */
+ uint32_t dataSizes[CC_KDF_MAX_COUNT_OF_ENTRIES];
+}CCKdfOtherInfo_t;
+
+
+/************************ Structs ******************************/
+
+/************************ Public Variables **********************/
+
+/************************ Public Functions **********************/
+
+/****************************************************************/
+
+/*********************************************************************************************************/
+/*!
+ @brief CC_KdfKeyDerivFunc performs key derivation according to one of the modes defined in standards:
+ ANSI X9.42-2003: Public Key Cryptography for the Financial Services Industry: Agreement of Symmetric Keys Using Discrete Logarithm Cryptography,
+ ANSI X9.63-2011: Public Key Cryptography for the Financial Services Industry - Key Agreement and Key Transport Using Elliptic Curve Cryptography,
+ ISO/IEC 18033-2:2006: Information technology -- Security techniques -- Encryption algorithms -- Part 2: Asymmetric ciphers.
+
+The present implementation of the function allows the following operation modes:
+<ul><li> CC_KDF_ASN1_DerivMode - mode based on ASN.1 DER encoding; </li>
+<li> CC_KDF_ConcatDerivMode - mode based on concatenation;</li>
+<li> CC_KDF_X963_DerivMode = CC_KDF_ConcatDerivMode;</li>
+<li> CC_KDF_ISO18033_KDF1_DerivMode, CC_KDF_ISO18033_KDF2_DerivMode - specific modes according to
+ISO/IEC 18033-2 standard.</li></ul>
+
+The purpose of this function is to derive a keying data from the shared secret value and some
+other optional shared information, included in OtherInfo (SharedInfo).
+
+\note All buffers arguments are represented in Big-Endian format.
+
+@return CC_OK on success.
+@return A non-zero value on failure as defined cc_kdf_error.h or cc_hash_error.h.
+*/
+CCError_t CC_KdfKeyDerivFunc(
+ uint8_t *pZzSecret, /*!< [in] A pointer to shared secret value octet string. */
+ size_t zzSecretSize, /*!< [in] The size of the shared secret value in bytes.
+ The maximal size is defined as: ::CC_KDF_MAX_SIZE_OF_SHARED_SECRET_VALUE. */
+ CCKdfOtherInfo_t *pOtherInfo, /*!< [in] A pointer to the structure, containing pointers to the data, shared by
+ two entities of agreement, depending on KDF mode:
+ <ul><li> In KDF ASN1 mode OtherInfo includes ASN1 DER encoding of AlgorithmID (mandatory),
+ and some optional data entries as described in section 7.7.1 of the ANSI X9.42-2003:
+ Public Key Cryptography for the Financial Services Industry: Agreement of Symmetric Keys Using
+ Discrete Logarithm Cryptography standard.</li>
+ <li> In both ISO/IEC 18033-2:2006: Information technology -- Security techniques -- Encryption algorithms -- Part 2:
+ Asymmetric ciphers standard: KDF1 and KDF2 modes this parameter is ignored and may be set to NULL. </li>
+ <li> In other modes it is optional and may be set to NULL. </li></ul>*/
+ CCKdfHashOpMode_t kdfHashMode, /*!< [in] The KDF identifier of hash function to be used. The hash function output
+ must be at least 160 bits. */
+ CCKdfDerivFuncMode_t derivMode, /*!< [in] The enum value, specifies one of above described derivation modes. */
+ uint8_t *pKeyingData, /*!< [out] A pointer to the buffer for derived keying data. */
+ size_t keyingDataSize /*!< [in] The size in bytes of the keying data to be derived.
+ The maximal size is defined as :: CC_KDF_MAX_SIZE_OF_KEYING_DATA. */ );
+
+/*********************************************************************************************************/
+/*!
+ CC_KdfAsn1KeyDerivFunc is a macro that performs key derivation according to ASN1 DER encoding method defined
+ in section 7.2.1 of ANSI X9.42-2003: Public Key Cryptography for the Financial Services Industry: Agreement of Symmetric Keys Using Discrete Logarithm Cryptography standard.
+ For a description of the parameters see ::CC_KdfKeyDerivFunc.
+*/
+#define CC_KdfAsn1KeyDerivFunc(ZZSecret_ptr,ZZSecretSize,OtherInfo_ptr,kdfHashMode,KeyingData_ptr,KeyLenInBytes)\
+ CC_KdfKeyDerivFunc((ZZSecret_ptr),(ZZSecretSize),(OtherInfo_ptr),(kdfHashMode),CC_KDF_ASN1_DerivMode,(KeyingData_ptr),(KeyLenInBytes))
+
+
+/*********************************************************************************************************/
+/*!
+ CC_KdfConcatKeyDerivFunc is a macro that performs key derivation according to concatenation mode defined
+ in section 7.2.2 of ANSI X9.42-2003: Public Key Cryptography for the Financial Services Industry: Agreement of Symmetric Keys Using Discrete Logarithm Cryptography
+ standard and also meets ANSI X9.63-2011: Public Key Cryptography for the Financial Services Industry - Key Agreement and Key Transport Using Elliptic Curve
+ Cryptography standard. For a description of the parameters see ::CC_KdfKeyDerivFunc.
+*/
+#define CC_KdfConcatKeyDerivFunc(ZZSecret_ptr,ZZSecretSize,OtherInfo_ptr,kdfHashMode,KeyingData_ptr,KeyLenInBytes)\
+ CC_KdfKeyDerivFunc((ZZSecret_ptr),(ZZSecretSize),(OtherInfo_ptr),(kdfHashMode),CC_KDF_ConcatDerivMode,(KeyingData_ptr),(KeyLenInBytes))
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_kdf_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_kdf_error.h
new file mode 100644
index 0000000..5099381
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_kdf_error.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_KDF_ERROR_H
+#define _CC_KDF_ERROR_H
+
+#include "cc_error.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+@file
+@brief This file contains the definitions of the CryptoCell KDF errors.
+@defgroup cc_kdf_error CryptoCell Key Derivation specific errors
+@{
+@ingroup cc_kdf
+
+ */
+
+
+/************************ Defines *******************************/
+
+/*! The CryptoCell KDF module errors / base address - 0x00F01100*/
+/*! Illegal input pointer. */
+#define CC_KDF_INVALID_ARGUMENT_POINTER_ERROR (CC_KDF_MODULE_ERROR_BASE + 0x0UL)
+/*! Illegal input size. */
+#define CC_KDF_INVALID_ARGUMENT_SIZE_ERROR (CC_KDF_MODULE_ERROR_BASE + 0x1UL)
+/*! Illegal operation mode. */
+#define CC_KDF_INVALID_ARGUMENT_OPERATION_MODE_ERROR (CC_KDF_MODULE_ERROR_BASE + 0x2UL)
+/*! Illegal hash mode. */
+#define CC_KDF_INVALID_ARGUMENT_HASH_MODE_ERROR (CC_KDF_MODULE_ERROR_BASE + 0x3UL)
+/*! Illegal key derivation mode. */
+#define CC_KDF_INVALID_KEY_DERIVATION_MODE_ERROR (CC_KDF_MODULE_ERROR_BASE + 0x4UL)
+/*! Illegal shared secret value size. */
+#define CC_KDF_INVALID_SHARED_SECRET_VALUE_SIZE_ERROR (CC_KDF_MODULE_ERROR_BASE + 0x5UL)
+/*! Illegal otherInfo size. */
+#define CC_KDF_INVALID_OTHER_INFO_SIZE_ERROR (CC_KDF_MODULE_ERROR_BASE + 0x6UL)
+/*! Illegal key data size. */
+#define CC_KDF_INVALID_KEYING_DATA_SIZE_ERROR (CC_KDF_MODULE_ERROR_BASE + 0x7UL)
+/*! Illegal algorithm ID pointer. */
+#define CC_KDF_INVALID_ALGORITHM_ID_POINTER_ERROR (CC_KDF_MODULE_ERROR_BASE + 0x8UL)
+/*! Illegal algorithm ID size. */
+#define CC_KDF_INVALID_ALGORITHM_ID_SIZE_ERROR (CC_KDF_MODULE_ERROR_BASE + 0x9UL)
+/*! KDF is not supproted. */
+#define CC_KDF_IS_NOT_SUPPORTED (CC_KDF_MODULE_ERROR_BASE + 0xFFUL)
+
+/************************ Enums *********************************/
+
+/************************ Typedefs *****************************/
+
+/************************ Structs ******************************/
+
+/************************ Public Variables **********************/
+
+/************************ Public Functions **********************/
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
+
+
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rnd_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rnd_error.h
new file mode 100644
index 0000000..3a6f455
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rnd_error.h
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_RND_ERROR_H
+#define _CC_RND_ERROR_H
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/*!
+@file
+@brief This file contains the definitions of the CryptoCell RND errors.
+@defgroup cc_rnd_error CryptoCell RND specific errors
+@{
+@ingroup cc_rnd
+*/
+
+
+/************************ Defines ******************************/
+/*! RND module on the CryptoCell layer base address - 0x00F00C00 */
+/*! Illegal output pointer.*/
+#define CC_RND_DATA_OUT_POINTER_INVALID_ERROR (CC_RND_MODULE_ERROR_BASE + 0x0UL)
+/*! Random generation in range failed .*/
+#define CC_RND_CAN_NOT_GENERATE_RAND_IN_RANGE (CC_RND_MODULE_ERROR_BASE + 0x1UL)
+/*! CPRNGT test failed.*/
+#define CC_RND_CPRNG_TEST_FAIL_ERROR (CC_RND_MODULE_ERROR_BASE + 0x2UL)
+/*! Illegal additional data buffer. */
+#define CC_RND_ADDITIONAL_INPUT_BUFFER_NULL (CC_RND_MODULE_ERROR_BASE + 0x3UL)
+/*! Illegal additional data size. */
+#define CC_RND_ADDITIONAL_INPUT_SIZE_ERROR (CC_RND_MODULE_ERROR_BASE + 0x4UL)
+/*! Data size overflow. */
+#define CC_RND_DATA_SIZE_OVERFLOW_ERROR (CC_RND_MODULE_ERROR_BASE + 0x5UL)
+/*! Illegal vector size. */
+#define CC_RND_VECTOR_SIZE_ERROR (CC_RND_MODULE_ERROR_BASE + 0x6UL)
+/*! Reseed counter overflow - in case this error was returned instantiation or reseeding operation must be called. */
+#define CC_RND_RESEED_COUNTER_OVERFLOW_ERROR (CC_RND_MODULE_ERROR_BASE + 0x7UL)
+/*! Instantiation was not yet called. */
+#define CC_RND_INSTANTIATION_NOT_DONE_ERROR (CC_RND_MODULE_ERROR_BASE + 0x8UL)
+/*! TRNG loss of samples. */
+#define CC_RND_TRNG_LOSS_SAMPLES_ERROR (CC_RND_MODULE_ERROR_BASE + 0x9UL)
+/*! TRNG Time exceeded limitations. */
+#define CC_RND_TRNG_TIME_EXCEED_ERROR (CC_RND_MODULE_ERROR_BASE + 0xAUL)
+/*! TRNG loss of samples and time exceeded limitations. */
+#define CC_RND_TRNG_LOSS_SAMPLES_AND_TIME_EXCEED_ERROR (CC_RND_MODULE_ERROR_BASE + 0xBUL)
+/*! RND is in Known Answer Test mode. */
+#define CC_RND_IS_KAT_MODE_ERROR (CC_RND_MODULE_ERROR_BASE + 0xCUL)
+/*! RND operation not supported. */
+#define CC_RND_OPERATION_IS_NOT_SUPPORTED_ERROR (CC_RND_MODULE_ERROR_BASE + 0xDUL)
+/*! RND validity check failed. */
+#define CC_RND_STATE_VALIDATION_TAG_ERROR (CC_RND_MODULE_ERROR_BASE + 0xEUL)
+/*! RND is not supported. */
+#define CC_RND_IS_NOT_SUPPORTED (CC_RND_MODULE_ERROR_BASE + 0xFUL)
+
+/*! Illegal generate vector function pointer. */
+#define CC_RND_GEN_VECTOR_FUNC_ERROR (CC_RND_MODULE_ERROR_BASE + 0x14UL)
+
+/*! Illegal work buffer pointer. */
+#define CC_RND_WORK_BUFFER_PTR_INVALID_ERROR (CC_RND_MODULE_ERROR_BASE + 0x20UL)
+/*! Illegal AES key size. */
+#define CC_RND_ILLEGAL_AES_KEY_SIZE_ERROR (CC_RND_MODULE_ERROR_BASE + 0x21UL)
+/*! Illegal data pointer. */
+#define CC_RND_ILLEGAL_DATA_PTR_ERROR (CC_RND_MODULE_ERROR_BASE + 0x22UL)
+/*! Illegal data size. */
+#define CC_RND_ILLEGAL_DATA_SIZE_ERROR (CC_RND_MODULE_ERROR_BASE + 0x23UL)
+/*! Illegal parameter. */
+#define CC_RND_ILLEGAL_PARAMETER_ERROR (CC_RND_MODULE_ERROR_BASE + 0x24UL)
+/*! Illegal RND state pointer. */
+#define CC_RND_STATE_PTR_INVALID_ERROR (CC_RND_MODULE_ERROR_BASE + 0x25UL)
+/*! TRNG errors. */
+#define CC_RND_TRNG_ERRORS_ERROR (CC_RND_MODULE_ERROR_BASE + 0x26UL)
+/*! Illegal context pointer. */
+#define CC_RND_CONTEXT_PTR_INVALID_ERROR (CC_RND_MODULE_ERROR_BASE + 0x27UL)
+/*! Illegal output vector pointer. */
+#define CC_RND_VECTOR_OUT_PTR_ERROR (CC_RND_MODULE_ERROR_BASE + 0x30UL)
+/*! Illegal output vector size. */
+#define CC_RND_VECTOR_OUT_SIZE_ERROR (CC_RND_MODULE_ERROR_BASE + 0x31UL)
+/*! Maximal vector size is too small. */
+#define CC_RND_MAX_VECTOR_IS_TOO_SMALL_ERROR (CC_RND_MODULE_ERROR_BASE + 0x32UL)
+/*! Illegal Known Answer Tests parameters. */
+#define CC_RND_KAT_DATA_PARAMS_ERROR (CC_RND_MODULE_ERROR_BASE + 0x33UL)
+/*! TRNG Known Answer Test not supported. */
+#define CC_RND_TRNG_KAT_NOT_SUPPORTED_ERROR (CC_RND_MODULE_ERROR_BASE + 0x34UL)
+/*! SRAM memory is not defined. */
+#define CC_RND_SRAM_NOT_SUPPORTED_ERROR (CC_RND_MODULE_ERROR_BASE + 0x35UL)
+/*! AES operation failure. */
+#define CC_RND_AES_ERROR (CC_RND_MODULE_ERROR_BASE + 0x36UL)
+/*! TRNG mode mismatch between PAL and lib */
+#define CC_RND_MODE_MISMATCH_ERROR (CC_RND_MODULE_ERROR_BASE + 0x37UL)
+
+
+/************************ Enums ********************************/
+
+
+/************************ Typedefs ****************************/
+
+
+/************************ Structs ******************************/
+
+
+/************************ Public Variables **********************/
+
+
+/************************ Public Functions **********************/
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_build.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_build.h
new file mode 100644
index 0000000..0a93f62
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_build.h
@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_RSA_BUILD_H
+#define _CC_RSA_BUILD_H
+
+#ifdef CC_IOT
+ #if defined(MBEDTLS_CONFIG_FILE)
+ #include MBEDTLS_CONFIG_FILE
+ #endif
+#endif
+
+#if !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C))
+
+#include "cc_error.h"
+#include "cc_rsa_types.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+@file
+@brief This file defines some utility functions for working with RSA cryptography.
+@defgroup cc_rsa_build CryptoCell RSA Utility APIs
+@{
+@ingroup cc_rsa
+*/
+
+/******************************************************************************************/
+/*!
+@brief Builds a ::CCRsaUserPubKey_t public key structure with the provided modulus and exponent.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h on failure.
+*/
+CIMPORT_C CCError_t CC_RsaPubKeyBuild(
+ CCRsaUserPubKey_t *UserPubKey_ptr, /*!< [out] Pointer to the public key structure. */
+ uint8_t *Exponent_ptr, /*!< [in] Pointer to the exponent stream of bytes (Big-Endian format). */
+ size_t ExponentSize, /*!< [in] The size of the exponent (in bytes). */
+ uint8_t *Modulus_ptr, /*!< [in] Pointer to the modulus stream of bytes (Big-Endian format).
+ The most significant bit (MSB) must be set to '1'. */
+ size_t ModulusSize /*!< [in] The modulus size in bytes. Supported sizes are 256, 384 and 512 bytes. */
+);
+
+
+/******************************************************************************************/
+/*!
+@brief Builds a ::CCRsaUserPrivKey_t private-key structure with the provided modulus and exponent, marking the key as a non-CRT key.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h on failure.
+*/
+CIMPORT_C CCError_t CC_RsaPrivKeyBuild(
+ CCRsaUserPrivKey_t *UserPrivKey_ptr, /*!< [out] Pointer to the public key structure.*/
+ uint8_t *PrivExponent_ptr, /*!< [in] Pointer to the private exponent stream of bytes (Big-Endian format). */
+ size_t PrivExponentSize, /*!< [in] The size of the private exponent (in bytes). */
+ uint8_t *PubExponent_ptr, /*!< [in] Pointer to the public exponent stream of bytes (Big-Endian format). */
+ size_t PubExponentSize, /*!< [in] The size of the public exponent (in bytes). */
+ uint8_t *Modulus_ptr, /*!< [in] Pointer to the modulus stream of bytes (Big-Endian format).
+ The most significant bit must be set to '1'. */
+ size_t ModulusSize /*!< [in] The modulus size in bytes. Supported sizes are 256, 384 and 512. */
+);
+
+/******************************************************************************************/
+/*!
+@brief Builds a ::CCRsaUserPrivKey_t private-key structure with the provided parameters, marking the key as a CRT key.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h on failure.
+*/
+CIMPORT_C CCError_t CC_RsaPrivKeyCrtBuild(
+ CCRsaUserPrivKey_t *UserPrivKey_ptr, /*!< [out] Pointer to the public key structure. */
+ uint8_t *P_ptr, /*!< [in] Pointer to the first factor stream of bytes (Big-Endian format). */
+ size_t PSize, /*!< [in] The size of the first factor (in bytes). */
+ uint8_t *Q_ptr, /*!< [in] Pointer to the second factor stream of bytes (Big-Endian format). */
+ size_t QSize, /*!< [in] The size of the second factor (in bytes). */
+ uint8_t *dP_ptr, /*!< [in] Pointer to the first factor's CRT exponent stream of bytes
+ (Big-Endian format). */
+ size_t dPSize, /*!< [in] The size of the first factor's CRT exponent (in bytes). */
+ uint8_t *dQ_ptr, /*!< [in] Pointer to the second factor's CRT exponent stream of bytes
+ (Big-Endian format). */
+ size_t dQSize, /*!< [in] The size of the second factor's CRT exponent (in bytes). */
+ uint8_t *qInv_ptr, /*!< [in] Pointer to the first CRT coefficient stream of bytes (Big-Endian format). */
+ size_t qInvSize /*!< [in] The size of the first CRT coefficient (in bytes). */
+);
+
+
+/******************************************************************************************/
+/*!
+@brief The function gets the e,n public key parameters from the input
+CCRsaUserPubKey_t structure. The function can also be used to retrieve the
+modulus and exponent sizes only (Exponent_ptr AND Modulus_ptr must be set to
+NULL).
+
+\note All members of input UserPubKey_ptr structure must be initialized.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h on failure.
+*/
+CIMPORT_C CCError_t CC_RsaPubKeyGet(
+ CCRsaUserPubKey_t *UserPubKey_ptr, /*!< [in] A pointer to the public key structure. */
+ uint8_t *Exponent_ptr, /*!< [out] A pointer to the exponent stream of bytes (Big-Endian format). */
+ size_t *ExponentSize_ptr, /*!< [in/out] the size of the exponent buffer in bytes,
+ it is updated to the actual size of the exponent, in bytes. */
+ uint8_t *Modulus_ptr, /*!< [out] A pointer to the modulus stream of bytes (Big-Endian format).
+ The MS (most significant) bit must be set to '1'. */
+ size_t *ModulusSize_ptr /*!< [in/out] the size of the modulus buffer in bytes, it is updated to the actual
+ size of the modulus, in bytes. */
+);
+
+/******************************************************************************************/
+/*!
+@brief The function gets the d,n and e - private key parameters (non CRT mode) from the input
+CCRsaUserPrivKey_t structure.
+
+\note All members of input UserPrivKey_ptr structure must be initialized. All output pointers must be allocated.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h on failure.
+*/
+CEXPORT_C CCError_t CC_RsaGetPrivKey(CCRsaUserPrivKey_t *UserPrivKey_ptr /*!< [in] A pointer to the private key structure.*/,
+ uint8_t *PrivExponent_ptr /*!< [out] A pointer to the exponent stream of bytes (Big-Endian format).*/,
+ uint16_t *PrivExponentSize_ptr /*!< [in,out] The size of the private exponent buffer in bytes , it is updated to the
+ actual size of the private exponent, in bytes*/,
+ uint8_t *PubExponent_ptr /*!< [out] A pointer to the public exponent stream of bytes ( Big endian ).*/,
+ uint16_t *PubExponentSize_ptr, /*!< [in,out] The size of the exponent buffer in bytes , it is updated to the
+ actual size of the exponent, in bytes*/
+ uint8_t *Modulus_ptr, /*!< [out] A pointer to the modulus stream of bytes (Big-Endian format).
+ The MS (most significant) bit must be set to '1'.*/
+ uint16_t *ModulusSize_ptr /*!< [in,out] The size of the modulus buffer in bytes , it is updated to the
+ actual size of the modulus, in bytes*/
+);
+
+
+/******************************************************************************************/
+/*!
+@brief The function gets the P, Q, dP, dQ and QInv - private key parameters (CRT mode) from the input
+CCRsaUserPrivKey_t structure.
+
+\note All members of input UserPrivKey_ptr structure must be initialized. All output pointers must be allocated.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h on failure.
+*/
+CEXPORT_C CCError_t CC_RsaGetPrivKeyCRT(CCRsaUserPrivKey_t *UserPrivKey_ptr /*!< [in] A pointer to the private key structure.*/,
+ uint8_t *P_ptr /*!< [out] A pointer to the first factor stream of bytes ( Big endian ).*/,
+ uint16_t *PSize_ptr, /*!< [in,out] The size of the first factor buffer in bytes , updated to the actual size of the
+ first factor, in bytes.*/
+ uint8_t *Q_ptr, /*!< [out] A pointer to the second factor stream of bytes ( Big endian ).*/
+ uint16_t *QSize_ptr, /*!< [in,out] The size of the second factor buffer in bytes , updated to the
+ actual size of the second factor, in bytes.*/
+ uint8_t *dP_ptr, /*!< [out] A pointer to the first factors CRT exponent stream of bytes ( Big endian ).*/
+ uint16_t *dPSize_ptr, /*!< [in,out] The size of the first factor exponent buffer in bytes , updated to the
+ actual size of the first factor exponent, in bytes.*/
+ uint8_t *dQ_ptr, /*!< [out] A pointer to the second factors CRT exponent stream of bytes ( Big endian ).*/
+ uint16_t *dQSize_ptr, /*!< [in,out] The size of the second factors CRT exponent buffer in bytes , updated to the
+ actual size of the second factors CRT exponent, in bytes.*/
+ uint8_t *qInv_ptr, /*!< [out] A pointer to the first CRT coefficient stream of bytes ( Big endian ).*/
+ uint16_t *qInvSize_ptr /*!< [in,out] The size of the first CRT coefficient buffer in bytes , updated to the
+ actual size of the first CRT coefficient, in bytes.*/
+);
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif /* !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C)) */
+#endif /* _CC_RSA_BUILD_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_error.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_error.h
new file mode 100644
index 0000000..9257675
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_error.h
@@ -0,0 +1,247 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_RSA_ERROR_H
+#define _CC_RSA_ERROR_H
+
+#ifdef CC_IOT
+ #if defined(MBEDTLS_CONFIG_FILE)
+ #include MBEDTLS_CONFIG_FILE
+ #endif
+#endif
+
+#if !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C))
+
+#include "cc_error.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*! @file
+@brief This file contains the definitions of the CryptoCell RSA errors.
+@defgroup cc_rsa_error CryptoCell RSA specific errors
+@{
+@ingroup cc_rsa
+
+*/
+
+/************************ Defines ******************************/
+
+/* PKI RSA module on the CryptoCell layer base address - 0x00F00400 */
+
+/*! CryptoCell RSA module errors */
+/*! Illegal modulus size. */
+#define CC_RSA_INVALID_MODULUS_SIZE (CC_RSA_MODULE_ERROR_BASE + 0x0UL)
+/*! Illegal modulus pointer. */
+#define CC_RSA_INVALID_MODULUS_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x1UL)
+/*! Illegal exponent pointer. */
+#define CC_RSA_INVALID_EXPONENT_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x2UL)
+/*! Illegal public key structure pointer. */
+#define CC_RSA_INVALID_PUB_KEY_STRUCT_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x3UL)
+/*! Illegal private key structure pointer. */
+#define CC_RSA_INVALID_PRIV_KEY_STRUCT_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x4UL)
+/*! Illegal exponent value. */
+#define CC_RSA_INVALID_EXPONENT_VAL (CC_RSA_MODULE_ERROR_BASE + 0x5UL)
+/*! Illegal exponent size. */
+#define CC_RSA_INVALID_EXPONENT_SIZE (CC_RSA_MODULE_ERROR_BASE + 0x6UL)
+/*! Illegal CRT first factor pointer (P_ptr) . */
+#define CC_RSA_INVALID_CRT_FIRST_FACTOR_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x7UL)
+/*! Illegal CRT second factor pointer (Q_ptr) . */
+#define CC_RSA_INVALID_CRT_SECOND_FACTOR_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x8UL)
+/*! Illegal CRT first exponent factor pointer (dP_ptr) . */
+#define CC_RSA_INVALID_CRT_FIRST_FACTOR_EXP_PTR_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x9UL)
+/*! Illegal CRT second exponent factor pointer (dQ_ptr) . */
+#define CC_RSA_INVALID_CRT_SECOND_FACTOR_EXP_PTR_ERROR (CC_RSA_MODULE_ERROR_BASE + 0xAUL)
+/*! Illegal CRT coefficient pointer (qInv_ptr) . */
+#define CC_RSA_INVALID_CRT_COEFFICIENT_PTR_ERROR (CC_RSA_MODULE_ERROR_BASE + 0xBUL)
+/*! Illegal CRT first factor size (Psize). */
+#define CC_RSA_INVALID_CRT_FIRST_FACTOR_SIZE (CC_RSA_MODULE_ERROR_BASE + 0xCUL)
+/*! Illegal CRT second factor size (Qsize). */
+#define CC_RSA_INVALID_CRT_SECOND_FACTOR_SIZE (CC_RSA_MODULE_ERROR_BASE + 0xDUL)
+/*! Illegal CRT first and second factor size (Psize + Qsize). */
+#define CC_RSA_INVALID_CRT_FIRST_AND_SECOND_FACTOR_SIZE (CC_RSA_MODULE_ERROR_BASE + 0xEUL)
+/*! Illegal CRT first factor exponent value (dP). */
+#define CC_RSA_INVALID_CRT_FIRST_FACTOR_EXPONENT_VAL (CC_RSA_MODULE_ERROR_BASE + 0xFUL)
+/*! Illegal CRT first factor exponent value (dQ). */
+#define CC_RSA_INVALID_CRT_SECOND_FACTOR_EXPONENT_VAL (CC_RSA_MODULE_ERROR_BASE + 0x10UL)
+/*! Illegal CRT coefficient value (qInv). */
+#define CC_RSA_INVALID_CRT_COEFF_VAL (CC_RSA_MODULE_ERROR_BASE + 0x11UL)
+/*! Illegal data in. */
+#define CC_RSA_DATA_POINTER_INVALID_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x12UL)
+/*! Illegal message data size. */
+#define CC_RSA_INVALID_MESSAGE_DATA_SIZE (CC_RSA_MODULE_ERROR_BASE + 0x13UL)
+/*! Illegal message value. */
+#define CC_RSA_INVALID_MESSAGE_VAL (CC_RSA_MODULE_ERROR_BASE + 0x14UL)
+/*! Modulus even error. */
+#define CC_RSA_MODULUS_EVEN_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x15UL)
+/*! Illegal context pointer. */
+#define CC_RSA_INVALID_USER_CONTEXT_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x16UL)
+/*! Illegal hash operation mode. */
+#define CC_RSA_HASH_ILLEGAL_OPERATION_MODE_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x17UL)
+/*! Illegal MGF value. */
+#define CC_RSA_MGF_ILLEGAL_ARG_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x18UL)
+/*! Illegal PKCS1 version. */
+#define CC_RSA_PKCS1_VER_ARG_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x19UL)
+/*! Invalid private key. */
+#define CC_RSA_PRIV_KEY_VALIDATION_TAG_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x1AUL)
+/*! Invalid public key. */
+#define CC_RSA_PUB_KEY_VALIDATION_TAG_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x1BUL)
+/*! Invalid context. */
+#define CC_RSA_USER_CONTEXT_VALIDATION_TAG_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x1CUL)
+/*! Illegal output pointer. */
+#define CC_RSA_INVALID_OUTPUT_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x1DUL)
+/*! Illegal output size pointer. */
+#define CC_RSA_INVALID_OUTPUT_SIZE_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x1FUL)
+/*! Illegal temporary buffer pointer. */
+#define CC_RSA_CONV_TO_CRT_INVALID_TEMP_BUFF_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x20UL)
+/*! OAEP encode parameter string is too long. */
+#define CC_RSA_BASE_OAEP_ENCODE_PARAMETER_STRING_TOO_LONG (CC_RSA_MODULE_ERROR_BASE + 0x22UL)
+/*! OAEP decode parameter string is too long. */
+#define CC_RSA_BASE_OAEP_DECODE_PARAMETER_STRING_TOO_LONG (CC_RSA_MODULE_ERROR_BASE + 0x23UL)
+/*! OAEP encode message is too long. */
+#define CC_RSA_BASE_OAEP_ENCODE_MESSAGE_TOO_LONG (CC_RSA_MODULE_ERROR_BASE + 0x24UL)
+/*! OAEP decode message is too long. */
+#define CC_RSA_BASE_OAEP_DECODE_MESSAGE_TOO_LONG (CC_RSA_MODULE_ERROR_BASE + 0x25UL)
+/*! Illegal key generation data struct pointer. */
+#define CC_RSA_KEY_GEN_DATA_STRUCT_POINTER_INVALID (CC_RSA_MODULE_ERROR_BASE + 0x26UL)
+/*! Illegal PRIM data struct pointer. */
+#define CC_RSA_PRIM_DATA_STRUCT_POINTER_INVALID (CC_RSA_MODULE_ERROR_BASE + 0x27UL)
+/*! Illegal message buffer size. */
+#define CC_RSA_INVALID_MESSAGE_BUFFER_SIZE (CC_RSA_MODULE_ERROR_BASE + 0x28UL)
+/*! Illegal signature buffer size. */
+#define CC_RSA_INVALID_SIGNATURE_BUFFER_SIZE (CC_RSA_MODULE_ERROR_BASE + 0x29UL)
+/*! Illegal modulus size pointer. */
+#define CC_RSA_INVALID_MOD_BUFFER_SIZE_POINTER (CC_RSA_MODULE_ERROR_BASE + 0x2AUL)
+/*! Illegal exponent size pointer. */
+#define CC_RSA_INVALID_EXP_BUFFER_SIZE_POINTER (CC_RSA_MODULE_ERROR_BASE + 0x2BUL)
+/*! Illegal signature pointer. */
+#define CC_RSA_INVALID_SIGNATURE_BUFFER_POINTER (CC_RSA_MODULE_ERROR_BASE + 0x2CUL)
+/*! Wrong private key type. */
+#define CC_RSA_WRONG_PRIVATE_KEY_TYPE (CC_RSA_MODULE_ERROR_BASE + 0x2DUL)
+/*! Illegal CRT first factor size pointer (Psize) . */
+#define CC_RSA_INVALID_CRT_FIRST_FACTOR_SIZE_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x2EUL)
+/*! Illegal CRT second factor size pointer (Qsize) . */
+#define CC_RSA_INVALID_CRT_SECOND_FACTOR_SIZE_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x2FUL)
+/*! Illegal CRT first factor exponent size pointer (dPsize) . */
+#define CC_RSA_INVALID_CRT_FIRST_FACTOR_EXP_SIZE_PTR_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x30UL)
+/*! Illegal CRT second factor exponent size pointer (dQsize) . */
+#define CC_RSA_INVALID_CRT_SECOND_FACTOR_EXP_SIZE_PTR_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x31UL)
+/*! Illegal CRT coefficient size pointer (qInvsize) . */
+#define CC_RSA_INVALID_CRT_COEFFICIENT_SIZE_PTR_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x32UL)
+/*! Illegal CRT first factor size (Psize) . */
+#define CC_RSA_INVALID_CRT_FIRST_FACTOR_SIZE_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x33UL)
+/*! Illegal CRT second factor size (Qsize) . */
+#define CC_RSA_INVALID_CRT_SECOND_FACTOR_SIZE_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x34UL)
+/*! Illegal CRT first factor exponent size (dPsize) . */
+#define CC_RSA_INVALID_CRT_FIRST_FACTOR_EXP_SIZE_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x35UL)
+/*! Illegal CRT second factor exponent size (dQsize) . */
+#define CC_RSA_INVALID_CRT_SECOND_FACTOR_EXP_SIZE_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x36UL)
+/*! Illegal CRT coefficient size (qInvsize) . */
+#define CC_RSA_INVALID_CRT_COEFFICIENT_SIZE_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x37UL)
+/*! Key generation conditional test failed. */
+#define CC_RSA_KEY_GEN_CONDITIONAL_TEST_FAIL_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x38UL)
+/*! Random generation in range failed. */
+#define CC_RSA_CAN_NOT_GENERATE_RAND_IN_RANGE (CC_RSA_MODULE_ERROR_BASE + 0x39UL)
+/*! Illegal CRT parameter size. */
+#define CC_RSA_INVALID_CRT_PARAMETR_SIZE_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x3AUL)
+/*! Illegal modulus. */
+#define CC_RSA_INVALID_MODULUS_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x40UL)
+/*! Illegal pointer. */
+#define CC_RSA_INVALID_PTR_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x41UL)
+/*! Illegal decryption mode. */
+#define CC_RSA_INVALID_DECRYPRION_MODE_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x42UL)
+/*! Illegal generated private key. */
+#define CC_RSA_GENERATED_PRIV_KEY_IS_TOO_LOW (CC_RSA_MODULE_ERROR_BASE + 0x43UL)
+/*! Key generation error. */
+#define CC_RSA_KEY_GENERATION_FAILURE_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x44UL)
+#define CC_RSA_INTERNAL_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x45UL)
+
+
+/****************************************************************************************
+ * PKCS#1 VERSION 1.5 ERRORS
+ ****************************************************************************************/
+/*! BER encoding passed. */
+#define CC_RSA_BER_ENCODING_OK CC_OK
+/*! Error in BER parsing. */
+#define CC_RSA_ERROR_BER_PARSING (CC_RSA_MODULE_ERROR_BASE+0x51UL)
+/*! Error in PKCS15 message. */
+#define CC_RSA_ENCODE_15_MSG_OUT_OF_RANGE (CC_RSA_MODULE_ERROR_BASE+0x52UL)
+/*! Error in PKCS15 PS. */
+#define CC_RSA_ENCODE_15_PS_TOO_SHORT (CC_RSA_MODULE_ERROR_BASE+0x53UL)
+/*! PKCS15 block type is not supported. */
+#define CC_RSA_PKCS1_15_BLOCK_TYPE_NOT_SUPPORTED (CC_RSA_MODULE_ERROR_BASE+0x54UL)
+/*! Error in PKCS15 decrypted block parsing. */
+#define CC_RSA_15_ERROR_IN_DECRYPTED_BLOCK_PARSING (CC_RSA_MODULE_ERROR_BASE+0x55UL)
+/*! Error in random operation. */
+#define CC_RSA_ERROR_IN_RANDOM_OPERATION_FOR_ENCODE (CC_RSA_MODULE_ERROR_BASE+0x56UL)
+/*! PKCS15 verification failed. */
+#define CC_RSA_ERROR_VER15_INCONSISTENT_VERIFY (CC_RSA_MODULE_ERROR_BASE+0x57UL)
+/*! Illegal message size (in no hash operation case). */
+#define CC_RSA_INVALID_MESSAGE_DATA_SIZE_IN_NO_HASH_CASE (CC_RSA_MODULE_ERROR_BASE+0x58UL)
+/*! Illegal message size. */
+#define CC_RSA_INVALID_MESSAGE_DATA_SIZE_IN_SSL_CASE (CC_RSA_MODULE_ERROR_BASE+0x59UL)
+/*! PKCS#1 Ver 1.5 verify hash input inconsistent with hash mode derived from signature. */
+#define CC_RSA_PKCS15_VERIFY_BER_ENCODING_HASH_TYPE (CC_RSA_MODULE_ERROR_BASE+0x60UL) /*!< \internal PKCS#1 Ver 1.5 verify hash input inconsistent with hash mode derived from signature*/
+/*! Illegal DER hash mode */
+#define CC_RSA_GET_DER_HASH_MODE_ILLEGAL (CC_RSA_MODULE_ERROR_BASE+0x61UL)
+
+/****************************************************************************************
+ * PKCS#1 VERSION 2.1 ERRORS
+ ****************************************************************************************/
+ /*! Illegal salt length. */
+#define CC_RSA_PSS_ENCODING_MODULUS_HASH_SALT_LENGTHS_ERROR (CC_RSA_MODULE_ERROR_BASE+0x80UL)
+/*! Illegal MGF mask. */
+#define CC_RSA_BASE_MGF_MASK_TOO_LONG (CC_RSA_MODULE_ERROR_BASE+0x81UL)
+/*! PSS verification failed. */
+#define CC_RSA_ERROR_PSS_INCONSISTENT_VERIFY (CC_RSA_MODULE_ERROR_BASE+0x82UL)
+/*! OAEP message too long. */
+#define CC_RSA_OAEP_VER21_MESSAGE_TOO_LONG (CC_RSA_MODULE_ERROR_BASE+0x83UL)
+/*! OAEP error in decrypted block parsing. */
+#define CC_RSA_ERROR_IN_DECRYPTED_BLOCK_PARSING (CC_RSA_MODULE_ERROR_BASE+0x84UL)
+/*! OAEP decoding error. */
+#define CC_RSA_OAEP_DECODE_ERROR (CC_RSA_MODULE_ERROR_BASE+0x85UL)
+/*! Error in decrypted data size. */
+#define CC_RSA_15_ERROR_IN_DECRYPTED_DATA_SIZE (CC_RSA_MODULE_ERROR_BASE+0x86UL)
+/*! Error in decrypted data. */
+#define CC_RSA_15_ERROR_IN_DECRYPTED_DATA (CC_RSA_MODULE_ERROR_BASE+0x87UL)
+/*! Illegal L pointer. */
+#define CC_RSA_OAEP_L_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE+0x88UL)
+/*! Illegal output size. */
+#define CC_RSA_DECRYPT_INVALID_OUTPUT_SIZE (CC_RSA_MODULE_ERROR_BASE+0x89UL)
+/*! Illegal output size pointer. */
+#define CC_RSA_DECRYPT_OUTPUT_SIZE_POINTER_ERROR (CC_RSA_MODULE_ERROR_BASE+0x8AUL)
+/*! Illegal parameters. */
+#define CC_RSA_ILLEGAL_PARAMS_ACCORDING_TO_PRIV_ERROR (CC_RSA_MODULE_ERROR_BASE + 0x93UL)
+/*! RSA is not supported. */
+#define CC_RSA_IS_NOT_SUPPORTED (CC_RSA_MODULE_ERROR_BASE+0xFFUL)
+
+
+/************************ Enums ********************************/
+
+
+/************************ Typedefs ****************************/
+
+
+/************************ Structs ******************************/
+
+
+/************************ Public Variables **********************/
+
+
+/************************ Public Functions **********************/
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif /* !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C)) */
+#endif /* _CC_RSA_ERROR_H */
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_kg.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_kg.h
new file mode 100644
index 0000000..71804bd
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_kg.h
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_RSA_KG_H
+#define _CC_RSA_KG_H
+
+#ifdef CC_IOT
+ #if defined(MBEDTLS_CONFIG_FILE)
+ #include MBEDTLS_CONFIG_FILE
+ #endif
+#endif
+
+#if !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C))
+
+#include "cc_rsa_types.h"
+#include "cc_rnd_common.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+@file
+@brief Generates a RSA pair of public and private keys.
+@defgroup cc_rsa_kg CryptoCell RSA key generation APIs
+@{
+@ingroup cc_rsa
+*/
+
+/************************ Defines ******************************/
+
+/* Max allowed size and values of public exponent for key generation in CryptoCell*/
+/*! Maximal public exponent size in bits. */
+#define CC_RSA_KG_PUB_EXP_MAX_SIZE_BITS 17
+/*! Definition of public exponent value. */
+#define CC_RSA_KG_PUB_EXP_ALLOW_VAL_1 0x000003
+/*! Definition of public exponent value. */
+#define CC_RSA_KG_PUB_EXP_ALLOW_VAL_2 0x000011
+/*! Definition of public exponent value. */
+#define CC_RSA_KG_PUB_EXP_ALLOW_VAL_3 0x010001
+
+
+
+
+/***********************************************************************************************/
+
+/*!
+@brief CC_RsaKgKeyPairGenerate generates a Pair of public and private keys on non CRT mode according to ANSI X9.31-1988: Public Key
+Cryptography Using Reversible Algorithms for the Financial Services Industry (rDSA).
+
+\note To be FIPS Publication 186-4: Digital Signature Standard (DSS) [5.1] compliant use only the following:
+ key sizes (in bits): 2048, 3072, 4096 and public exponent value 0x10001.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h or cc_rnd_error.h on failure.
+
+*/
+CIMPORT_C CCError_t CC_RsaKgKeyPairGenerate(
+ CCRndContext_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
+ uint8_t *pubExp_ptr, /*!< [in] The pointer to the public exponent (public key). */
+ size_t pubExpSizeInBytes, /*!< [in] The public exponent size in bytes. */
+ size_t keySize, /*!< [in] The size of the key, in bits. Supported sizes are
+ 2048, 3072 and 4096 bit. */
+ CCRsaUserPrivKey_t *userPrivKey_ptr, /*!< [out] Pointer to the private-key structure. */
+ CCRsaUserPubKey_t *userPubKey_ptr, /*!< [out] Pointer to the public-key structure. */
+ CCRsaKgData_t *keyGenData_ptr, /*!< [in] Pointer to a temporary structure required for the KeyGen operation. */
+ CCRsaKgFipsContext_t *pFipsCtx /*!< [in] Pointer to temporary buffer used in case FIPS certification if required
+ (may be NULL for all other cases). */
+);
+
+/***********************************************************************************************/
+/*!
+@brief Generates a pair of public and private keys on CRT mode according to ANSI X9.31-1988: Public Key
+Cryptography Using Reversible Algorithms for the Financial Services Industry (rDSA).
+
+\note To be FIPS Publication 186-4: Digital Signature Standard (DSS) compliant use only the following key sizes (in bits): 2048, 3072 and 4096.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h or cc_rnd_error.h on failure.
+*/
+
+CIMPORT_C CCError_t CC_RsaKgKeyPairCrtGenerate(
+ CCRndContext_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
+ uint8_t *pubExp_ptr, /*!< [in] The pointer to the public exponent (public key). */
+ size_t pubExpSizeInBytes, /*!< [in] The public exponent size in bytes. */
+ size_t keySize, /*!< [in] The size of the key, in bits. Supported sizes are
+ 2048, 3072 and 4096 bit. */
+ CCRsaUserPrivKey_t *userPrivKey_ptr, /*!< [out] Pointer to the private-key structure. */
+ CCRsaUserPubKey_t *userPubKey_ptr, /*!< [out] Pointer to the public-key structure. */
+ CCRsaKgData_t *keyGenData_ptr, /*!< [in] Pointer to a temporary structure required for the KeyGen operation. */
+ CCRsaKgFipsContext_t *pFipsCtx /*!< [in] Pointer to temporary buffer used in case FIPS certification if required
+ (may be NULL for all other cases). */
+);
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif /* !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C)) */
+#endif /* _CC_RSA_KG_H */
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_prim.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_prim.h
new file mode 100644
index 0000000..34fe96d
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_prim.h
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_RSA_PRIM_H
+#define _CC_RSA_PRIM_H
+
+#ifdef CC_IOT
+ #if defined(MBEDTLS_CONFIG_FILE)
+ #include MBEDTLS_CONFIG_FILE
+ #endif
+#endif
+
+#if !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C))
+
+#include "cc_rsa_types.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+@file
+@brief This file defines the API that implements the Public-Key Cryptography Standards (PKCS) #1
+RSA Cryptography Specifications Version 2.1 primitive functions.
+@defgroup cc_rsa_prim CryptoCell RSA primitive APIs
+@{
+@ingroup cc_rsa
+
+
+\note Direct use of primitive functions, rather than schemes to protect data, is strongly discouraged as primitive functions are
+susceptible to well-known attacks.
+*/
+
+
+
+/**********************************************************************************/
+/*!
+@brief Implements the RSAEP algorithm, as defined in section 6.1.1 of Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography
+Specifications Version 2.1.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h on failure.
+ */
+CIMPORT_C CCError_t CC_RsaPrimEncrypt(
+ CCRsaUserPubKey_t *UserPubKey_ptr, /*!< [in] Pointer to the public-key data structure. */
+ CCRsaPrimeData_t *PrimeData_ptr, /*!< [in] Pointer to a temporary structure containing internal buffers. */
+ uint8_t *Data_ptr, /*!< [in] Pointer to the data to encrypt. */
+ size_t DataSize, /*!< [in] The size (in bytes) of the data to encrypt. Data size must be ≤ Modulus size.
+ It can be smaller than the modulus size but it is not recommended.
+ If smaller, the data is zero-padded up to the modulus size.
+ Since the result of decryption is always the size of the modulus,
+ this causes the size of the decrypted data to be larger than the
+ originally encrypted data. */
+ uint8_t *Output_ptr /*!< [out] Pointer to the encrypted data. The buffer size must be ≥ the modulus size. */
+);
+
+
+/**********************************************************************************/
+/*!
+@brief Implements the RSADP algorithm, as defined in section 6.1.2 of Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography
+Specifications Version 2.1.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h on failure.
+
+*/
+CIMPORT_C CCError_t CC_RsaPrimDecrypt(
+ CCRsaUserPrivKey_t *UserPrivKey_ptr, /*!< [in] Pointer to the private-key data structure.
+ The representation (pair or quintuple) and hence the algorithm (CRT or not-CRT)
+ is determined by the Private Key data structure - using
+ ::CC_RsaPrivKeyBuild or ::CC_RsaPrivKeyCrtBuild
+ to determine which algorithm is used.*/
+ CCRsaPrimeData_t *PrimeData_ptr, /*!< [in] Pointer to a temporary structure containing internal buffers required for
+ the RSA operation. */
+ uint8_t *Data_ptr, /*!< [in] Pointer to the data to be decrypted. */
+ size_t DataSize, /*!< [in] The size (in bytes) of the data to decrypt. Must be equal to the modulus size. */
+ uint8_t *Output_ptr /*!< [out] Pointer to the decrypted data. The buffer size must be ≤ the modulus size. */
+);
+
+
+/*!
+@brief Implements the RSASP1 algorithm, as defined in [PKCS1_2.1] - 6.2.1, as a call to ::CC_RsaPrimDecrypt,
+since the signature primitive is identical to the decryption primitive.
+*/
+#define CC_RsaPrimSign CC_RsaPrimDecrypt
+
+/*!
+@brief Implements the RSAVP1 algorithm, as defined in [PKCS1_2.1] - 6.2.2, as a call to ::CC_RsaPrimEncrypt.
+*/
+#define CC_RsaPrimVerify CC_RsaPrimEncrypt
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif /* !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C)) */
+#endif /* _CC_RSA_PRIM_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_schemes.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_schemes.h
new file mode 100644
index 0000000..48bf7e6
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_schemes.h
@@ -0,0 +1,526 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_RSA_SCHEMES_H
+#define _CC_RSA_SCHEMES_H
+
+#ifdef CC_IOT
+ #if defined(MBEDTLS_CONFIG_FILE)
+ #include MBEDTLS_CONFIG_FILE
+ #endif
+#endif
+
+#if !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C))
+
+#include "cc_error.h"
+#include "cc_rsa_types.h"
+#include "cc_rnd_common.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*!
+@file
+@brief This file defines APIs that support Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5
+and Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1 encryption and signature schemes.
+@defgroup cc_rsa_schemes CryptoCell RSA encryption and signature schemes
+@{
+@ingroup cc_rsa
+*/
+
+/**********************************************************************************************************/
+/*!
+@brief This function implements the Encrypt algorithm, as defined in Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications
+Version 2.1 and Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5.
+
+It should not be called directly. Instead, use macros ::CC_RsaOaepEncrypt or ::CC_RsaPkcs1V15Encrypt.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h, cc_rnd_error.h or cc_hash_error.h on failure.
+*/
+CIMPORT_C CCError_t CC_RsaSchemesEncrypt(
+ CCRndContext_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
+ CCRsaUserPubKey_t *UserPubKey_ptr, /*!< [in] Pointer to the public key data structure. */
+ CCRsaPrimeData_t *PrimeData_ptr, /*!< [in] Pointer to a temporary structure that is internally used as workspace for the
+ Encryption operation. */
+ CCRsaHashOpMode_t hashFunc, /*!< [in] The HASH function to be used. One of the supported SHA-x HASH modes, as defined
+ in ::CCRsaHashOpMode_t (MD5 is not supported).*/
+ uint8_t *L, /*!< [in] The label input pointer. Relevant for Public-Key Cryptography Standards (PKCS) #1 RSA
+ Cryptography Specifications Version 2.1 only. NULL by default.
+ NULL for Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5. */
+ size_t Llen, /*!< [in] The label length. Relevant for Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography
+ Specifications Version 2.1 only. Zero by default. Must be <=2048. Zero for Public-Key Cryptography
+ Standards (PKCS) #1: RSA Encryption Standard Version 1.5. */
+ CCPkcs1Mgf_t MGF, /*!< [in] The mask generation function. [PKCS1_2.1] defines MGF1, so the only value
+ allowed here is CC_PKCS1_MGF1. */
+ uint8_t *DataIn_ptr, /*!< [in] Pointer to the data to encrypt. */
+ size_t DataInSize, /*!< [in] The size (in bytes) of the data to encrypt. The data size must be:
+ <ul><li>For Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications
+ Version 2.1, DataSize <= modulus size - 2*HashLen - 2.</li>
+ <li>For Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5,
+ DataSize <= modulus size - 11.</li></ul> */
+ uint8_t *Output_ptr, /*!< [out] Pointer to the encrypted data. The buffer must be at least modulus size bytes long. */
+ CCPkcs1Version_t PKCS1_ver /*!< [in] Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5 or
+ Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1,
+ according to the functionality required. */
+);
+
+/*!
+ @brief CC_RsaOaepEncrypt implements the RSAES-OAEP algorithm
+ as defined in section 8.1 of Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1.
+
+ \note It is not recommended to use hash MD5 in Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography
+ Specifications Version 2.1, therefore it is not supported.
+
+ This function combines the RSA encryption primitive and the
+ EME-OAEP encoding method, to provide an RSA-based encryption
+ method that is semantically secure against adaptive
+ chosen-ciphertext attacks. For additional details, see Public-Key Cryptography Standards
+ (PKCS) #1 RSA Cryptography Specifications Version 2.1.
+*/
+#define CC_RsaOaepEncrypt(rndContext_ptr, UserPubKey_ptr,PrimeData_ptr,HashMode,L,Llen,MGF,Data_ptr,DataSize,Output_ptr)\
+ CC_RsaSchemesEncrypt(rndContext_ptr, UserPubKey_ptr,PrimeData_ptr,HashMode,L,Llen,MGF,Data_ptr,DataSize,Output_ptr,CC_PKCS1_VER21)
+
+/*!
+ @brief
+ CC_RsaPkcs1V15Encrypt implements the RSAES-PKCS1v15 algorithm
+ as defined in section 8.2 of Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1.
+*/
+#define CC_RsaPkcs1V15Encrypt(rndContext_ptr, UserPubKey_ptr,PrimeData_ptr,DataIn_ptr,DataInSize,Output_ptr)\
+ CC_RsaSchemesEncrypt(rndContext_ptr, UserPubKey_ptr,PrimeData_ptr,CC_RSA_HASH_NO_HASH_mode,NULL,0,CC_PKCS1_NO_MGF,DataIn_ptr,DataInSize, Output_ptr,CC_PKCS1_VER15)
+
+
+/**********************************************************************************************************/
+/*!
+@brief This function implements the Decrypt algorithm, as defined in Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1 and
+Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5.
+
+It should not be called directly. Instead, use macros ::CC_RsaOaepDecrypt or ::CC_RsaPkcs1V15Decrypt.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h or cc_hash_error.h on failure.
+*/
+CIMPORT_C CCError_t CC_RsaSchemesDecrypt(
+ CCRsaUserPrivKey_t *UserPrivKey_ptr, /*!< [in] Pointer to the private-key data structure of the user. */
+ CCRsaPrimeData_t *PrimeData_ptr, /*!< [in] Pointer to a temporary structure that is internally used as workspace
+ for the decryption operation. */
+ CCRsaHashOpMode_t hashFunc, /*!< [in] The HASH function to be used. One of the supported SHA-x HASH modes,
+ as defined in ::CCRsaHashOpMode_t (MD5 is not supported). */
+ uint8_t *L, /*!< [in] The label input pointer. Relevant for Public-Key Cryptography Standards (PKCS) #1
+ RSA Cryptography Specifications Version 2.1 only. NULL by default.
+ NULL for Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard
+ Version 1.5. */
+ size_t Llen, /*!< [in] The label length. Relevant for Public-Key Cryptography Standards (PKCS) #1 RSA
+ Cryptography Specifications Version 2.1 only. Zero by default.
+ Zero for Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard
+ Version 1.5. */
+ CCPkcs1Mgf_t MGF, /*!< [in] The mask generation function. Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography
+ Specifications Version 2.1 defines MGF1, so the only
+ value allowed here is CC_PKCS1_MGF1. */
+ uint8_t *DataIn_ptr, /*!< [in] Pointer to the data to decrypt. */
+ size_t DataInSize, /*!< [in] The size (in bytes) of the data to decrypt. DataSize must be ≤
+ the modulus size. */
+ uint8_t *Output_ptr, /*!< [in] Pointer to the decrypted data. The buffer must be at least
+ PrivKey_ptr->N.len bytes long (i.e. the modulus size in bytes). */
+ size_t *OutputSize_ptr, /*!< [in] Pointer to the byte size of the buffer pointed to by Output_buffer.
+ The size must be:
+ <ul><li> For Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications
+ Version 2.1: Modulus size > OutputSize >= (modulus size - 2*HashLen - 2).</li>
+ <li> For Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5:
+ Modulus size > OutputSize >= (modulus size - 11).
+ The value pointed by OutputSize_ptr is updated after decryption with
+ the actual number of bytes that are loaded to Output_ptr.</li></ul> */
+ CCPkcs1Version_t PKCS1_ver /*!< [in] Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5 or
+ Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1,
+ according to the functionality required. */
+);
+
+/**********************************************************************************************************/
+/**
+ @brief CC_RsaOaepDecrypt implements the RSAES-OAEP algorithm
+ as section 8.1 of Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1.
+
+ \note It is not recommended to use hash MD5 in Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography
+ Specifications Version 2.1, therefore it is not supported.
+
+ This function combines the RSA decryption primitive and the
+ EME-OAEP encoding method, to provide an RSA-based decryption
+ method that is semantically secure against adaptive
+ chosen-ciphertext attacks. For more details, see Public-Key Cryptography Standards
+ (PKCS) #1 RSA Cryptography Specifications Version 2.1.
+
+*/
+#define CC_RsaOaepDecrypt(UserPrivKey_ptr,PrimeData_ptr,HashMode,L,Llen,MGF,Data_ptr,DataSize,Output_ptr,OutputSize_ptr)\
+ CC_RsaSchemesDecrypt(UserPrivKey_ptr,PrimeData_ptr,HashMode,L,Llen,MGF,Data_ptr,DataSize,Output_ptr,OutputSize_ptr,CC_PKCS1_VER21)
+
+
+/**
+ @brief CC_RsaPkcs1V15Decrypt implements the RSAES-PKCS1v15 algorithm as defined
+ in PKCS#1 v2.1 8.2.
+*/
+#define CC_RsaPkcs1V15Decrypt(UserPrivKey_ptr,PrimeData_ptr,DataIn_ptr,DataInSize,Output_ptr,OutputSize_ptr)\
+ CC_RsaSchemesDecrypt(UserPrivKey_ptr,PrimeData_ptr,CC_RSA_HASH_NO_HASH_mode,NULL,0,CC_PKCS1_NO_MGF,DataIn_ptr,DataInSize,Output_ptr,OutputSize_ptr,CC_PKCS1_VER15)
+
+/**********************************************************************************************************/
+/*!
+@brief Implements the Signing algorithm, as defined in Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5
+or Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1, using a single function.
+
+The input data may be either a non-hashed data or a digest of a hash function.
+For a non-hashed data, the input data will be hashed using the hash function indicated by ::CCRsaHashOpMode_t.
+For a digest, ::CCRsaHashOpMode_t should indicate the hash function that the input data was created by, and it will not be hashed.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h, cc_rnd_error.h or cc_hash_error.h on failure.
+*/
+CIMPORT_C CCError_t CC_RsaSign(
+ CCRndContext_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
+ CCRsaPrivUserContext_t *UserContext_ptr, /*!< [in] Pointer to a temporary context for internal use. */
+ CCRsaUserPrivKey_t *UserPrivKey_ptr, /*!< [in] Pointer to the private-key data structure of the user.
+ The representation (pair or quintuple) and hence the algorithm (CRT or not CRT)
+ is determined by the Private Key build function -
+ ::CC_RsaPrivKeyBuild or ::CC_RsaPrivKeyCrtBuild. */
+ CCRsaHashOpMode_t rsaHashMode, /*!< [in] One of the supported SHA-x HASH modes, as defined in ::CCRsaHashOpMode_t.
+ (MD5 is not supported). */
+ CCPkcs1Mgf_t MGF, /*!< [in] The mask generation function. Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications
+ Version 2.1 defines only MGF1, so the only value allowed for it is CC_PKCS1_MGF1. */
+ size_t SaltLen, /*!< [in] The Length of the Salt buffer (relevant for Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography
+ Specifications Version 2.1 only, typically lengths is 0 or hash Len).
+ FIPS Publication 186-4: Digital Signature Standard (DSS) requires, that SaltLen <= hash len.
+ If SaltLen > KeySize - hash Len - 2, the function returns an error. */
+ uint8_t *DataIn_ptr, /*!< [in] Pointer to the input data to be signed.
+ The size of the scatter/gather list representing the data buffer is limited to 128
+ entries, and the size of each entry is limited to 64KB (fragments larger than
+ 64KB are broken into fragments <= 64KB). */
+ size_t DataInSize, /*!< [in] The size (in bytes) of the data to sign. */
+ uint8_t *Output_ptr, /*!< [out] Pointer to the signature. The buffer must be at least PrivKey_ptr->N.len bytes
+ long (i.e. the modulus size in bytes). */
+ size_t *OutputSize_ptr, /*!< [in/out] Pointer to the signature size value - the input value is the signature
+ buffer size allocated, the output value is the signature size used.
+ he buffer must be equal to PrivKey_ptr->N.len bytes long
+ (i.e. the modulus size in bytes). */
+ CCPkcs1Version_t PKCS1_ver /*!< [in] Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5 or Public-Key Cryptography
+ Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1, according to the functionality required. */
+);
+
+
+/*!
+@brief CC_RsaPkcs1V15Sign implements the RSASSA-PKCS1v15 algorithm as defined in Public-Key Cryptography Standards (PKCS) #1:
+RSA Encryption Standard Version 1.5.
+
+This function combines the RSASP1 signature primitive and the EMSA-PKCS1v15 encoding method, to provide an RSA-based signature scheme.
+For more details, see Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5.
+ */
+
+#define CC_RsaPkcs1V15Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,hashFunc,DataIn_ptr,DataInSize,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, (UserContext_ptr),(UserPrivKey_ptr),(hashFunc),(CC_PKCS1_NO_MGF),0,(DataIn_ptr),(DataInSize),(Output_ptr),(OutputSize_ptr),CC_PKCS1_VER15)
+
+
+/*!
+@brief CC_RsaPkcs1V15Sha1Sign implements the RSASSA-PKCS1v15 algorithm as defined in Public-Key Cryptography Standards
+(PKCS) #1: RSA Encryption Standard Version 1.5, but without performing a HASH function -
+it assumes that the data in has already been hashed using SHA-1.
+
+\note The data_in size is already known after the Hash.
+*/
+#define CC_RsaPkcs1V15Sha1Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, (UserContext_ptr),(UserPrivKey_ptr),(CC_RSA_After_SHA1_mode),(CC_PKCS1_NO_MGF),0,(DataIn_ptr),CC_HASH_SHA1_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CC_PKCS1_VER15)
+
+/*!
+@brief CC_RsaPkcs1V15Md5Sign implements the RSASSA-PKCS1v15 algorithm as defined in Public-Key Cryptography Standards (PKCS) #1:
+RSA Encryption Standard Version 1.5, but without performing a HASH function - it assumes that the data in has already been
+hashed using MD5.
+
+\note The data_in size is already known after the Hash.
+*/
+
+#define CC_RsaPkcs1V15Md5Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, (UserContext_ptr),(UserPrivKey_ptr),CC_RSA_After_MD5_mode,CC_PKCS1_NO_MGF,0,(DataIn_ptr),CC_HASH_MD5_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CC_PKCS1_VER15)
+
+
+/*!
+@brief CC_RsaPkcs1V15Sha224Sign implements the RSASSA-PKCS1v15 algorithm as defined in Public-Key Cryptography Standards (PKCS) #1: RSA Encryption
+Standard Version 1.5, but without performing a HASH function -
+it assumes that the data in has already been hashed using SHA-224.
+
+\note The data_in size is already known after the Hash.
+*/
+#define CC_RsaPkcs1V15Sha224Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, (UserContext_ptr),(UserPrivKey_ptr),(CC_RSA_After_SHA224_mode),(CC_PKCS1_NO_MGF),0,(DataIn_ptr),CC_HASH_SHA224_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CC_PKCS1_VER15)
+
+
+/*!
+@brief CC_RsaPkcs1V15Sha256Sign implements the RSASSA-PKCS1v15 algorithm as defined in Public-Key Cryptography Standards (PKCS) #1: RSA Encryption
+Standard Version 1.5, but without performing a HASH function -
+it assumes that the data in has already been hashed using SHA-256.
+
+\note The data_in size is already known after the Hash.
+*/
+#define CC_RsaPkcs1V15Sha256Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, (UserContext_ptr),(UserPrivKey_ptr),(CC_RSA_After_SHA256_mode),(CC_PKCS1_NO_MGF),0,(DataIn_ptr),CC_HASH_SHA256_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CC_PKCS1_VER15)
+
+/*!
+@brief CC_RsaPkcs1V15Sha1Sign implements the RSASSA-PKCS1v15 algorithm as defined in Public-Key Cryptography Standards (PKCS) #1: RSA Encryption
+Standard Version 1.5, but without performing a HASH function -
+it assumes that the data in has already been hashed using SHA-384.
+
+\note The data_in size is already known after the Hash.
+*/
+#define CC_RsaPkcs1V15Sha384Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, (UserContext_ptr),(UserPrivKey_ptr),(CC_RSA_After_SHA384_mode),(CC_PKCS1_NO_MGF),0,(DataIn_ptr),CC_HASH_SHA384_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CC_PKCS1_VER15)
+
+
+/*!
+@brief CC_RsaPkcs1V15Sha512Sign implements the RSASSA-PKCS1v15 algorithm as defined in Public-Key Cryptography Standards (PKCS) #1: RSA Encryption
+Standard Version 1.5, but without performing a HASH function - it assumes that the data in has already been hashed using SHA-512.
+
+\note The data_in size is already known after the Hash.
+*/
+#define CC_RsaPkcs1V15Sha512Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, (UserContext_ptr),(UserPrivKey_ptr),(CC_RSA_After_SHA512_mode),(CC_PKCS1_NO_MGF),0,(DataIn_ptr),CC_HASH_SHA512_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CC_PKCS1_VER15)
+
+
+
+/*!
+@brief CC_RsaPssSign implements the RSASSA-PSS algorithm as defined in section 9.1 of Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications
+Version 2.1, in a single function call.
+
+\note According to the Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1 it is not recommended to use MD5 Hash,
+therefore it is not supported.
+
+The actual macro that is used by the user is ::CC_RsaPssSign.
+*/
+
+#define CC_RsaPssSign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,hashFunc,MGF,SaltLen,DataIn_ptr,DataInSize,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,hashFunc,MGF,SaltLen,DataIn_ptr,DataInSize,Output_ptr,OutputSize_ptr,CC_PKCS1_VER21)
+
+
+/*!
+@brief CC_RsaPssSha1Sign implements the RSASSA-PSS algorithm as defined in section 9.1 of Public-Key Cryptography Standards (PKCS) #1
+RSA Cryptography Specifications Version 2.1 in a single function call, but without performing a HASH function -
+it assumes that the data in has already been hashed using SHA-1.
+
+\note The data_in size is already known after the Hash.
+
+The actual macro that is used by the users is ::CC_RsaPssSha1Sign.
+*/
+
+#define CC_RsaPssSha1Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,MGF,SaltLen,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,CC_RSA_After_SHA1_mode,MGF,SaltLen,DataIn_ptr,CC_HASH_SHA1_DIGEST_SIZE_IN_BYTES,Output_ptr,OutputSize_ptr,CC_PKCS1_VER21)
+
+
+/*!
+@brief CC_RsaPssSha224Sign implements the RSASSA-PSS algorithm as defined in section 9.1 of Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications
+Version 2.1 in a single function call, but without performing a HASH function -
+it assumes that the data in has already been hashed using SHA-224.
+
+\note The data_in size is already known after the Hash.
+
+The actual macro that is used by the users is ::CC_RsaPssSha224Sign.
+*/
+
+#define CC_RsaPssSha224Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,MGF,SaltLen,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,CC_RSA_After_SHA224_mode,MGF,SaltLen,DataIn_ptr,CC_HASH_SHA224_DIGEST_SIZE_IN_BYTES,Output_ptr,OutputSize_ptr,CC_PKCS1_VER21)
+
+
+/*!
+@brief CC_RsaPssSha256Sign implements the RSASSA-PSS algorithm as defined in section 9.1 of Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications
+Version 2.1 in a single function call, but without performing a HASH function -
+it assumes that the data in has already been hashed using SHA-256.
+
+\note The data_in size is already known after the Hash.
+
+The actual macro that is used by the users is ::CC_RsaPssSha256Sign.
+*/
+
+#define CC_RsaPssSha256Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,MGF,SaltLen,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,CC_RSA_After_SHA256_mode,MGF,SaltLen,DataIn_ptr,CC_HASH_SHA256_DIGEST_SIZE_IN_BYTES,Output_ptr,OutputSize_ptr,CC_PKCS1_VER21)
+
+
+/*!
+@brief CC_RsaPssSha384Sign implements the RSASSA-PSS algorithm as defined in section 9.1 of Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications
+Version 2.1 in a single function call, but without performing a HASH function -
+it assumes that the data in has already been hashed using SHA-384.
+
+\note The data_in size is already known after the Hash.
+
+The actual macro that is used by the users is ::CC_RsaPssSha384Sign.
+*/
+
+#define CC_RsaPssSha384Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,MGF,SaltLen,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,CC_RSA_After_SHA384_mode,MGF,SaltLen,DataIn_ptr,CC_HASH_SHA384_DIGEST_SIZE_IN_BYTES,Output_ptr,OutputSize_ptr,CC_PKCS1_VER21)
+
+
+/*!
+@brief CC_RsaPssSha512Sign implements the RSASSA-PSS algorithm as defined in section 9.1 of Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications
+Version 2.1 in a single function call, but without performing a HASH function -
+it assumes that the data in has already been hashed using SHA-512.
+
+\note The data_in size is already known after the Hash.
+
+The actual macro that is used by the users is ::CC_RsaPssSha512Sign.
+*/
+
+#define CC_RsaPssSha512Sign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,MGF,SaltLen,DataIn_ptr,Output_ptr,OutputSize_ptr)\
+ CC_RsaSign(rndContext_ptr, UserContext_ptr,UserPrivKey_ptr,CC_RSA_After_SHA512_mode,MGF,SaltLen,DataIn_ptr,CC_HASH_SHA512_DIGEST_SIZE_IN_BYTES,Output_ptr,OutputSize_ptr,CC_PKCS1_VER21)
+
+
+/**********************************************************************************************************/
+/*!
+@brief Implements the RSA signature verification algorithms, in a single function call, as defined in Public-Key Cryptography Standards (PKCS) #1: RSA Encryption
+Standard Version 1.5 and in Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 2.1.
+
+The input data may be either a non-hashed data or a digest of a hash function.
+For a non-hashed data, the input data will be hashed using the hash function indicated by ::CCRsaHashOpMode_t.
+For a digest, ::CCRsaHashOpMode_t should indicate the hash function that the input data was created by, and it will not be hashed.
+
+@return CC_OK on success.
+@return A non-zero value from cc_rsa_error.h or cc_hash_error.h on failure.
+*/
+
+CIMPORT_C CCError_t CC_RsaVerify(
+ CCRsaPubUserContext_t *UserContext_ptr, /*!< [in] Pointer to a temporary context for internal use. */
+ CCRsaUserPubKey_t *UserPubKey_ptr, /*!< [in] Pointer to the public key data structure of the user. */
+ CCRsaHashOpMode_t rsaHashMode, /*!< [in] One of the supported SHA-x HASH modes, as defined in ::CCRsaHashOpMode_t.
+ (MD5 is not supported). */
+ CCPkcs1Mgf_t MGF, /*!< [in] The mask generation function. Public-Key Cryptography Standards (PKCS) #1 RSA
+ Cryptography Specifications Version 2.1 defines only MGF1, so the only
+ value allowed for it is CC_PKCS1_MGF1. */
+ size_t SaltLen, /*!< [in] The Length of the Salt buffer. Relevant only for Public-Key Cryptography Standards
+ (PKCS) #1 RSA Cryptography Specifications Version 2.1.
+ Typical lengths are 0 or hash Len (20 for SHA-1).
+ The maximum length allowed is [modulus size - hash Len - 2]. */
+ uint8_t *DataIn_ptr, /*!< [in] Pointer to the input data to be verified.
+ The size of the scatter/gather list representing the data buffer is
+ limited to 128 entries, and the size of each entry is limited to 64KB
+ (fragments larger than 64KB are broken into fragments <= 64KB). */
+ size_t DataInSize, /*!< [in] The size (in bytes) of the data whose signature is to be verified. */
+ uint8_t *Sig_ptr, /*!< [in] Pointer to the signature to be verified.
+ The length of the signature is PubKey_ptr->N.len bytes
+ (i.e. the modulus size in bytes). */
+ CCPkcs1Version_t PKCS1_ver /*!< [in] Public-Key Cryptography Standards (PKCS) #1: RSA Encryption Standard Version 1.5 or
+ Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version
+ 2.1, according to the functionality required. */
+);
+/*!
+@brief CRYS_RSA_PKCS1v15_Verify implements the Public-Key Cryptography Standards (PKCS) #1: RSA Encryption
+Standard Version 1.5 Verify algorithm.
+*/
+#define CC_RsaPkcs1V15Verify(UserContext_ptr,UserPubKey_ptr,hashFunc,DataIn_ptr,DataInSize,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,hashFunc,CC_PKCS1_NO_MGF,0,DataIn_ptr,DataInSize,Sig_ptr,CC_PKCS1_VER15)
+
+
+/*!
+@brief CC_RsaPkcs1V15Md5Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
+it assumes the DataIn_ptr data has already been hashed using MD5.
+*/
+
+#define CC_RsaPkcs1V15Md5Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_MD5_mode,CC_PKCS1_NO_MGF,0,DataIn_ptr,CC_HASH_MD5_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER15)
+
+
+/*!
+@brief CC_RsaPkcs1V15Sha1Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
+it assumes that the DataIn_ptr data has already been hashed using SHA1.
+
+*/
+#define CC_RsaPkcs1V15Sha1Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_SHA1_mode,CC_PKCS1_NO_MGF,0,DataIn_ptr,CC_HASH_SHA1_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER15)
+
+/*!
+@brief CC_RsaPkcs1V15Sha224Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
+it assumes that the DataIn_ptr data has already been hashed using SHA224.
+
+*/
+#define CC_RsaPkcs1V15Sha224Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_SHA224_mode,CC_PKCS1_NO_MGF,0,DataIn_ptr,CC_HASH_SHA224_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER15)
+
+/*!
+@brief CC_RsaPkcs1V15Sha256Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
+it assumes that the DataIn_ptr data has already been hashed using SHA256.
+
+*/
+#define CC_RsaPkcs1V15Sha256Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_SHA256_mode,CC_PKCS1_NO_MGF,0,DataIn_ptr,CC_HASH_SHA256_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER15)
+
+/*!
+@brief CC_RsaPkcs1V15Sha384Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
+it assumes that the DataIn_ptr data has already been hashed using SHA384.
+
+*/
+#define CC_RsaPkcs1V15Sha384Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_SHA384_mode,CC_PKCS1_NO_MGF,0,DataIn_ptr,CC_HASH_SHA384_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER15)
+
+/*!
+@brief CC_RsaPkcs1V15Sha512Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
+it assumes that the DataIn_ptr data has already been hashed using SHA512.
+
+*/
+#define CC_RsaPkcs1V15Sha512Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_SHA512_mode,CC_PKCS1_NO_MGF,0,DataIn_ptr,CC_HASH_SHA512_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER15)
+
+/*!
+@brief CC_RsaPssVerify implements the RSASSA-PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1.
+*/
+
+#define CC_RsaPssVerify(UserContext_ptr,UserPubKey_ptr,hashFunc,MGF,SaltLen,DataIn_ptr,DataInSize,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,hashFunc,MGF,SaltLen,DataIn_ptr,DataInSize,Sig_ptr,CC_PKCS1_VER21)
+
+/*!
+@brief CC_RsaPssSha1Verify implements the PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1, but without operating the HASH function -
+it assumes the DataIn_ptr has already been hashed using SHA1.
+*/
+
+#define CC_RsaPssSha1Verify(UserContext_ptr,UserPubKey_ptr,MGF,SaltLen,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_SHA1_mode,MGF,SaltLen,DataIn_ptr,CC_HASH_SHA1_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER21)
+/*!
+@brief CC_RsaPssSha224Verify implements the PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1, but without operating the HASH function -
+it assumes the DataIn_ptr has already been hashed using SHA224.
+*/
+
+#define CC_RsaPssSha224Verify(UserContext_ptr,UserPubKey_ptr,MGF,SaltLen,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_SHA224_mode,MGF,SaltLen,DataIn_ptr,CC_HASH_SHA224_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER21)
+
+/*!
+@brief CC_RsaPssSha256Verify implements the PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1, but without operating the HASH function -
+it assumes the DataIn_ptr has already been hashed using SHA256.
+*/
+
+#define CC_RsaPssSha256Verify(UserContext_ptr,UserPubKey_ptr,MGF,SaltLen,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_SHA256_mode,MGF,SaltLen,DataIn_ptr,CC_HASH_SHA256_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER21)
+
+
+/*!
+@brief CC_RsaPssSha384Verify implements the PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1, but without operating the HASH function -
+it assumes the DataIn_ptr has already been hashed using SHA384.
+
+*/
+
+#define CC_RsaPssSha384Verify(UserContext_ptr,UserPubKey_ptr,MGF,SaltLen,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_SHA384_mode,MGF,SaltLen,DataIn_ptr,CC_HASH_SHA384_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER21)
+
+
+/*!
+@brief CC_RsaPssSha512Verify implements the PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1, but without operating the HASH function -
+it assumes the DataIn_ptr has already been hashed using SHA512.
+*/
+
+#define CC_RsaPssSha512Verify(UserContext_ptr,UserPubKey_ptr,MGF,SaltLen,DataIn_ptr,Sig_ptr)\
+ CC_RsaVerify(UserContext_ptr,UserPubKey_ptr,CC_RSA_After_SHA512_mode,MGF,SaltLen,DataIn_ptr,CC_HASH_SHA512_DIGEST_SIZE_IN_BYTES,Sig_ptr,CC_PKCS1_VER21)
+
+/**********************************************************************************************************/
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif /* !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C)) */
+#endif /* _CC_RSA_SCHEMES_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_types.h b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_types.h
new file mode 100644
index 0000000..f40c0a8
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/crypto_api/cc_rsa_types.h
@@ -0,0 +1,573 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_RSA_TYPES_H
+#define _CC_RSA_TYPES_H
+
+#include "cc_hash_defs.h"
+#include "cc_bitops.h"
+#include "cc_pka_defs_hw.h"
+#include "cc_pal_types.h"
+#include "cc_pal_compiler.h"
+
+#ifdef CC_SOFT_KEYGEN
+#include "ccsw_rsa_shared_types.h"
+#endif
+#ifdef USE_MBEDTLS_CRYPTOCELL
+#include "md.h"
+#else
+#include "cc_hash.h"
+#endif
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/*!
+@file
+@@brief This file contains all the enums and definitions that are used for the CryptoCell RSA APIs.
+@defgroup cc_rsa_types CryptoCell RSA used definitions and enums
+@{
+@ingroup cc_rsa
+*/
+
+/************************ Defines ******************************/
+
+/*! Definition of HASH context size. */
+#define CC_PKA_RSA_HASH_CTX_SIZE_IN_WORDS CC_HASH_USER_CTX_SIZE_IN_WORDS
+
+/*! Maximal key size in bytes. */
+#define CC_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BYTES (CC_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS / CC_BITS_IN_BYTE)
+
+/*! Minimal key size in bits. */
+#define CC_RSA_MIN_VALID_KEY_SIZE_VALUE_IN_BITS 512
+/*! Valid key size multiplications in RSA. */
+#define CC_RSA_VALID_KEY_SIZE_MULTIPLE_VALUE_IN_BITS 256
+
+/*! Maximal RSA generated key size in bits. */
+#define CC_RSA_MAX_KEY_GENERATION_SIZE_BITS CC_RSA_MAX_KEY_GENERATION_HW_SIZE_BITS
+
+/* FIPS 184-4 definitions for allowed RSA and FFC DH key sizes */
+/*! FIPS 184-4 allowed key size - 1024 bits. */
+#define CC_RSA_FIPS_KEY_SIZE_1024_BITS 1024
+/*! FIPS 184-4 allowed key size - 2048 bits. */
+#define CC_RSA_FIPS_KEY_SIZE_2048_BITS 2048
+/*! FIPS 184-4 allowed key size - 3072 bits. */
+#define CC_RSA_FIPS_KEY_SIZE_3072_BITS 3072
+/*! FIPS 184-4 allowed modulus size in bits. */
+#define CC_RSA_FIPS_MODULUS_SIZE_BITS CC_RSA_FIPS_KEY_SIZE_2048_BITS
+
+/*! FIPS 184-4 DH key size - 1024 bits. */
+#define CC_DH_FIPS_KEY_SIZE_1024_BITS 1024
+/*! FIPS 184-4 DH key size - 2048 bits. */
+#define CC_DH_FIPS_KEY_SIZE_2048_BITS 2048
+
+
+/*! Salt length definition - if the salt length is not available in verify operation, the user can use this define and the algorithm will
+ calculate the salt length alone*/
+/*!\note Security wise: it is not recommended to use this flag.*/
+#define CC_RSA_VERIFY_SALT_LENGTH_UNKNOWN 0xFFFF
+
+/*! Minimal public exponent value */
+#define CC_RSA_MIN_PUB_EXP_VALUE 3
+/*! Minimal private exponent value */
+#define CC_RSA_MIN_PRIV_EXP_VALUE 1
+
+/* The maximum buffer size for the 'H' value */
+/*! Temporary buffer size definition.*/
+#define CC_RSA_TMP_BUFF_SIZE (CC_RSA_OAEP_ENCODE_MAX_MASKDB_SIZE + CC_RSA_OAEP_ENCODE_MAX_SEEDMASK_SIZE + CC_PKA_RSA_HASH_CTX_SIZE_IN_WORDS*sizeof(uint32_t) + sizeof(CCHashResultBuf_t))
+
+/*! Hash structure definition.*/
+#define CCPkcs1HashFunc_t CCHashOperationMode_t
+
+/*! OAEP maximal H length.*/
+#define CC_RSA_OAEP_MAX_HLEN CC_HASH_SHA512_DIGEST_SIZE_IN_BYTES
+
+/*! MGF1 definitions */
+#define CC_RSA_MGF_2_POWER_32 65535 /*!< \internal 0xFFFF This is the 2^32 of the 2^32*hLen boundary check */
+/*! MGF1 definitions */
+#define CC_RSA_SIZE_OF_T_STRING_BYTES (CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS*sizeof(uint32_t))
+
+/***********************************************************
+ *
+ * RSA PKCS#1 v2.1 DEFINES
+ *
+ ***********************************************************/
+ /*! Size of OEAP seed. */
+#define CC_RSA_OAEP_ENCODE_MAX_SEEDMASK_SIZE CC_RSA_OAEP_MAX_HLEN
+/*! Maximal PSS salt size. */
+#define CC_RSA_PSS_SALT_LENGTH CC_RSA_OAEP_MAX_HLEN
+/*! PSS padding length. */
+#define CC_RSA_PSS_PAD1_LEN 8
+/*! OAEP encode mask size. */
+#define CC_RSA_OAEP_ENCODE_MAX_MASKDB_SIZE (CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS*sizeof(uint32_t)) /*!< \internal For OAEP Encode; the max size is emLen */
+/*! OAEP decode mask size. */
+#define CC_RSA_OAEP_DECODE_MAX_DBMASK_SIZE (CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS*sizeof(uint32_t)) /*!< \internal For OAEP Decode; the max size is emLen */
+
+/************************ Enums ********************************/
+
+/*! Defines the enum for the HASH operation mode. */
+typedef enum
+{
+ CC_RSA_HASH_MD5_mode = 0, /*!< For Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 1.5 only.
+ The input data will be hashed with MD5 */
+ CC_RSA_HASH_SHA1_mode = 1, /*!< The input data will be hashed with SHA1. */
+ CC_RSA_HASH_SHA224_mode = 2, /*!< The input data will be hashed with SHA224. */
+ CC_RSA_HASH_SHA256_mode = 3, /*!< The input data will be hashed with SHA256. */
+ CC_RSA_HASH_SHA384_mode = 4, /*!< The input data will be hashed with SHA384. */
+ CC_RSA_HASH_SHA512_mode = 5, /*!< The input data will be hashed with SHA512. */
+ CC_RSA_After_MD5_mode = 6, /*!< For PKCS1 v1.5 only. The input data is a digest of MD5 and will not be hashed. */
+ CC_RSA_After_SHA1_mode = 7, /*!< The input data is a digest of SHA1 and will not be hashed. */
+ CC_RSA_After_SHA224_mode = 8, /*!< The input data is a digest of SHA224 and will not be hashed. */
+ CC_RSA_After_SHA256_mode = 9, /*!< The input data is a digest of SHA256 and will not be hashed. */
+ CC_RSA_After_SHA384_mode = 10, /*!< The input data is a digest of SHA384 and will not be hashed. */
+ CC_RSA_After_SHA512_mode = 11, /*!< The input data is a digest of SHA512 and will not be hashed. */
+ CC_RSA_After_HASH_NOT_KNOWN_mode = 12, /*!< \internal used only for Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 1.5 -
+ possible to perform verify operation without hash mode input,
+ the hash mode is derived from the signature.*/
+ CC_RSA_HASH_NO_HASH_mode = 13, /*!< Used for Public-Key Cryptography Standards (PKCS) #1 RSA Cryptography Specifications Version 1.5 Encrypt and Decrypt.*/
+ CC_RSA_HASH_NumOfModes, /*!< Maximal number of hash operations modes. */
+
+ CC_RSA_HASH_OpModeLast = 0x7FFFFFFF, /*! Reserved.*/
+
+}CCRsaHashOpMode_t;
+
+
+/*! Defines the enum of the RSA decryption mode. */
+typedef enum
+{
+ CC_RSA_NoCrt = 10, /*!< Decryption no CRT mode.*/
+ CC_RSA_Crt = 11, /*!< Decryption CRT mode.*/
+
+ CC_RSADecryptionNumOfOptions, /*! Reserved.*/
+
+ CC_RSA_DecryptionModeLast= 0x7FFFFFFF, /*! Reserved.*/
+
+}CCRsaDecryptionMode_t;
+
+/*! RSA Key source definition. */
+typedef enum
+{
+ CC_RSA_ExternalKey = 1, /*!< External key.*/
+ CC_RSA_InternalKey = 2, /*!< Internal key.*/
+
+ CC_RSA_KeySourceLast= 0x7FFFFFFF, /*!< Reserved. */
+
+}CCRsaKeySource_t;
+
+/*! MGF values. */
+typedef enum
+{
+ CC_PKCS1_MGF1 = 0, /*! MGF1. */
+ CC_PKCS1_NO_MGF = 1, /*! No MGF. */
+ CC_RSA_NumOfMGFFunctions, /*! Maximal number of MGF options. */
+
+ CC_PKCS1_MGFLast= 0x7FFFFFFF, /*! Reserved.*/
+
+}CCPkcs1Mgf_t;
+
+/*! Defines the enum of the various PKCS1 versions. */
+typedef enum
+{
+ CC_PKCS1_VER15 = 0, /*! PKCS1 version 15. */
+ CC_PKCS1_VER21 = 1, /*! PKCS1 version 21. */
+
+ CC_RSA_NumOf_PKCS1_versions, /*! Maximal number of PKCS versions. */
+
+ CC_PKCS1_versionLast= 0x7FFFFFFF, /*! Reserved.*/
+
+}CCPkcs1Version_t;
+
+
+/*! Enum defining primality testing mode in Rabin-Miller
+ and Lucas-Lehmer tests (internal tests). */
+typedef enum
+{
+ /* P and Q primes */
+ CC_RSA_PRIME_TEST_MODE = 0, /*!< PRIME test. */
+
+ /* FFC (DH, DSA) primes */
+ CC_DH_PRIME_TEST_MODE = 1, /*!< DH Prime test. */
+
+ CC_RSA_DH_PRIME_TEST_OFF_MODE /*!< Reserved.*/
+
+}CCRsaDhPrimeTestMode_t;
+
+/************************ Public and private key database Structs ******************************/
+
+/* .................. The public key definitions ...................... */
+/* --------------------------------------------------------------------- */
+
+/*! Public key data structure (used internally). */
+typedef struct
+{
+ /*! RSA modulus buffer. */
+ uint32_t n[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
+ /*! RSA modulus size in bits. */
+ uint32_t nSizeInBits;
+
+ /*! RSA public exponent buffer. */
+ uint32_t e[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
+ /*! RSA public exponent buffer. */
+ uint32_t eSizeInBits;
+
+ /*! Buffer for internal usage.*/
+ uint32_t ccRSAIntBuff[CC_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS];
+
+}CCRsaPubKey_t;
+
+/*! The public key's user structure prototype. This structure must be saved by the user, and is used as input to the RSA functions
+(such as ::CC_RsaSchemesEncrypt etc.) */
+typedef struct CCRsaUserPubKey_t
+{
+ /*! Validation tag. */
+ uint32_t valid_tag;
+ /*! Public key data. */
+ uint32_t PublicKeyDbBuff[ sizeof(CCRsaPubKey_t)/sizeof(uint32_t) + 1 ];
+
+
+}CCRsaUserPubKey_t;
+
+/* .................. The private key definitions ...................... */
+/* --------------------------------------------------------------------- */
+
+/*! Private key on non-CRT mode data structure (used internally). */
+typedef struct
+{
+ /*! RSA private exponent buffer. */
+ uint32_t d[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
+ /*! RSA private exponent size in bits. */
+ uint32_t dSizeInBits;
+
+ /*! RSA public exponent buffer. */
+ uint32_t e[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
+ /*! RSA public exponent size in bits. */
+ uint32_t eSizeInBits;
+
+}CCRsaPrivNonCrtKey_t;
+
+/*! Private key on CRT mode data structure (used internally). */
+/* use small CRT buffers */
+typedef struct
+{
+ /*! First factor buffer. */
+ uint32_t P[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS/2];
+ /*! First factor size in bits. */
+ uint32_t PSizeInBits;
+
+ /*! Second factor buffer. */
+ uint32_t Q[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS/2];
+ /*! Second factor size in bits. */
+ uint32_t QSizeInBits;
+
+ /*! First CRT exponent buffer. */
+ uint32_t dP[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS/2];
+ /*! First CRT exponent size in bits. */
+ uint32_t dPSizeInBits;
+
+ /*! Second CRT exponent buffer. */
+ uint32_t dQ[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS/2];
+ /*! Second CRT exponent size in bits. */
+ uint32_t dQSizeInBits;
+
+ /*! First CRT coefficient buffer. */
+ uint32_t qInv[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS/2];
+ /*! First CRT coefficient size in bits. */
+ uint32_t qInvSizeInBits;
+
+}CCRsaPrivCrtKey_t;
+
+
+/*! Private key data structure (used internally). */
+typedef struct
+{
+ /*! RSA modulus buffer. */
+ uint32_t n[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
+ /*! RSA modulus size in bits. */
+ uint32_t nSizeInBits;
+
+ /*! Decryption operation mode. */
+ CCRsaDecryptionMode_t OperationMode;
+
+ /*! Key source ( internal or external ). */
+ CCRsaKeySource_t KeySource;
+
+
+ /*! Union between the CRT and non-CRT data structures. */
+ union
+ {
+ CCRsaPrivNonCrtKey_t NonCrt; /*!< Non CRT data structure. */
+ CCRsaPrivCrtKey_t Crt; /*!< CRT data structure. */
+ }PriveKeyDb;
+
+ /*! Internal buffer. */
+ uint32_t ccRSAPrivKeyIntBuff[CC_PKA_PRIV_KEY_BUFF_SIZE_IN_WORDS];
+
+}CCRsaPrivKey_t;
+
+/*! The private key's user structure prototype. This structure must be saved by the user, and is used as input to the RSA functions
+(such as ::CC_RsaSchemesDecrypt etc.). */
+typedef struct CCRsaUserPrivKey_t
+{
+ /*! Validation tag.*/
+ uint32_t valid_tag;
+ /*! Private key data. */
+ uint32_t PrivateKeyDbBuff[ sizeof(CCRsaPrivKey_t)/sizeof(uint32_t) + 1 ] ;
+
+}CCRsaUserPrivKey_t;
+
+/*! Temporary buffers for RSA usage. */
+typedef struct CCRsaPrimeData_t
+{
+ /* The aligned input and output data buffers */
+ uint32_t DataIn[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS]; /*!< Temporary buffer for data in.*/
+ uint32_t DataOut[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS]; /*!< Temporary buffer for data out.*/
+ /*! Temporary buffer for internal data.*/
+ uint8_t InternalBuff[CC_RSA_TMP_BUFF_SIZE] CC_PAL_COMPILER_ALIGN (4);
+
+}CCRsaPrimeData_t;
+
+/*! KG data type. */
+typedef union CCRsaKgData_t
+{
+ /*! RSA Key Generation buffers definitions. */
+ struct
+ {
+ /* The aligned input and output data buffers */
+ /*! First factor buffer. */
+ uint32_t p[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS / 2];
+ /*! Second factor buffer. */
+ uint32_t q[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS / 2];
+ union {
+ /*! Internal buffer. */
+ uint32_t ccRSAKGDataIntBuff[CC_PKA_KGDATA_BUFF_SIZE_IN_WORDS];
+ #ifdef CC_SOFT_KEYGEN
+ /* # added for compatibility with size of KGData SW type */
+ uint32_t TempbuffExp[PKI_KEY_GEN_TEMP_BUFF_SIZE_WORDS];
+ #endif
+ }kg_buf;
+ }KGData;
+
+ /*! Buffers for internal usage. */
+ union {
+ /*! Internally used buffer.*/
+ struct {
+ CCRsaPrimeData_t PrimData;
+ }primExt;
+ #ifdef CC_SOFT_KEYGEN
+ /* # added for compatibility with size of SW CCRsaPrivKey_t type */
+ SwSharedRSAPrimeData_t SW_Shared_PrimData;
+ #endif
+ }prim;
+}CCRsaKgData_t;
+
+ /*************
+ * RSA contexts
+ **************/
+/************************ CryptoCell RSA struct for Private Key ******************************/
+
+
+/*! Context definition for operations that use the RSA private key. */
+typedef struct
+{
+
+ /*! Private key data. */
+ CCRsaUserPrivKey_t PrivUserKey;
+
+ /*! RSA PKCS#1 Version 1.5 or 2.1 */
+ uint8_t PKCS1_Version;
+
+ /*! MGF to be used for the PKCS1 Ver 2.1 sign or verify operations. */
+ uint8_t MGF_2use;
+
+ /*! Salt random length for PKCS#1 PSS Ver 2.1*/
+ uint16_t SaltLen;
+
+ /*! Internal buffer. */
+ CCRsaPrimeData_t PrimeData;
+
+ /*! HASH context buffer. */
+#ifdef USE_MBEDTLS_CRYPTOCELL
+ mbedtls_md_context_t RsaHashCtx;
+#else
+ uint32_t RsaHashCtxBuff[CC_PKA_RSA_HASH_CTX_SIZE_IN_WORDS];
+#endif
+
+ /*! HASH result buffer. */
+ CCHashResultBuf_t HASH_Result;
+ /*! HASH result size in words. */
+ uint16_t HASH_Result_Size;
+ /*! RSA HASH operation mode (all modes RSA supports).*/
+ CCRsaHashOpMode_t RsaHashOperationMode;
+ /*! HASH operation mode.*/
+ CCHashOperationMode_t HashOperationMode;
+ /*! HASH block size (in words).*/
+ uint16_t HashBlockSize;
+ /*! HASH flag. */
+ bool doHash;
+
+ /* Used for sensitive data manipulation in the context space, which is safer and which saves stack space */
+ /*! Internal buffer.*/
+ uint32_t EBD[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
+ /*! Internal bufffer used size in bits. */
+ uint32_t EBDSizeInBits;
+
+ /* Used for sensitive data manipulation in the context space, which is safer and which saves stack space */
+ /*! Internal buffer.*/
+ uint8_t T_Buf[CC_RSA_SIZE_OF_T_STRING_BYTES];
+ /*! Internal buffer used size.*/
+ uint16_t T_BufSize;
+
+ /*! Buffer for the use of the Ber encoder in the case of PKCS#1 Ver 1.5. */
+ uint32_t BER[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
+ /*! Ber encoder buffer size.*/
+ uint16_t BERSize;
+
+ /*! Internal buffer.*/
+ uint8_t DummyBufAESBlockSize[16];
+
+}RSAPrivContext_t;
+
+/*! The user's context prototype - the argument type that is passed by the user
+ to the RSA APIs. The context saves the state of the operation and must be saved by the user
+ till the end of the APIs flow . */
+typedef struct CCRsaPrivUserContext_t
+{
+ /*! Validation tag. */
+ uint32_t valid_tag;
+ /*! Internally used value.*/
+ uint32_t AES_iv;
+ /*! Private data context buffer. */
+ uint8_t context_buff[ sizeof(RSAPrivContext_t) + sizeof(uint32_t)] CC_PAL_COMPILER_ALIGN (4); /* must be aligned to 4 */
+
+}CCRsaPrivUserContext_t;
+
+
+/************************ CryptoCell RSA struct for Public Key ******************************/
+
+/*! Context definition for operations that use the RSA public key. */
+typedef struct
+{
+
+ /*! RSA public key structure. */
+ CCRsaUserPubKey_t PubUserKey;
+
+ /*! Public key size in bytes */
+ uint32_t nSizeInBytes;
+
+ /*! RSA PKCS#1 Version 1.5 or 2.1 */
+ uint8_t PKCS1_Version;
+
+ /*! MGF to be used for the PKCS1 Ver 2.1 Sign or Verify operations */
+ uint8_t MGF_2use;
+
+ /*! Salt random length for PKCS#1 PSS Ver 2.1*/
+ uint16_t SaltLen;
+
+ /*! Internal buffer. */
+ CCRsaPrimeData_t PrimeData;
+
+ /*! HASH context. */
+#ifdef USE_MBEDTLS_CRYPTOCELL
+ mbedtls_md_context_t RsaHashCtx;
+#else
+ uint32_t RsaHashCtxBuff[CC_PKA_RSA_HASH_CTX_SIZE_IN_WORDS];
+#endif
+ /*! HASH result buffer. */
+ CCHashResultBuf_t HASH_Result;
+ /*! HASH result size. */
+ uint16_t HASH_Result_Size; /* denotes the length, in words, of the hash function output */
+ /*! RSA HASH operation mode (all modes RSA supports). */
+ CCRsaHashOpMode_t RsaHashOperationMode;
+ /*! HASH operation mode. */
+ CCHashOperationMode_t HashOperationMode;
+ /*! HASH block size. */
+ uint16_t HashBlockSize; /*in words*/
+ /*! HASH flag.*/
+ bool doHash;
+
+ /* Used for sensitive data manipulation in the context space, which is safer and which saves stack space */
+ /*! Internal buffer.*/
+ uint32_t EBD[CC_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
+ /*! Internal bufffer used size in bits. */
+ uint32_t EBDSizeInBits;
+
+ /* Used for sensitive data manipulation in the context space, which is safer and which saves stack space */
+ /*! Internal buffer.*/
+ uint8_t T_Buf[CC_RSA_SIZE_OF_T_STRING_BYTES];
+ /*! Internal buffer used size.*/
+ uint16_t T_BufSize;
+
+ /*! Internal buffer.*/
+ uint8_t DummyBufAESBlockSize[16];
+
+}RSAPubContext_t;
+
+
+/*! Temporary buffers for the RSA usage. */
+typedef struct CCRsaPubUserContext_t
+{
+ /*! Validation tag. */
+ uint32_t valid_tag;
+ /*! Internally used value.*/
+ uint32_t AES_iv;
+ /*! Public data context buffer. */
+ uint32_t context_buff[ sizeof(RSAPubContext_t)/sizeof(uint32_t) + 1] ;
+
+}CCRsaPubUserContext_t;
+
+
+
+/*! Required for internal FIPS verification for RSA key generation. */
+typedef struct CCRsaKgFipsContext_t{
+ /*! Internal buffer. */
+ CCRsaPrimeData_t primData;
+ /*! Buffer used for decryption. */
+ uint8_t decBuff[((CC_RSA_MIN_VALID_KEY_SIZE_VALUE_IN_BITS/CC_BITS_IN_BYTE) - 2*(CC_HASH_SHA1_DIGEST_SIZE_IN_BYTES) -2)];
+ /*! Buffer used for encryption. */
+ uint8_t encBuff[CC_RSA_FIPS_MODULUS_SIZE_BITS/CC_BITS_IN_BYTE];
+}CCRsaKgFipsContext_t;
+
+/*! Required for internal FIPS verification for RSA KAT. The RSA KAT tests are defined for Public-Key Cryptography Standards (PKCS) #1 RSA*
+ Cryptography Specifications Version 2.1 with modulus key size of 2048. */
+typedef struct CCRsaFipsKatContext_t{
+ /*! RSA user's key (either public or private).*/
+ union {
+ /*! RSA user's public key. */
+ CCRsaUserPubKey_t userPubKey; // used for RsaEnc and RsaVerify
+ /*! RSA user's private key. */
+ CCRsaUserPrivKey_t userPrivKey; // used for RsaDec and RsaSign
+ }userKey;
+ /*! RSA user's context (either public or private).*/
+ union {
+ /*! RSA user's private context. */
+ CCRsaPrivUserContext_t userPrivContext; // used for RsaSign
+ /*! RSA public user's context. */
+ CCRsaPubUserContext_t userPubContext; // used for RsaVerify
+ /*! Internal buffers. */
+ CCRsaPrimeData_t primData; // used for RsaEnc and RsaDec
+ }userContext;
+ /*! RSA user's data. */
+ union {
+ struct { // used for RsaEnc and RsaDec
+ /*! Buffer for encrypted data. */
+ uint8_t encBuff[CC_RSA_FIPS_MODULUS_SIZE_BITS/CC_BITS_IN_BYTE];
+ /*! Buffer for decrypted data. */
+ uint8_t decBuff[((CC_RSA_FIPS_MODULUS_SIZE_BITS/CC_BITS_IN_BYTE) - 2*(CC_HASH_SHA1_DIGEST_SIZE_IN_BYTES) -2)];
+ }userOaepData;
+ /*! Buffer for Signed data. */
+ uint8_t signBuff[CC_RSA_FIPS_MODULUS_SIZE_BITS/CC_BITS_IN_BYTE]; // used for RsaSign and RsaVerify
+ }userData;
+}CCRsaFipsKatContext_t;
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/aes_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/aes_alt.h
new file mode 100644
index 0000000..5323543
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/aes_alt.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_AES_ALT_H
+#define MBEDTLS_AES_ALT_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* padlock.c and aesni.c rely on these values! */
+#define MBEDTLS_AES_ENCRYPT 1 /**< AES encryption. */
+#define MBEDTLS_AES_DECRYPT 0 /**< AES decryption. */
+
+/* Error codes in range 0x0020-0x0022 */
+#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH -0x0020 /**< Invalid key length. */
+#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH -0x0022 /**< Invalid data input length. */
+
+/* Error codes in range 0x0023-0x0025 */
+#define MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE -0x0023 /**< Feature not available. For example, an unsupported AES key size. */
+#define MBEDTLS_ERR_AES_HW_ACCEL_FAILED -0x0025 /**< AES hardware accelerator failed. */
+
+
+// hide internal implementation of the struct. Allocate enough space for it.
+#define MBEDTLS_AES_CONTEXT_SIZE_IN_WORDS 24
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief AES context structure
+ *
+ * \note Max len of key - 256.
+ */
+typedef struct
+{
+ uint32_t buf[MBEDTLS_AES_CONTEXT_SIZE_IN_WORDS];
+} mbedtls_aes_context;
+
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+/**
+ * \brief The AES XTS context-type definition.
+ */
+typedef struct mbedtls_aes_xts_context
+{
+ mbedtls_aes_context crypt; /*!< The AES context to use for AES block
+ encryption or decryption. */
+ mbedtls_aes_context tweak; /*!< The AES context used for tweak
+ computation. */
+} mbedtls_aes_xts_context;
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* aes_alt.h */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/cc_ecc_internal.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/cc_ecc_internal.h
new file mode 100644
index 0000000..a11c622
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/cc_ecc_internal.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_CC_ECC_INTERNAL_H
+#define MBEDTLS_CC_ECC_INTERNAL_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+
+#if defined(MBEDTLS_ECDH_GEN_PUBLIC_ALT) || defined(MBEDTLS_ECDSA_GENKEY_ALT)
+/*
+ * Generate a keypair with configurable base point
+ */
+int cc_ecp_gen_keypair_base( mbedtls_ecp_group *grp,
+ const mbedtls_ecp_point *G,
+ mbedtls_mpi *d, mbedtls_ecp_point *Q,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/*
+ * Generate key pair, wrapper for conventional base point
+ */
+int cc_ecp_gen_keypair( mbedtls_ecp_group *grp,
+ mbedtls_mpi *d, mbedtls_ecp_point *Q,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+#endif /* MBEDTLS_ECDH_GEN_PUBLIC_ALT || MBEDTLS_ECDSA_GENKEY_ALT*/
+
+#if defined(MBEDTLS_ECDH_COMPUTE_SHARED_ALT)
+/*
+ * Multiplication R = m * P
+ */
+int cc_ecp_mul( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
+ const mbedtls_mpi *m, const mbedtls_ecp_point *P,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+#endif /* MBEDTLS_ECDH_COMPUTE_SHARED_ALT */
+
+#endif //MBEDTLS_CC_ECC_INTERNAL_H
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/ccm_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/ccm_alt.h
new file mode 100644
index 0000000..32d7ed6
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/ccm_alt.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_CCM_ALT_H
+#define MBEDTLS_CCM_ALT_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+#include "mbedtls/cipher.h"
+
+
+#define MBEDTLS_ERR_CCM_BAD_INPUT -0x000D /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_CCM_AUTH_FAILED -0x000F /**< Authenticated decryption failed. */
+
+/* hide internal implementation of the struct. Allocate enough space for it.*/
+#define MBEDTLS_CCM_CONTEXT_SIZE_IN_WORDS 264
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief The CCM context-type definition. The CCM context is passed
+ * to the APIs called.
+ */
+typedef struct {
+ uint32_t buf[MBEDTLS_CCM_CONTEXT_SIZE_IN_WORDS];
+}
+mbedtls_ccm_context;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CCM_ALT_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/chacha20_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/chacha20_alt.h
new file mode 100644
index 0000000..b473b9e
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/chacha20_alt.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_CHACHA20_ALT_H
+#define MBEDTLS_CHACHA20_ALT_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+
+#include <stddef.h>
+#include <stdint.h>
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+/*! The size of the ChaCha user-context in words. */
+#define MBEDTLS_CHACHA_USER_CTX_SIZE_IN_WORDS 17
+/*! The size of the ChaCha block in Bytes. */
+#define MBEDTLS_CHACHA_BLOCK_SIZE_BYTES 64
+/*! The size of the ChaCha block in Bytes. As defined in rfc7539 */
+#define MBEDTLS_CHACHA_NONCE_SIZE_BYTES 12
+/*! The size of the ChaCha key in Bytes. */
+#define MBEDTLS_CHACHA_KEY_SIZE_BYTES 32
+/*! Internal type to identify 12 byte nonce */
+#define MBEDTLS_CHACHA_NONCE_SIZE_12BYTE_TYPE 1
+
+/*! The definition of the 12-Byte array of the nonce buffer. */
+typedef uint8_t mbedtls_chacha_nonce[MBEDTLS_CHACHA_NONCE_SIZE_BYTES];
+
+/*! The definition of the key buffer of the ChaCha engine. */
+typedef uint8_t mbedtls_chacha_key[MBEDTLS_CHACHA_KEY_SIZE_BYTES];
+
+#if defined(MBEDTLS_CHACHA20_ALT)
+
+typedef struct
+{
+ uint32_t buf[MBEDTLS_CHACHA_USER_CTX_SIZE_IN_WORDS];
+}
+mbedtls_chacha20_context;
+
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* chacha20_alt.h */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/chachapoly_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/chachapoly_alt.h
new file mode 100644
index 0000000..83be138
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/chachapoly_alt.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _MBEDTLS_CHACHAPOLY_ALT_H
+#define _MBEDTLS_CHACHAPOLY_ALT_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+#if defined(MBEDTLS_CHACHAPOLY_ALT)
+
+
+#define MBEDTLS_CHACHAPOLY_KEY_SIZE_BYTES 32
+
+
+typedef struct mbedtls_chachapoly_context
+{
+ unsigned char key[MBEDTLS_CHACHAPOLY_KEY_SIZE_BYTES];
+}
+mbedtls_chachapoly_context;
+
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* chachapoly_alt.h */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/cmac_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/cmac_alt.h
new file mode 100644
index 0000000..cac7a8a
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/cmac_alt.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_CMAC_ALT_H
+#define MBEDTLS_CMAC_ALT_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+
+
+#include <stddef.h>
+#include <stdint.h>
+
+
+/* hide internal implementation of the struct. Allocate enough space for it.*/
+#define MBEDTLS_CMAC_CONTEXT_SIZE_IN_WORDS 33
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief CMAC cipher context structure
+ */
+struct mbedtls_cmac_context_t{
+ /*! Internal buffer */
+ uint32_t buf[MBEDTLS_CMAC_CONTEXT_SIZE_IN_WORDS];
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CMAC_ALT_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312-mps2-freertos.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312-mps2-freertos.h
new file mode 100644
index 0000000..bef1d5e
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312-mps2-freertos.h
@@ -0,0 +1,3273 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef MBEDTLS_CONFIG_H
+#define MBEDTLS_CONFIG_H
+
+#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE)
+#define _CRT_SECURE_NO_DEPRECATE 1
+#endif
+
+/**
+ * \name SECTION: System support
+ *
+ * This section sets system specific settings.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_HAVE_ASM
+ *
+ * The compiler has support for asm().
+ *
+ * Requires support for asm() in compiler.
+ *
+ * Used in:
+ * library/aria.c
+ * library/timing.c
+ * include/mbedtls/bn_mul.h
+ *
+ * Required by:
+ * MBEDTLS_AESNI_C
+ * MBEDTLS_PADLOCK_C
+ *
+ * Comment to disable the use of assembly code.
+ */
+#define MBEDTLS_HAVE_ASM
+
+/**
+ * \def MBEDTLS_NO_UDBL_DIVISION
+ *
+ * The platform lacks support for double-width integer division (64-bit
+ * division on a 32-bit platform, 128-bit division on a 64-bit platform).
+ *
+ * Used in:
+ * include/mbedtls/bignum.h
+ * library/bignum.c
+ *
+ * The bignum code uses double-width division to speed up some operations.
+ * Double-width division is often implemented in software that needs to
+ * be linked with the program. The presence of a double-width integer
+ * type is usually detected automatically through preprocessor macros,
+ * but the automatic detection cannot know whether the code needs to
+ * and can be linked with an implementation of division for that type.
+ * By default division is assumed to be usable if the type is present.
+ * Uncomment this option to prevent the use of double-width division.
+ *
+ * Note that division for the native integer type is always required.
+ * Furthermore, a 64-bit type is always required even on a 32-bit
+ * platform, but it need not support multiplication or division. In some
+ * cases it is also desirable to disable some double-width operations. For
+ * example, if double-width division is implemented in software, disabling
+ * it can reduce code size in some embedded targets.
+ */
+//#define MBEDTLS_NO_UDBL_DIVISION
+
+/**
+ * \def MBEDTLS_NO_64BIT_MULTIPLICATION
+ *
+ * The platform lacks support for 32x32 -> 64-bit multiplication.
+ *
+ * Used in:
+ * library/poly1305.c
+ *
+ * Some parts of the library may use multiplication of two unsigned 32-bit
+ * operands with a 64-bit result in order to speed up computations. On some
+ * platforms, this is not available in hardware and has to be implemented in
+ * software, usually in a library provided by the toolchain.
+ *
+ * Sometimes it is not desirable to have to link to that library. This option
+ * removes the dependency of that library on platforms that lack a hardware
+ * 64-bit multiplier by embedding a software implementation in Mbed TLS.
+ *
+ * Note that depending on the compiler, this may decrease performance compared
+ * to using the library function provided by the toolchain.
+ */
+//#define MBEDTLS_NO_64BIT_MULTIPLICATION
+
+/**
+ * \def MBEDTLS_HAVE_SSE2
+ *
+ * CPU supports SSE2 instruction set.
+ *
+ * Uncomment if the CPU supports SSE2 (IA-32 specific).
+ */
+//#define MBEDTLS_HAVE_SSE2
+
+/**
+ * \def MBEDTLS_HAVE_TIME
+ *
+ * System has time.h and time().
+ * The time does not need to be correct, only time differences are used,
+ * by contrast with MBEDTLS_HAVE_TIME_DATE
+ *
+ * Defining MBEDTLS_HAVE_TIME allows you to specify MBEDTLS_PLATFORM_TIME_ALT,
+ * MBEDTLS_PLATFORM_TIME_MACRO, MBEDTLS_PLATFORM_TIME_TYPE_MACRO and
+ * MBEDTLS_PLATFORM_STD_TIME.
+ *
+ * Comment if your system does not support time functions
+ */
+#define MBEDTLS_HAVE_TIME
+
+/**
+ * \def MBEDTLS_HAVE_TIME_DATE
+ *
+ * System has time.h, time(), and an implementation for
+ * mbedtls_platform_gmtime_r() (see below).
+ * The time needs to be correct (not necesarily very accurate, but at least
+ * the date should be correct). This is used to verify the validity period of
+ * X.509 certificates.
+ *
+ * Comment if your system does not have a correct clock.
+ *
+ * \note mbedtls_platform_gmtime_r() is an abstraction in platform_util.h that
+ * behaves similarly to the gmtime_r() function from the C standard. Refer to
+ * the documentation for mbedtls_platform_gmtime_r() for more information.
+ *
+ * \note It is possible to configure an implementation for
+ * mbedtls_platform_gmtime_r() at compile-time by using the macro
+ * MBEDTLS_PLATFORM_GMTIME_R_ALT.
+ */
+#define MBEDTLS_HAVE_TIME_DATE
+
+/**
+ * \def MBEDTLS_PLATFORM_MEMORY
+ *
+ * Enable the memory allocation layer.
+ *
+ * By default mbed TLS uses the system-provided calloc() and free().
+ * This allows different allocators (self-implemented or provided) to be
+ * provided to the platform abstraction layer.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY without the
+ * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide
+ * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and
+ * free() function pointer at runtime.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY and specifying
+ * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the
+ * alternate function at compile time.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Enable this layer to allow use of alternative memory allocators.
+ */
+#define MBEDTLS_PLATFORM_MEMORY
+
+/**
+ * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+ *
+ * Do not assign standard functions in the platform layer (e.g. calloc() to
+ * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF)
+ *
+ * This makes sure there are no linking errors on platforms that do not support
+ * these functions. You will HAVE to provide alternatives, either at runtime
+ * via the platform_set_xxx() functions or at compile time by setting
+ * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a
+ * MBEDTLS_PLATFORM_XXX_MACRO.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Uncomment to prevent default assignment of standard functions in the
+ * platform layer.
+ */
+//#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+
+/**
+ * \def MBEDTLS_PLATFORM_EXIT_ALT
+ *
+ * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the
+ * function in the platform abstraction layer.
+ *
+ * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will
+ * provide a function "mbedtls_platform_set_printf()" that allows you to set an
+ * alternative printf function pointer.
+ *
+ * All these define require MBEDTLS_PLATFORM_C to be defined!
+ *
+ * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows;
+ * it will be enabled automatically by check_config.h
+ *
+ * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as
+ * MBEDTLS_PLATFORM_XXX_MACRO!
+ *
+ * Requires: MBEDTLS_PLATFORM_TIME_ALT requires MBEDTLS_HAVE_TIME
+ *
+ * Uncomment a macro to enable alternate implementation of specific base
+ * platform function
+ */
+//#define MBEDTLS_PLATFORM_EXIT_ALT
+//#define MBEDTLS_PLATFORM_TIME_ALT
+//#define MBEDTLS_PLATFORM_FPRINTF_ALT
+//#define MBEDTLS_PLATFORM_PRINTF_ALT
+//#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_NV_SEED_ALT
+//#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
+
+/**
+ * \def MBEDTLS_DEPRECATED_WARNING
+ *
+ * Mark deprecated functions so that they generate a warning if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * This only works with GCC and Clang. With other compilers, you may want to
+ * use MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Uncomment to get warnings on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_WARNING
+
+/**
+ * \def MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Remove deprecated functions so that they generate an error if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * Uncomment to get errors on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_REMOVED
+
+/**
+ * \def MBEDTLS_CHECK_PARAMS
+ *
+ * This configuration option controls whether the library validates more of
+ * the parameters passed to it.
+ *
+ * When this flag is not defined, the library only attempts to validate an
+ * input parameter if: (1) they may come from the outside world (such as the
+ * network, the filesystem, etc.) or (2) not validating them could result in
+ * internal memory errors such as overflowing a buffer controlled by the
+ * library. On the other hand, it doesn't attempt to validate parameters whose
+ * values are fully controlled by the application (such as pointers).
+ *
+ * When this flag is defined, the library additionally attempts to validate
+ * parameters that are fully controlled by the application, and should always
+ * be valid if the application code is fully correct and trusted.
+ *
+ * For example, when a function accepts as input a pointer to a buffer that may
+ * contain untrusted data, and its documentation mentions that this pointer
+ * must not be NULL:
+ * - the pointer is checked to be non-NULL only if this option is enabled
+ * - the content of the buffer is always validated
+ *
+ * When this flag is defined, if a library function receives a parameter that
+ * is invalid, it will:
+ * - invoke the macro MBEDTLS_PARAM_FAILED() which by default expands to a
+ * call to the function mbedtls_param_failed()
+ * - immediately return (with a specific error code unless the function
+ * returns void and can't communicate an error).
+ *
+ * When defining this flag, you also need to:
+ * - either provide a definition of the function mbedtls_param_failed() in
+ * your application (see platform_util.h for its prototype) as the library
+ * calls that function, but does not provide a default definition for it,
+ * - or provide a different definition of the macro MBEDTLS_PARAM_FAILED()
+ * below if the above mechanism is not flexible enough to suit your needs.
+ * See the documentation of this macro later in this file.
+ *
+ * Uncomment to enable validation of application-controlled parameters.
+ */
+//#define MBEDTLS_CHECK_PARAMS
+
+/* \} name SECTION: System support */
+
+/**
+ * \name SECTION: mbed TLS feature support
+ *
+ * This section sets support for features that are or are not needed
+ * within the modules that are enabled.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_TIMING_ALT
+ *
+ * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(),
+ * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay()
+ *
+ * Only works if you have MBEDTLS_TIMING_C enabled.
+ *
+ * You will need to provide a header "timing_alt.h" and an implementation at
+ * compile time.
+ */
+//#define MBEDTLS_TIMING_ALT
+
+/**
+ * \def MBEDTLS_AES_ALT
+ *
+ * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternate core implementation of a symmetric crypto, an arithmetic or hash
+ * module (e.g. platform specific assembly optimized implementations). Keep
+ * in mind that the function prototypes should remain the same.
+ *
+ * This replaces the whole module. If you only want to replace one of the
+ * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer
+ * provide the "struct mbedtls_aes_context" definition and omit the base
+ * function declarations and implementations. "aes_alt.h" will be included from
+ * "aes.h" to include the new function definitions.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * module.
+ *
+ * \warning MD2, MD4, MD5, ARC4, DES and SHA-1 are considered weak and their
+ * use constitutes a security risk. If possible, we recommend
+ * avoiding dependencies on them, and considering stronger message
+ * digests and ciphers instead.
+ *
+ */
+#define MBEDTLS_AES_ALT
+//#define MBEDTLS_ARC4_ALT
+//#define MBEDTLS_ARIA_ALT
+//#define MBEDTLS_BLOWFISH_ALT
+//#define MBEDTLS_CAMELLIA_ALT
+#define MBEDTLS_CCM_ALT
+#define MBEDTLS_CHACHA20_ALT
+#define MBEDTLS_CHACHAPOLY_ALT
+#define MBEDTLS_CMAC_ALT
+//#define MBEDTLS_DES_ALT
+#define MBEDTLS_DHM_ALT
+//#define MBEDTLS_ECJPAKE_ALT
+#define MBEDTLS_GCM_ALT
+//#define MBEDTLS_NIST_KW_ALT
+//#define MBEDTLS_MD2_ALT
+//#define MBEDTLS_MD4_ALT
+//#define MBEDTLS_MD5_ALT
+#define MBEDTLS_POLY1305_ALT
+//#define MBEDTLS_RIPEMD160_ALT
+#define MBEDTLS_RSA_ALT
+#define MBEDTLS_SHA1_ALT
+#define MBEDTLS_SHA256_ALT
+//#define MBEDTLS_SHA512_ALT
+//#define MBEDTLS_XTEA_ALT
+
+/*
+ * When replacing the elliptic curve module, pleace consider, that it is
+ * implemented with two .c files:
+ * - ecp.c
+ * - ecp_curves.c
+ * You can replace them very much like all the other MBEDTLS__MODULE_NAME__ALT
+ * macros as described above. The only difference is that you have to make sure
+ * that you provide functionality for both .c files.
+ */
+//#define MBEDTLS_ECP_ALT
+
+/**
+ * \def MBEDTLS_MD2_PROCESS_ALT
+ *
+ * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you
+ * alternate core implementation of symmetric crypto or hash function. Keep in
+ * mind that function prototypes should remain the same.
+ *
+ * This replaces only one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will
+ * no longer provide the mbedtls_sha1_process() function, but it will still provide
+ * the other function (using your mbedtls_sha1_process() function) and the definition
+ * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible
+ * with this definition.
+ *
+ * \note Because of a signature change, the core AES encryption and decryption routines are
+ * currently named mbedtls_aes_internal_encrypt and mbedtls_aes_internal_decrypt,
+ * respectively. When setting up alternative implementations, these functions should
+ * be overriden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
+ * must stay untouched.
+ *
+ * \note If you use the AES_xxx_ALT macros, then is is recommended to also set
+ * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
+ * tables.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ *
+ * \warning MD2, MD4, MD5, DES and SHA-1 are considered weak and their use
+ * constitutes a security risk. If possible, we recommend avoiding
+ * dependencies on them, and considering stronger message digests
+ * and ciphers instead.
+ *
+ */
+//#define MBEDTLS_MD2_PROCESS_ALT
+//#define MBEDTLS_MD4_PROCESS_ALT
+//#define MBEDTLS_MD5_PROCESS_ALT
+//#define MBEDTLS_RIPEMD160_PROCESS_ALT
+//#define MBEDTLS_SHA1_PROCESS_ALT
+//#define MBEDTLS_SHA256_PROCESS_ALT
+//#define MBEDTLS_SHA512_PROCESS_ALT
+//#define MBEDTLS_DES_SETKEY_ALT
+//#define MBEDTLS_DES_CRYPT_ECB_ALT
+//#define MBEDTLS_DES3_CRYPT_ECB_ALT
+//#define MBEDTLS_AES_SETKEY_ENC_ALT
+//#define MBEDTLS_AES_SETKEY_DEC_ALT
+//#define MBEDTLS_AES_ENCRYPT_ALT
+//#define MBEDTLS_AES_DECRYPT_ALT
+#define MBEDTLS_ECDH_GEN_PUBLIC_ALT
+#define MBEDTLS_ECDH_COMPUTE_SHARED_ALT
+#define MBEDTLS_ECDSA_VERIFY_ALT
+#define MBEDTLS_ECDSA_SIGN_ALT
+#define MBEDTLS_ECDSA_GENKEY_ALT
+
+/**
+ * \def MBEDTLS_ECP_INTERNAL_ALT
+ *
+ * Expose a part of the internal interface of the Elliptic Curve Point module.
+ *
+ * MBEDTLS_ECP__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternative core implementation of elliptic curve arithmetic. Keep in mind
+ * that function prototypes should remain the same.
+ *
+ * This partially replaces one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS_ECP_ALT flag. The original implementation
+ * is still present and it is used for group structures not supported by the
+ * alternative.
+ *
+ * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
+ * and implementing the following functions:
+ * unsigned char mbedtls_internal_ecp_grp_capable(
+ * const mbedtls_ecp_group *grp )
+ * int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp )
+ * void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp )
+ * The mbedtls_internal_ecp_grp_capable function should return 1 if the
+ * replacement functions implement arithmetic for the given group and 0
+ * otherwise.
+ * The functions mbedtls_internal_ecp_init and mbedtls_internal_ecp_free are
+ * called before and after each point operation and provide an opportunity to
+ * implement optimized set up and tear down instructions.
+ *
+ * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and
+ * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac
+ * function, but will use your mbedtls_internal_ecp_double_jac if the group is
+ * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when
+ * receives it as an argument). If the group is not supported then the original
+ * implementation is used. The other functions and the definition of
+ * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your
+ * implementation of mbedtls_internal_ecp_double_jac and
+ * mbedtls_internal_ecp_grp_capable must be compatible with this definition.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ */
+/* Required for all the functions in this section */
+//#define MBEDTLS_ECP_INTERNAL_ALT
+/* Support for Weierstrass curves with Jacobi representation */
+//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
+//#define MBEDTLS_ECP_ADD_MIXED_ALT
+//#define MBEDTLS_ECP_DOUBLE_JAC_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_ALT
+/* Support for curves with Montgomery arithmetic */
+//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT
+//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
+//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
+
+/**
+ * \def MBEDTLS_TEST_NULL_ENTROPY
+ *
+ * Enables testing and use of mbed TLS without any configured entropy sources.
+ * This permits use of the library on platforms before an entropy source has
+ * been integrated (see for example the MBEDTLS_ENTROPY_HARDWARE_ALT or the
+ * MBEDTLS_ENTROPY_NV_SEED switches).
+ *
+ * WARNING! This switch MUST be disabled in production builds, and is suitable
+ * only for development.
+ * Enabling the switch negates any security provided by the library.
+ *
+ * Requires MBEDTLS_ENTROPY_C, MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ */
+//#define MBEDTLS_TEST_NULL_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_HARDWARE_ALT
+ *
+ * Uncomment this macro to let mbed TLS use your own implementation of a
+ * hardware entropy collector.
+ *
+ * Your function must be called \c mbedtls_hardware_poll(), have the same
+ * prototype as declared in entropy_poll.h, and accept NULL as first argument.
+ *
+ * Uncomment to use your own hardware entropy collector.
+ */
+#define MBEDTLS_ENTROPY_HARDWARE_ALT
+
+/**
+ * \def MBEDTLS_AES_ROM_TABLES
+ *
+ * Use precomputed AES tables stored in ROM.
+ *
+ * Uncomment this macro to use precomputed AES tables stored in ROM.
+ * Comment this macro to generate AES tables in RAM at runtime.
+ *
+ * Tradeoff: Using precomputed ROM tables reduces RAM usage by ~8kb
+ * (or ~2kb if \c MBEDTLS_AES_FEWER_TABLES is used) and reduces the
+ * initialization time before the first AES operation can be performed.
+ * It comes at the cost of additional ~8kb ROM use (resp. ~2kb if \c
+ * MBEDTLS_AES_FEWER_TABLES below is used), and potentially degraded
+ * performance if ROM access is slower than RAM access.
+ *
+ * This option is independent of \c MBEDTLS_AES_FEWER_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_ROM_TABLES
+
+/**
+ * \def MBEDTLS_AES_FEWER_TABLES
+ *
+ * Use less ROM/RAM for AES tables.
+ *
+ * Uncommenting this macro omits 75% of the AES tables from
+ * ROM / RAM (depending on the value of \c MBEDTLS_AES_ROM_TABLES)
+ * by computing their values on the fly during operations
+ * (the tables are entry-wise rotations of one another).
+ *
+ * Tradeoff: Uncommenting this reduces the RAM / ROM footprint
+ * by ~6kb but at the cost of more arithmetic operations during
+ * runtime. Specifically, one has to compare 4 accesses within
+ * different tables to 4 accesses with additional arithmetic
+ * operations within the same table. The performance gain/loss
+ * depends on the system and memory details.
+ *
+ * This option is independent of \c MBEDTLS_AES_ROM_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_FEWER_TABLES
+
+/**
+ * \def MBEDTLS_CAMELLIA_SMALL_MEMORY
+ *
+ * Use less ROM for the Camellia implementation (saves about 768 bytes).
+ *
+ * Uncomment this macro to use less memory for Camellia.
+ */
+//#define MBEDTLS_CAMELLIA_SMALL_MEMORY
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CBC
+ *
+ * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CBC
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CFB
+ *
+ * Enable Cipher Feedback mode (CFB) for symmetric ciphers.
+ */
+//#define MBEDTLS_CIPHER_MODE_CFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CTR
+ *
+ * Enable Counter Block Cipher mode (CTR) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CTR
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_OFB
+ *
+ * Enable Output Feedback mode (OFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_OFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_XTS
+ *
+ * Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES.
+ */
+//#define MBEDTLS_CIPHER_MODE_XTS
+
+/**
+ * \def MBEDTLS_CIPHER_NULL_CIPHER
+ *
+ * Enable NULL cipher.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * encryption or channels without any security!
+ *
+ * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable
+ * the following ciphersuites:
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA
+ *
+ * Uncomment this macro to enable the NULL cipher and ciphersuites
+ */
+//#define MBEDTLS_CIPHER_NULL_CIPHER
+
+/**
+ * \def MBEDTLS_CIPHER_PADDING_PKCS7
+ *
+ * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for
+ * specific padding modes in the cipher layer with cipher modes that support
+ * padding (e.g. CBC)
+ *
+ * If you disable all padding modes, only full blocks can be used with CBC.
+ *
+ * Enable padding modes in the cipher layer.
+ */
+//#define MBEDTLS_CIPHER_PADDING_PKCS7
+//#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+//#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+//#define MBEDTLS_CIPHER_PADDING_ZEROS
+
+/**
+ * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+ *
+ * Enable weak ciphersuites in SSL / TLS.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * channels with virtually no security at all!
+ *
+ * This enables the following ciphersuites:
+ * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA
+ *
+ * Uncomment this macro to enable weak ciphersuites
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+ *
+ * Remove RC4 ciphersuites by default in SSL / TLS.
+ * This flag removes the ciphersuites based on RC4 from the default list as
+ * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to
+ * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them
+ * explicitly.
+ *
+ * Uncomment this macro to remove RC4 ciphersuites by default.
+ */
+//#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED
+ *
+ * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve
+ * module. By default all supported curves are enabled.
+ *
+ * Comment macros to disable the curve and functions for it
+ */
+
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+/* CryptoCell only supports BP256R1 brainpool curve at this stage */
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+//#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+//#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+//#define MBEDTLS_ECP_DP_CURVE448_ENABLED
+
+/**
+ * \def MBEDTLS_ECP_NIST_OPTIM
+ *
+ * Enable specific 'modulo p' routines for each NIST prime.
+ * Depending on the prime and architecture, makes operations 4 to 8 times
+ * faster on the corresponding curve.
+ *
+ * Comment this macro to disable NIST curves optimisation.
+ */
+#define MBEDTLS_ECP_NIST_OPTIM
+
+/**
+ * \def MBEDTLS_ECP_RESTARTABLE
+ *
+ * Enable "non-blocking" ECC operations that can return early and be resumed.
+ *
+ * This allows various functions to pause by returning
+ * #MBEDTLS_ERR_ECP_IN_PROGRESS (or, for functions in the SSL module,
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS) and then be called later again in
+ * order to further progress and eventually complete their operation. This is
+ * controlled through mbedtls_ecp_set_max_ops() which limits the maximum
+ * number of ECC operations a function may perform before pausing; see
+ * mbedtls_ecp_set_max_ops() for more information.
+ *
+ * This is useful in non-threaded environments if you want to avoid blocking
+ * for too long on ECC (and, hence, X.509 or SSL/TLS) operations.
+ *
+ * Uncomment this macro to enable restartable ECC computations.
+ *
+ * \note This option only works with the default software implementation of
+ * elliptic curve functionality. It is incompatible with
+ * MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ */
+//#define MBEDTLS_ECP_RESTARTABLE
+
+/**
+ * \def MBEDTLS_ECDSA_DETERMINISTIC
+ *
+ * Enable deterministic ECDSA (RFC 6979).
+ * Standard ECDSA is "fragile" in the sense that lack of entropy when signing
+ * may result in a compromise of the long-term signing key. This is avoided by
+ * the deterministic variant.
+ *
+ * Requires: MBEDTLS_HMAC_DRBG_C
+ *
+ * Comment this macro to disable deterministic ECDSA.
+ */
+#define MBEDTLS_ECDSA_DETERMINISTIC
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+ *
+ * Enable the PSK based ciphersuite modes in SSL / TLS.
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+ *
+ * Enable the DHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+//#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+ *
+ * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+ *
+ * Enable the RSA-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+ *
+ * Enable the RSA-only based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ */
+//#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+ *
+ * Enable the DHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+//#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+ *
+ * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ *
+ * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C,
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+ *
+ * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+ *
+ * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+ *
+ * Enable the ECJPAKE based ciphersuite modes in SSL / TLS.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Requires: MBEDTLS_ECJPAKE_C
+ * MBEDTLS_SHA256_C
+ * MBEDTLS_ECP_DP_SECP256R1_ENABLED
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+
+/**
+ * \def MBEDTLS_PK_PARSE_EC_EXTENDED
+ *
+ * Enhance support for reading EC keys using variants of SEC1 not allowed by
+ * RFC 5915 and RFC 5480.
+ *
+ * Currently this means parsing the SpecifiedECDomain choice of EC
+ * parameters (only known groups are supported, not arbitrary domains, to
+ * avoid validation issues).
+ *
+ * Disable if you only need to support RFC 5915 + 5480 key formats.
+ */
+//#define MBEDTLS_PK_PARSE_EC_EXTENDED
+
+/**
+ * \def MBEDTLS_ERROR_STRERROR_DUMMY
+ *
+ * Enable a dummy error function to make use of mbedtls_strerror() in
+ * third party libraries easier when MBEDTLS_ERROR_C is disabled
+ * (no effect when MBEDTLS_ERROR_C is enabled).
+ *
+ * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're
+ * not using mbedtls_strerror() or error_strerror() in your application.
+ *
+ * Disable if you run into name conflicts and want to really remove the
+ * mbedtls_strerror()
+ */
+#define MBEDTLS_ERROR_STRERROR_DUMMY
+
+/**
+ * \def MBEDTLS_GENPRIME
+ *
+ * Enable the prime-number generation code.
+ *
+ * Requires: MBEDTLS_BIGNUM_C
+ */
+#define MBEDTLS_GENPRIME
+
+/**
+ * \def MBEDTLS_FS_IO
+ *
+ * Enable functions that use the filesystem.
+ */
+//#define MBEDTLS_FS_IO
+
+/**
+ * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ * Do not add default entropy sources. These are the platform specific,
+ * mbedtls_timing_hardclock and HAVEGE based poll functions.
+ *
+ * This is useful to have more control over the added entropy sources in an
+ * application.
+ *
+ * Uncomment this macro to prevent loading of default entropy functions.
+ */
+//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+
+/**
+ * \def MBEDTLS_NO_PLATFORM_ENTROPY
+ *
+ * Do not use built-in platform entropy functions.
+ * This is useful if your platform does not support
+ * standards like the /dev/urandom or Windows CryptoAPI.
+ *
+ * Uncomment this macro to disable the built-in platform entropy functions.
+ */
+#define MBEDTLS_NO_PLATFORM_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_FORCE_SHA256
+ *
+ * Force the entropy accumulator to use a SHA-256 accumulator instead of the
+ * default SHA-512 based one (if both are available).
+ *
+ * Requires: MBEDTLS_SHA256_C
+ *
+ * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option
+ * if you have performance concerns.
+ *
+ * This option is only useful if both MBEDTLS_SHA256_C and
+ * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used.
+ */
+//#define MBEDTLS_ENTROPY_FORCE_SHA256
+
+/**
+ * \def MBEDTLS_ENTROPY_NV_SEED
+ *
+ * Enable the non-volatile (NV) seed file-based entropy source.
+ * (Also enables the NV seed read/write functions in the platform layer)
+ *
+ * This is crucial (if not required) on systems that do not have a
+ * cryptographic entropy source (in hardware or kernel) available.
+ *
+ * Requires: MBEDTLS_ENTROPY_C, MBEDTLS_PLATFORM_C
+ *
+ * \note The read/write functions that are used by the entropy source are
+ * determined in the platform layer, and can be modified at runtime and/or
+ * compile-time depending on the flags (MBEDTLS_PLATFORM_NV_SEED_*) used.
+ *
+ * \note If you use the default implementation functions that read a seedfile
+ * with regular fopen(), please make sure you make a seedfile with the
+ * proper name (defined in MBEDTLS_PLATFORM_STD_NV_SEED_FILE) and at
+ * least MBEDTLS_ENTROPY_BLOCK_SIZE bytes in size that can be read from
+ * and written to or you will get an entropy source error! The default
+ * implementation will only use the first MBEDTLS_ENTROPY_BLOCK_SIZE
+ * bytes from the file.
+ *
+ * \note The entropy collector will write to the seed file before entropy is
+ * given to an external source, to update it.
+ */
+//#define MBEDTLS_ENTROPY_NV_SEED
+
+/**
+ * \def MBEDTLS_MEMORY_DEBUG
+ *
+ * Enable debugging of buffer allocator memory issues. Automatically prints
+ * (to stderr) all (fatal) messages on memory allocation issues. Enables
+ * function for 'debug output' of allocated memory.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Uncomment this macro to let the buffer allocator print out error messages.
+ */
+//#define MBEDTLS_MEMORY_DEBUG
+
+/**
+ * \def MBEDTLS_MEMORY_BACKTRACE
+ *
+ * Include backtrace information with each allocated block.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ * GLIBC-compatible backtrace() an backtrace_symbols() support
+ *
+ * Uncomment this macro to include backtrace information
+ */
+//#define MBEDTLS_MEMORY_BACKTRACE
+
+/**
+ * \def MBEDTLS_PK_RSA_ALT_SUPPORT
+ *
+ * Support external private RSA keys (eg from a HSM) in the PK layer.
+ *
+ * Comment this macro to disable support for external private RSA keys.
+ */
+//#define MBEDTLS_PK_RSA_ALT_SUPPORT
+
+/**
+ * \def MBEDTLS_PKCS1_V15
+ *
+ * Enable support for PKCS#1 v1.5 encoding.
+ *
+ * Requires: MBEDTLS_RSA_C
+ *
+ * This enables support for PKCS#1 v1.5 operations.
+ */
+#define MBEDTLS_PKCS1_V15
+
+/**
+ * \def MBEDTLS_PKCS1_V21
+ *
+ * Enable support for PKCS#1 v2.1 encoding.
+ *
+ * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C
+ *
+ * This enables support for RSAES-OAEP and RSASSA-PSS operations.
+ */
+#define MBEDTLS_PKCS1_V21
+
+/**
+ * \def MBEDTLS_RSA_NO_CRT
+ *
+ * Do not use the Chinese Remainder Theorem
+ * for the RSA private operation.
+ *
+ * Uncomment this macro to disable the use of CRT in RSA.
+ *
+ */
+//#define MBEDTLS_RSA_NO_CRT
+
+/**
+ * \def MBEDTLS_SELF_TEST
+ *
+ * Enable the checkup functions (*_self_test).
+ */
+#define MBEDTLS_SELF_TEST
+
+/**
+ * \def MBEDTLS_SHA256_SMALLER
+ *
+ * Enable an implementation of SHA-256 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * The default implementation is meant to be a reasonnable compromise between
+ * performance and size. This version optimizes more aggressively for size at
+ * the expense of performance. Eg on Cortex-M4 it reduces the size of
+ * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about
+ * 30%.
+ *
+ * Uncomment to enable the smaller implementation of SHA256.
+ */
+//#define MBEDTLS_SHA256_SMALLER
+
+/**
+ * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
+ *
+ * Enable sending of alert messages in case of encountered errors as per RFC.
+ * If you choose not to send the alert messages, mbed TLS can still communicate
+ * with other servers, only debugging of failures is harder.
+ *
+ * The advantage of not sending alert messages, is that no information is given
+ * about reasons for failures thus preventing adversaries of gaining intel.
+ *
+ * Enable sending of all alert messages
+ */
+//#define MBEDTLS_SSL_ALL_ALERT_MESSAGES
+
+/**
+ * \def MBEDTLS_SSL_ASYNC_PRIVATE
+ *
+ * Enable asynchronous external private key operations in SSL. This allows
+ * you to configure an SSL connection to call an external cryptographic
+ * module to perform private key operations instead of performing the
+ * operation inside the library.
+ *
+ */
+//#define MBEDTLS_SSL_ASYNC_PRIVATE
+
+/**
+ * \def MBEDTLS_SSL_DEBUG_ALL
+ *
+ * Enable the debug messages in SSL module for all issues.
+ * Debug messages have been disabled in some places to prevent timing
+ * attacks due to (unbalanced) debugging function calls.
+ *
+ * If you need all error reporting you should enable this during debugging,
+ * but remove this for production servers that should log as well.
+ *
+ * Uncomment this macro to report all debug messages on errors introducing
+ * a timing side-channel.
+ *
+ */
+//#define MBEDTLS_SSL_DEBUG_ALL
+
+/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
+ *
+ * Enable support for Encrypt-then-MAC, RFC 7366.
+ *
+ * This allows peers that both support it to use a more robust protection for
+ * ciphersuites using CBC, providing deep resistance against timing attacks
+ * on the padding or underlying cipher.
+ *
+ * This only affects CBC ciphersuites, and is useless if none is defined.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Encrypt-then-MAC
+ */
+//#define MBEDTLS_SSL_ENCRYPT_THEN_MAC
+
+/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+ *
+ * Enable support for Extended Master Secret, aka Session Hash
+ * (draft-ietf-tls-session-hash-02).
+ *
+ * This was introduced as "the proper fix" to the Triple Handshake familiy of
+ * attacks, but it is recommended to always use it (even if you disable
+ * renegotiation), since it actually fixes a more fundamental issue in the
+ * original SSL/TLS design, and has implications beyond Triple Handshake.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Extended Master Secret.
+ */
+//#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+
+/**
+ * \def MBEDTLS_SSL_FALLBACK_SCSV
+ *
+ * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ *
+ * For servers, it is recommended to always enable this, unless you support
+ * only one version of TLS, or know for sure that none of your clients
+ * implements a fallback strategy.
+ *
+ * For clients, you only need this if you're using a fallback strategy, which
+ * is not recommended in the first place, unless you absolutely need it to
+ * interoperate with buggy (version-intolerant) servers.
+ *
+ * Comment this macro to disable support for FALLBACK_SCSV
+ */
+//#define MBEDTLS_SSL_FALLBACK_SCSV
+
+/**
+ * \def MBEDTLS_SSL_HW_RECORD_ACCEL
+ *
+ * Enable hooking functions in SSL module for hardware acceleration of
+ * individual records.
+ *
+ * Uncomment this macro to enable hooking functions.
+ */
+//#define MBEDTLS_SSL_HW_RECORD_ACCEL
+
+/**
+ * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING
+ *
+ * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0.
+ *
+ * This is a countermeasure to the BEAST attack, which also minimizes the risk
+ * of interoperability issues compared to sending 0-length records.
+ *
+ * Comment this macro to disable 1/n-1 record splitting.
+ */
+//#define MBEDTLS_SSL_CBC_RECORD_SPLITTING
+
+/**
+ * \def MBEDTLS_SSL_RENEGOTIATION
+ *
+ * Disable support for TLS renegotiation.
+ *
+ * The two main uses of renegotiation are (1) refresh keys on long-lived
+ * connections and (2) client authentication after the initial handshake.
+ * If you don't need renegotiation, it's probably better to disable it, since
+ * it has been associated with security issues in the past and is easy to
+ * misuse/misunderstand.
+ *
+ * Comment this to disable support for renegotiation.
+ *
+ * \note Even if this option is disabled, both client and server are aware
+ * of the Renegotiation Indication Extension (RFC 5746) used to
+ * prevent the SSL renegotiation attack (see RFC 5746 Sect. 1).
+ * (See \c mbedtls_ssl_conf_legacy_renegotiation for the
+ * configuration of this extension).
+ *
+ */
+//#define MBEDTLS_SSL_RENEGOTIATION
+
+/**
+ * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+ *
+ * Enable support for receiving and parsing SSLv2 Client Hello messages for the
+ * SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to enable support for SSLv2 Client Hello messages.
+ */
+//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+
+/**
+ * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+ *
+ * Pick the ciphersuite according to the client's preferences rather than ours
+ * in the SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to respect client's ciphersuite order
+ */
+//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+
+/**
+ * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ *
+ * Enable support for RFC 6066 max_fragment_length extension in SSL.
+ *
+ * Comment this macro to disable support for the max_fragment_length extension
+ */
+//#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+
+/**
+ * \def MBEDTLS_SSL_PROTO_SSL3
+ *
+ * Enable support for SSL 3.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for SSL 3.0
+ */
+//#define MBEDTLS_SSL_PROTO_SSL3
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1
+ *
+ * Enable support for TLS 1.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.0
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_1
+ *
+ * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.1 / DTLS 1.0
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C
+ * (Depends on ciphersuites)
+ *
+ * Comment this macro to disable support for TLS 1.2 / DTLS 1.2
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_2
+
+/**
+ * \def MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Enable support for DTLS (all available versions).
+ *
+ * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0,
+ * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1_1
+ * or MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for DTLS
+ */
+//#define MBEDTLS_SSL_PROTO_DTLS
+
+/**
+ * \def MBEDTLS_SSL_ALPN
+ *
+ * Enable support for RFC 7301 Application Layer Protocol Negotiation.
+ *
+ * Comment this macro to disable support for ALPN.
+ */
+//#define MBEDTLS_SSL_ALPN
+
+/**
+ * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY
+ *
+ * Enable support for the anti-replay mechanism in DTLS.
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ * MBEDTLS_SSL_PROTO_DTLS
+ *
+ * \warning Disabling this is often a security risk!
+ * See mbedtls_ssl_conf_dtls_anti_replay() for details.
+ *
+ * Comment this to disable anti-replay in DTLS.
+ */
+//#define MBEDTLS_SSL_DTLS_ANTI_REPLAY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Enable support for HelloVerifyRequest on DTLS servers.
+ *
+ * This feature is highly recommended to prevent DTLS servers being used as
+ * amplifiers in DoS attacks against other hosts. It should always be enabled
+ * unless you know for sure amplification cannot be a problem in the
+ * environment in which your server operates.
+ *
+ * \warning Disabling this can ba a security risk! (see above)
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Comment this to disable support for HelloVerifyRequest.
+ */
+//#define MBEDTLS_SSL_DTLS_HELLO_VERIFY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+ *
+ * Enable server-side support for clients that reconnect from the same port.
+ *
+ * Some clients unexpectedly close the connection and try to reconnect using the
+ * same source port. This needs special support from the server to handle the
+ * new connection securely, as described in section 4.2.8 of RFC 6347. This
+ * flag enables that support.
+ *
+ * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Comment this to disable support for clients reusing the source port.
+ */
+//#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+
+/**
+ * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+ *
+ * Enable support for a limit of records with bad MAC.
+ *
+ * See mbedtls_ssl_conf_dtls_badmac_limit().
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ */
+//#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+
+/**
+ * \def MBEDTLS_SSL_SESSION_TICKETS
+ *
+ * Enable support for RFC 5077 session tickets in SSL.
+ * Client-side, provides full support for session tickets (maintainance of a
+ * session store remains the responsibility of the application, though).
+ * Server-side, you also need to provide callbacks for writing and parsing
+ * tickets, including authenticated encryption and key management. Example
+ * callbacks are provided by MBEDTLS_SSL_TICKET_C.
+ *
+ * Comment this macro to disable support for SSL session tickets
+ */
+//#define MBEDTLS_SSL_SESSION_TICKETS
+
+/**
+ * \def MBEDTLS_SSL_EXPORT_KEYS
+ *
+ * Enable support for exporting key block and master secret.
+ * This is required for certain users of TLS, e.g. EAP-TLS.
+ *
+ * Comment this macro to disable support for key export
+ */
+//#define MBEDTLS_SSL_EXPORT_KEYS
+
+/**
+ * \def MBEDTLS_SSL_SERVER_NAME_INDICATION
+ *
+ * Enable support for RFC 6066 server name indication (SNI) in SSL.
+ *
+ * Requires: MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Comment this macro to disable support for server name indication in SSL
+ */
+//#define MBEDTLS_SSL_SERVER_NAME_INDICATION
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC
+ *
+ * Enable support for RFC 6066 truncated HMAC in SSL.
+ *
+ * Comment this macro to disable support for truncated HMAC in SSL
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+ *
+ * Fallback to old (pre-2.7), non-conforming implementation of the truncated
+ * HMAC extension which also truncates the HMAC key. Note that this option is
+ * only meant for a transitory upgrade period and is likely to be removed in
+ * a future version of the library.
+ *
+ * \warning The old implementation is non-compliant and has a security weakness
+ * (2^80 brute force attack on the HMAC key used for a single,
+ * uninterrupted connection). This should only be enabled temporarily
+ * when (1) the use of truncated HMAC is essential in order to save
+ * bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
+ * the fixed implementation yet (pre-2.7).
+ *
+ * \deprecated This option is deprecated and will likely be removed in a
+ * future version of Mbed TLS.
+ *
+ * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
+ *
+ * Requires: MBEDTLS_SSL_TRUNCATED_HMAC
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+
+/**
+ * \def MBEDTLS_THREADING_ALT
+ *
+ * Provide your own alternate threading implementation.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to allow your own alternate threading implementation.
+ */
+//#define MBEDTLS_THREADING_ALT
+
+/**
+ * \def MBEDTLS_THREADING_PTHREAD
+ *
+ * Enable the pthread wrapper layer for the threading layer.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to enable pthread mutexes.
+ */
+//#define MBEDTLS_THREADING_PTHREAD
+
+/**
+ * \def MBEDTLS_VERSION_FEATURES
+ *
+ * Allow run-time checking of compile-time enabled features. Thus allowing users
+ * to check at run-time if the library is for instance compiled with threading
+ * support via mbedtls_version_check_feature().
+ *
+ * Requires: MBEDTLS_VERSION_C
+ *
+ * Comment this to disable run-time checking and save ROM space
+ */
+#define MBEDTLS_VERSION_FEATURES
+
+/**
+ * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an extension in a v1 or v2 certificate.
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+
+/**
+ * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an unknown critical extension.
+ *
+ * \warning Depending on your PKI use, enabling this can be a security risk!
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+
+/**
+ * \def MBEDTLS_X509_CHECK_KEY_USAGE
+ *
+ * Enable verification of the keyUsage extension (CA and leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused
+ * (intermediate) CA and leaf certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip keyUsage checking for both CA and leaf certificates.
+ */
+//#define MBEDTLS_X509_CHECK_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+ *
+ * Enable verification of the extendedKeyUsage extension (leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip extendedKeyUsage checking for certificates.
+ */
+//#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
+ *
+ * Enable parsing and verification of X.509 certificates, CRLs and CSRS
+ * signed with RSASSA-PSS (aka PKCS#1 v2.1).
+ *
+ * Comment this macro to disallow using RSASSA-PSS in certificates.
+ */
+//#define MBEDTLS_X509_RSASSA_PSS_SUPPORT
+
+/**
+ * \def MBEDTLS_ZLIB_SUPPORT
+ *
+ * If set, the SSL/TLS module uses ZLIB to support compression and
+ * decompression of packet data.
+ *
+ * \warning TLS-level compression MAY REDUCE SECURITY! See for example the
+ * CRIME attack. Before enabling this option, you should examine with care if
+ * CRIME or similar exploits may be a applicable to your use case.
+ *
+ * \note Currently compression can't be used with DTLS.
+ *
+ * \deprecated This feature is deprecated and will be removed
+ * in the next major revision of the library.
+ *
+ * Used in: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This feature requires zlib library and headers to be present.
+ *
+ * Uncomment to enable use of ZLIB
+ */
+//#define MBEDTLS_ZLIB_SUPPORT
+/* \} name SECTION: mbed TLS feature support */
+
+/**
+ * \name SECTION: mbed TLS modules
+ *
+ * This section enables or disables entire modules in mbed TLS
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_AESNI_C
+ *
+ * Enable AES-NI support on x86-64.
+ *
+ * Module: library/aesni.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the AES-NI instructions on x86-64
+ */
+//#define MBEDTLS_AESNI_C
+
+/**
+ * \def MBEDTLS_AES_C
+ *
+ * Enable the AES block cipher.
+ *
+ * Module: library/aes.c
+ * Caller: library/cipher.c
+ * library/pem.c
+ * library/ctr_drbg.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ *
+ * PEM_PARSE uses AES for decrypting encrypted keys.
+ */
+#define MBEDTLS_AES_C
+
+/**
+ * \def MBEDTLS_ARC4_C
+ *
+ * Enable the ARCFOUR stream cipher.
+ *
+ * Module: library/arc4.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. If possible, we recommend avoidng dependencies on
+ * it, and considering stronger ciphers instead.
+ *
+ */
+//#define MBEDTLS_ARC4_C
+
+/**
+ * \def MBEDTLS_ASN1_PARSE_C
+ *
+ * Enable the generic ASN1 parser.
+ *
+ * Module: library/asn1.c
+ * Caller: library/x509.c
+ * library/dhm.c
+ * library/pkcs12.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ */
+#define MBEDTLS_ASN1_PARSE_C
+
+/**
+ * \def MBEDTLS_ASN1_WRITE_C
+ *
+ * Enable the generic ASN1 writer.
+ *
+ * Module: library/asn1write.c
+ * Caller: library/ecdsa.c
+ * library/pkwrite.c
+ * library/x509_create.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ */
+#define MBEDTLS_ASN1_WRITE_C
+
+/**
+ * \def MBEDTLS_BASE64_C
+ *
+ * Enable the Base64 module.
+ *
+ * Module: library/base64.c
+ * Caller: library/pem.c
+ *
+ * This module is required for PEM support (required by X.509).
+ */
+#define MBEDTLS_BASE64_C
+
+/**
+ * \def MBEDTLS_BIGNUM_C
+ *
+ * Enable the multi-precision integer library.
+ *
+ * Module: library/bignum.c
+ * Caller: library/dhm.c
+ * library/ecp.c
+ * library/ecdsa.c
+ * library/rsa.c
+ * library/rsa_internal.c
+ * library/ssl_tls.c
+ *
+ * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support.
+ */
+#define MBEDTLS_BIGNUM_C
+
+/**
+ * \def MBEDTLS_BLOWFISH_C
+ *
+ * Enable the Blowfish block cipher.
+ *
+ * Module: library/blowfish.c
+ */
+//#define MBEDTLS_BLOWFISH_C
+
+/**
+ * \def MBEDTLS_CAMELLIA_C
+ *
+ * Enable the Camellia block cipher.
+ *
+ * Module: library/camellia.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ */
+//#define MBEDTLS_CAMELLIA_C
+
+/**
+ * \def MBEDTLS_ARIA_C
+ *
+ * Enable the ARIA block cipher.
+ *
+ * Module: library/aria.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384
+ */
+//#define MBEDTLS_ARIA_C
+
+/**
+ * \def MBEDTLS_CCM_C
+ *
+ * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher.
+ *
+ * Module: library/ccm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-CCM ciphersuites, if other requisites are
+ * enabled as well.
+ */
+#define MBEDTLS_CCM_C
+
+/**
+ * \def MBEDTLS_CERTS_C
+ *
+ * Enable the test certificates.
+ *
+ * Module: library/certs.c
+ * Caller:
+ *
+ * This module is used for testing (ssl_client/server).
+ */
+//#define MBEDTLS_CERTS_C
+
+/**
+ * \def MBEDTLS_CHACHA20_C
+ *
+ * Enable the ChaCha20 stream cipher.
+ *
+ * Module: library/chacha20.c
+ */
+#define MBEDTLS_CHACHA20_C
+
+/**
+ * \def MBEDTLS_CHACHAPOLY_C
+ *
+ * Enable the ChaCha20-Poly1305 AEAD algorithm.
+ *
+ * Module: library/chachapoly.c
+ *
+ * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C
+ */
+#define MBEDTLS_CHACHAPOLY_C
+
+/**
+ * \def MBEDTLS_CIPHER_C
+ *
+ * Enable the generic cipher layer.
+ *
+ * Module: library/cipher.c
+ * Caller: library/ssl_tls.c
+ *
+ * Uncomment to enable generic cipher wrappers.
+ */
+#define MBEDTLS_CIPHER_C
+
+/**
+ * \def MBEDTLS_CMAC_C
+ *
+ * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
+ * ciphers.
+ *
+ * Module: library/cmac.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
+ *
+ */
+#define MBEDTLS_CMAC_C
+
+/**
+ * \def MBEDTLS_CTR_DRBG_C
+ *
+ * Enable the CTR_DRBG AES-256-based random generator.
+ *
+ * Module: library/ctr_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * This module provides the CTR_DRBG AES-256 random number generator.
+ */
+#define MBEDTLS_CTR_DRBG_C
+
+/**
+ * \def MBEDTLS_DEBUG_C
+ *
+ * Enable the debug functions.
+ *
+ * Module: library/debug.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module provides debugging functions.
+ */
+//#define MBEDTLS_DEBUG_C
+
+/**
+ * \def MBEDTLS_DES_C
+ *
+ * Enable the DES block cipher.
+ *
+ * Module: library/des.c
+ * Caller: library/pem.c
+ * library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ *
+ * PEM_PARSE uses DES/3DES for decrypting encrypted keys.
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_DES_C
+
+/**
+ * \def MBEDTLS_DHM_C
+ *
+ * Enable the Diffie-Hellman-Merkle module.
+ *
+ * Module: library/dhm.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * DHE-RSA, DHE-PSK
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_DHM_C
+
+/**
+ * \def MBEDTLS_ECDH_C
+ *
+ * Enable the elliptic curve Diffie-Hellman library.
+ *
+ * Module: library/ecdh.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK
+ *
+ * Requires: MBEDTLS_ECP_C
+ */
+#define MBEDTLS_ECDH_C
+
+/**
+ * \def MBEDTLS_ECDSA_C
+ *
+ * Enable the elliptic curve DSA library.
+ *
+ * Module: library/ecdsa.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ */
+#define MBEDTLS_ECDSA_C
+
+/**
+ * \def MBEDTLS_ECJPAKE_C
+ *
+ * Enable the elliptic curve J-PAKE library.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Module: library/ecjpake.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECJPAKE
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C
+ */
+//#define MBEDTLS_ECJPAKE_C
+
+/**
+ * \def MBEDTLS_ECP_C
+ *
+ * Enable the elliptic curve over GF(p) library.
+ *
+ * Module: library/ecp.c
+ * Caller: library/ecdh.c
+ * library/ecdsa.c
+ * library/ecjpake.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED
+ */
+#define MBEDTLS_ECP_C
+
+/**
+ * \def MBEDTLS_ENTROPY_C
+ *
+ * Enable the platform-specific entropy code.
+ *
+ * Module: library/entropy.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C
+ *
+ * This module provides a generic entropy pool
+ */
+#define MBEDTLS_ENTROPY_C
+
+/**
+ * \def MBEDTLS_ERROR_C
+ *
+ * Enable error code to error string conversion.
+ *
+ * Module: library/error.c
+ * Caller:
+ *
+ * This module enables mbedtls_strerror().
+ */
+//#define MBEDTLS_ERROR_C
+
+/**
+ * \def MBEDTLS_GCM_C
+ *
+ * Enable the Galois/Counter Mode (GCM) for AES.
+ *
+ * Module: library/gcm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
+ * requisites are enabled as well.
+ */
+#define MBEDTLS_GCM_C
+
+/**
+ * \def MBEDTLS_HAVEGE_C
+ *
+ * Enable the HAVEGE random generator.
+ *
+ * Warning: the HAVEGE random generator is not suitable for virtualized
+ * environments
+ *
+ * Warning: the HAVEGE random generator is dependent on timing and specific
+ * processor traits. It is therefore not advised to use HAVEGE as
+ * your applications primary random generator or primary entropy pool
+ * input. As a secondary input to your entropy pool, it IS able add
+ * the (limited) extra entropy it provides.
+ *
+ * Module: library/havege.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_TIMING_C
+ *
+ * Uncomment to enable the HAVEGE random generator.
+ */
+//#define MBEDTLS_HAVEGE_C
+
+/**
+ * \def MBEDTLS_HKDF_C
+ *
+ * Enable the HKDF algorithm (RFC 5869).
+ *
+ * Module: library/hkdf.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the Hashed Message Authentication Code
+ * (HMAC)-based key derivation function (HKDF).
+ */
+#define MBEDTLS_HKDF_C
+
+/**
+ * \def MBEDTLS_HMAC_DRBG_C
+ *
+ * Enable the HMAC_DRBG random generator.
+ *
+ * Module: library/hmac_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * Uncomment to enable the HMAC_DRBG random number geerator.
+ */
+#define MBEDTLS_HMAC_DRBG_C
+
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable the Key Wrapping mode for 128-bit block ciphers,
+ * as defined in NIST SP 800-38F. Only KW and KWP modes
+ * are supported. At the moment, only AES is approved by NIST.
+ *
+ * Module: library/nist_kw.c
+ *
+ * Requires: MBEDTLS_AES_C and MBEDTLS_CIPHER_C
+ */
+#define MBEDTLS_NIST_KW_C
+
+/**
+ * \def MBEDTLS_MD_C
+ *
+ * Enable the generic message digest layer.
+ *
+ * Module: library/md.c
+ * Caller:
+ *
+ * Uncomment to enable generic message digest wrappers.
+ */
+#define MBEDTLS_MD_C
+
+/**
+ * \def MBEDTLS_MD2_C
+ *
+ * Enable the MD2 hash algorithm.
+ *
+ * Module: library/md2.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD2-signed X.509 certs.
+ *
+ * \warning MD2 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD2_C
+
+/**
+ * \def MBEDTLS_MD4_C
+ *
+ * Enable the MD4 hash algorithm.
+ *
+ * Module: library/md4.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD4-signed X.509 certs.
+ *
+ * \warning MD4 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD4_C
+
+/**
+ * \def MBEDTLS_MD5_C
+ *
+ * Enable the MD5 hash algorithm.
+ *
+ * Module: library/md5.c
+ * Caller: library/md.c
+ * library/pem.c
+ * library/ssl_tls.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, and for TLS 1.2
+ * depending on the handshake parameters. Further, it is used for checking
+ * MD5-signed certificates, and for PBKDF1 when decrypting PEM-encoded
+ * encrypted keys.
+ *
+ * \warning MD5 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD5_C
+
+/**
+ * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Enable the buffer allocator implementation that makes use of a (stack)
+ * based buffer to 'allocate' dynamic memory. (replaces calloc() and free()
+ * calls)
+ *
+ * Module: library/memory_buffer_alloc.c
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS)
+ *
+ * Enable this module to enable the buffer memory allocator.
+ */
+#define MBEDTLS_MEMORY_BUFFER_ALLOC_C
+
+/**
+ * \def MBEDTLS_NET_C
+ *
+ * Enable the TCP and UDP over IPv6/IPv4 networking routines.
+ *
+ * \note This module only works on POSIX/Unix (including Linux, BSD and OS X)
+ * and Windows. For other platforms, you'll want to disable it, and write your
+ * own networking callbacks to be passed to \c mbedtls_ssl_set_bio().
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/net_sockets.c
+ *
+ * This module provides networking routines.
+ */
+//#define MBEDTLS_NET_C
+
+/**
+ * \def MBEDTLS_OID_C
+ *
+ * Enable the OID database.
+ *
+ * Module: library/oid.c
+ * Caller: library/asn1write.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ * library/pkwrite.c
+ * library/rsa.c
+ * library/x509.c
+ * library/x509_create.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * This modules translates between OIDs and internal values.
+ */
+#define MBEDTLS_OID_C
+
+/**
+ * \def MBEDTLS_PADLOCK_C
+ *
+ * Enable VIA Padlock support on x86.
+ *
+ * Module: library/padlock.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the VIA PadLock on x86.
+ */
+//#define MBEDTLS_PADLOCK_C
+
+/**
+ * \def MBEDTLS_PEM_PARSE_C
+ *
+ * Enable PEM decoding / parsing.
+ *
+ * Module: library/pem.c
+ * Caller: library/dhm.c
+ * library/pkparse.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for decoding / parsing PEM files.
+ */
+#define MBEDTLS_PEM_PARSE_C
+
+/**
+ * \def MBEDTLS_PEM_WRITE_C
+ *
+ * Enable PEM encoding / writing.
+ *
+ * Module: library/pem.c
+ * Caller: library/pkwrite.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for encoding / writing PEM files.
+ */
+#define MBEDTLS_PEM_WRITE_C
+
+/**
+ * \def MBEDTLS_PK_C
+ *
+ * Enable the generic public (asymetric) key layer.
+ *
+ * Module: library/pk.c
+ * Caller: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C
+ *
+ * Uncomment to enable generic public key wrappers.
+ */
+#define MBEDTLS_PK_C
+
+/**
+ * \def MBEDTLS_PK_PARSE_C
+ *
+ * Enable the generic public (asymetric) key parser.
+ *
+ * Module: library/pkparse.c
+ * Caller: library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key parse functions.
+ */
+#define MBEDTLS_PK_PARSE_C
+
+/**
+ * \def MBEDTLS_PK_WRITE_C
+ *
+ * Enable the generic public (asymetric) key writer.
+ *
+ * Module: library/pkwrite.c
+ * Caller: library/x509write.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key write functions.
+ */
+#define MBEDTLS_PK_WRITE_C
+
+/**
+ * \def MBEDTLS_PKCS5_C
+ *
+ * Enable PKCS#5 functions.
+ *
+ * Module: library/pkcs5.c
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the PKCS#5 functions.
+ */
+#define MBEDTLS_PKCS5_C
+
+/**
+ * \def MBEDTLS_PKCS11_C
+ *
+ * Enable wrapper for PKCS#11 smartcard support.
+ *
+ * Module: library/pkcs11.c
+ * Caller: library/pk.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * This module enables SSL/TLS PKCS #11 smartcard support.
+ * Requires the presence of the PKCS#11 helper library (libpkcs11-helper)
+ */
+//#define MBEDTLS_PKCS11_C
+
+/**
+ * \def MBEDTLS_PKCS12_C
+ *
+ * Enable PKCS#12 PBE functions.
+ * Adds algorithms for parsing PKCS#8 encrypted private keys
+ *
+ * Module: library/pkcs12.c
+ * Caller: library/pkparse.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * Can use: MBEDTLS_ARC4_C
+ *
+ * This module enables PKCS#12 functions.
+ */
+//#define MBEDTLS_PKCS12_C
+
+/**
+ * \def MBEDTLS_PLATFORM_C
+ *
+ * Enable the platform abstraction layer that allows you to re-assign
+ * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit().
+ *
+ * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT
+ * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned
+ * above to be specified at runtime or compile time respectively.
+ *
+ * \note This abstraction layer must be enabled on Windows (including MSYS2)
+ * as other module rely on it for a fixed snprintf implementation.
+ *
+ * Module: library/platform.c
+ * Caller: Most other .c files
+ *
+ * This module enables abstraction of common (libc) functions.
+ */
+#define MBEDTLS_PLATFORM_C
+
+/**
+ * \def MBEDTLS_POLY1305_C
+ *
+ * Enable the Poly1305 MAC algorithm.
+ *
+ * Module: library/poly1305.c
+ * Caller: library/chachapoly.c
+ */
+#define MBEDTLS_POLY1305_C
+
+/**
+ * \def MBEDTLS_RIPEMD160_C
+ *
+ * Enable the RIPEMD-160 hash algorithm.
+ *
+ * Module: library/ripemd160.c
+ * Caller: library/md.c
+ *
+ */
+//#define MBEDTLS_RIPEMD160_C
+
+/**
+ * \def MBEDTLS_RSA_C
+ *
+ * Enable the RSA public-key cryptosystem.
+ *
+ * Module: library/rsa.c
+ * library/rsa_internal.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509.c
+ *
+ * This module is used by the following key exchanges:
+ * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C
+ */
+#define MBEDTLS_RSA_C
+
+/**
+ * \def MBEDTLS_SHA1_C
+ *
+ * Enable the SHA1 cryptographic hash algorithm.
+ *
+ * Module: library/sha1.c
+ * Caller: library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509write_crt.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, for TLS 1.2
+ * depending on the handshake parameters, and for SHA1-signed certificates.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_SHA1_C
+
+/**
+ * \def MBEDTLS_SHA256_C
+ *
+ * Enable the SHA-224 and SHA-256 cryptographic hash algorithms.
+ *
+ * Module: library/sha256.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module adds support for SHA-224 and SHA-256.
+ * This module is required for the SSL/TLS 1.2 PRF function.
+ */
+#define MBEDTLS_SHA256_C
+
+/**
+ * \def MBEDTLS_SHA512_C
+ *
+ * Enable the SHA-384 and SHA-512 cryptographic hash algorithms.
+ *
+ * Module: library/sha512.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module adds support for SHA-384 and SHA-512.
+ */
+#define MBEDTLS_SHA512_C
+
+/**
+ * \def MBEDTLS_SSL_CACHE_C
+ *
+ * Enable simple SSL cache implementation.
+ *
+ * Module: library/ssl_cache.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_CACHE_C
+ */
+//#define MBEDTLS_SSL_CACHE_C
+
+/**
+ * \def MBEDTLS_SSL_COOKIE_C
+ *
+ * Enable basic implementation of DTLS cookies for hello verification.
+ *
+ * Module: library/ssl_cookie.c
+ * Caller:
+ */
+//#define MBEDTLS_SSL_COOKIE_C
+
+/**
+ * \def MBEDTLS_SSL_TICKET_C
+ *
+ * Enable an implementation of TLS server-side callbacks for session tickets.
+ *
+ * Module: library/ssl_ticket.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_CIPHER_C
+ */
+//#define MBEDTLS_SSL_TICKET_C
+
+/**
+ * \def MBEDTLS_SSL_CLI_C
+ *
+ * Enable the SSL/TLS client code.
+ *
+ * Module: library/ssl_cli.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS client support.
+ */
+//#define MBEDTLS_SSL_CLI_C
+
+/**
+ * \def MBEDTLS_SSL_SRV_C
+ *
+ * Enable the SSL/TLS server code.
+ *
+ * Module: library/ssl_srv.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS server support.
+ */
+//#define MBEDTLS_SSL_SRV_C
+
+/**
+ * \def MBEDTLS_SSL_TLS_C
+ *
+ * Enable the generic SSL/TLS code.
+ *
+ * Module: library/ssl_tls.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * and at least one of the MBEDTLS_SSL_PROTO_XXX defines
+ *
+ * This module is required for SSL/TLS.
+ */
+//#define MBEDTLS_SSL_TLS_C
+
+/**
+ * \def MBEDTLS_THREADING_C
+ *
+ * Enable the threading abstraction layer.
+ * By default mbed TLS assumes it is used in a non-threaded environment or that
+ * contexts are not shared between threads. If you do intend to use contexts
+ * between threads, you will need to enable this layer to prevent race
+ * conditions. See also our Knowledge Base article about threading:
+ * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
+ *
+ * Module: library/threading.c
+ *
+ * This allows different threading implementations (self-implemented or
+ * provided).
+ *
+ * You will have to enable either MBEDTLS_THREADING_ALT or
+ * MBEDTLS_THREADING_PTHREAD.
+ *
+ * Enable this layer to allow use of mutexes within mbed TLS
+ */
+//#define MBEDTLS_THREADING_C
+
+/**
+ * \def MBEDTLS_TIMING_C
+ *
+ * Enable the semi-portable timing interface.
+ *
+ * \note The provided implementation only works on POSIX/Unix (including Linux,
+ * BSD and OS X) and Windows. On other platforms, you can either disable that
+ * module and provide your own implementations of the callbacks needed by
+ * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide
+ * your own implementation of the whole module by setting
+ * \c MBEDTLS_TIMING_ALT in the current file.
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/timing.c
+ * Caller: library/havege.c
+ *
+ * This module is used by the HAVEGE random number generator.
+ */
+//#define MBEDTLS_TIMING_C
+
+/**
+ * \def MBEDTLS_VERSION_C
+ *
+ * Enable run-time version information.
+ *
+ * Module: library/version.c
+ *
+ * This module provides run-time version information.
+ */
+#define MBEDTLS_VERSION_C
+
+/**
+ * \def MBEDTLS_X509_USE_C
+ *
+ * Enable X.509 core for using certificates.
+ *
+ * Module: library/x509.c
+ * Caller: library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C,
+ * MBEDTLS_PK_PARSE_C
+ *
+ * This module is required for the X.509 parsing modules.
+ */
+//#define MBEDTLS_X509_USE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Enable X.509 certificate parsing.
+ *
+ * Module: library/x509_crt.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 certificate parsing.
+ */
+//#define MBEDTLS_X509_CRT_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CRL_PARSE_C
+ *
+ * Enable X.509 CRL parsing.
+ *
+ * Module: library/x509_crl.c
+ * Caller: library/x509_crt.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 CRL parsing.
+ */
+//#define MBEDTLS_X509_CRL_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_PARSE_C
+ *
+ * Enable X.509 Certificate Signing Request (CSR) parsing.
+ *
+ * Module: library/x509_csr.c
+ * Caller: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is used for reading X.509 certificate request.
+ */
+//#define MBEDTLS_X509_CSR_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CREATE_C
+ *
+ * Enable X.509 core for creating certificates.
+ *
+ * Module: library/x509_create.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C
+ *
+ * This module is the basis for creating X.509 certificates and CSRs.
+ */
+//#define MBEDTLS_X509_CREATE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_WRITE_C
+ *
+ * Enable creating X.509 certificates.
+ *
+ * Module: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate creation.
+ */
+//#define MBEDTLS_X509_CRT_WRITE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_WRITE_C
+ *
+ * Enable creating X.509 Certificate Signing Requests (CSR).
+ *
+ * Module: library/x509_csr_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate request writing.
+ */
+//#define MBEDTLS_X509_CSR_WRITE_C
+
+/**
+ * \def MBEDTLS_XTEA_C
+ *
+ * Enable the XTEA block cipher.
+ *
+ * Module: library/xtea.c
+ * Caller:
+ */
+//#define MBEDTLS_XTEA_C
+
+/* \} name SECTION: mbed TLS modules */
+
+/**
+ * \name SECTION: Module configuration options
+ *
+ * This section allows for the setting of module specific sizes and
+ * configuration options. The default values are already present in the
+ * relevant header files and should suffice for the regular use cases.
+ *
+ * Our advice is to enable options and change their values here
+ * only if you have a good reason and know the consequences.
+ *
+ * Please check the respective header file for documentation on these
+ * parameters (to prevent duplicate documentation).
+ * \{
+ */
+
+/* MPI / BIGNUM options */
+//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */
+//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */
+
+/* CTR_DRBG options */
+//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */
+/*! Maximal reseed counter - indicates maximal number of
+requests allowed between reseeds; according to NIST 800-90
+it is (2^48 - 1), our restriction is : (int - 0xFFFF - 0xF ).*/
+#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 0xFFF0 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+//#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY /**< Use 128-bit key for CTR_DRBG - may reduce security (see ctr_drbg.h) */
+
+/* HMAC_DRBG options */
+//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+
+/* ECP options */
+//#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */
+//#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */
+//#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */
+
+/* Entropy options */
+//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */
+#define MBEDTLS_ENTROPY_MAX_GATHER 144 /**< Maximum amount requested from entropy sources */
+//#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Default minimum number of bytes required for the hardware entropy source mbedtls_hardware_poll() before entropy is released */
+
+/* Memory buffer allocator options */
+//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */
+
+/* Platform options */
+//#define MBEDTLS_PLATFORM_STD_MEM_HDR <stdlib.h> /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */
+//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */
+#define MBEDTLS_PLATFORM_STD_CALLOC pvPortCalloc /**< Default allocator to use, can be undefined */
+#define MBEDTLS_PLATFORM_STD_FREE vPortFree /**< Default free to use, can be undefined */
+
+//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_TIME time /**< Default time to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS 0 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE 1 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile" /**< Seed file to read/write with default implementation */
+
+/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */
+/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */
+//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_TIME_MACRO time /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_TIME_TYPE_MACRO time_t /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+
+/**
+ * \brief This macro is invoked by the library when an invalid parameter
+ * is detected that is only checked with MBEDTLS_CHECK_PARAMS
+ * (see the documentation of that option for context).
+ *
+ * When you leave this undefined here, a default definition is
+ * provided that invokes the function mbedtls_param_failed(),
+ * which is declared in platform_util.h for the benefit of the
+ * library, but that you need to define in your application.
+ *
+ * When you define this here, this replaces the default
+ * definition in platform_util.h (which no longer declares the
+ * function mbedtls_param_failed()) and it is your responsibility
+ * to make sure this macro expands to something suitable (in
+ * particular, that all the necessary declarations are visible
+ * from within the library - you can ensure that by providing
+ * them in this file next to the macro definition).
+ *
+ * Note that you may define this macro to expand to nothing, in
+ * which case you don't have to worry about declarations or
+ * definitions. However, you will then be notified about invalid
+ * parameters only in non-void functions, and void function will
+ * just silently return early on invalid parameters, which
+ * partially negates the benefits of enabling
+ * #MBEDTLS_CHECK_PARAMS in the first place, so is discouraged.
+ *
+ * \param cond The expression that should evaluate to true, but doesn't.
+ */
+//#define MBEDTLS_PARAM_FAILED( cond ) assert( cond )
+
+/* SSL Cache options */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */
+
+/* SSL options */
+
+/** \def MBEDTLS_SSL_MAX_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming and outgoing plaintext fragments.
+ *
+ * This determines the size of both the incoming and outgoing TLS I/O buffers
+ * in such a way that both are capable of holding the specified amount of
+ * plaintext data, regardless of the protection mechanism used.
+ *
+ * To configure incoming and outgoing I/O buffers separately, use
+ * #MBEDTLS_SSL_IN_CONTENT_LEN and #MBEDTLS_SSL_OUT_CONTENT_LEN,
+ * which overwrite the value set by this option.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ * recommended to use the Maximum Fragment Length (MFL) extension to
+ * inform the server about this limitation. On the server, there
+ * is no supported, standardized way of informing the client about
+ * restriction on the maximum size of incoming messages, and unless
+ * the limitation has been communicated by other means, it is recommended
+ * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ * while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of both
+ * incoming and outgoing I/O buffers.
+ */
+//#define MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_IN_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming plaintext fragments.
+ *
+ * This determines the size of the incoming TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option is undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ * recommended to use the Maximum Fragment Length (MFL) extension to
+ * inform the server about this limitation. On the server, there
+ * is no supported, standardized way of informing the client about
+ * restriction on the maximum size of incoming messages, and unless
+ * the limitation has been communicated by other means, it is recommended
+ * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ * while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of the incoming I/O buffer
+ * independently of the outgoing I/O buffer.
+ */
+//#define MBEDTLS_SSL_IN_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_OUT_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of outgoing plaintext fragments.
+ *
+ * This determines the size of the outgoing TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * It is possible to save RAM by setting a smaller outward buffer, while keeping
+ * the default inward 16384 byte buffer to conform to the TLS specification.
+ *
+ * The minimum required outward buffer size is determined by the handshake
+ * protocol's usage. Handshaking will fail if the outward buffer is too small.
+ * The specific size requirement depends on the configured ciphers and any
+ * certificate data which is sent during the handshake.
+ *
+ * Uncomment to set the maximum plaintext size of the outgoing I/O buffer
+ * independently of the incoming I/O buffer.
+ */
+//#define MBEDTLS_SSL_OUT_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_DTLS_MAX_BUFFERING
+ *
+ * Maximum number of heap-allocated bytes for the purpose of
+ * DTLS handshake message reassembly and future message buffering.
+ *
+ * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN
+ * to account for a reassembled handshake message of maximum size,
+ * together with its reassembly bitmap.
+ *
+ * A value of 2 * MBEDTLS_SSL_IN_CONTENT_LEN (32768 by default)
+ * should be sufficient for all practical situations as it allows
+ * to reassembly a large handshake message (such as a certificate)
+ * while buffering multiple smaller handshake messages.
+ *
+ */
+//#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
+
+//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */
+//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
+//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
+
+/**
+ * Complete list of ciphersuites to use, in order of preference.
+ *
+ * \warning No dependency checking is done on that field! This option can only
+ * be used to restrict the set of available ciphersuites. It is your
+ * responsibility to make sure the needed modules are active.
+ *
+ * Use this to save a few hundred bytes of ROM (default ordering of all
+ * available ciphersuites) and a few to a few hundred bytes of RAM.
+ *
+ * The value below is only an example, not the default.
+ */
+//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+
+/* X509 options */
+//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */
+//#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */
+
+/**
+ * Allow SHA-1 in the default TLS configuration for certificate signing.
+ * Without this build-time option, SHA-1 support must be activated explicitly
+ * through mbedtls_ssl_conf_cert_profile. Turning on this option is not
+ * recommended because of it is possible to generate SHA-1 collisions, however
+ * this may be safe for legacy infrastructure where additional controls apply.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+// #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES
+
+/**
+ * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
+ * signature and ciphersuite selection. Without this build-time option, SHA-1
+ * support must be activated explicitly through mbedtls_ssl_conf_sig_hashes.
+ * The use of SHA-1 in TLS <= 1.1 and in HMAC-SHA-1 is always allowed by
+ * default. At the time of writing, there is no practical attack on the use
+ * of SHA-1 in handshake signatures, hence this option is turned on by default
+ * to preserve compatibility with existing peers, but the general
+ * warning applies nonetheless:
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+
+/**
+ * Uncomment the macro to let mbed TLS use your alternate implementation of
+ * mbedtls_platform_zeroize(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * mbedtls_platform_zeroize() is a widely used function across the library to
+ * zero a block of memory. The implementation is expected to be secure in the
+ * sense that it has been written to prevent the compiler from removing calls
+ * to mbedtls_platform_zeroize() as part of redundant code elimination
+ * optimizations. However, it is difficult to guarantee that calls to
+ * mbedtls_platform_zeroize() will not be optimized by the compiler as older
+ * versions of the C language standards do not provide a secure implementation
+ * of memset(). Therefore, MBEDTLS_PLATFORM_ZEROIZE_ALT enables users to
+ * configure their own implementation of mbedtls_platform_zeroize(), for
+ * example by using directives specific to their compiler, features from newer
+ * C standards (e.g using memset_s() in C11) or calling a secure memset() from
+ * their system (e.g explicit_bzero() in BSD).
+ */
+//#define MBEDTLS_PLATFORM_ZEROIZE_ALT
+
+/**
+ * Uncomment the macro to let Mbed TLS use your alternate implementation of
+ * mbedtls_platform_gmtime_r(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * gmtime() is not a thread-safe function as defined in the C standard. The
+ * library will try to use safer implementations of this function, such as
+ * gmtime_r() when available. However, if Mbed TLS cannot identify the target
+ * system, the implementation of mbedtls_platform_gmtime_r() will default to
+ * using the standard gmtime(). In this case, calls from the library to
+ * gmtime() will be guarded by the global mutex mbedtls_threading_gmtime_mutex
+ * if MBEDTLS_THREADING_C is enabled. We recommend that calls from outside the
+ * library are also guarded with this mutex to avoid race conditions. However,
+ * if the macro MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, Mbed TLS will
+ * unconditionally use the implementation for mbedtls_platform_gmtime_r()
+ * supplied at compile time.
+ */
+//#define MBEDTLS_PLATFORM_GMTIME_R_ALT
+
+/* \} name SECTION: Customisation configuration options */
+
+/* Target and application specific configurations */
+//#define YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE "mbedtls/target_config.h"
+
+#if defined(TARGET_LIKE_MBED) && defined(YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE)
+#include YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE
+#endif
+
+/*
+ * Allow user to override any previous default.
+ *
+ * Use two macro names for that, as:
+ * - with yotta the prefix YOTTA_CFG_ is forced
+ * - without yotta is looks weird to have a YOTTA prefix.
+ */
+#if defined(YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE)
+#include YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE
+#elif defined(MBEDTLS_USER_CONFIG_FILE)
+#include MBEDTLS_USER_CONFIG_FILE
+#endif
+
+#include "mbedtls/check_config.h"
+
+/* Allow compilation of FreeRTOS only in mbedtls library and not in ccproductionLib*/
+#if !defined(DX_PLAT_MPS2_PLUS)
+#include "FreeRTOS.h"
+#endif
+
+#endif /* MBEDTLS_CONFIG_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312-mps2-no-os.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312-mps2-no-os.h
new file mode 100644
index 0000000..017c9ec
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312-mps2-no-os.h
@@ -0,0 +1,3266 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef MBEDTLS_CONFIG_H
+#define MBEDTLS_CONFIG_H
+
+#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE)
+#define _CRT_SECURE_NO_DEPRECATE 1
+#endif
+
+/**
+ * \name SECTION: System support
+ *
+ * This section sets system specific settings.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_HAVE_ASM
+ *
+ * The compiler has support for asm().
+ *
+ * Requires support for asm() in compiler.
+ *
+ * Used in:
+ * library/aria.c
+ * library/timing.c
+ * include/mbedtls/bn_mul.h
+ *
+ * Required by:
+ * MBEDTLS_AESNI_C
+ * MBEDTLS_PADLOCK_C
+ *
+ * Comment to disable the use of assembly code.
+ */
+#define MBEDTLS_HAVE_ASM
+
+/**
+ * \def MBEDTLS_NO_UDBL_DIVISION
+ *
+ * The platform lacks support for double-width integer division (64-bit
+ * division on a 32-bit platform, 128-bit division on a 64-bit platform).
+ *
+ * Used in:
+ * include/mbedtls/bignum.h
+ * library/bignum.c
+ *
+ * The bignum code uses double-width division to speed up some operations.
+ * Double-width division is often implemented in software that needs to
+ * be linked with the program. The presence of a double-width integer
+ * type is usually detected automatically through preprocessor macros,
+ * but the automatic detection cannot know whether the code needs to
+ * and can be linked with an implementation of division for that type.
+ * By default division is assumed to be usable if the type is present.
+ * Uncomment this option to prevent the use of double-width division.
+ *
+ * Note that division for the native integer type is always required.
+ * Furthermore, a 64-bit type is always required even on a 32-bit
+ * platform, but it need not support multiplication or division. In some
+ * cases it is also desirable to disable some double-width operations. For
+ * example, if double-width division is implemented in software, disabling
+ * it can reduce code size in some embedded targets.
+ */
+//#define MBEDTLS_NO_UDBL_DIVISION
+
+/**
+ * \def MBEDTLS_NO_64BIT_MULTIPLICATION
+ *
+ * The platform lacks support for 32x32 -> 64-bit multiplication.
+ *
+ * Used in:
+ * library/poly1305.c
+ *
+ * Some parts of the library may use multiplication of two unsigned 32-bit
+ * operands with a 64-bit result in order to speed up computations. On some
+ * platforms, this is not available in hardware and has to be implemented in
+ * software, usually in a library provided by the toolchain.
+ *
+ * Sometimes it is not desirable to have to link to that library. This option
+ * removes the dependency of that library on platforms that lack a hardware
+ * 64-bit multiplier by embedding a software implementation in Mbed TLS.
+ *
+ * Note that depending on the compiler, this may decrease performance compared
+ * to using the library function provided by the toolchain.
+ */
+//#define MBEDTLS_NO_64BIT_MULTIPLICATION
+
+/**
+ * \def MBEDTLS_HAVE_SSE2
+ *
+ * CPU supports SSE2 instruction set.
+ *
+ * Uncomment if the CPU supports SSE2 (IA-32 specific).
+ */
+//#define MBEDTLS_HAVE_SSE2
+
+/**
+ * \def MBEDTLS_HAVE_TIME
+ *
+ * System has time.h and time().
+ * The time does not need to be correct, only time differences are used,
+ * by contrast with MBEDTLS_HAVE_TIME_DATE
+ *
+ * Defining MBEDTLS_HAVE_TIME allows you to specify MBEDTLS_PLATFORM_TIME_ALT,
+ * MBEDTLS_PLATFORM_TIME_MACRO, MBEDTLS_PLATFORM_TIME_TYPE_MACRO and
+ * MBEDTLS_PLATFORM_STD_TIME.
+ *
+ * Comment if your system does not support time functions
+ */
+#define MBEDTLS_HAVE_TIME
+
+/**
+ * \def MBEDTLS_HAVE_TIME_DATE
+ *
+ * System has time.h, time(), and an implementation for
+ * mbedtls_platform_gmtime_r() (see below).
+ * The time needs to be correct (not necesarily very accurate, but at least
+ * the date should be correct). This is used to verify the validity period of
+ * X.509 certificates.
+ *
+ * Comment if your system does not have a correct clock.
+ *
+ * \note mbedtls_platform_gmtime_r() is an abstraction in platform_util.h that
+ * behaves similarly to the gmtime_r() function from the C standard. Refer to
+ * the documentation for mbedtls_platform_gmtime_r() for more information.
+ *
+ * \note It is possible to configure an implementation for
+ * mbedtls_platform_gmtime_r() at compile-time by using the macro
+ * MBEDTLS_PLATFORM_GMTIME_R_ALT.
+ */
+#define MBEDTLS_HAVE_TIME_DATE
+
+/**
+ * \def MBEDTLS_PLATFORM_MEMORY
+ *
+ * Enable the memory allocation layer.
+ *
+ * By default mbed TLS uses the system-provided calloc() and free().
+ * This allows different allocators (self-implemented or provided) to be
+ * provided to the platform abstraction layer.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY without the
+ * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide
+ * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and
+ * free() function pointer at runtime.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY and specifying
+ * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the
+ * alternate function at compile time.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Enable this layer to allow use of alternative memory allocators.
+ */
+#define MBEDTLS_PLATFORM_MEMORY
+
+/**
+ * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+ *
+ * Do not assign standard functions in the platform layer (e.g. calloc() to
+ * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF)
+ *
+ * This makes sure there are no linking errors on platforms that do not support
+ * these functions. You will HAVE to provide alternatives, either at runtime
+ * via the platform_set_xxx() functions or at compile time by setting
+ * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a
+ * MBEDTLS_PLATFORM_XXX_MACRO.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Uncomment to prevent default assignment of standard functions in the
+ * platform layer.
+ */
+//#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+
+/**
+ * \def MBEDTLS_PLATFORM_EXIT_ALT
+ *
+ * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the
+ * function in the platform abstraction layer.
+ *
+ * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will
+ * provide a function "mbedtls_platform_set_printf()" that allows you to set an
+ * alternative printf function pointer.
+ *
+ * All these define require MBEDTLS_PLATFORM_C to be defined!
+ *
+ * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows;
+ * it will be enabled automatically by check_config.h
+ *
+ * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as
+ * MBEDTLS_PLATFORM_XXX_MACRO!
+ *
+ * Requires: MBEDTLS_PLATFORM_TIME_ALT requires MBEDTLS_HAVE_TIME
+ *
+ * Uncomment a macro to enable alternate implementation of specific base
+ * platform function
+ */
+//#define MBEDTLS_PLATFORM_EXIT_ALT
+//#define MBEDTLS_PLATFORM_TIME_ALT
+//#define MBEDTLS_PLATFORM_FPRINTF_ALT
+//#define MBEDTLS_PLATFORM_PRINTF_ALT
+//#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_NV_SEED_ALT
+//#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
+
+/**
+ * \def MBEDTLS_DEPRECATED_WARNING
+ *
+ * Mark deprecated functions so that they generate a warning if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * This only works with GCC and Clang. With other compilers, you may want to
+ * use MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Uncomment to get warnings on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_WARNING
+
+/**
+ * \def MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Remove deprecated functions so that they generate an error if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * Uncomment to get errors on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_REMOVED
+
+/**
+ * \def MBEDTLS_CHECK_PARAMS
+ *
+ * This configuration option controls whether the library validates more of
+ * the parameters passed to it.
+ *
+ * When this flag is not defined, the library only attempts to validate an
+ * input parameter if: (1) they may come from the outside world (such as the
+ * network, the filesystem, etc.) or (2) not validating them could result in
+ * internal memory errors such as overflowing a buffer controlled by the
+ * library. On the other hand, it doesn't attempt to validate parameters whose
+ * values are fully controlled by the application (such as pointers).
+ *
+ * When this flag is defined, the library additionally attempts to validate
+ * parameters that are fully controlled by the application, and should always
+ * be valid if the application code is fully correct and trusted.
+ *
+ * For example, when a function accepts as input a pointer to a buffer that may
+ * contain untrusted data, and its documentation mentions that this pointer
+ * must not be NULL:
+ * - the pointer is checked to be non-NULL only if this option is enabled
+ * - the content of the buffer is always validated
+ *
+ * When this flag is defined, if a library function receives a parameter that
+ * is invalid, it will:
+ * - invoke the macro MBEDTLS_PARAM_FAILED() which by default expands to a
+ * call to the function mbedtls_param_failed()
+ * - immediately return (with a specific error code unless the function
+ * returns void and can't communicate an error).
+ *
+ * When defining this flag, you also need to:
+ * - either provide a definition of the function mbedtls_param_failed() in
+ * your application (see platform_util.h for its prototype) as the library
+ * calls that function, but does not provide a default definition for it,
+ * - or provide a different definition of the macro MBEDTLS_PARAM_FAILED()
+ * below if the above mechanism is not flexible enough to suit your needs.
+ * See the documentation of this macro later in this file.
+ *
+ * Uncomment to enable validation of application-controlled parameters.
+ */
+//#define MBEDTLS_CHECK_PARAMS
+
+/* \} name SECTION: System support */
+
+/**
+ * \name SECTION: mbed TLS feature support
+ *
+ * This section sets support for features that are or are not needed
+ * within the modules that are enabled.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_TIMING_ALT
+ *
+ * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(),
+ * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay()
+ *
+ * Only works if you have MBEDTLS_TIMING_C enabled.
+ *
+ * You will need to provide a header "timing_alt.h" and an implementation at
+ * compile time.
+ */
+//#define MBEDTLS_TIMING_ALT
+
+/**
+ * \def MBEDTLS_AES_ALT
+ *
+ * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternate core implementation of a symmetric crypto, an arithmetic or hash
+ * module (e.g. platform specific assembly optimized implementations). Keep
+ * in mind that the function prototypes should remain the same.
+ *
+ * This replaces the whole module. If you only want to replace one of the
+ * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer
+ * provide the "struct mbedtls_aes_context" definition and omit the base function
+ * declarations and implementations. "aes_alt.h" will be included from
+ * "aes.h" to include the new function definitions.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * module.
+ *
+ * \warning MD2, MD4, MD5, ARC4, DES and SHA-1 are considered weak and their
+ * use constitutes a security risk. If possible, we recommend
+ * avoiding dependencies on them, and considering stronger message
+ * digests and ciphers instead.
+ *
+ */
+#define MBEDTLS_AES_ALT
+//#define MBEDTLS_ARC4_ALT
+//#define MBEDTLS_ARIA_ALT
+//#define MBEDTLS_BLOWFISH_ALT
+//#define MBEDTLS_CAMELLIA_ALT
+#define MBEDTLS_CCM_ALT
+#define MBEDTLS_GCM_ALT
+#define MBEDTLS_CHACHA20_ALT
+#define MBEDTLS_CHACHAPOLY_ALT
+#define MBEDTLS_CMAC_ALT
+//#define MBEDTLS_DES_ALT
+//#define MBEDTLS_ECJPAKE_ALT
+//#define MBEDTLS_XTEA_ALT
+//#define MBEDTLS_NIST_KW_ALT
+//#define MBEDTLS_MD2_ALT
+//#define MBEDTLS_MD4_ALT
+//#define MBEDTLS_MD5_ALT
+#define MBEDTLS_POLY1305_ALT
+//#define MBEDTLS_RIPEMD160_ALT
+//#define MBEDTLS_RIPEMD160_ALT
+#define MBEDTLS_SHA1_ALT
+#define MBEDTLS_SHA256_ALT
+//#define MBEDTLS_SHA512_ALT
+#define MBEDTLS_RSA_ALT
+#define MBEDTLS_DHM_ALT
+//#define MBEDTLS_XTEA_ALT
+
+/*
+ * When replacing the elliptic curve module, pleace consider, that it is
+ * implemented with two .c files:
+ * - ecp.c
+ * - ecp_curves.c
+ * You can replace them very much like all the other MBEDTLS__MODULE_NAME__ALT
+ * macros as described above. The only difference is that you have to make sure
+ * that you provide functionality for both .c files.
+ */
+//#define MBEDTLS_ECP_ALT
+
+
+/**
+ * \def MBEDTLS_MD2_PROCESS_ALT
+ *
+ * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you
+ * alternate core implementation of symmetric crypto or hash function. Keep in
+ * mind that function prototypes should remain the same.
+ *
+ * This replaces only one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will
+ * no longer provide the mbedtls_sha1_process() function, but it will still provide
+ * the other function (using your mbedtls_sha1_process() function) and the definition
+ * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible
+ * with this definition.
+ *
+ * \note Because of a signature change, the core AES encryption and decryption routines are
+ * currently named mbedtls_aes_internal_encrypt and mbedtls_aes_internal_decrypt,
+ * respectively. When setting up alternative implementations, these functions should
+ * be overriden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
+ * must stay untouched.
+ *
+ * \note If you use the AES_xxx_ALT macros, then is is recommended to also set
+ * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
+ * tables.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ *
+ * \warning MD2, MD4, MD5, DES and SHA-1 are considered weak and their use
+ * constitutes a security risk. If possible, we recommend avoiding
+ * dependencies on them, and considering stronger message digests
+ * and ciphers instead.
+ *
+ */
+//#define MBEDTLS_MD2_PROCESS_ALT
+//#define MBEDTLS_MD4_PROCESS_ALT
+//#define MBEDTLS_MD5_PROCESS_ALT
+//#define MBEDTLS_RIPEMD160_PROCESS_ALT
+//#define MBEDTLS_SHA1_PROCESS_ALT
+//#define MBEDTLS_SHA256_PROCESS_ALT
+//#define MBEDTLS_SHA512_PROCESS_ALT
+//#define MBEDTLS_DES_SETKEY_ALT
+//#define MBEDTLS_DES_CRYPT_ECB_ALT
+//#define MBEDTLS_DES3_CRYPT_ECB_ALT
+//#define MBEDTLS_AES_SETKEY_ENC_ALT
+//#define MBEDTLS_AES_SETKEY_DEC_ALT
+//#define MBEDTLS_AES_ENCRYPT_ALT
+//#define MBEDTLS_AES_DECRYPT_ALT
+#define MBEDTLS_ECDH_GEN_PUBLIC_ALT
+#define MBEDTLS_ECDH_COMPUTE_SHARED_ALT
+#define MBEDTLS_ECDSA_VERIFY_ALT
+#define MBEDTLS_ECDSA_SIGN_ALT
+#define MBEDTLS_ECDSA_GENKEY_ALT
+/**
+ * \def MBEDTLS_ECP_INTERNAL_ALT
+ *
+ * Expose a part of the internal interface of the Elliptic Curve Point module.
+ *
+ * MBEDTLS_ECP__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternative core implementation of elliptic curve arithmetic. Keep in mind
+ * that function prototypes should remain the same.
+ *
+ * This partially replaces one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS_ECP_ALT flag. The original implementation
+ * is still present and it is used for group structures not supported by the
+ * alternative.
+ *
+ * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
+ * and implementing the following functions:
+ * unsigned char mbedtls_internal_ecp_grp_capable(
+ * const mbedtls_ecp_group *grp )
+ * int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp )
+ * void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp )
+ * The mbedtls_internal_ecp_grp_capable function should return 1 if the
+ * replacement functions implement arithmetic for the given group and 0
+ * otherwise.
+ * The functions mbedtls_internal_ecp_init and mbedtls_internal_ecp_free are
+ * called before and after each point operation and provide an opportunity to
+ * implement optimized set up and tear down instructions.
+ *
+ * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and
+ * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac
+ * function, but will use your mbedtls_internal_ecp_double_jac if the group is
+ * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when
+ * receives it as an argument). If the group is not supported then the original
+ * implementation is used. The other functions and the definition of
+ * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your
+ * implementation of mbedtls_internal_ecp_double_jac and
+ * mbedtls_internal_ecp_grp_capable must be compatible with this definition.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ */
+/* Required for all the functions in this section */
+//#define MBEDTLS_ECP_INTERNAL_ALT
+/* Support for Weierstrass curves with Jacobi representation */
+//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
+//#define MBEDTLS_ECP_ADD_MIXED_ALT
+//#define MBEDTLS_ECP_DOUBLE_JAC_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_ALT
+/* Support for curves with Montgomery arithmetic */
+//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT
+//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
+//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
+
+/**
+ * \def MBEDTLS_TEST_NULL_ENTROPY
+ *
+ * Enables testing and use of mbed TLS without any configured entropy sources.
+ * This permits use of the library on platforms before an entropy source has
+ * been integrated (see for example the MBEDTLS_ENTROPY_HARDWARE_ALT or the
+ * MBEDTLS_ENTROPY_NV_SEED switches).
+ *
+ * WARNING! This switch MUST be disabled in production builds, and is suitable
+ * only for development.
+ * Enabling the switch negates any security provided by the library.
+ *
+ * Requires MBEDTLS_ENTROPY_C, MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ */
+//#define MBEDTLS_TEST_NULL_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_HARDWARE_ALT
+ *
+ * Uncomment this macro to let mbed TLS use your own implementation of a
+ * hardware entropy collector.
+ *
+ * Your function must be called \c mbedtls_hardware_poll(), have the same
+ * prototype as declared in entropy_poll.h, and accept NULL as first argument.
+ *
+ * Uncomment to use your own hardware entropy collector.
+ */
+#define MBEDTLS_ENTROPY_HARDWARE_ALT
+
+/**
+ * \def MBEDTLS_AES_ROM_TABLES
+ *
+ * Use precomputed AES tables stored in ROM.
+ *
+ * Uncomment this macro to use precomputed AES tables stored in ROM.
+ * Comment this macro to generate AES tables in RAM at runtime.
+ *
+ * Tradeoff: Using precomputed ROM tables reduces RAM usage by ~8kb
+ * (or ~2kb if \c MBEDTLS_AES_FEWER_TABLES is used) and reduces the
+ * initialization time before the first AES operation can be performed.
+ * It comes at the cost of additional ~8kb ROM use (resp. ~2kb if \c
+ * MBEDTLS_AES_FEWER_TABLES below is used), and potentially degraded
+ * performance if ROM access is slower than RAM access.
+ *
+ * This option is independent of \c MBEDTLS_AES_FEWER_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_ROM_TABLES
+
+/**
+ * \def MBEDTLS_AES_FEWER_TABLES
+ *
+ * Use less ROM/RAM for AES tables.
+ *
+ * Uncommenting this macro omits 75% of the AES tables from
+ * ROM / RAM (depending on the value of \c MBEDTLS_AES_ROM_TABLES)
+ * by computing their values on the fly during operations
+ * (the tables are entry-wise rotations of one another).
+ *
+ * Tradeoff: Uncommenting this reduces the RAM / ROM footprint
+ * by ~6kb but at the cost of more arithmetic operations during
+ * runtime. Specifically, one has to compare 4 accesses within
+ * different tables to 4 accesses with additional arithmetic
+ * operations within the same table. The performance gain/loss
+ * depends on the system and memory details.
+ *
+ * This option is independent of \c MBEDTLS_AES_ROM_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_FEWER_TABLES
+
+/**
+ * \def MBEDTLS_CAMELLIA_SMALL_MEMORY
+ *
+ * Use less ROM for the Camellia implementation (saves about 768 bytes).
+ *
+ * Uncomment this macro to use less memory for Camellia.
+ */
+//#define MBEDTLS_CAMELLIA_SMALL_MEMORY
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CBC
+ *
+ * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CBC
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CFB
+ *
+ * Enable Cipher Feedback mode (CFB) for symmetric ciphers.
+ */
+//#define MBEDTLS_CIPHER_MODE_CFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CTR
+ *
+ * Enable Counter Block Cipher mode (CTR) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CTR
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_OFB
+ *
+ * Enable Output Feedback mode (OFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_OFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_XTS
+ *
+ * Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES.
+ */
+//#define MBEDTLS_CIPHER_MODE_XTS
+
+/**
+ * \def MBEDTLS_CIPHER_NULL_CIPHER
+ *
+ * Enable NULL cipher.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * encryption or channels without any security!
+ *
+ * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable
+ * the following ciphersuites:
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA
+ *
+ * Uncomment this macro to enable the NULL cipher and ciphersuites
+ */
+//#define MBEDTLS_CIPHER_NULL_CIPHER
+
+/**
+ * \def MBEDTLS_CIPHER_PADDING_PKCS7
+ *
+ * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for
+ * specific padding modes in the cipher layer with cipher modes that support
+ * padding (e.g. CBC)
+ *
+ * If you disable all padding modes, only full blocks can be used with CBC.
+ *
+ * Enable padding modes in the cipher layer.
+ */
+//#define MBEDTLS_CIPHER_PADDING_PKCS7
+//#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+//#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+//#define MBEDTLS_CIPHER_PADDING_ZEROS
+
+/**
+ * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+ *
+ * Enable weak ciphersuites in SSL / TLS.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * channels with virtually no security at all!
+ *
+ * This enables the following ciphersuites:
+ * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA
+ *
+ * Uncomment this macro to enable weak ciphersuites
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+ *
+ * Remove RC4 ciphersuites by default in SSL / TLS.
+ * This flag removes the ciphersuites based on RC4 from the default list as
+ * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to
+ * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them
+ * explicitly.
+ *
+ * Uncomment this macro to remove RC4 ciphersuites by default.
+ */
+//#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED
+ *
+ * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve
+ * module. By default all supported curves are enabled.
+ *
+ * Comment macros to disable the curve and functions for it
+ */
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+/* CryptoCell only supports BP256R1 at this stage */
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+//#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+//#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+//#define MBEDTLS_ECP_DP_CURVE448_ENABLED
+
+/**
+ * \def MBEDTLS_ECP_NIST_OPTIM
+ *
+ * Enable specific 'modulo p' routines for each NIST prime.
+ * Depending on the prime and architecture, makes operations 4 to 8 times
+ * faster on the corresponding curve.
+ *
+ * Comment this macro to disable NIST curves optimisation.
+ */
+#define MBEDTLS_ECP_NIST_OPTIM
+
+/**
+ * \def MBEDTLS_ECP_RESTARTABLE
+ *
+ * Enable "non-blocking" ECC operations that can return early and be resumed.
+ *
+ * This allows various functions to pause by returning
+ * #MBEDTLS_ERR_ECP_IN_PROGRESS (or, for functions in the SSL module,
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS) and then be called later again in
+ * order to further progress and eventually complete their operation. This is
+ * controlled through mbedtls_ecp_set_max_ops() which limits the maximum
+ * number of ECC operations a function may perform before pausing; see
+ * mbedtls_ecp_set_max_ops() for more information.
+ *
+ * This is useful in non-threaded environments if you want to avoid blocking
+ * for too long on ECC (and, hence, X.509 or SSL/TLS) operations.
+ *
+ * Uncomment this macro to enable restartable ECC computations.
+ *
+ * \note This option only works with the default software implementation of
+ * elliptic curve functionality. It is incompatible with
+ * MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ */
+//#define MBEDTLS_ECP_RESTARTABLE
+
+/**
+ * \def MBEDTLS_ECDSA_DETERMINISTIC
+ *
+ * Enable deterministic ECDSA (RFC 6979).
+ * Standard ECDSA is "fragile" in the sense that lack of entropy when signing
+ * may result in a compromise of the long-term signing key. This is avoided by
+ * the deterministic variant.
+ *
+ * Requires: MBEDTLS_HMAC_DRBG_C
+ *
+ * Comment this macro to disable deterministic ECDSA.
+ */
+#define MBEDTLS_ECDSA_DETERMINISTIC
+
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+ *
+ * Enable the PSK based ciphersuite modes in SSL / TLS.
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+ *
+ * Enable the DHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+//#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+ *
+ * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+ *
+ * Enable the RSA-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+ *
+ * Enable the RSA-only based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ */
+//#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+ *
+ * Enable the DHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+//#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+ *
+ * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ *
+ * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C,
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+ *
+ * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+ *
+ * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+ *
+ * Enable the ECJPAKE based ciphersuite modes in SSL / TLS.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Requires: MBEDTLS_ECJPAKE_C
+ * MBEDTLS_SHA256_C
+ * MBEDTLS_ECP_DP_SECP256R1_ENABLED
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+
+/**
+ * \def MBEDTLS_PK_PARSE_EC_EXTENDED
+ *
+ * Enhance support for reading EC keys using variants of SEC1 not allowed by
+ * RFC 5915 and RFC 5480.
+ *
+ * Currently this means parsing the SpecifiedECDomain choice of EC
+ * parameters (only known groups are supported, not arbitrary domains, to
+ * avoid validation issues).
+ *
+ * Disable if you only need to support RFC 5915 + 5480 key formats.
+ */
+//#define MBEDTLS_PK_PARSE_EC_EXTENDED
+
+/**
+ * \def MBEDTLS_ERROR_STRERROR_DUMMY
+ *
+ * Enable a dummy error function to make use of mbedtls_strerror() in
+ * third party libraries easier when MBEDTLS_ERROR_C is disabled
+ * (no effect when MBEDTLS_ERROR_C is enabled).
+ *
+ * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're
+ * not using mbedtls_strerror() or error_strerror() in your application.
+ *
+ * Disable if you run into name conflicts and want to really remove the
+ * mbedtls_strerror()
+ */
+#define MBEDTLS_ERROR_STRERROR_DUMMY
+
+/**
+ * \def MBEDTLS_GENPRIME
+ *
+ * Enable the prime-number generation code.
+ *
+ * Requires: MBEDTLS_BIGNUM_C
+ */
+#define MBEDTLS_GENPRIME
+
+/**
+ * \def MBEDTLS_FS_IO
+ *
+ * Enable functions that use the filesystem.
+ */
+//#define MBEDTLS_FS_IO
+
+/**
+ * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ * Do not add default entropy sources. These are the platform specific,
+ * mbedtls_timing_hardclock and HAVEGE based poll functions.
+ *
+ * This is useful to have more control over the added entropy sources in an
+ * application.
+ *
+ * Uncomment this macro to prevent loading of default entropy functions.
+ */
+//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+
+/**
+ * \def MBEDTLS_NO_PLATFORM_ENTROPY
+ *
+ * Do not use built-in platform entropy functions.
+ * This is useful if your platform does not support
+ * standards like the /dev/urandom or Windows CryptoAPI.
+ *
+ * Uncomment this macro to disable the built-in platform entropy functions.
+ */
+#define MBEDTLS_NO_PLATFORM_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_FORCE_SHA256
+ *
+ * Force the entropy accumulator to use a SHA-256 accumulator instead of the
+ * default SHA-512 based one (if both are available).
+ *
+ * Requires: MBEDTLS_SHA256_C
+ *
+ * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option
+ * if you have performance concerns.
+ *
+ * This option is only useful if both MBEDTLS_SHA256_C and
+ * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used.
+ */
+//#define MBEDTLS_ENTROPY_FORCE_SHA256
+
+/**
+ * \def MBEDTLS_ENTROPY_NV_SEED
+ *
+ * Enable the non-volatile (NV) seed file-based entropy source.
+ * (Also enables the NV seed read/write functions in the platform layer)
+ *
+ * This is crucial (if not required) on systems that do not have a
+ * cryptographic entropy source (in hardware or kernel) available.
+ *
+ * Requires: MBEDTLS_ENTROPY_C, MBEDTLS_PLATFORM_C
+ *
+ * \note The read/write functions that are used by the entropy source are
+ * determined in the platform layer, and can be modified at runtime and/or
+ * compile-time depending on the flags (MBEDTLS_PLATFORM_NV_SEED_*) used.
+ *
+ * \note If you use the default implementation functions that read a seedfile
+ * with regular fopen(), please make sure you make a seedfile with the
+ * proper name (defined in MBEDTLS_PLATFORM_STD_NV_SEED_FILE) and at
+ * least MBEDTLS_ENTROPY_BLOCK_SIZE bytes in size that can be read from
+ * and written to or you will get an entropy source error! The default
+ * implementation will only use the first MBEDTLS_ENTROPY_BLOCK_SIZE
+ * bytes from the file.
+ *
+ * \note The entropy collector will write to the seed file before entropy is
+ * given to an external source, to update it.
+ */
+//#define MBEDTLS_ENTROPY_NV_SEED
+
+/**
+ * \def MBEDTLS_MEMORY_DEBUG
+ *
+ * Enable debugging of buffer allocator memory issues. Automatically prints
+ * (to stderr) all (fatal) messages on memory allocation issues. Enables
+ * function for 'debug output' of allocated memory.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Uncomment this macro to let the buffer allocator print out error messages.
+ */
+//#define MBEDTLS_MEMORY_DEBUG
+
+/**
+ * \def MBEDTLS_MEMORY_BACKTRACE
+ *
+ * Include backtrace information with each allocated block.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ * GLIBC-compatible backtrace() an backtrace_symbols() support
+ *
+ * Uncomment this macro to include backtrace information
+ */
+//#define MBEDTLS_MEMORY_BACKTRACE
+
+/**
+ * \def MBEDTLS_PK_RSA_ALT_SUPPORT
+ *
+ * Support external private RSA keys (eg from a HSM) in the PK layer.
+ *
+ * Comment this macro to disable support for external private RSA keys.
+ */
+//#define MBEDTLS_PK_RSA_ALT_SUPPORT
+
+/**
+ * \def MBEDTLS_PKCS1_V15
+ *
+ * Enable support for PKCS#1 v1.5 encoding.
+ *
+ * Requires: MBEDTLS_RSA_C
+ *
+ * This enables support for PKCS#1 v1.5 operations.
+ */
+#define MBEDTLS_PKCS1_V15
+
+/**
+ * \def MBEDTLS_PKCS1_V21
+ *
+ * Enable support for PKCS#1 v2.1 encoding.
+ *
+ * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C
+ *
+ * This enables support for RSAES-OAEP and RSASSA-PSS operations.
+ */
+#define MBEDTLS_PKCS1_V21
+
+/**
+ * \def MBEDTLS_RSA_NO_CRT
+ *
+ * Do not use the Chinese Remainder Theorem for the RSA private operation.
+ *
+ * Uncomment this macro to disable the use of CRT in RSA.
+ *
+ */
+//#define MBEDTLS_RSA_NO_CRT
+
+/**
+ * \def MBEDTLS_SELF_TEST
+ *
+ * Enable the checkup functions (*_self_test).
+ */
+#define MBEDTLS_SELF_TEST
+
+/**
+ * \def MBEDTLS_SHA256_SMALLER
+ *
+ * Enable an implementation of SHA-256 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * The default implementation is meant to be a reasonnable compromise between
+ * performance and size. This version optimizes more aggressively for size at
+ * the expense of performance. Eg on Cortex-M4 it reduces the size of
+ * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about
+ * 30%.
+ *
+ * Uncomment to enable the smaller implementation of SHA256.
+ */
+//#define MBEDTLS_SHA256_SMALLER
+
+/**
+ * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
+ *
+ * Enable sending of alert messages in case of encountered errors as per RFC.
+ * If you choose not to send the alert messages, mbed TLS can still communicate
+ * with other servers, only debugging of failures is harder.
+ *
+ * The advantage of not sending alert messages, is that no information is given
+ * about reasons for failures thus preventing adversaries of gaining intel.
+ *
+ * Enable sending of all alert messages
+ */
+//#define MBEDTLS_SSL_ALL_ALERT_MESSAGES
+/**
+ * \def MBEDTLS_SSL_ASYNC_PRIVATE
+ *
+ * Enable asynchronous external private key operations in SSL. This allows
+ * you to configure an SSL connection to call an external cryptographic
+ * module to perform private key operations instead of performing the
+ * operation inside the library.
+ *
+ */
+//#define MBEDTLS_SSL_ASYNC_PRIVATE
+
+/**
+ * \def MBEDTLS_SSL_DEBUG_ALL
+ *
+ * Enable the debug messages in SSL module for all issues.
+ * Debug messages have been disabled in some places to prevent timing
+ * attacks due to (unbalanced) debugging function calls.
+ *
+ * If you need all error reporting you should enable this during debugging,
+ * but remove this for production servers that should log as well.
+ *
+ * Uncomment this macro to report all debug messages on errors introducing
+ * a timing side-channel.
+ *
+ */
+//#define MBEDTLS_SSL_DEBUG_ALL
+
+/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
+ *
+ * Enable support for Encrypt-then-MAC, RFC 7366.
+ *
+ * This allows peers that both support it to use a more robust protection for
+ * ciphersuites using CBC, providing deep resistance against timing attacks
+ * on the padding or underlying cipher.
+ *
+ * This only affects CBC ciphersuites, and is useless if none is defined.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Encrypt-then-MAC
+ */
+//#define MBEDTLS_SSL_ENCRYPT_THEN_MAC
+
+/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+ *
+ * Enable support for Extended Master Secret, aka Session Hash
+ * (draft-ietf-tls-session-hash-02).
+ *
+ * This was introduced as "the proper fix" to the Triple Handshake familiy of
+ * attacks, but it is recommended to always use it (even if you disable
+ * renegotiation), since it actually fixes a more fundamental issue in the
+ * original SSL/TLS design, and has implications beyond Triple Handshake.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Extended Master Secret.
+ */
+//#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+
+/**
+ * \def MBEDTLS_SSL_FALLBACK_SCSV
+ *
+ * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ *
+ * For servers, it is recommended to always enable this, unless you support
+ * only one version of TLS, or know for sure that none of your clients
+ * implements a fallback strategy.
+ *
+ * For clients, you only need this if you're using a fallback strategy, which
+ * is not recommended in the first place, unless you absolutely need it to
+ * interoperate with buggy (version-intolerant) servers.
+ *
+ * Comment this macro to disable support for FALLBACK_SCSV
+ */
+//#define MBEDTLS_SSL_FALLBACK_SCSV
+
+/**
+ * \def MBEDTLS_SSL_HW_RECORD_ACCEL
+ *
+ * Enable hooking functions in SSL module for hardware acceleration of
+ * individual records.
+ *
+ * Uncomment this macro to enable hooking functions.
+ */
+//#define MBEDTLS_SSL_HW_RECORD_ACCEL
+
+/**
+ * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING
+ *
+ * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0.
+ *
+ * This is a countermeasure to the BEAST attack, which also minimizes the risk
+ * of interoperability issues compared to sending 0-length records.
+ *
+ * Comment this macro to disable 1/n-1 record splitting.
+ */
+//#define MBEDTLS_SSL_CBC_RECORD_SPLITTING
+
+/**
+ * \def MBEDTLS_SSL_RENEGOTIATION
+ *
+ * Enable support for TLS renegotiation.
+ *
+ * The two main uses of renegotiation are (1) refresh keys on long-lived
+ * connections and (2) client authentication after the initial handshake.
+ * If you don't need renegotiation, it's probably better to disable it, since
+ * it has been associated with security issues in the past and is easy to
+ * misuse/misunderstand.
+ *
+ * Comment this to disable support for renegotiation.
+ *
+ * \note Even if this option is disabled, both client and server are aware
+ * of the Renegotiation Indication Extension (RFC 5746) used to
+ * prevent the SSL renegotiation attack (see RFC 5746 Sect. 1).
+ * (See \c mbedtls_ssl_conf_legacy_renegotiation for the
+ * configuration of this extension).
+ *
+ */
+//#define MBEDTLS_SSL_RENEGOTIATION
+
+/**
+ * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+ *
+ * Enable support for receiving and parsing SSLv2 Client Hello messages for the
+ * SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to enable support for SSLv2 Client Hello messages.
+ */
+//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+
+/**
+ * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+ *
+ * Pick the ciphersuite according to the client's preferences rather than ours
+ * in the SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to respect client's ciphersuite order
+ */
+//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+
+/**
+ * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ *
+ * Enable support for RFC 6066 max_fragment_length extension in SSL.
+ *
+ * Comment this macro to disable support for the max_fragment_length extension
+ */
+//#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+
+/**
+ * \def MBEDTLS_SSL_PROTO_SSL3
+ *
+ * Enable support for SSL 3.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for SSL 3.0
+ */
+//#define MBEDTLS_SSL_PROTO_SSL3
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1
+ *
+ * Enable support for TLS 1.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.0
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_1
+ *
+ * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.1 / DTLS 1.0
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C
+ * (Depends on ciphersuites)
+ *
+ * Comment this macro to disable support for TLS 1.2 / DTLS 1.2
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_2
+
+/**
+ * \def MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Enable support for DTLS (all available versions).
+ *
+ * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0,
+ * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1_1
+ * or MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for DTLS
+ */
+//#define MBEDTLS_SSL_PROTO_DTLS
+
+/**
+ * \def MBEDTLS_SSL_ALPN
+ *
+ * Enable support for RFC 7301 Application Layer Protocol Negotiation.
+ *
+ * Comment this macro to disable support for ALPN.
+ */
+//#define MBEDTLS_SSL_ALPN
+
+/**
+ * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY
+ *
+ * Enable support for the anti-replay mechanism in DTLS.
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ * MBEDTLS_SSL_PROTO_DTLS
+ *
+ * \warning Disabling this is often a security risk!
+ * See mbedtls_ssl_conf_dtls_anti_replay() for details.
+ *
+ * Comment this to disable anti-replay in DTLS.
+ */
+//#define MBEDTLS_SSL_DTLS_ANTI_REPLAY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Enable support for HelloVerifyRequest on DTLS servers.
+ *
+ * This feature is highly recommended to prevent DTLS servers being used as
+ * amplifiers in DoS attacks against other hosts. It should always be enabled
+ * unless you know for sure amplification cannot be a problem in the
+ * environment in which your server operates.
+ *
+ * \warning Disabling this can ba a security risk! (see above)
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Comment this to disable support for HelloVerifyRequest.
+ */
+//#define MBEDTLS_SSL_DTLS_HELLO_VERIFY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+ *
+ * Enable server-side support for clients that reconnect from the same port.
+ *
+ * Some clients unexpectedly close the connection and try to reconnect using the
+ * same source port. This needs special support from the server to handle the
+ * new connection securely, as described in section 4.2.8 of RFC 6347. This
+ * flag enables that support.
+ *
+ * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Comment this to disable support for clients reusing the source port.
+ */
+//#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+
+/**
+ * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+ *
+ * Enable support for a limit of records with bad MAC.
+ *
+ * See mbedtls_ssl_conf_dtls_badmac_limit().
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ */
+//#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+
+/**
+ * \def MBEDTLS_SSL_SESSION_TICKETS
+ *
+ * Enable support for RFC 5077 session tickets in SSL.
+ * Client-side, provides full support for session tickets (maintainance of a
+ * session store remains the responsibility of the application, though).
+ * Server-side, you also need to provide callbacks for writing and parsing
+ * tickets, including authenticated encryption and key management. Example
+ * callbacks are provided by MBEDTLS_SSL_TICKET_C.
+ *
+ * Comment this macro to disable support for SSL session tickets
+ */
+//#define MBEDTLS_SSL_SESSION_TICKETS
+
+/**
+ * \def MBEDTLS_SSL_EXPORT_KEYS
+ *
+ * Enable support for exporting key block and master secret.
+ * This is required for certain users of TLS, e.g. EAP-TLS.
+ *
+ * Comment this macro to disable support for key export
+ */
+//#define MBEDTLS_SSL_EXPORT_KEYS
+
+/**
+ * \def MBEDTLS_SSL_SERVER_NAME_INDICATION
+ *
+ * Enable support for RFC 6066 server name indication (SNI) in SSL.
+ *
+ * Requires: MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Comment this macro to disable support for server name indication in SSL
+ */
+//#define MBEDTLS_SSL_SERVER_NAME_INDICATION
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC
+ *
+ * Enable support for RFC 6066 truncated HMAC in SSL.
+ *
+ * Comment this macro to disable support for truncated HMAC in SSL
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+ *
+ * Fallback to old (pre-2.7), non-conforming implementation of the truncated
+ * HMAC extension which also truncates the HMAC key. Note that this option is
+ * only meant for a transitory upgrade period and is likely to be removed in
+ * a future version of the library.
+ *
+ * \warning The old implementation is non-compliant and has a security weakness
+ * (2^80 brute force attack on the HMAC key used for a single,
+ * uninterrupted connection). This should only be enabled temporarily
+ * when (1) the use of truncated HMAC is essential in order to save
+ * bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
+ * the fixed implementation yet (pre-2.7).
+ *
+ * \deprecated This option is deprecated and will likely be removed in a
+ * future version of Mbed TLS.
+ *
+ * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
+ *
+ * Requires: MBEDTLS_SSL_TRUNCATED_HMAC
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+
+/**
+ * \def MBEDTLS_THREADING_ALT
+ *
+ * Provide your own alternate threading implementation.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to allow your own alternate threading implementation.
+ */
+//#define MBEDTLS_THREADING_ALT
+
+/**
+ * \def MBEDTLS_THREADING_PTHREAD
+ *
+ * Enable the pthread wrapper layer for the threading layer.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to enable pthread mutexes.
+ */
+//#define MBEDTLS_THREADING_PTHREAD
+
+/**
+ * \def MBEDTLS_VERSION_FEATURES
+ *
+ * Allow run-time checking of compile-time enabled features. Thus allowing users
+ * to check at run-time if the library is for instance compiled with threading
+ * support via mbedtls_version_check_feature().
+ *
+ * Requires: MBEDTLS_VERSION_C
+ *
+ * Comment this to disable run-time checking and save ROM space
+ */
+#define MBEDTLS_VERSION_FEATURES
+
+/**
+ * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an extension in a v1 or v2 certificate.
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+
+/**
+ * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an unknown critical extension.
+ *
+ * \warning Depending on your PKI use, enabling this can be a security risk!
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+
+/**
+ * \def MBEDTLS_X509_CHECK_KEY_USAGE
+ *
+ * Enable verification of the keyUsage extension (CA and leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused
+ * (intermediate) CA and leaf certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip keyUsage checking for both CA and leaf certificates.
+ */
+//#define MBEDTLS_X509_CHECK_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+ *
+ * Enable verification of the extendedKeyUsage extension (leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip extendedKeyUsage checking for certificates.
+ */
+//#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
+ *
+ * Enable parsing and verification of X.509 certificates, CRLs and CSRS
+ * signed with RSASSA-PSS (aka PKCS#1 v2.1).
+ *
+ * Comment this macro to disallow using RSASSA-PSS in certificates.
+ */
+//#define MBEDTLS_X509_RSASSA_PSS_SUPPORT
+
+/**
+ * \def MBEDTLS_ZLIB_SUPPORT
+ *
+ * If set, the SSL/TLS module uses ZLIB to support compression and
+ * decompression of packet data.
+ *
+ * \warning TLS-level compression MAY REDUCE SECURITY! See for example the
+ * CRIME attack. Before enabling this option, you should examine with care if
+ * CRIME or similar exploits may be a applicable to your use case.
+ *
+ * \note Currently compression can't be used with DTLS.
+ *
+ * \deprecated This feature is deprecated and will be removed
+ * in the next major revision of the library.
+ *
+ * Used in: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This feature requires zlib library and headers to be present.
+ *
+ * Uncomment to enable use of ZLIB
+ */
+//#define MBEDTLS_ZLIB_SUPPORT
+/* \} name SECTION: mbed TLS feature support */
+
+/**
+ * \name SECTION: mbed TLS modules
+ *
+ * This section enables or disables entire modules in mbed TLS
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_AESNI_C
+ *
+ * Enable AES-NI support on x86-64.
+ *
+ * Module: library/aesni.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the AES-NI instructions on x86-64
+ */
+//#define MBEDTLS_AESNI_C
+
+/**
+ * \def MBEDTLS_AES_C
+ *
+ * Enable the AES block cipher.
+ *
+ * Module: library/aes.c
+ * Caller: library/cipher.c
+ * library/pem.c
+ * library/ctr_drbg.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ *
+ * PEM_PARSE uses AES for decrypting encrypted keys.
+ */
+#define MBEDTLS_AES_C
+
+/**
+ * \def MBEDTLS_ARC4_C
+ *
+ * Enable the ARCFOUR stream cipher.
+ *
+ * Module: library/arc4.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. If possible, we recommend avoidng dependencies on
+ * it, and considering stronger ciphers instead.
+ *
+ */
+//#define MBEDTLS_ARC4_C
+
+/**
+ * \def MBEDTLS_ASN1_PARSE_C
+ *
+ * Enable the generic ASN1 parser.
+ *
+ * Module: library/asn1.c
+ * Caller: library/x509.c
+ * library/dhm.c
+ * library/pkcs12.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ */
+#define MBEDTLS_ASN1_PARSE_C
+
+/**
+ * \def MBEDTLS_ASN1_WRITE_C
+ *
+ * Enable the generic ASN1 writer.
+ *
+ * Module: library/asn1write.c
+ * Caller: library/ecdsa.c
+ * library/pkwrite.c
+ * library/x509_create.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ */
+#define MBEDTLS_ASN1_WRITE_C
+
+/**
+ * \def MBEDTLS_BASE64_C
+ *
+ * Enable the Base64 module.
+ *
+ * Module: library/base64.c
+ * Caller: library/pem.c
+ *
+ * This module is required for PEM support (required by X.509).
+ */
+#define MBEDTLS_BASE64_C
+
+/**
+ * \def MBEDTLS_BIGNUM_C
+ *
+ * Enable the multi-precision integer library.
+ *
+ * Module: library/bignum.c
+ * Caller: library/dhm.c
+ * library/ecp.c
+ * library/ecdsa.c
+ * library/rsa.c
+ * library/rsa_internal.c
+ * library/ssl_tls.c
+ *
+ * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support.
+ */
+#define MBEDTLS_BIGNUM_C
+
+/**
+ * \def MBEDTLS_BLOWFISH_C
+ *
+ * Enable the Blowfish block cipher.
+ *
+ * Module: library/blowfish.c
+ */
+//#define MBEDTLS_BLOWFISH_C
+
+/**
+ * \def MBEDTLS_CAMELLIA_C
+ *
+ * Enable the Camellia block cipher.
+ *
+ * Module: library/camellia.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ */
+//#define MBEDTLS_CAMELLIA_C
+
+/**
+ * \def MBEDTLS_ARIA_C
+ *
+ * Enable the ARIA block cipher.
+ *
+ * Module: library/aria.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384
+ */
+//#define MBEDTLS_ARIA_C
+
+/**
+ * \def MBEDTLS_CCM_C
+ *
+ * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher.
+ *
+ * Module: library/ccm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-CCM ciphersuites, if other requisites are
+ * enabled as well.
+ */
+#define MBEDTLS_CCM_C
+
+/**
+ * \def MBEDTLS_CERTS_C
+ *
+ * Enable the test certificates.
+ *
+ * Module: library/certs.c
+ * Caller:
+ *
+ * This module is used for testing (ssl_client/server).
+ */
+//#define MBEDTLS_CERTS_C
+
+/**
+ * \def MBEDTLS_CHACHA20_C
+ *
+ * Enable the ChaCha20 stream cipher.
+ *
+ * Module: library/chacha20.c
+ */
+#define MBEDTLS_CHACHA20_C
+
+/**
+ * \def MBEDTLS_CHACHAPOLY_C
+ *
+ * Enable the ChaCha20-Poly1305 AEAD algorithm.
+ *
+ * Module: library/chachapoly.c
+ *
+ * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C
+ */
+#define MBEDTLS_CHACHAPOLY_C
+
+/**
+ * \def MBEDTLS_CIPHER_C
+ *
+ * Enable the generic cipher layer.
+ *
+ * Module: library/cipher.c
+ * Caller: library/ssl_tls.c
+ *
+ * Uncomment to enable generic cipher wrappers.
+ */
+#define MBEDTLS_CIPHER_C
+
+/**
+ * \def MBEDTLS_CMAC_C
+ *
+ * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
+ * ciphers.
+ *
+ * Module: library/cmac.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
+ *
+ */
+#define MBEDTLS_CMAC_C
+
+/**
+ * \def MBEDTLS_CTR_DRBG_C
+ *
+ * Enable the CTR_DRBG AES-based random generator.
+ * The CTR_DRBG generator uses AES-256 by default.
+ * To use AES-128 instead, enable MBEDTLS_CTR_DRBG_USE_128_BIT_KEY below.
+ *
+ * Module: library/ctr_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * This module provides the CTR_DRBG AES random number generator.
+ */
+#define MBEDTLS_CTR_DRBG_C
+
+/**
+ * \def MBEDTLS_DEBUG_C
+ *
+ * Enable the debug functions.
+ *
+ * Module: library/debug.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module provides debugging functions.
+ */
+//#define MBEDTLS_DEBUG_C
+
+/**
+ * \def MBEDTLS_DES_C
+ *
+ * Enable the DES block cipher.
+ *
+ * Module: library/des.c
+ * Caller: library/pem.c
+ * library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ *
+ * PEM_PARSE uses DES/3DES for decrypting encrypted keys.
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_DES_C
+
+/**
+ * \def MBEDTLS_DHM_C
+ *
+ * Enable the Diffie-Hellman-Merkle module.
+ *
+ * Module: library/dhm.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * DHE-RSA, DHE-PSK
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_DHM_C
+
+/**
+ * \def MBEDTLS_ECDH_C
+ *
+ * Enable the elliptic curve Diffie-Hellman library.
+ *
+ * Module: library/ecdh.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK
+ *
+ * Requires: MBEDTLS_ECP_C
+ */
+#define MBEDTLS_ECDH_C
+
+/**
+ * \def MBEDTLS_ECDSA_C
+ *
+ * Enable the elliptic curve DSA library.
+ *
+ * Module: library/ecdsa.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ */
+#define MBEDTLS_ECDSA_C
+
+/**
+ * \def MBEDTLS_ECJPAKE_C
+ *
+ * Enable the elliptic curve J-PAKE library.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Module: library/ecjpake.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECJPAKE
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C
+ */
+//#define MBEDTLS_ECJPAKE_C
+
+/**
+ * \def MBEDTLS_ECP_C
+ *
+ * Enable the elliptic curve over GF(p) library.
+ *
+ * Module: library/ecp.c
+ * Caller: library/ecdh.c
+ * library/ecdsa.c
+ * library/ecjpake.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED
+ */
+#define MBEDTLS_ECP_C
+
+/**
+ * \def MBEDTLS_ENTROPY_C
+ *
+ * Enable the platform-specific entropy code.
+ *
+ * Module: library/entropy.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C
+ *
+ * This module provides a generic entropy pool
+ */
+#define MBEDTLS_ENTROPY_C
+
+/**
+ * \def MBEDTLS_ERROR_C
+ *
+ * Enable error code to error string conversion.
+ *
+ * Module: library/error.c
+ * Caller:
+ *
+ * This module enables mbedtls_strerror().
+ */
+//#define MBEDTLS_ERROR_C
+
+/**
+ * \def MBEDTLS_GCM_C
+ *
+ * Enable the Galois/Counter Mode (GCM) for AES.
+ *
+ * Module: library/gcm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
+ * requisites are enabled as well.
+ */
+#define MBEDTLS_GCM_C
+
+/**
+ * \def MBEDTLS_HAVEGE_C
+ *
+ * Enable the HAVEGE random generator.
+ *
+ * Warning: the HAVEGE random generator is not suitable for virtualized
+ * environments
+ *
+ * Warning: the HAVEGE random generator is dependent on timing and specific
+ * processor traits. It is therefore not advised to use HAVEGE as
+ * your applications primary random generator or primary entropy pool
+ * input. As a secondary input to your entropy pool, it IS able add
+ * the (limited) extra entropy it provides.
+ *
+ * Module: library/havege.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_TIMING_C
+ *
+ * Uncomment to enable the HAVEGE random generator.
+ */
+//#define MBEDTLS_HAVEGE_C
+
+/**
+ * \def MBEDTLS_HKDF_C
+ *
+ * Enable the HKDF algorithm (RFC 5869).
+ *
+ * Module: library/hkdf.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the Hashed Message Authentication Code
+ * (HMAC)-based key derivation function (HKDF).
+ */
+#define MBEDTLS_HKDF_C
+
+/**
+ * \def MBEDTLS_HMAC_DRBG_C
+ *
+ * Enable the HMAC_DRBG random generator.
+ *
+ * Module: library/hmac_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * Uncomment to enable the HMAC_DRBG random number geerator.
+ */
+#define MBEDTLS_HMAC_DRBG_C
+
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable the Key Wrapping mode for 128-bit block ciphers,
+ * as defined in NIST SP 800-38F. Only KW and KWP modes
+ * are supported. At the moment, only AES is approved by NIST.
+ *
+ * Module: library/nist_kw.c
+ *
+ * Requires: MBEDTLS_AES_C and MBEDTLS_CIPHER_C
+ */
+#define MBEDTLS_NIST_KW_C
+
+/**
+ * \def MBEDTLS_MD_C
+ *
+ * Enable the generic message digest layer.
+ *
+ * Module: library/md.c
+ * Caller:
+ *
+ * Uncomment to enable generic message digest wrappers.
+ */
+#define MBEDTLS_MD_C
+
+/**
+ * \def MBEDTLS_MD2_C
+ *
+ * Enable the MD2 hash algorithm.
+ *
+ * Module: library/md2.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD2-signed X.509 certs.
+ *
+ * \warning MD2 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD2_C
+
+/**
+ * \def MBEDTLS_MD4_C
+ *
+ * Enable the MD4 hash algorithm.
+ *
+ * Module: library/md4.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD4-signed X.509 certs.
+ *
+ * \warning MD4 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD4_C
+
+/**
+ * \def MBEDTLS_MD5_C
+ *
+ * Enable the MD5 hash algorithm.
+ *
+ * Module: library/md5.c
+ * Caller: library/md.c
+ * library/pem.c
+ * library/ssl_tls.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, and for TLS 1.2
+ * depending on the handshake parameters. Further, it is used for checking
+ * MD5-signed certificates, and for PBKDF1 when decrypting PEM-encoded
+ * encrypted keys.
+ *
+ * \warning MD5 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD5_C
+
+/**
+ * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Enable the buffer allocator implementation that makes use of a (stack)
+ * based buffer to 'allocate' dynamic memory. (replaces calloc() and free()
+ * calls)
+ *
+ * Module: library/memory_buffer_alloc.c
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS)
+ *
+ * Enable this module to enable the buffer memory allocator.
+ */
+#define MBEDTLS_MEMORY_BUFFER_ALLOC_C
+
+/**
+ * \def MBEDTLS_NET_C
+ *
+ * Enable the TCP and UDP over IPv6/IPv4 networking routines.
+ *
+ * \note This module only works on POSIX/Unix (including Linux, BSD and OS X)
+ * and Windows. For other platforms, you'll want to disable it, and write your
+ * own networking callbacks to be passed to \c mbedtls_ssl_set_bio().
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/net_sockets.c
+ *
+ * This module provides networking routines.
+ */
+//#define MBEDTLS_NET_C
+
+/**
+ * \def MBEDTLS_OID_C
+ *
+ * Enable the OID database.
+ *
+ * Module: library/oid.c
+ * Caller: library/asn1write.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ * library/pkwrite.c
+ * library/rsa.c
+ * library/x509.c
+ * library/x509_create.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * This modules translates between OIDs and internal values.
+ */
+#define MBEDTLS_OID_C
+
+/**
+ * \def MBEDTLS_PADLOCK_C
+ *
+ * Enable VIA Padlock support on x86.
+ *
+ * Module: library/padlock.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the VIA PadLock on x86.
+ */
+//#define MBEDTLS_PADLOCK_C
+
+/**
+ * \def MBEDTLS_PEM_PARSE_C
+ *
+ * Enable PEM decoding / parsing.
+ *
+ * Module: library/pem.c
+ * Caller: library/dhm.c
+ * library/pkparse.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for decoding / parsing PEM files.
+ */
+#define MBEDTLS_PEM_PARSE_C
+
+/**
+ * \def MBEDTLS_PEM_WRITE_C
+ *
+ * Enable PEM encoding / writing.
+ *
+ * Module: library/pem.c
+ * Caller: library/pkwrite.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for encoding / writing PEM files.
+ */
+#define MBEDTLS_PEM_WRITE_C
+
+/**
+ * \def MBEDTLS_PK_C
+ *
+ * Enable the generic public (asymetric) key layer.
+ *
+ * Module: library/pk.c
+ * Caller: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C
+ *
+ * Uncomment to enable generic public key wrappers.
+ */
+#define MBEDTLS_PK_C
+
+/**
+ * \def MBEDTLS_PK_PARSE_C
+ *
+ * Enable the generic public (asymetric) key parser.
+ *
+ * Module: library/pkparse.c
+ * Caller: library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key parse functions.
+ */
+#define MBEDTLS_PK_PARSE_C
+
+/**
+ * \def MBEDTLS_PK_WRITE_C
+ *
+ * Enable the generic public (asymetric) key writer.
+ *
+ * Module: library/pkwrite.c
+ * Caller: library/x509write.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key write functions.
+ */
+#define MBEDTLS_PK_WRITE_C
+
+/**
+ * \def MBEDTLS_PKCS5_C
+ *
+ * Enable PKCS#5 functions.
+ *
+ * Module: library/pkcs5.c
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the PKCS#5 functions.
+ */
+#define MBEDTLS_PKCS5_C
+
+/**
+ * \def MBEDTLS_PKCS11_C
+ *
+ * Enable wrapper for PKCS#11 smartcard support.
+ *
+ * Module: library/pkcs11.c
+ * Caller: library/pk.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * This module enables SSL/TLS PKCS #11 smartcard support.
+ * Requires the presence of the PKCS#11 helper library (libpkcs11-helper)
+ */
+//#define MBEDTLS_PKCS11_C
+
+/**
+ * \def MBEDTLS_PKCS12_C
+ *
+ * Enable PKCS#12 PBE functions.
+ * Adds algorithms for parsing PKCS#8 encrypted private keys
+ *
+ * Module: library/pkcs12.c
+ * Caller: library/pkparse.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * Can use: MBEDTLS_ARC4_C
+ *
+ * This module enables PKCS#12 functions.
+ */
+//#define MBEDTLS_PKCS12_C
+
+/**
+ * \def MBEDTLS_PLATFORM_C
+ *
+ * Enable the platform abstraction layer that allows you to re-assign
+ * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit().
+ *
+ * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT
+ * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned
+ * above to be specified at runtime or compile time respectively.
+ *
+ * \note This abstraction layer must be enabled on Windows (including MSYS2)
+ * as other module rely on it for a fixed snprintf implementation.
+ *
+ * Module: library/platform.c
+ * Caller: Most other .c files
+ *
+ * This module enables abstraction of common (libc) functions.
+ */
+#define MBEDTLS_PLATFORM_C
+
+/**
+ * \def MBEDTLS_POLY1305_C
+ *
+ * Enable the Poly1305 MAC algorithm.
+ *
+ * Module: library/poly1305.c
+ * Caller: library/chachapoly.c
+ */
+#define MBEDTLS_POLY1305_C
+
+/**
+ * \def MBEDTLS_RIPEMD160_C
+ *
+ * Enable the RIPEMD-160 hash algorithm.
+ *
+ * Module: library/ripemd160.c
+ * Caller: library/md.c
+ *
+ */
+//#define MBEDTLS_RIPEMD160_C
+
+/**
+ * \def MBEDTLS_RSA_C
+ *
+ * Enable the RSA public-key cryptosystem.
+ *
+ * Module: library/rsa.c
+ * library/rsa_internal.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509.c
+ *
+ * This module is used by the following key exchanges:
+ * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C
+ */
+#define MBEDTLS_RSA_C
+
+/**
+ * \def MBEDTLS_SHA1_C
+ *
+ * Enable the SHA1 cryptographic hash algorithm.
+ *
+ * Module: library/sha1.c
+ * Caller: library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509write_crt.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, for TLS 1.2
+ * depending on the handshake parameters, and for SHA1-signed certificates.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_SHA1_C
+
+/**
+ * \def MBEDTLS_SHA256_C
+ *
+ * Enable the SHA-224 and SHA-256 cryptographic hash algorithms.
+ *
+ * Module: library/sha256.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module adds support for SHA-224 and SHA-256.
+ * This module is required for the SSL/TLS 1.2 PRF function.
+ */
+#define MBEDTLS_SHA256_C
+
+/**
+ * \def MBEDTLS_SHA512_C
+ *
+ * Enable the SHA-384 and SHA-512 cryptographic hash algorithms.
+ *
+ * Module: library/sha512.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module adds support for SHA-384 and SHA-512.
+ */
+#define MBEDTLS_SHA512_C
+
+/**
+ * \def MBEDTLS_SSL_CACHE_C
+ *
+ * Enable simple SSL cache implementation.
+ *
+ * Module: library/ssl_cache.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_CACHE_C
+ */
+//#define MBEDTLS_SSL_CACHE_C
+
+/**
+ * \def MBEDTLS_SSL_COOKIE_C
+ *
+ * Enable basic implementation of DTLS cookies for hello verification.
+ *
+ * Module: library/ssl_cookie.c
+ * Caller:
+ */
+//#define MBEDTLS_SSL_COOKIE_C
+
+/**
+ * \def MBEDTLS_SSL_TICKET_C
+ *
+ * Enable an implementation of TLS server-side callbacks for session tickets.
+ *
+ * Module: library/ssl_ticket.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_CIPHER_C
+ */
+//#define MBEDTLS_SSL_TICKET_C
+
+/**
+ * \def MBEDTLS_SSL_CLI_C
+ *
+ * Enable the SSL/TLS client code.
+ *
+ * Module: library/ssl_cli.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS client support.
+ */
+//#define MBEDTLS_SSL_CLI_C
+
+/**
+ * \def MBEDTLS_SSL_SRV_C
+ *
+ * Enable the SSL/TLS server code.
+ *
+ * Module: library/ssl_srv.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS server support.
+ */
+//#define MBEDTLS_SSL_SRV_C
+
+/**
+ * \def MBEDTLS_SSL_TLS_C
+ *
+ * Enable the generic SSL/TLS code.
+ *
+ * Module: library/ssl_tls.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * and at least one of the MBEDTLS_SSL_PROTO_XXX defines
+ *
+ * This module is required for SSL/TLS.
+ */
+//#define MBEDTLS_SSL_TLS_C
+
+/**
+ * \def MBEDTLS_THREADING_C
+ *
+ * Enable the threading abstraction layer.
+ * By default mbed TLS assumes it is used in a non-threaded environment or that
+ * contexts are not shared between threads. If you do intend to use contexts
+ * between threads, you will need to enable this layer to prevent race
+ * conditions. See also our Knowledge Base article about threading:
+ * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
+ *
+ * Module: library/threading.c
+ *
+ * This allows different threading implementations (self-implemented or
+ * provided).
+ *
+ * You will have to enable either MBEDTLS_THREADING_ALT or
+ * MBEDTLS_THREADING_PTHREAD.
+ *
+ * Enable this layer to allow use of mutexes within mbed TLS
+ */
+//#define MBEDTLS_THREADING_C
+
+/**
+ * \def MBEDTLS_TIMING_C
+ *
+ * Enable the semi-portable timing interface.
+ *
+ * \note The provided implementation only works on POSIX/Unix (including Linux,
+ * BSD and OS X) and Windows. On other platforms, you can either disable that
+ * module and provide your own implementations of the callbacks needed by
+ * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide
+ * your own implementation of the whole module by setting
+ * \c MBEDTLS_TIMING_ALT in the current file.
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/timing.c
+ * Caller: library/havege.c
+ *
+ * This module is used by the HAVEGE random number generator.
+ */
+//#define MBEDTLS_TIMING_C
+
+/**
+ * \def MBEDTLS_VERSION_C
+ *
+ * Enable run-time version information.
+ *
+ * Module: library/version.c
+ *
+ * This module provides run-time version information.
+ */
+#define MBEDTLS_VERSION_C
+
+/**
+ * \def MBEDTLS_X509_USE_C
+ *
+ * Enable X.509 core for using certificates.
+ *
+ * Module: library/x509.c
+ * Caller: library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C,
+ * MBEDTLS_PK_PARSE_C
+ *
+ * This module is required for the X.509 parsing modules.
+ */
+//#define MBEDTLS_X509_USE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Enable X.509 certificate parsing.
+ *
+ * Module: library/x509_crt.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 certificate parsing.
+ */
+//#define MBEDTLS_X509_CRT_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CRL_PARSE_C
+ *
+ * Enable X.509 CRL parsing.
+ *
+ * Module: library/x509_crl.c
+ * Caller: library/x509_crt.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 CRL parsing.
+ */
+//#define MBEDTLS_X509_CRL_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_PARSE_C
+ *
+ * Enable X.509 Certificate Signing Request (CSR) parsing.
+ *
+ * Module: library/x509_csr.c
+ * Caller: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is used for reading X.509 certificate request.
+ */
+//#define MBEDTLS_X509_CSR_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CREATE_C
+ *
+ * Enable X.509 core for creating certificates.
+ *
+ * Module: library/x509_create.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C
+ *
+ * This module is the basis for creating X.509 certificates and CSRs.
+ */
+//#define MBEDTLS_X509_CREATE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_WRITE_C
+ *
+ * Enable creating X.509 certificates.
+ *
+ * Module: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate creation.
+ */
+//#define MBEDTLS_X509_CRT_WRITE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_WRITE_C
+ *
+ * Enable creating X.509 Certificate Signing Requests (CSR).
+ *
+ * Module: library/x509_csr_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate request writing.
+ */
+//#define MBEDTLS_X509_CSR_WRITE_C
+
+/**
+ * \def MBEDTLS_XTEA_C
+ *
+ * Enable the XTEA block cipher.
+ *
+ * Module: library/xtea.c
+ * Caller:
+ */
+//#define MBEDTLS_XTEA_C
+
+/* \} name SECTION: mbed TLS modules */
+
+/**
+ * \name SECTION: Module configuration options
+ *
+ * This section allows for the setting of module specific sizes and
+ * configuration options. The default values are already present in the
+ * relevant header files and should suffice for the regular use cases.
+ *
+ * Our advice is to enable options and change their values here
+ * only if you have a good reason and know the consequences.
+ *
+ * Please check the respective header file for documentation on these
+ * parameters (to prevent duplicate documentation).
+ * \{
+ */
+
+/* MPI / BIGNUM options */
+//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */
+//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */
+
+/* CTR_DRBG options */
+//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */
+/*! Maximal reseed counter - indicates maximal number of
+requests allowed between reseeds; according to NIST 800-90
+it is (2^48 - 1), our restriction is : (int - 0xFFFF - 0xF ).*/
+#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 0xFFF0 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+//#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY /**< Use 128-bit key for CTR_DRBG - may reduce security (see ctr_drbg.h) */
+
+/* HMAC_DRBG options */
+//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+
+/* ECP options */
+//#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */
+//#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */
+//#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */
+
+/* Entropy options */
+//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */
+#define MBEDTLS_ENTROPY_MAX_GATHER 144 /**< Maximum amount requested from entropy sources */
+//#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Default minimum number of bytes required for the hardware entropy source mbedtls_hardware_poll() before entropy is released */
+
+/* Memory buffer allocator options */
+//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */
+
+/* Platform options */
+//#define MBEDTLS_PLATFORM_STD_MEM_HDR <stdlib.h> /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */
+//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */
+
+//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_TIME time /**< Default time to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS 0 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE 1 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile" /**< Seed file to read/write with default implementation */
+
+/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */
+/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */
+//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */
+#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_TIME_MACRO time /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_TIME_TYPE_MACRO time_t /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */
+#define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+
+/**
+ * \brief This macro is invoked by the library when an invalid parameter
+ * is detected that is only checked with MBEDTLS_CHECK_PARAMS
+ * (see the documentation of that option for context).
+ *
+ * When you leave this undefined here, a default definition is
+ * provided that invokes the function mbedtls_param_failed(),
+ * which is declared in platform_util.h for the benefit of the
+ * library, but that you need to define in your application.
+ *
+ * When you define this here, this replaces the default
+ * definition in platform_util.h (which no longer declares the
+ * function mbedtls_param_failed()) and it is your responsibility
+ * to make sure this macro expands to something suitable (in
+ * particular, that all the necessary declarations are visible
+ * from within the library - you can ensure that by providing
+ * them in this file next to the macro definition).
+ *
+ * Note that you may define this macro to expand to nothing, in
+ * which case you don't have to worry about declarations or
+ * definitions. However, you will then be notified about invalid
+ * parameters only in non-void functions, and void function will
+ * just silently return early on invalid parameters, which
+ * partially negates the benefits of enabling
+ * #MBEDTLS_CHECK_PARAMS in the first place, so is discouraged.
+ *
+ * \param cond The expression that should evaluate to true, but doesn't.
+ */
+//#define MBEDTLS_PARAM_FAILED( cond ) assert( cond )
+
+/* SSL Cache options */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */
+
+/* SSL options */
+
+/** \def MBEDTLS_SSL_MAX_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming and outgoing plaintext fragments.
+ *
+ * This determines the size of both the incoming and outgoing TLS I/O buffers
+ * in such a way that both are capable of holding the specified amount of
+ * plaintext data, regardless of the protection mechanism used.
+ *
+ * To configure incoming and outgoing I/O buffers separately, use
+ * #MBEDTLS_SSL_IN_CONTENT_LEN and #MBEDTLS_SSL_OUT_CONTENT_LEN,
+ * which overwrite the value set by this option.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ * recommended to use the Maximum Fragment Length (MFL) extension to
+ * inform the server about this limitation. On the server, there
+ * is no supported, standardized way of informing the client about
+ * restriction on the maximum size of incoming messages, and unless
+ * the limitation has been communicated by other means, it is recommended
+ * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ * while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of both
+ * incoming and outgoing I/O buffers.
+ */
+//#define MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_IN_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming plaintext fragments.
+ *
+ * This determines the size of the incoming TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option is undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ * recommended to use the Maximum Fragment Length (MFL) extension to
+ * inform the server about this limitation. On the server, there
+ * is no supported, standardized way of informing the client about
+ * restriction on the maximum size of incoming messages, and unless
+ * the limitation has been communicated by other means, it is recommended
+ * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ * while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of the incoming I/O buffer
+ * independently of the outgoing I/O buffer.
+ */
+//#define MBEDTLS_SSL_IN_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_OUT_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of outgoing plaintext fragments.
+ *
+ * This determines the size of the outgoing TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * It is possible to save RAM by setting a smaller outward buffer, while keeping
+ * the default inward 16384 byte buffer to conform to the TLS specification.
+ *
+ * The minimum required outward buffer size is determined by the handshake
+ * protocol's usage. Handshaking will fail if the outward buffer is too small.
+ * The specific size requirement depends on the configured ciphers and any
+ * certificate data which is sent during the handshake.
+ *
+ * Uncomment to set the maximum plaintext size of the outgoing I/O buffer
+ * independently of the incoming I/O buffer.
+ */
+//#define MBEDTLS_SSL_OUT_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_DTLS_MAX_BUFFERING
+ *
+ * Maximum number of heap-allocated bytes for the purpose of
+ * DTLS handshake message reassembly and future message buffering.
+ *
+ * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN
+ * to account for a reassembled handshake message of maximum size,
+ * together with its reassembly bitmap.
+ *
+ * A value of 2 * MBEDTLS_SSL_IN_CONTENT_LEN (32768 by default)
+ * should be sufficient for all practical situations as it allows
+ * to reassembly a large handshake message (such as a certificate)
+ * while buffering multiple smaller handshake messages.
+ *
+ */
+//#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
+
+//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */
+//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
+//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
+
+/**
+ * Complete list of ciphersuites to use, in order of preference.
+ *
+ * \warning No dependency checking is done on that field! This option can only
+ * be used to restrict the set of available ciphersuites. It is your
+ * responsibility to make sure the needed modules are active.
+ *
+ * Use this to save a few hundred bytes of ROM (default ordering of all
+ * available ciphersuites) and a few to a few hundred bytes of RAM.
+ *
+ * The value below is only an example, not the default.
+ */
+//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+
+/* X509 options */
+//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */
+//#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */
+
+/**
+ * Allow SHA-1 in the default TLS configuration for certificate signing.
+ * Without this build-time option, SHA-1 support must be activated explicitly
+ * through mbedtls_ssl_conf_cert_profile. Turning on this option is not
+ * recommended because of it is possible to generate SHA-1 collisions, however
+ * this may be safe for legacy infrastructure where additional controls apply.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+// #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES
+
+/**
+ * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
+ * signature and ciphersuite selection. Without this build-time option, SHA-1
+ * support must be activated explicitly through mbedtls_ssl_conf_sig_hashes.
+ * The use of SHA-1 in TLS <= 1.1 and in HMAC-SHA-1 is always allowed by
+ * default. At the time of writing, there is no practical attack on the use
+ * of SHA-1 in handshake signatures, hence this option is turned on by default
+ * to preserve compatibility with existing peers, but the general
+ * warning applies nonetheless:
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+
+/**
+ * Uncomment the macro to let mbed TLS use your alternate implementation of
+ * mbedtls_platform_zeroize(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * mbedtls_platform_zeroize() is a widely used function across the library to
+ * zero a block of memory. The implementation is expected to be secure in the
+ * sense that it has been written to prevent the compiler from removing calls
+ * to mbedtls_platform_zeroize() as part of redundant code elimination
+ * optimizations. However, it is difficult to guarantee that calls to
+ * mbedtls_platform_zeroize() will not be optimized by the compiler as older
+ * versions of the C language standards do not provide a secure implementation
+ * of memset(). Therefore, MBEDTLS_PLATFORM_ZEROIZE_ALT enables users to
+ * configure their own implementation of mbedtls_platform_zeroize(), for
+ * example by using directives specific to their compiler, features from newer
+ * C standards (e.g using memset_s() in C11) or calling a secure memset() from
+ * their system (e.g explicit_bzero() in BSD).
+ */
+//#define MBEDTLS_PLATFORM_ZEROIZE_ALT
+
+/**
+ * Uncomment the macro to let Mbed TLS use your alternate implementation of
+ * mbedtls_platform_gmtime_r(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * gmtime() is not a thread-safe function as defined in the C standard. The
+ * library will try to use safer implementations of this function, such as
+ * gmtime_r() when available. However, if Mbed TLS cannot identify the target
+ * system, the implementation of mbedtls_platform_gmtime_r() will default to
+ * using the standard gmtime(). In this case, calls from the library to
+ * gmtime() will be guarded by the global mutex mbedtls_threading_gmtime_mutex
+ * if MBEDTLS_THREADING_C is enabled. We recommend that calls from outside the
+ * library are also guarded with this mutex to avoid race conditions. However,
+ * if the macro MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, Mbed TLS will
+ * unconditionally use the implementation for mbedtls_platform_gmtime_r()
+ * supplied at compile time.
+ */
+//#define MBEDTLS_PLATFORM_GMTIME_R_ALT
+
+/* \} name SECTION: Customisation configuration options */
+
+/*
+ * Allow user to override any previous default.
+ *
+ * Use two macro names for that, as:
+ * - with yotta the prefix YOTTA_CFG_ is forced
+ * - without yotta is looks weird to have a YOTTA prefix.
+ */
+#if defined(YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE)
+#include YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE
+#elif defined(MBEDTLS_USER_CONFIG_FILE)
+#include MBEDTLS_USER_CONFIG_FILE
+#endif
+
+#include "mbedtls/check_config.h"
+
+/* define memory related functions */
+#if !defined(DX_PLAT_MPS2_PLUS)
+//#include "no_os.h"
+#endif
+
+#endif /* MBEDTLS_CONFIG_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312-musca_b1-no-os.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312-musca_b1-no-os.h
new file mode 100644
index 0000000..a02b2dd
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312-musca_b1-no-os.h
@@ -0,0 +1,3360 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef MBEDTLS_CONFIG_H
+#define MBEDTLS_CONFIG_H
+
+#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE)
+#define _CRT_SECURE_NO_DEPRECATE 1
+#endif
+
+/**
+ * \name SECTION: System support
+ *
+ * This section sets system specific settings.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_HAVE_ASM
+ *
+ * The compiler has support for asm().
+ *
+ * Requires support for asm() in compiler.
+ *
+ * Used in:
+ * library/aria.c
+ * library/timing.c
+ * include/mbedtls/bn_mul.h
+ *
+ * Required by:
+ * MBEDTLS_AESNI_C
+ * MBEDTLS_PADLOCK_C
+ *
+ * Comment to disable the use of assembly code.
+ */
+#define MBEDTLS_HAVE_ASM
+
+/**
+ * \def MBEDTLS_NO_UDBL_DIVISION
+ *
+ * The platform lacks support for double-width integer division (64-bit
+ * division on a 32-bit platform, 128-bit division on a 64-bit platform).
+ *
+ * Used in:
+ * include/mbedtls/bignum.h
+ * library/bignum.c
+ *
+ * The bignum code uses double-width division to speed up some operations.
+ * Double-width division is often implemented in software that needs to
+ * be linked with the program. The presence of a double-width integer
+ * type is usually detected automatically through preprocessor macros,
+ * but the automatic detection cannot know whether the code needs to
+ * and can be linked with an implementation of division for that type.
+ * By default division is assumed to be usable if the type is present.
+ * Uncomment this option to prevent the use of double-width division.
+ *
+ * Note that division for the native integer type is always required.
+ * Furthermore, a 64-bit type is always required even on a 32-bit
+ * platform, but it need not support multiplication or division. In some
+ * cases it is also desirable to disable some double-width operations. For
+ * example, if double-width division is implemented in software, disabling
+ * it can reduce code size in some embedded targets.
+ */
+//#define MBEDTLS_NO_UDBL_DIVISION
+
+/**
+ * \def MBEDTLS_NO_64BIT_MULTIPLICATION
+ *
+ * The platform lacks support for 32x32 -> 64-bit multiplication.
+ *
+ * Used in:
+ * library/poly1305.c
+ *
+ * Some parts of the library may use multiplication of two unsigned 32-bit
+ * operands with a 64-bit result in order to speed up computations. On some
+ * platforms, this is not available in hardware and has to be implemented in
+ * software, usually in a library provided by the toolchain.
+ *
+ * Sometimes it is not desirable to have to link to that library. This option
+ * removes the dependency of that library on platforms that lack a hardware
+ * 64-bit multiplier by embedding a software implementation in Mbed TLS.
+ *
+ * Note that depending on the compiler, this may decrease performance compared
+ * to using the library function provided by the toolchain.
+ */
+//#define MBEDTLS_NO_64BIT_MULTIPLICATION
+
+/**
+ * \def MBEDTLS_HAVE_SSE2
+ *
+ * CPU supports SSE2 instruction set.
+ *
+ * Uncomment if the CPU supports SSE2 (IA-32 specific).
+ */
+//#define MBEDTLS_HAVE_SSE2
+
+/**
+ * \def MBEDTLS_HAVE_TIME
+ *
+ * System has time.h and time().
+ * The time does not need to be correct, only time differences are used,
+ * by contrast with MBEDTLS_HAVE_TIME_DATE
+ *
+ * Defining MBEDTLS_HAVE_TIME allows you to specify MBEDTLS_PLATFORM_TIME_ALT,
+ * MBEDTLS_PLATFORM_TIME_MACRO, MBEDTLS_PLATFORM_TIME_TYPE_MACRO and
+ * MBEDTLS_PLATFORM_STD_TIME.
+ *
+ * Comment if your system does not support time functions
+ */
+#define MBEDTLS_HAVE_TIME
+
+/**
+ * \def MBEDTLS_HAVE_TIME_DATE
+ *
+ * System has time.h, time(), and an implementation for
+ * mbedtls_platform_gmtime_r() (see below).
+ * The time needs to be correct (not necesarily very accurate, but at least
+ * the date should be correct). This is used to verify the validity period of
+ * X.509 certificates.
+ *
+ * Comment if your system does not have a correct clock.
+ *
+ * \note mbedtls_platform_gmtime_r() is an abstraction in platform_util.h that
+ * behaves similarly to the gmtime_r() function from the C standard. Refer to
+ * the documentation for mbedtls_platform_gmtime_r() for more information.
+ *
+ * \note It is possible to configure an implementation for
+ * mbedtls_platform_gmtime_r() at compile-time by using the macro
+ * MBEDTLS_PLATFORM_GMTIME_R_ALT.
+ */
+#define MBEDTLS_HAVE_TIME_DATE
+
+/**
+ * \def MBEDTLS_PLATFORM_MEMORY
+ *
+ * Enable the memory allocation layer.
+ *
+ * By default mbed TLS uses the system-provided calloc() and free().
+ * This allows different allocators (self-implemented or provided) to be
+ * provided to the platform abstraction layer.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY without the
+ * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide
+ * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and
+ * free() function pointer at runtime.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY and specifying
+ * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the
+ * alternate function at compile time.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Enable this layer to allow use of alternative memory allocators.
+ */
+#define MBEDTLS_PLATFORM_MEMORY
+
+/**
+ * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+ *
+ * Do not assign standard functions in the platform layer (e.g. calloc() to
+ * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF)
+ *
+ * This makes sure there are no linking errors on platforms that do not support
+ * these functions. You will HAVE to provide alternatives, either at runtime
+ * via the platform_set_xxx() functions or at compile time by setting
+ * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a
+ * MBEDTLS_PLATFORM_XXX_MACRO.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Uncomment to prevent default assignment of standard functions in the
+ * platform layer.
+ */
+//#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+
+/**
+ * \def MBEDTLS_PLATFORM_EXIT_ALT
+ *
+ * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the
+ * function in the platform abstraction layer.
+ *
+ * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will
+ * provide a function "mbedtls_platform_set_printf()" that allows you to set an
+ * alternative printf function pointer.
+ *
+ * All these define require MBEDTLS_PLATFORM_C to be defined!
+ *
+ * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows;
+ * it will be enabled automatically by check_config.h
+ *
+ * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as
+ * MBEDTLS_PLATFORM_XXX_MACRO!
+ *
+ * Requires: MBEDTLS_PLATFORM_TIME_ALT requires MBEDTLS_HAVE_TIME
+ *
+ * Uncomment a macro to enable alternate implementation of specific base
+ * platform function
+ */
+//#define MBEDTLS_PLATFORM_EXIT_ALT
+//#define MBEDTLS_PLATFORM_TIME_ALT
+//#define MBEDTLS_PLATFORM_FPRINTF_ALT
+//#define MBEDTLS_PLATFORM_PRINTF_ALT
+//#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_NV_SEED_ALT
+//#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
+
+/**
+ * \def MBEDTLS_DEPRECATED_WARNING
+ *
+ * Mark deprecated functions so that they generate a warning if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * This only works with GCC and Clang. With other compilers, you may want to
+ * use MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Uncomment to get warnings on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_WARNING
+
+/**
+ * \def MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Remove deprecated functions so that they generate an error if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * Uncomment to get errors on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_REMOVED
+
+/**
+ * \def MBEDTLS_CHECK_PARAMS
+ *
+ * This configuration option controls whether the library validates more of
+ * the parameters passed to it.
+ *
+ * When this flag is not defined, the library only attempts to validate an
+ * input parameter if: (1) they may come from the outside world (such as the
+ * network, the filesystem, etc.) or (2) not validating them could result in
+ * internal memory errors such as overflowing a buffer controlled by the
+ * library. On the other hand, it doesn't attempt to validate parameters whose
+ * values are fully controlled by the application (such as pointers).
+ *
+ * When this flag is defined, the library additionally attempts to validate
+ * parameters that are fully controlled by the application, and should always
+ * be valid if the application code is fully correct and trusted.
+ *
+ * For example, when a function accepts as input a pointer to a buffer that may
+ * contain untrusted data, and its documentation mentions that this pointer
+ * must not be NULL:
+ * - the pointer is checked to be non-NULL only if this option is enabled
+ * - the content of the buffer is always validated
+ *
+ * When this flag is defined, if a library function receives a parameter that
+ * is invalid, it will:
+ * - invoke the macro MBEDTLS_PARAM_FAILED() which by default expands to a
+ * call to the function mbedtls_param_failed()
+ * - immediately return (with a specific error code unless the function
+ * returns void and can't communicate an error).
+ *
+ * When defining this flag, you also need to:
+ * - either provide a definition of the function mbedtls_param_failed() in
+ * your application (see platform_util.h for its prototype) as the library
+ * calls that function, but does not provide a default definition for it,
+ * - or provide a different definition of the macro MBEDTLS_PARAM_FAILED()
+ * below if the above mechanism is not flexible enough to suit your needs.
+ * See the documentation of this macro later in this file.
+ *
+ * Uncomment to enable validation of application-controlled parameters.
+ */
+//#define MBEDTLS_CHECK_PARAMS
+
+/* \} name SECTION: System support */
+
+/**
+ * \name SECTION: mbed TLS feature support
+ *
+ * This section sets support for features that are or are not needed
+ * within the modules that are enabled.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_TIMING_ALT
+ *
+ * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(),
+ * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay()
+ *
+ * Only works if you have MBEDTLS_TIMING_C enabled.
+ *
+ * You will need to provide a header "timing_alt.h" and an implementation at
+ * compile time.
+ */
+//#define MBEDTLS_TIMING_ALT
+
+/**
+ * \def MBEDTLS_AES_ALT
+ *
+ * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternate core implementation of a symmetric crypto, an arithmetic or hash
+ * module (e.g. platform specific assembly optimized implementations). Keep
+ * in mind that the function prototypes should remain the same.
+ *
+ * This replaces the whole module. If you only want to replace one of the
+ * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer
+ * provide the "struct mbedtls_aes_context" definition and omit the base function
+ * declarations and implementations. "aes_alt.h" will be included from
+ * "aes.h" to include the new function definitions.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * module.
+ *
+ * \warning MD2, MD4, MD5, ARC4, DES and SHA-1 are considered weak and their
+ * use constitutes a security risk. If possible, we recommend
+ * avoiding dependencies on them, and considering stronger message
+ * digests and ciphers instead.
+ *
+ */
+#define MBEDTLS_AES_ALT
+//#define MBEDTLS_ARC4_ALT
+//#define MBEDTLS_ARIA_ALT
+//#define MBEDTLS_BLOWFISH_ALT
+//#define MBEDTLS_CAMELLIA_ALT
+#define MBEDTLS_CCM_ALT
+#define MBEDTLS_GCM_ALT
+#define MBEDTLS_CHACHA20_ALT
+#define MBEDTLS_CHACHAPOLY_ALT
+#define MBEDTLS_CMAC_ALT
+//#define MBEDTLS_DES_ALT
+//#define MBEDTLS_ECJPAKE_ALT
+//#define MBEDTLS_XTEA_ALT
+//#define MBEDTLS_NIST_KW_ALT
+//#define MBEDTLS_MD2_ALT
+//#define MBEDTLS_MD4_ALT
+//#define MBEDTLS_MD5_ALT
+#define MBEDTLS_POLY1305_ALT
+//#define MBEDTLS_RIPEMD160_ALT
+//#define MBEDTLS_RIPEMD160_ALT
+#define MBEDTLS_SHA1_ALT
+#define MBEDTLS_SHA256_ALT
+//#define MBEDTLS_SHA512_ALT
+#define MBEDTLS_RSA_ALT
+#define MBEDTLS_DHM_ALT
+//#define MBEDTLS_XTEA_ALT
+
+/*
+ * When replacing the elliptic curve module, pleace consider, that it is
+ * implemented with two .c files:
+ * - ecp.c
+ * - ecp_curves.c
+ * You can replace them very much like all the other MBEDTLS__MODULE_NAME__ALT
+ * macros as described above. The only difference is that you have to make sure
+ * that you provide functionality for both .c files.
+ */
+//#define MBEDTLS_ECP_ALT
+
+
+/**
+ * \def MBEDTLS_MD2_PROCESS_ALT
+ *
+ * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you
+ * alternate core implementation of symmetric crypto or hash function. Keep in
+ * mind that function prototypes should remain the same.
+ *
+ * This replaces only one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will
+ * no longer provide the mbedtls_sha1_process() function, but it will still provide
+ * the other function (using your mbedtls_sha1_process() function) and the definition
+ * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible
+ * with this definition.
+ *
+ * \note Because of a signature change, the core AES encryption and decryption routines are
+ * currently named mbedtls_aes_internal_encrypt and mbedtls_aes_internal_decrypt,
+ * respectively. When setting up alternative implementations, these functions should
+ * be overriden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
+ * must stay untouched.
+ *
+ * \note If you use the AES_xxx_ALT macros, then is is recommended to also set
+ * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
+ * tables.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ *
+ * \warning MD2, MD4, MD5, DES and SHA-1 are considered weak and their use
+ * constitutes a security risk. If possible, we recommend avoiding
+ * dependencies on them, and considering stronger message digests
+ * and ciphers instead.
+ *
+ */
+//#define MBEDTLS_MD2_PROCESS_ALT
+//#define MBEDTLS_MD4_PROCESS_ALT
+//#define MBEDTLS_MD5_PROCESS_ALT
+//#define MBEDTLS_RIPEMD160_PROCESS_ALT
+//#define MBEDTLS_SHA1_PROCESS_ALT
+//#define MBEDTLS_SHA256_PROCESS_ALT
+//#define MBEDTLS_SHA512_PROCESS_ALT
+//#define MBEDTLS_DES_SETKEY_ALT
+//#define MBEDTLS_DES_CRYPT_ECB_ALT
+//#define MBEDTLS_DES3_CRYPT_ECB_ALT
+//#define MBEDTLS_AES_SETKEY_ENC_ALT
+//#define MBEDTLS_AES_SETKEY_DEC_ALT
+//#define MBEDTLS_AES_ENCRYPT_ALT
+//#define MBEDTLS_AES_DECRYPT_ALT
+#define MBEDTLS_ECDH_GEN_PUBLIC_ALT
+#define MBEDTLS_ECDH_COMPUTE_SHARED_ALT
+#define MBEDTLS_ECDSA_VERIFY_ALT
+#define MBEDTLS_ECDSA_SIGN_ALT
+#define MBEDTLS_ECDSA_GENKEY_ALT
+/**
+ * \def MBEDTLS_ECP_INTERNAL_ALT
+ *
+ * Expose a part of the internal interface of the Elliptic Curve Point module.
+ *
+ * MBEDTLS_ECP__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternative core implementation of elliptic curve arithmetic. Keep in mind
+ * that function prototypes should remain the same.
+ *
+ * This partially replaces one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS_ECP_ALT flag. The original implementation
+ * is still present and it is used for group structures not supported by the
+ * alternative.
+ *
+ * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
+ * and implementing the following functions:
+ * unsigned char mbedtls_internal_ecp_grp_capable(
+ * const mbedtls_ecp_group *grp )
+ * int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp )
+ * void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp )
+ * The mbedtls_internal_ecp_grp_capable function should return 1 if the
+ * replacement functions implement arithmetic for the given group and 0
+ * otherwise.
+ * The functions mbedtls_internal_ecp_init and mbedtls_internal_ecp_free are
+ * called before and after each point operation and provide an opportunity to
+ * implement optimized set up and tear down instructions.
+ *
+ * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and
+ * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac
+ * function, but will use your mbedtls_internal_ecp_double_jac if the group is
+ * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when
+ * receives it as an argument). If the group is not supported then the original
+ * implementation is used. The other functions and the definition of
+ * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your
+ * implementation of mbedtls_internal_ecp_double_jac and
+ * mbedtls_internal_ecp_grp_capable must be compatible with this definition.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ */
+/* Required for all the functions in this section */
+//#define MBEDTLS_ECP_INTERNAL_ALT
+/* Support for Weierstrass curves with Jacobi representation */
+//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
+//#define MBEDTLS_ECP_ADD_MIXED_ALT
+//#define MBEDTLS_ECP_DOUBLE_JAC_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_ALT
+/* Support for curves with Montgomery arithmetic */
+//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT
+//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
+//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
+
+/**
+ * \def MBEDTLS_TEST_NULL_ENTROPY
+ *
+ * Enables testing and use of mbed TLS without any configured entropy sources.
+ * This permits use of the library on platforms before an entropy source has
+ * been integrated (see for example the MBEDTLS_ENTROPY_HARDWARE_ALT or the
+ * MBEDTLS_ENTROPY_NV_SEED switches).
+ *
+ * WARNING! This switch MUST be disabled in production builds, and is suitable
+ * only for development.
+ * Enabling the switch negates any security provided by the library.
+ *
+ * Requires MBEDTLS_ENTROPY_C, MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ */
+//#define MBEDTLS_TEST_NULL_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_HARDWARE_ALT
+ *
+ * Uncomment this macro to let mbed TLS use your own implementation of a
+ * hardware entropy collector.
+ *
+ * Your function must be called \c mbedtls_hardware_poll(), have the same
+ * prototype as declared in entropy_poll.h, and accept NULL as first argument.
+ *
+ * Uncomment to use your own hardware entropy collector.
+ */
+#define MBEDTLS_ENTROPY_HARDWARE_ALT
+
+/**
+ * \def MBEDTLS_AES_ROM_TABLES
+ *
+ * Use precomputed AES tables stored in ROM.
+ *
+ * Uncomment this macro to use precomputed AES tables stored in ROM.
+ * Comment this macro to generate AES tables in RAM at runtime.
+ *
+ * Tradeoff: Using precomputed ROM tables reduces RAM usage by ~8kb
+ * (or ~2kb if \c MBEDTLS_AES_FEWER_TABLES is used) and reduces the
+ * initialization time before the first AES operation can be performed.
+ * It comes at the cost of additional ~8kb ROM use (resp. ~2kb if \c
+ * MBEDTLS_AES_FEWER_TABLES below is used), and potentially degraded
+ * performance if ROM access is slower than RAM access.
+ *
+ * This option is independent of \c MBEDTLS_AES_FEWER_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_ROM_TABLES
+
+/**
+ * \def MBEDTLS_AES_FEWER_TABLES
+ *
+ * Use less ROM/RAM for AES tables.
+ *
+ * Uncommenting this macro omits 75% of the AES tables from
+ * ROM / RAM (depending on the value of \c MBEDTLS_AES_ROM_TABLES)
+ * by computing their values on the fly during operations
+ * (the tables are entry-wise rotations of one another).
+ *
+ * Tradeoff: Uncommenting this reduces the RAM / ROM footprint
+ * by ~6kb but at the cost of more arithmetic operations during
+ * runtime. Specifically, one has to compare 4 accesses within
+ * different tables to 4 accesses with additional arithmetic
+ * operations within the same table. The performance gain/loss
+ * depends on the system and memory details.
+ *
+ * This option is independent of \c MBEDTLS_AES_ROM_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_FEWER_TABLES
+
+/**
+ * \def MBEDTLS_CAMELLIA_SMALL_MEMORY
+ *
+ * Use less ROM for the Camellia implementation (saves about 768 bytes).
+ *
+ * Uncomment this macro to use less memory for Camellia.
+ */
+//#define MBEDTLS_CAMELLIA_SMALL_MEMORY
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CBC
+ *
+ * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CBC
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CFB
+ *
+ * Enable Cipher Feedback mode (CFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CTR
+ *
+ * Enable Counter Block Cipher mode (CTR) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CTR
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_OFB
+ *
+ * Enable Output Feedback mode (OFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_OFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_XTS
+ *
+ * Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES.
+ */
+//#define MBEDTLS_CIPHER_MODE_XTS
+
+/**
+ * \def MBEDTLS_CIPHER_NULL_CIPHER
+ *
+ * Enable NULL cipher.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * encryption or channels without any security!
+ *
+ * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable
+ * the following ciphersuites:
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA
+ *
+ * Uncomment this macro to enable the NULL cipher and ciphersuites
+ */
+//#define MBEDTLS_CIPHER_NULL_CIPHER
+
+/**
+ * \def MBEDTLS_CIPHER_PADDING_PKCS7
+ *
+ * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for
+ * specific padding modes in the cipher layer with cipher modes that support
+ * padding (e.g. CBC)
+ *
+ * If you disable all padding modes, only full blocks can be used with CBC.
+ *
+ * Enable padding modes in the cipher layer.
+ */
+#define MBEDTLS_CIPHER_PADDING_PKCS7
+#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+#define MBEDTLS_CIPHER_PADDING_ZEROS
+
+/**
+ * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+ *
+ * Enable weak ciphersuites in SSL / TLS.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * channels with virtually no security at all!
+ *
+ * This enables the following ciphersuites:
+ * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA
+ *
+ * Uncomment this macro to enable weak ciphersuites
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+ *
+ * Remove RC4 ciphersuites by default in SSL / TLS.
+ * This flag removes the ciphersuites based on RC4 from the default list as
+ * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to
+ * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them
+ * explicitly.
+ *
+ * Uncomment this macro to remove RC4 ciphersuites by default.
+ */
+//#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED
+ *
+ * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve
+ * module. By default all supported curves are enabled.
+ *
+ * Comment macros to disable the curve and functions for it
+ */
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+/* CryptoCell only supports BP256R1 at this stage */
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+//#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+//#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+//#define MBEDTLS_ECP_DP_CURVE448_ENABLED
+
+/**
+ * \def MBEDTLS_ECP_NIST_OPTIM
+ *
+ * Enable specific 'modulo p' routines for each NIST prime.
+ * Depending on the prime and architecture, makes operations 4 to 8 times
+ * faster on the corresponding curve.
+ *
+ * Comment this macro to disable NIST curves optimisation.
+ */
+#define MBEDTLS_ECP_NIST_OPTIM
+
+/**
+ * \def MBEDTLS_ECP_RESTARTABLE
+ *
+ * Enable "non-blocking" ECC operations that can return early and be resumed.
+ *
+ * This allows various functions to pause by returning
+ * #MBEDTLS_ERR_ECP_IN_PROGRESS (or, for functions in the SSL module,
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS) and then be called later again in
+ * order to further progress and eventually complete their operation. This is
+ * controlled through mbedtls_ecp_set_max_ops() which limits the maximum
+ * number of ECC operations a function may perform before pausing; see
+ * mbedtls_ecp_set_max_ops() for more information.
+ *
+ * This is useful in non-threaded environments if you want to avoid blocking
+ * for too long on ECC (and, hence, X.509 or SSL/TLS) operations.
+ *
+ * Uncomment this macro to enable restartable ECC computations.
+ *
+ * \note This option only works with the default software implementation of
+ * elliptic curve functionality. It is incompatible with
+ * MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ */
+//#define MBEDTLS_ECP_RESTARTABLE
+
+/**
+ * \def MBEDTLS_ECDSA_DETERMINISTIC
+ *
+ * Enable deterministic ECDSA (RFC 6979).
+ * Standard ECDSA is "fragile" in the sense that lack of entropy when signing
+ * may result in a compromise of the long-term signing key. This is avoided by
+ * the deterministic variant.
+ *
+ * Requires: MBEDTLS_HMAC_DRBG_C
+ *
+ * Comment this macro to disable deterministic ECDSA.
+ */
+#define MBEDTLS_ECDSA_DETERMINISTIC
+
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+ *
+ * Enable the PSK based ciphersuite modes in SSL / TLS.
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+ *
+ * Enable the DHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+//#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+ *
+ * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+ *
+ * Enable the RSA-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+ *
+ * Enable the RSA-only based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ */
+//#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+ *
+ * Enable the DHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+//#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+ *
+ * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ *
+ * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C,
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+ *
+ * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+ *
+ * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+ *
+ * Enable the ECJPAKE based ciphersuite modes in SSL / TLS.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Requires: MBEDTLS_ECJPAKE_C
+ * MBEDTLS_SHA256_C
+ * MBEDTLS_ECP_DP_SECP256R1_ENABLED
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+
+/**
+ * \def MBEDTLS_PK_PARSE_EC_EXTENDED
+ *
+ * Enhance support for reading EC keys using variants of SEC1 not allowed by
+ * RFC 5915 and RFC 5480.
+ *
+ * Currently this means parsing the SpecifiedECDomain choice of EC
+ * parameters (only known groups are supported, not arbitrary domains, to
+ * avoid validation issues).
+ *
+ * Disable if you only need to support RFC 5915 + 5480 key formats.
+ */
+//#define MBEDTLS_PK_PARSE_EC_EXTENDED
+
+/**
+ * \def MBEDTLS_ERROR_STRERROR_DUMMY
+ *
+ * Enable a dummy error function to make use of mbedtls_strerror() in
+ * third party libraries easier when MBEDTLS_ERROR_C is disabled
+ * (no effect when MBEDTLS_ERROR_C is enabled).
+ *
+ * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're
+ * not using mbedtls_strerror() or error_strerror() in your application.
+ *
+ * Disable if you run into name conflicts and want to really remove the
+ * mbedtls_strerror()
+ */
+#define MBEDTLS_ERROR_STRERROR_DUMMY
+
+/**
+ * \def MBEDTLS_GENPRIME
+ *
+ * Enable the prime-number generation code.
+ *
+ * Requires: MBEDTLS_BIGNUM_C
+ */
+#define MBEDTLS_GENPRIME
+
+/**
+ * \def MBEDTLS_FS_IO
+ *
+ * Enable functions that use the filesystem.
+ */
+//#define MBEDTLS_FS_IO
+
+/**
+ * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ * Do not add default entropy sources. These are the platform specific,
+ * mbedtls_timing_hardclock and HAVEGE based poll functions.
+ *
+ * This is useful to have more control over the added entropy sources in an
+ * application.
+ *
+ * Uncomment this macro to prevent loading of default entropy functions.
+ */
+//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+
+/**
+ * \def MBEDTLS_NO_PLATFORM_ENTROPY
+ *
+ * Do not use built-in platform entropy functions.
+ * This is useful if your platform does not support
+ * standards like the /dev/urandom or Windows CryptoAPI.
+ *
+ * Uncomment this macro to disable the built-in platform entropy functions.
+ */
+#define MBEDTLS_NO_PLATFORM_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_FORCE_SHA256
+ *
+ * Force the entropy accumulator to use a SHA-256 accumulator instead of the
+ * default SHA-512 based one (if both are available).
+ *
+ * Requires: MBEDTLS_SHA256_C
+ *
+ * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option
+ * if you have performance concerns.
+ *
+ * This option is only useful if both MBEDTLS_SHA256_C and
+ * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used.
+ */
+//#define MBEDTLS_ENTROPY_FORCE_SHA256
+
+/**
+ * \def MBEDTLS_ENTROPY_NV_SEED
+ *
+ * Enable the non-volatile (NV) seed file-based entropy source.
+ * (Also enables the NV seed read/write functions in the platform layer)
+ *
+ * This is crucial (if not required) on systems that do not have a
+ * cryptographic entropy source (in hardware or kernel) available.
+ *
+ * Requires: MBEDTLS_ENTROPY_C, MBEDTLS_PLATFORM_C
+ *
+ * \note The read/write functions that are used by the entropy source are
+ * determined in the platform layer, and can be modified at runtime and/or
+ * compile-time depending on the flags (MBEDTLS_PLATFORM_NV_SEED_*) used.
+ *
+ * \note If you use the default implementation functions that read a seedfile
+ * with regular fopen(), please make sure you make a seedfile with the
+ * proper name (defined in MBEDTLS_PLATFORM_STD_NV_SEED_FILE) and at
+ * least MBEDTLS_ENTROPY_BLOCK_SIZE bytes in size that can be read from
+ * and written to or you will get an entropy source error! The default
+ * implementation will only use the first MBEDTLS_ENTROPY_BLOCK_SIZE
+ * bytes from the file.
+ *
+ * \note The entropy collector will write to the seed file before entropy is
+ * given to an external source, to update it.
+ */
+//#define MBEDTLS_ENTROPY_NV_SEED
+
+/**
+ * \def MBEDTLS_MEMORY_DEBUG
+ *
+ * Enable debugging of buffer allocator memory issues. Automatically prints
+ * (to stderr) all (fatal) messages on memory allocation issues. Enables
+ * function for 'debug output' of allocated memory.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Uncomment this macro to let the buffer allocator print out error messages.
+ */
+//#define MBEDTLS_MEMORY_DEBUG
+
+/**
+ * \def MBEDTLS_MEMORY_BACKTRACE
+ *
+ * Include backtrace information with each allocated block.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ * GLIBC-compatible backtrace() an backtrace_symbols() support
+ *
+ * Uncomment this macro to include backtrace information
+ */
+//#define MBEDTLS_MEMORY_BACKTRACE
+
+/**
+ * \def MBEDTLS_PK_RSA_ALT_SUPPORT
+ *
+ * Support external private RSA keys (eg from a HSM) in the PK layer.
+ *
+ * Comment this macro to disable support for external private RSA keys.
+ */
+//#define MBEDTLS_PK_RSA_ALT_SUPPORT
+
+/**
+ * \def MBEDTLS_PKCS1_V15
+ *
+ * Enable support for PKCS#1 v1.5 encoding.
+ *
+ * Requires: MBEDTLS_RSA_C
+ *
+ * This enables support for PKCS#1 v1.5 operations.
+ */
+#define MBEDTLS_PKCS1_V15
+
+/**
+ * \def MBEDTLS_PKCS1_V21
+ *
+ * Enable support for PKCS#1 v2.1 encoding.
+ *
+ * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C
+ *
+ * This enables support for RSAES-OAEP and RSASSA-PSS operations.
+ */
+#define MBEDTLS_PKCS1_V21
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_SPM
+ *
+ * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is built for SPM (Secure
+ * Partition Manager) integration which separates the code into two parts: a
+ * NSPE (Non-Secure Process Environment) and an SPE (Secure Process
+ * Environment).
+ *
+ * Module: library/psa_crypto.c
+ * Requires: MBEDTLS_PSA_CRYPTO_C
+ *
+ */
+#define MBEDTLS_PSA_CRYPTO_SPM
+
+/**
+ * \def MBEDTLS_PSA_HAS_ITS_IO
+ *
+ * Enable the non-volatile secure storage usage.
+ *
+ * This is crucial on systems that do not have a HW TRNG support.
+ *
+ */
+//#define MBEDTLS_PSA_HAS_ITS_IO
+
+/**
+ * \def MBEDTLS_RSA_NO_CRT
+ *
+ * Do not use the Chinese Remainder Theorem for the RSA private operation.
+ *
+ * Uncomment this macro to disable the use of CRT in RSA.
+ *
+ */
+//#define MBEDTLS_RSA_NO_CRT
+
+/**
+ * \def MBEDTLS_SELF_TEST
+ *
+ * Enable the checkup functions (*_self_test).
+ */
+#define MBEDTLS_SELF_TEST
+
+/**
+ * \def MBEDTLS_SHA256_SMALLER
+ *
+ * Enable an implementation of SHA-256 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * The default implementation is meant to be a reasonnable compromise between
+ * performance and size. This version optimizes more aggressively for size at
+ * the expense of performance. Eg on Cortex-M4 it reduces the size of
+ * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about
+ * 30%.
+ *
+ * Uncomment to enable the smaller implementation of SHA256.
+ */
+//#define MBEDTLS_SHA256_SMALLER
+
+/**
+ * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
+ *
+ * Enable sending of alert messages in case of encountered errors as per RFC.
+ * If you choose not to send the alert messages, mbed TLS can still communicate
+ * with other servers, only debugging of failures is harder.
+ *
+ * The advantage of not sending alert messages, is that no information is given
+ * about reasons for failures thus preventing adversaries of gaining intel.
+ *
+ * Enable sending of all alert messages
+ */
+//#define MBEDTLS_SSL_ALL_ALERT_MESSAGES
+/**
+ * \def MBEDTLS_SSL_ASYNC_PRIVATE
+ *
+ * Enable asynchronous external private key operations in SSL. This allows
+ * you to configure an SSL connection to call an external cryptographic
+ * module to perform private key operations instead of performing the
+ * operation inside the library.
+ *
+ */
+//#define MBEDTLS_SSL_ASYNC_PRIVATE
+
+/**
+ * \def MBEDTLS_SSL_DEBUG_ALL
+ *
+ * Enable the debug messages in SSL module for all issues.
+ * Debug messages have been disabled in some places to prevent timing
+ * attacks due to (unbalanced) debugging function calls.
+ *
+ * If you need all error reporting you should enable this during debugging,
+ * but remove this for production servers that should log as well.
+ *
+ * Uncomment this macro to report all debug messages on errors introducing
+ * a timing side-channel.
+ *
+ */
+//#define MBEDTLS_SSL_DEBUG_ALL
+
+/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
+ *
+ * Enable support for Encrypt-then-MAC, RFC 7366.
+ *
+ * This allows peers that both support it to use a more robust protection for
+ * ciphersuites using CBC, providing deep resistance against timing attacks
+ * on the padding or underlying cipher.
+ *
+ * This only affects CBC ciphersuites, and is useless if none is defined.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Encrypt-then-MAC
+ */
+//#define MBEDTLS_SSL_ENCRYPT_THEN_MAC
+
+/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+ *
+ * Enable support for Extended Master Secret, aka Session Hash
+ * (draft-ietf-tls-session-hash-02).
+ *
+ * This was introduced as "the proper fix" to the Triple Handshake familiy of
+ * attacks, but it is recommended to always use it (even if you disable
+ * renegotiation), since it actually fixes a more fundamental issue in the
+ * original SSL/TLS design, and has implications beyond Triple Handshake.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Extended Master Secret.
+ */
+//#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+
+/**
+ * \def MBEDTLS_SSL_FALLBACK_SCSV
+ *
+ * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ *
+ * For servers, it is recommended to always enable this, unless you support
+ * only one version of TLS, or know for sure that none of your clients
+ * implements a fallback strategy.
+ *
+ * For clients, you only need this if you're using a fallback strategy, which
+ * is not recommended in the first place, unless you absolutely need it to
+ * interoperate with buggy (version-intolerant) servers.
+ *
+ * Comment this macro to disable support for FALLBACK_SCSV
+ */
+//#define MBEDTLS_SSL_FALLBACK_SCSV
+
+/**
+ * \def MBEDTLS_SSL_HW_RECORD_ACCEL
+ *
+ * Enable hooking functions in SSL module for hardware acceleration of
+ * individual records.
+ *
+ * Uncomment this macro to enable hooking functions.
+ */
+//#define MBEDTLS_SSL_HW_RECORD_ACCEL
+
+/**
+ * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING
+ *
+ * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0.
+ *
+ * This is a countermeasure to the BEAST attack, which also minimizes the risk
+ * of interoperability issues compared to sending 0-length records.
+ *
+ * Comment this macro to disable 1/n-1 record splitting.
+ */
+//#define MBEDTLS_SSL_CBC_RECORD_SPLITTING
+
+/**
+ * \def MBEDTLS_SSL_RENEGOTIATION
+ *
+ * Enable support for TLS renegotiation.
+ *
+ * The two main uses of renegotiation are (1) refresh keys on long-lived
+ * connections and (2) client authentication after the initial handshake.
+ * If you don't need renegotiation, it's probably better to disable it, since
+ * it has been associated with security issues in the past and is easy to
+ * misuse/misunderstand.
+ *
+ * Comment this to disable support for renegotiation.
+ *
+ * \note Even if this option is disabled, both client and server are aware
+ * of the Renegotiation Indication Extension (RFC 5746) used to
+ * prevent the SSL renegotiation attack (see RFC 5746 Sect. 1).
+ * (See \c mbedtls_ssl_conf_legacy_renegotiation for the
+ * configuration of this extension).
+ *
+ */
+//#define MBEDTLS_SSL_RENEGOTIATION
+
+/**
+ * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+ *
+ * Enable support for receiving and parsing SSLv2 Client Hello messages for the
+ * SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to enable support for SSLv2 Client Hello messages.
+ */
+//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+
+/**
+ * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+ *
+ * Pick the ciphersuite according to the client's preferences rather than ours
+ * in the SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to respect client's ciphersuite order
+ */
+//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+
+/**
+ * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ *
+ * Enable support for RFC 6066 max_fragment_length extension in SSL.
+ *
+ * Comment this macro to disable support for the max_fragment_length extension
+ */
+//#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+
+/**
+ * \def MBEDTLS_SSL_PROTO_SSL3
+ *
+ * Enable support for SSL 3.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for SSL 3.0
+ */
+//#define MBEDTLS_SSL_PROTO_SSL3
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1
+ *
+ * Enable support for TLS 1.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.0
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_1
+ *
+ * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.1 / DTLS 1.0
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C
+ * (Depends on ciphersuites)
+ *
+ * Comment this macro to disable support for TLS 1.2 / DTLS 1.2
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_2
+
+/**
+ * \def MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Enable support for DTLS (all available versions).
+ *
+ * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0,
+ * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1_1
+ * or MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for DTLS
+ */
+//#define MBEDTLS_SSL_PROTO_DTLS
+
+/**
+ * \def MBEDTLS_SSL_ALPN
+ *
+ * Enable support for RFC 7301 Application Layer Protocol Negotiation.
+ *
+ * Comment this macro to disable support for ALPN.
+ */
+//#define MBEDTLS_SSL_ALPN
+
+/**
+ * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY
+ *
+ * Enable support for the anti-replay mechanism in DTLS.
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ * MBEDTLS_SSL_PROTO_DTLS
+ *
+ * \warning Disabling this is often a security risk!
+ * See mbedtls_ssl_conf_dtls_anti_replay() for details.
+ *
+ * Comment this to disable anti-replay in DTLS.
+ */
+//#define MBEDTLS_SSL_DTLS_ANTI_REPLAY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Enable support for HelloVerifyRequest on DTLS servers.
+ *
+ * This feature is highly recommended to prevent DTLS servers being used as
+ * amplifiers in DoS attacks against other hosts. It should always be enabled
+ * unless you know for sure amplification cannot be a problem in the
+ * environment in which your server operates.
+ *
+ * \warning Disabling this can ba a security risk! (see above)
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Comment this to disable support for HelloVerifyRequest.
+ */
+//#define MBEDTLS_SSL_DTLS_HELLO_VERIFY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+ *
+ * Enable server-side support for clients that reconnect from the same port.
+ *
+ * Some clients unexpectedly close the connection and try to reconnect using the
+ * same source port. This needs special support from the server to handle the
+ * new connection securely, as described in section 4.2.8 of RFC 6347. This
+ * flag enables that support.
+ *
+ * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Comment this to disable support for clients reusing the source port.
+ */
+//#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+
+/**
+ * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+ *
+ * Enable support for a limit of records with bad MAC.
+ *
+ * See mbedtls_ssl_conf_dtls_badmac_limit().
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ */
+//#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+
+/**
+ * \def MBEDTLS_SSL_SESSION_TICKETS
+ *
+ * Enable support for RFC 5077 session tickets in SSL.
+ * Client-side, provides full support for session tickets (maintainance of a
+ * session store remains the responsibility of the application, though).
+ * Server-side, you also need to provide callbacks for writing and parsing
+ * tickets, including authenticated encryption and key management. Example
+ * callbacks are provided by MBEDTLS_SSL_TICKET_C.
+ *
+ * Comment this macro to disable support for SSL session tickets
+ */
+//#define MBEDTLS_SSL_SESSION_TICKETS
+
+/**
+ * \def MBEDTLS_SSL_EXPORT_KEYS
+ *
+ * Enable support for exporting key block and master secret.
+ * This is required for certain users of TLS, e.g. EAP-TLS.
+ *
+ * Comment this macro to disable support for key export
+ */
+//#define MBEDTLS_SSL_EXPORT_KEYS
+
+/**
+ * \def MBEDTLS_SSL_SERVER_NAME_INDICATION
+ *
+ * Enable support for RFC 6066 server name indication (SNI) in SSL.
+ *
+ * Requires: MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Comment this macro to disable support for server name indication in SSL
+ */
+//#define MBEDTLS_SSL_SERVER_NAME_INDICATION
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC
+ *
+ * Enable support for RFC 6066 truncated HMAC in SSL.
+ *
+ * Comment this macro to disable support for truncated HMAC in SSL
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+ *
+ * Fallback to old (pre-2.7), non-conforming implementation of the truncated
+ * HMAC extension which also truncates the HMAC key. Note that this option is
+ * only meant for a transitory upgrade period and is likely to be removed in
+ * a future version of the library.
+ *
+ * \warning The old implementation is non-compliant and has a security weakness
+ * (2^80 brute force attack on the HMAC key used for a single,
+ * uninterrupted connection). This should only be enabled temporarily
+ * when (1) the use of truncated HMAC is essential in order to save
+ * bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
+ * the fixed implementation yet (pre-2.7).
+ *
+ * \deprecated This option is deprecated and will likely be removed in a
+ * future version of Mbed TLS.
+ *
+ * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
+ *
+ * Requires: MBEDTLS_SSL_TRUNCATED_HMAC
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+
+/**
+ * \def MBEDTLS_THREADING_ALT
+ *
+ * Provide your own alternate threading implementation.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to allow your own alternate threading implementation.
+ */
+//#define MBEDTLS_THREADING_ALT
+
+/**
+ * \def MBEDTLS_THREADING_PTHREAD
+ *
+ * Enable the pthread wrapper layer for the threading layer.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to enable pthread mutexes.
+ */
+//#define MBEDTLS_THREADING_PTHREAD
+
+/**
+ * \def MBEDTLS_USE_PSA_CRYPTO
+ *
+ * Make the X.509 and TLS library use PSA for cryptographic operations, see
+ * #MBEDTLS_PSA_CRYPTO_C.
+ *
+ * Note: this option is still in progress, the full X.509 and TLS modules are
+ * not covered yet, but parts that are not ported to PSA yet will still work
+ * as usual, so enabling this option should not break backwards compatibility.
+ *
+ * \warning Support for PSA is still an experimental feature.
+ * Any public API that depends on this option may change
+ * at any time until this warning is removed.
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C.
+ */
+//#define MBEDTLS_USE_PSA_CRYPTO
+
+/**
+ * \def MBEDTLS_VERSION_FEATURES
+ *
+ * Allow run-time checking of compile-time enabled features. Thus allowing users
+ * to check at run-time if the library is for instance compiled with threading
+ * support via mbedtls_version_check_feature().
+ *
+ * Requires: MBEDTLS_VERSION_C
+ *
+ * Comment this to disable run-time checking and save ROM space
+ */
+#define MBEDTLS_VERSION_FEATURES
+
+/**
+ * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an extension in a v1 or v2 certificate.
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+
+/**
+ * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an unknown critical extension.
+ *
+ * \warning Depending on your PKI use, enabling this can be a security risk!
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+
+/**
+ * \def MBEDTLS_X509_CHECK_KEY_USAGE
+ *
+ * Enable verification of the keyUsage extension (CA and leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused
+ * (intermediate) CA and leaf certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip keyUsage checking for both CA and leaf certificates.
+ */
+//#define MBEDTLS_X509_CHECK_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+ *
+ * Enable verification of the extendedKeyUsage extension (leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip extendedKeyUsage checking for certificates.
+ */
+//#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
+ *
+ * Enable parsing and verification of X.509 certificates, CRLs and CSRS
+ * signed with RSASSA-PSS (aka PKCS#1 v2.1).
+ *
+ * Comment this macro to disallow using RSASSA-PSS in certificates.
+ */
+//#define MBEDTLS_X509_RSASSA_PSS_SUPPORT
+
+/**
+ * \def MBEDTLS_ZLIB_SUPPORT
+ *
+ * If set, the SSL/TLS module uses ZLIB to support compression and
+ * decompression of packet data.
+ *
+ * \warning TLS-level compression MAY REDUCE SECURITY! See for example the
+ * CRIME attack. Before enabling this option, you should examine with care if
+ * CRIME or similar exploits may be a applicable to your use case.
+ *
+ * \note Currently compression can't be used with DTLS.
+ *
+ * \deprecated This feature is deprecated and will be removed
+ * in the next major revision of the library.
+ *
+ * Used in: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This feature requires zlib library and headers to be present.
+ *
+ * Uncomment to enable use of ZLIB
+ */
+//#define MBEDTLS_ZLIB_SUPPORT
+/* \} name SECTION: mbed TLS feature support */
+
+/**
+ * \name SECTION: mbed TLS modules
+ *
+ * This section enables or disables entire modules in mbed TLS
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_AESNI_C
+ *
+ * Enable AES-NI support on x86-64.
+ *
+ * Module: library/aesni.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the AES-NI instructions on x86-64
+ */
+//#define MBEDTLS_AESNI_C
+
+/**
+ * \def MBEDTLS_AES_C
+ *
+ * Enable the AES block cipher.
+ *
+ * Module: library/aes.c
+ * Caller: library/cipher.c
+ * library/pem.c
+ * library/ctr_drbg.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ *
+ * PEM_PARSE uses AES for decrypting encrypted keys.
+ */
+#define MBEDTLS_AES_C
+
+/**
+ * \def MBEDTLS_ARC4_C
+ *
+ * Enable the ARCFOUR stream cipher.
+ *
+ * Module: library/arc4.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. If possible, we recommend avoidng dependencies on
+ * it, and considering stronger ciphers instead.
+ *
+ */
+//#define MBEDTLS_ARC4_C
+
+/**
+ * \def MBEDTLS_ASN1_PARSE_C
+ *
+ * Enable the generic ASN1 parser.
+ *
+ * Module: library/asn1.c
+ * Caller: library/x509.c
+ * library/dhm.c
+ * library/pkcs12.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ */
+#define MBEDTLS_ASN1_PARSE_C
+
+/**
+ * \def MBEDTLS_ASN1_WRITE_C
+ *
+ * Enable the generic ASN1 writer.
+ *
+ * Module: library/asn1write.c
+ * Caller: library/ecdsa.c
+ * library/pkwrite.c
+ * library/x509_create.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ */
+#define MBEDTLS_ASN1_WRITE_C
+
+/**
+ * \def MBEDTLS_BASE64_C
+ *
+ * Enable the Base64 module.
+ *
+ * Module: library/base64.c
+ * Caller: library/pem.c
+ *
+ * This module is required for PEM support (required by X.509).
+ */
+#define MBEDTLS_BASE64_C
+
+/**
+ * \def MBEDTLS_BIGNUM_C
+ *
+ * Enable the multi-precision integer library.
+ *
+ * Module: library/bignum.c
+ * Caller: library/dhm.c
+ * library/ecp.c
+ * library/ecdsa.c
+ * library/rsa.c
+ * library/rsa_internal.c
+ * library/ssl_tls.c
+ *
+ * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support.
+ */
+#define MBEDTLS_BIGNUM_C
+
+/**
+ * \def MBEDTLS_BLOWFISH_C
+ *
+ * Enable the Blowfish block cipher.
+ *
+ * Module: library/blowfish.c
+ */
+//#define MBEDTLS_BLOWFISH_C
+
+/**
+ * \def MBEDTLS_CAMELLIA_C
+ *
+ * Enable the Camellia block cipher.
+ *
+ * Module: library/camellia.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ */
+//#define MBEDTLS_CAMELLIA_C
+
+/**
+ * \def MBEDTLS_ARIA_C
+ *
+ * Enable the ARIA block cipher.
+ *
+ * Module: library/aria.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384
+ */
+//#define MBEDTLS_ARIA_C
+
+/**
+ * \def MBEDTLS_CCM_C
+ *
+ * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher.
+ *
+ * Module: library/ccm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-CCM ciphersuites, if other requisites are
+ * enabled as well.
+ */
+#define MBEDTLS_CCM_C
+
+/**
+ * \def MBEDTLS_CERTS_C
+ *
+ * Enable the test certificates.
+ *
+ * Module: library/certs.c
+ * Caller:
+ *
+ * This module is used for testing (ssl_client/server).
+ */
+//#define MBEDTLS_CERTS_C
+
+/**
+ * \def MBEDTLS_CHACHA20_C
+ *
+ * Enable the ChaCha20 stream cipher.
+ *
+ * Module: library/chacha20.c
+ */
+#define MBEDTLS_CHACHA20_C
+
+/**
+ * \def MBEDTLS_CHACHAPOLY_C
+ *
+ * Enable the ChaCha20-Poly1305 AEAD algorithm.
+ *
+ * Module: library/chachapoly.c
+ *
+ * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C
+ */
+#define MBEDTLS_CHACHAPOLY_C
+
+/**
+ * \def MBEDTLS_CIPHER_C
+ *
+ * Enable the generic cipher layer.
+ *
+ * Module: library/cipher.c
+ * Caller: library/ssl_tls.c
+ *
+ * Uncomment to enable generic cipher wrappers.
+ */
+#define MBEDTLS_CIPHER_C
+
+/**
+ * \def MBEDTLS_CMAC_C
+ *
+ * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
+ * ciphers.
+ *
+ * Module: library/cmac.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
+ *
+ */
+#define MBEDTLS_CMAC_C
+
+/**
+ * \def MBEDTLS_CTR_DRBG_C
+ *
+ * Enable the CTR_DRBG AES-based random generator.
+ * The CTR_DRBG generator uses AES-256 by default.
+ * To use AES-128 instead, enable MBEDTLS_CTR_DRBG_USE_128_BIT_KEY below.
+ *
+ * Module: library/ctr_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * This module provides the CTR_DRBG AES random number generator.
+ */
+#define MBEDTLS_CTR_DRBG_C
+
+/**
+ * \def MBEDTLS_DEBUG_C
+ *
+ * Enable the debug functions.
+ *
+ * Module: library/debug.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module provides debugging functions.
+ */
+//#define MBEDTLS_DEBUG_C
+
+/**
+ * \def MBEDTLS_DES_C
+ *
+ * Enable the DES block cipher.
+ *
+ * Module: library/des.c
+ * Caller: library/pem.c
+ * library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ *
+ * PEM_PARSE uses DES/3DES for decrypting encrypted keys.
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_DES_C
+
+/**
+ * \def MBEDTLS_DHM_C
+ *
+ * Enable the Diffie-Hellman-Merkle module.
+ *
+ * Module: library/dhm.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * DHE-RSA, DHE-PSK
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_DHM_C
+
+/**
+ * \def MBEDTLS_ECDH_C
+ *
+ * Enable the elliptic curve Diffie-Hellman library.
+ *
+ * Module: library/ecdh.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK
+ *
+ * Requires: MBEDTLS_ECP_C
+ */
+#define MBEDTLS_ECDH_C
+
+/**
+ * \def MBEDTLS_ECDSA_C
+ *
+ * Enable the elliptic curve DSA library.
+ *
+ * Module: library/ecdsa.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ */
+#define MBEDTLS_ECDSA_C
+
+/**
+ * \def MBEDTLS_ECJPAKE_C
+ *
+ * Enable the elliptic curve J-PAKE library.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Module: library/ecjpake.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECJPAKE
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C
+ */
+//#define MBEDTLS_ECJPAKE_C
+
+/**
+ * \def MBEDTLS_ECP_C
+ *
+ * Enable the elliptic curve over GF(p) library.
+ *
+ * Module: library/ecp.c
+ * Caller: library/ecdh.c
+ * library/ecdsa.c
+ * library/ecjpake.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED
+ */
+#define MBEDTLS_ECP_C
+
+/**
+ * \def MBEDTLS_ENTROPY_C
+ *
+ * Enable the platform-specific entropy code.
+ *
+ * Module: library/entropy.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C
+ *
+ * This module provides a generic entropy pool
+ */
+#define MBEDTLS_ENTROPY_C
+
+/**
+ * \def MBEDTLS_ERROR_C
+ *
+ * Enable error code to error string conversion.
+ *
+ * Module: library/error.c
+ * Caller:
+ *
+ * This module enables mbedtls_strerror().
+ */
+//#define MBEDTLS_ERROR_C
+
+/**
+ * \def MBEDTLS_GCM_C
+ *
+ * Enable the Galois/Counter Mode (GCM) for AES.
+ *
+ * Module: library/gcm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
+ * requisites are enabled as well.
+ */
+#define MBEDTLS_GCM_C
+
+/**
+ * \def MBEDTLS_HAVEGE_C
+ *
+ * Enable the HAVEGE random generator.
+ *
+ * Warning: the HAVEGE random generator is not suitable for virtualized
+ * environments
+ *
+ * Warning: the HAVEGE random generator is dependent on timing and specific
+ * processor traits. It is therefore not advised to use HAVEGE as
+ * your applications primary random generator or primary entropy pool
+ * input. As a secondary input to your entropy pool, it IS able add
+ * the (limited) extra entropy it provides.
+ *
+ * Module: library/havege.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_TIMING_C
+ *
+ * Uncomment to enable the HAVEGE random generator.
+ */
+//#define MBEDTLS_HAVEGE_C
+
+/**
+ * \def MBEDTLS_HKDF_C
+ *
+ * Enable the HKDF algorithm (RFC 5869).
+ *
+ * Module: library/hkdf.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the Hashed Message Authentication Code
+ * (HMAC)-based key derivation function (HKDF).
+ */
+#define MBEDTLS_HKDF_C
+
+/**
+ * \def MBEDTLS_HMAC_DRBG_C
+ *
+ * Enable the HMAC_DRBG random generator.
+ *
+ * Module: library/hmac_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * Uncomment to enable the HMAC_DRBG random number geerator.
+ */
+#define MBEDTLS_HMAC_DRBG_C
+
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable the Key Wrapping mode for 128-bit block ciphers,
+ * as defined in NIST SP 800-38F. Only KW and KWP modes
+ * are supported. At the moment, only AES is approved by NIST.
+ *
+ * Module: library/nist_kw.c
+ *
+ * Requires: MBEDTLS_AES_C and MBEDTLS_CIPHER_C
+ */
+#define MBEDTLS_NIST_KW_C
+
+/**
+ * \def MBEDTLS_MD_C
+ *
+ * Enable the generic message digest layer.
+ *
+ * Module: library/md.c
+ * Caller:
+ *
+ * Uncomment to enable generic message digest wrappers.
+ */
+#define MBEDTLS_MD_C
+
+/**
+ * \def MBEDTLS_MD2_C
+ *
+ * Enable the MD2 hash algorithm.
+ *
+ * Module: library/md2.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD2-signed X.509 certs.
+ *
+ * \warning MD2 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD2_C
+
+/**
+ * \def MBEDTLS_MD4_C
+ *
+ * Enable the MD4 hash algorithm.
+ *
+ * Module: library/md4.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD4-signed X.509 certs.
+ *
+ * \warning MD4 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD4_C
+
+/**
+ * \def MBEDTLS_MD5_C
+ *
+ * Enable the MD5 hash algorithm.
+ *
+ * Module: library/md5.c
+ * Caller: library/md.c
+ * library/pem.c
+ * library/ssl_tls.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, and for TLS 1.2
+ * depending on the handshake parameters. Further, it is used for checking
+ * MD5-signed certificates, and for PBKDF1 when decrypting PEM-encoded
+ * encrypted keys.
+ *
+ * \warning MD5 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD5_C
+
+/**
+ * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Enable the buffer allocator implementation that makes use of a (stack)
+ * based buffer to 'allocate' dynamic memory. (replaces calloc() and free()
+ * calls)
+ *
+ * Module: library/memory_buffer_alloc.c
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS)
+ *
+ * Enable this module to enable the buffer memory allocator.
+ */
+#define MBEDTLS_MEMORY_BUFFER_ALLOC_C
+
+/**
+ * \def MBEDTLS_NET_C
+ *
+ * Enable the TCP and UDP over IPv6/IPv4 networking routines.
+ *
+ * \note This module only works on POSIX/Unix (including Linux, BSD and OS X)
+ * and Windows. For other platforms, you'll want to disable it, and write your
+ * own networking callbacks to be passed to \c mbedtls_ssl_set_bio().
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/net_sockets.c
+ *
+ * This module provides networking routines.
+ */
+//#define MBEDTLS_NET_C
+
+/**
+ * \def MBEDTLS_OID_C
+ *
+ * Enable the OID database.
+ *
+ * Module: library/oid.c
+ * Caller: library/asn1write.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ * library/pkwrite.c
+ * library/rsa.c
+ * library/x509.c
+ * library/x509_create.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * This modules translates between OIDs and internal values.
+ */
+#define MBEDTLS_OID_C
+
+/**
+ * \def MBEDTLS_PADLOCK_C
+ *
+ * Enable VIA Padlock support on x86.
+ *
+ * Module: library/padlock.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the VIA PadLock on x86.
+ */
+//#define MBEDTLS_PADLOCK_C
+
+/**
+ * \def MBEDTLS_PEM_PARSE_C
+ *
+ * Enable PEM decoding / parsing.
+ *
+ * Module: library/pem.c
+ * Caller: library/dhm.c
+ * library/pkparse.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for decoding / parsing PEM files.
+ */
+#define MBEDTLS_PEM_PARSE_C
+
+/**
+ * \def MBEDTLS_PEM_WRITE_C
+ *
+ * Enable PEM encoding / writing.
+ *
+ * Module: library/pem.c
+ * Caller: library/pkwrite.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for encoding / writing PEM files.
+ */
+#define MBEDTLS_PEM_WRITE_C
+
+/**
+ * \def MBEDTLS_PK_C
+ *
+ * Enable the generic public (asymetric) key layer.
+ *
+ * Module: library/pk.c
+ * Caller: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C
+ *
+ * Uncomment to enable generic public key wrappers.
+ */
+#define MBEDTLS_PK_C
+
+/**
+ * \def MBEDTLS_PK_PARSE_C
+ *
+ * Enable the generic public (asymetric) key parser.
+ *
+ * Module: library/pkparse.c
+ * Caller: library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key parse functions.
+ */
+#define MBEDTLS_PK_PARSE_C
+
+/**
+ * \def MBEDTLS_PK_WRITE_C
+ *
+ * Enable the generic public (asymetric) key writer.
+ *
+ * Module: library/pkwrite.c
+ * Caller: library/x509write.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key write functions.
+ */
+#define MBEDTLS_PK_WRITE_C
+
+/**
+ * \def MBEDTLS_PKCS5_C
+ *
+ * Enable PKCS#5 functions.
+ *
+ * Module: library/pkcs5.c
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the PKCS#5 functions.
+ */
+#define MBEDTLS_PKCS5_C
+
+/**
+ * \def MBEDTLS_PKCS11_C
+ *
+ * Enable wrapper for PKCS#11 smartcard support.
+ *
+ * Module: library/pkcs11.c
+ * Caller: library/pk.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * This module enables SSL/TLS PKCS #11 smartcard support.
+ * Requires the presence of the PKCS#11 helper library (libpkcs11-helper)
+ */
+//#define MBEDTLS_PKCS11_C
+
+/**
+ * \def MBEDTLS_PKCS12_C
+ *
+ * Enable PKCS#12 PBE functions.
+ * Adds algorithms for parsing PKCS#8 encrypted private keys
+ *
+ * Module: library/pkcs12.c
+ * Caller: library/pkparse.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * Can use: MBEDTLS_ARC4_C
+ *
+ * This module enables PKCS#12 functions.
+ */
+//#define MBEDTLS_PKCS12_C
+
+/**
+ * \def MBEDTLS_PLATFORM_C
+ *
+ * Enable the platform abstraction layer that allows you to re-assign
+ * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit().
+ *
+ * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT
+ * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned
+ * above to be specified at runtime or compile time respectively.
+ *
+ * \note This abstraction layer must be enabled on Windows (including MSYS2)
+ * as other module rely on it for a fixed snprintf implementation.
+ *
+ * Module: library/platform.c
+ * Caller: Most other .c files
+ *
+ * This module enables abstraction of common (libc) functions.
+ */
+#define MBEDTLS_PLATFORM_C
+
+/**
+ * \def MBEDTLS_POLY1305_C
+ *
+ * Enable the Poly1305 MAC algorithm.
+ *
+ * Module: library/poly1305.c
+ * Caller: library/chachapoly.c
+ */
+#define MBEDTLS_POLY1305_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_C
+ *
+ * Enable the Platform Security Architecture cryptography API.
+ *
+ * Module: library/psa_crypto.c
+ *
+ * Requires: MBEDTLS_CTR_DRBG_C, MBEDTLS_ENTROPY_C
+ *
+ */
+#define MBEDTLS_PSA_CRYPTO_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_STORAGE_C
+ *
+ * Enable the Platform Security Architecture persistent key storage.
+ *
+ * Module: library/psa_crypto_storage.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C and one of either
+ * MBEDTLS_PSA_CRYPTO_STORAGE_FILE_C or MBEDTLS_PSA_CRYPTO_STORAGE_ITS_C
+ * (but not both)
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_STORAGE_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_STORAGE_FILE_C
+ *
+ * Enable persistent key storage over files for the
+ * Platform Security Architecture cryptography API.
+ *
+ * Module: library/psa_crypto_storage_file.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C, MBEDTLS_FS_IO
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_STORAGE_FILE_C
+
+/**
+ * \def MBEDTLS_PSA_CRYPTO_STORAGE_ITS_C
+ *
+ * Enable persistent key storage over PSA ITS for the
+ * Platform Security Architecture cryptography API.
+ *
+ * Module: library/psa_crypto_storage_its.c
+ *
+ * Requires: MBEDTLS_PSA_CRYPTO_C, MBEDTLS_PSA_HAS_ITS_IO
+ *
+ */
+//#define MBEDTLS_PSA_CRYPTO_STORAGE_ITS_C
+
+/**
+ * \def MBEDTLS_RIPEMD160_C
+ *
+ * Enable the RIPEMD-160 hash algorithm.
+ *
+ * Module: library/ripemd160.c
+ * Caller: library/md.c
+ *
+ */
+//#define MBEDTLS_RIPEMD160_C
+
+/**
+ * \def MBEDTLS_RSA_C
+ *
+ * Enable the RSA public-key cryptosystem.
+ *
+ * Module: library/rsa.c
+ * library/rsa_internal.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509.c
+ *
+ * This module is used by the following key exchanges:
+ * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C
+ */
+#define MBEDTLS_RSA_C
+
+/**
+ * \def MBEDTLS_SHA1_C
+ *
+ * Enable the SHA1 cryptographic hash algorithm.
+ *
+ * Module: library/sha1.c
+ * Caller: library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509write_crt.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, for TLS 1.2
+ * depending on the handshake parameters, and for SHA1-signed certificates.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_SHA1_C
+
+/**
+ * \def MBEDTLS_SHA256_C
+ *
+ * Enable the SHA-224 and SHA-256 cryptographic hash algorithms.
+ *
+ * Module: library/sha256.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module adds support for SHA-224 and SHA-256.
+ * This module is required for the SSL/TLS 1.2 PRF function.
+ */
+#define MBEDTLS_SHA256_C
+
+/**
+ * \def MBEDTLS_SHA512_C
+ *
+ * Enable the SHA-384 and SHA-512 cryptographic hash algorithms.
+ *
+ * Module: library/sha512.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module adds support for SHA-384 and SHA-512.
+ */
+#define MBEDTLS_SHA512_C
+
+/**
+ * \def MBEDTLS_SSL_CACHE_C
+ *
+ * Enable simple SSL cache implementation.
+ *
+ * Module: library/ssl_cache.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_CACHE_C
+ */
+//#define MBEDTLS_SSL_CACHE_C
+
+/**
+ * \def MBEDTLS_SSL_COOKIE_C
+ *
+ * Enable basic implementation of DTLS cookies for hello verification.
+ *
+ * Module: library/ssl_cookie.c
+ * Caller:
+ */
+//#define MBEDTLS_SSL_COOKIE_C
+
+/**
+ * \def MBEDTLS_SSL_TICKET_C
+ *
+ * Enable an implementation of TLS server-side callbacks for session tickets.
+ *
+ * Module: library/ssl_ticket.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_CIPHER_C
+ */
+//#define MBEDTLS_SSL_TICKET_C
+
+/**
+ * \def MBEDTLS_SSL_CLI_C
+ *
+ * Enable the SSL/TLS client code.
+ *
+ * Module: library/ssl_cli.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS client support.
+ */
+//#define MBEDTLS_SSL_CLI_C
+
+/**
+ * \def MBEDTLS_SSL_SRV_C
+ *
+ * Enable the SSL/TLS server code.
+ *
+ * Module: library/ssl_srv.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS server support.
+ */
+//#define MBEDTLS_SSL_SRV_C
+
+/**
+ * \def MBEDTLS_SSL_TLS_C
+ *
+ * Enable the generic SSL/TLS code.
+ *
+ * Module: library/ssl_tls.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * and at least one of the MBEDTLS_SSL_PROTO_XXX defines
+ *
+ * This module is required for SSL/TLS.
+ */
+//#define MBEDTLS_SSL_TLS_C
+
+/**
+ * \def MBEDTLS_THREADING_C
+ *
+ * Enable the threading abstraction layer.
+ * By default mbed TLS assumes it is used in a non-threaded environment or that
+ * contexts are not shared between threads. If you do intend to use contexts
+ * between threads, you will need to enable this layer to prevent race
+ * conditions. See also our Knowledge Base article about threading:
+ * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
+ *
+ * Module: library/threading.c
+ *
+ * This allows different threading implementations (self-implemented or
+ * provided).
+ *
+ * You will have to enable either MBEDTLS_THREADING_ALT or
+ * MBEDTLS_THREADING_PTHREAD.
+ *
+ * Enable this layer to allow use of mutexes within mbed TLS
+ */
+//#define MBEDTLS_THREADING_C
+
+/**
+ * \def MBEDTLS_TIMING_C
+ *
+ * Enable the semi-portable timing interface.
+ *
+ * \note The provided implementation only works on POSIX/Unix (including Linux,
+ * BSD and OS X) and Windows. On other platforms, you can either disable that
+ * module and provide your own implementations of the callbacks needed by
+ * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide
+ * your own implementation of the whole module by setting
+ * \c MBEDTLS_TIMING_ALT in the current file.
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/timing.c
+ * Caller: library/havege.c
+ *
+ * This module is used by the HAVEGE random number generator.
+ */
+//#define MBEDTLS_TIMING_C
+
+/**
+ * \def MBEDTLS_VERSION_C
+ *
+ * Enable run-time version information.
+ *
+ * Module: library/version.c
+ *
+ * This module provides run-time version information.
+ */
+#define MBEDTLS_VERSION_C
+
+/**
+ * \def MBEDTLS_X509_USE_C
+ *
+ * Enable X.509 core for using certificates.
+ *
+ * Module: library/x509.c
+ * Caller: library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C,
+ * MBEDTLS_PK_PARSE_C
+ *
+ * This module is required for the X.509 parsing modules.
+ */
+//#define MBEDTLS_X509_USE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Enable X.509 certificate parsing.
+ *
+ * Module: library/x509_crt.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 certificate parsing.
+ */
+//#define MBEDTLS_X509_CRT_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CRL_PARSE_C
+ *
+ * Enable X.509 CRL parsing.
+ *
+ * Module: library/x509_crl.c
+ * Caller: library/x509_crt.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 CRL parsing.
+ */
+//#define MBEDTLS_X509_CRL_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_PARSE_C
+ *
+ * Enable X.509 Certificate Signing Request (CSR) parsing.
+ *
+ * Module: library/x509_csr.c
+ * Caller: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is used for reading X.509 certificate request.
+ */
+//#define MBEDTLS_X509_CSR_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CREATE_C
+ *
+ * Enable X.509 core for creating certificates.
+ *
+ * Module: library/x509_create.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C
+ *
+ * This module is the basis for creating X.509 certificates and CSRs.
+ */
+//#define MBEDTLS_X509_CREATE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_WRITE_C
+ *
+ * Enable creating X.509 certificates.
+ *
+ * Module: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate creation.
+ */
+//#define MBEDTLS_X509_CRT_WRITE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_WRITE_C
+ *
+ * Enable creating X.509 Certificate Signing Requests (CSR).
+ *
+ * Module: library/x509_csr_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate request writing.
+ */
+//#define MBEDTLS_X509_CSR_WRITE_C
+
+/**
+ * \def MBEDTLS_XTEA_C
+ *
+ * Enable the XTEA block cipher.
+ *
+ * Module: library/xtea.c
+ * Caller:
+ */
+//#define MBEDTLS_XTEA_C
+
+/* \} name SECTION: mbed TLS modules */
+
+/**
+ * \name SECTION: Module configuration options
+ *
+ * This section allows for the setting of module specific sizes and
+ * configuration options. The default values are already present in the
+ * relevant header files and should suffice for the regular use cases.
+ *
+ * Our advice is to enable options and change their values here
+ * only if you have a good reason and know the consequences.
+ *
+ * Please check the respective header file for documentation on these
+ * parameters (to prevent duplicate documentation).
+ * \{
+ */
+
+/* MPI / BIGNUM options */
+//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */
+//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */
+
+/* CTR_DRBG options */
+//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */
+/*! Maximal reseed counter - indicates maximal number of
+requests allowed between reseeds; according to NIST 800-90
+it is (2^48 - 1), our restriction is : (int - 0xFFFF - 0xF ).*/
+#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 0xFFF0 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+//#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY /**< Use 128-bit key for CTR_DRBG - may reduce security (see ctr_drbg.h) */
+
+/* HMAC_DRBG options */
+//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+
+/* ECP options */
+//#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */
+//#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */
+//#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */
+
+/* Entropy options */
+//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */
+#define MBEDTLS_ENTROPY_MAX_GATHER 144 /**< Maximum amount requested from entropy sources */
+//#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Default minimum number of bytes required for the hardware entropy source mbedtls_hardware_poll() before entropy is released */
+
+/* Memory buffer allocator options */
+//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */
+
+/* Platform options */
+//#define MBEDTLS_PLATFORM_STD_MEM_HDR <stdlib.h> /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */
+//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */
+
+//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_TIME time /**< Default time to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS 0 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE 1 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile" /**< Seed file to read/write with default implementation */
+
+/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */
+/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */
+//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */
+#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_TIME_MACRO time /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_TIME_TYPE_MACRO time_t /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */
+#define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+
+/**
+ * \brief This macro is invoked by the library when an invalid parameter
+ * is detected that is only checked with MBEDTLS_CHECK_PARAMS
+ * (see the documentation of that option for context).
+ *
+ * When you leave this undefined here, a default definition is
+ * provided that invokes the function mbedtls_param_failed(),
+ * which is declared in platform_util.h for the benefit of the
+ * library, but that you need to define in your application.
+ *
+ * When you define this here, this replaces the default
+ * definition in platform_util.h (which no longer declares the
+ * function mbedtls_param_failed()) and it is your responsibility
+ * to make sure this macro expands to something suitable (in
+ * particular, that all the necessary declarations are visible
+ * from within the library - you can ensure that by providing
+ * them in this file next to the macro definition).
+ *
+ * Note that you may define this macro to expand to nothing, in
+ * which case you don't have to worry about declarations or
+ * definitions. However, you will then be notified about invalid
+ * parameters only in non-void functions, and void function will
+ * just silently return early on invalid parameters, which
+ * partially negates the benefits of enabling
+ * #MBEDTLS_CHECK_PARAMS in the first place, so is discouraged.
+ *
+ * \param cond The expression that should evaluate to true, but doesn't.
+ */
+//#define MBEDTLS_PARAM_FAILED( cond ) assert( cond )
+
+/* SSL Cache options */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */
+
+/* SSL options */
+
+/** \def MBEDTLS_SSL_MAX_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming and outgoing plaintext fragments.
+ *
+ * This determines the size of both the incoming and outgoing TLS I/O buffers
+ * in such a way that both are capable of holding the specified amount of
+ * plaintext data, regardless of the protection mechanism used.
+ *
+ * To configure incoming and outgoing I/O buffers separately, use
+ * #MBEDTLS_SSL_IN_CONTENT_LEN and #MBEDTLS_SSL_OUT_CONTENT_LEN,
+ * which overwrite the value set by this option.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ * recommended to use the Maximum Fragment Length (MFL) extension to
+ * inform the server about this limitation. On the server, there
+ * is no supported, standardized way of informing the client about
+ * restriction on the maximum size of incoming messages, and unless
+ * the limitation has been communicated by other means, it is recommended
+ * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ * while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of both
+ * incoming and outgoing I/O buffers.
+ */
+//#define MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_IN_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming plaintext fragments.
+ *
+ * This determines the size of the incoming TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option is undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ * recommended to use the Maximum Fragment Length (MFL) extension to
+ * inform the server about this limitation. On the server, there
+ * is no supported, standardized way of informing the client about
+ * restriction on the maximum size of incoming messages, and unless
+ * the limitation has been communicated by other means, it is recommended
+ * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ * while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of the incoming I/O buffer
+ * independently of the outgoing I/O buffer.
+ */
+//#define MBEDTLS_SSL_IN_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_OUT_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of outgoing plaintext fragments.
+ *
+ * This determines the size of the outgoing TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * It is possible to save RAM by setting a smaller outward buffer, while keeping
+ * the default inward 16384 byte buffer to conform to the TLS specification.
+ *
+ * The minimum required outward buffer size is determined by the handshake
+ * protocol's usage. Handshaking will fail if the outward buffer is too small.
+ * The specific size requirement depends on the configured ciphers and any
+ * certificate data which is sent during the handshake.
+ *
+ * Uncomment to set the maximum plaintext size of the outgoing I/O buffer
+ * independently of the incoming I/O buffer.
+ */
+//#define MBEDTLS_SSL_OUT_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_DTLS_MAX_BUFFERING
+ *
+ * Maximum number of heap-allocated bytes for the purpose of
+ * DTLS handshake message reassembly and future message buffering.
+ *
+ * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN
+ * to account for a reassembled handshake message of maximum size,
+ * together with its reassembly bitmap.
+ *
+ * A value of 2 * MBEDTLS_SSL_IN_CONTENT_LEN (32768 by default)
+ * should be sufficient for all practical situations as it allows
+ * to reassembly a large handshake message (such as a certificate)
+ * while buffering multiple smaller handshake messages.
+ *
+ */
+//#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
+
+//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */
+//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
+//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
+
+/**
+ * Complete list of ciphersuites to use, in order of preference.
+ *
+ * \warning No dependency checking is done on that field! This option can only
+ * be used to restrict the set of available ciphersuites. It is your
+ * responsibility to make sure the needed modules are active.
+ *
+ * Use this to save a few hundred bytes of ROM (default ordering of all
+ * available ciphersuites) and a few to a few hundred bytes of RAM.
+ *
+ * The value below is only an example, not the default.
+ */
+//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+
+/* X509 options */
+//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */
+//#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */
+
+/**
+ * Allow SHA-1 in the default TLS configuration for certificate signing.
+ * Without this build-time option, SHA-1 support must be activated explicitly
+ * through mbedtls_ssl_conf_cert_profile. Turning on this option is not
+ * recommended because of it is possible to generate SHA-1 collisions, however
+ * this may be safe for legacy infrastructure where additional controls apply.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+// #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES
+
+/**
+ * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
+ * signature and ciphersuite selection. Without this build-time option, SHA-1
+ * support must be activated explicitly through mbedtls_ssl_conf_sig_hashes.
+ * The use of SHA-1 in TLS <= 1.1 and in HMAC-SHA-1 is always allowed by
+ * default. At the time of writing, there is no practical attack on the use
+ * of SHA-1 in handshake signatures, hence this option is turned on by default
+ * to preserve compatibility with existing peers, but the general
+ * warning applies nonetheless:
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+
+/**
+ * Uncomment the macro to let mbed TLS use your alternate implementation of
+ * mbedtls_platform_zeroize(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * mbedtls_platform_zeroize() is a widely used function across the library to
+ * zero a block of memory. The implementation is expected to be secure in the
+ * sense that it has been written to prevent the compiler from removing calls
+ * to mbedtls_platform_zeroize() as part of redundant code elimination
+ * optimizations. However, it is difficult to guarantee that calls to
+ * mbedtls_platform_zeroize() will not be optimized by the compiler as older
+ * versions of the C language standards do not provide a secure implementation
+ * of memset(). Therefore, MBEDTLS_PLATFORM_ZEROIZE_ALT enables users to
+ * configure their own implementation of mbedtls_platform_zeroize(), for
+ * example by using directives specific to their compiler, features from newer
+ * C standards (e.g using memset_s() in C11) or calling a secure memset() from
+ * their system (e.g explicit_bzero() in BSD).
+ */
+//#define MBEDTLS_PLATFORM_ZEROIZE_ALT
+
+/**
+ * Uncomment the macro to let Mbed TLS use your alternate implementation of
+ * mbedtls_platform_gmtime_r(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * gmtime() is not a thread-safe function as defined in the C standard. The
+ * library will try to use safer implementations of this function, such as
+ * gmtime_r() when available. However, if Mbed TLS cannot identify the target
+ * system, the implementation of mbedtls_platform_gmtime_r() will default to
+ * using the standard gmtime(). In this case, calls from the library to
+ * gmtime() will be guarded by the global mutex mbedtls_threading_gmtime_mutex
+ * if MBEDTLS_THREADING_C is enabled. We recommend that calls from outside the
+ * library are also guarded with this mutex to avoid race conditions. However,
+ * if the macro MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, Mbed TLS will
+ * unconditionally use the implementation for mbedtls_platform_gmtime_r()
+ * supplied at compile time.
+ */
+//#define MBEDTLS_PLATFORM_GMTIME_R_ALT
+
+/* \} name SECTION: Customisation configuration options */
+
+/*
+ * Allow user to override any previous default.
+ *
+ * Use two macro names for that, as:
+ * - with yotta the prefix YOTTA_CFG_ is forced
+ * - without yotta is looks weird to have a YOTTA prefix.
+ */
+#if defined(YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE)
+#include YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE
+#elif defined(MBEDTLS_USER_CONFIG_FILE)
+#include MBEDTLS_USER_CONFIG_FILE
+#endif
+
+#include "mbedtls/check_config.h"
+
+/* define memory related functions */
+#if !defined(DX_PLAT_MUSCA_B1)
+//#include "region_defs.h"
+#endif
+
+#endif /* MBEDTLS_CONFIG_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312.h
new file mode 100644
index 0000000..0dfa27e
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/config-cc312.h
@@ -0,0 +1,3270 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_CONFIG_H
+#define MBEDTLS_CONFIG_H
+
+#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE)
+#define _CRT_SECURE_NO_DEPRECATE 1
+#endif
+
+/**
+ * \name SECTION: System support
+ *
+ * This section sets system specific settings.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_HAVE_ASM
+ *
+ * The compiler has support for asm().
+ *
+ * Requires support for asm() in compiler.
+ *
+ * Used in:
+ * library/aria.c
+ * library/timing.c
+ * include/mbedtls/bn_mul.h
+ *
+ * Required by:
+ * MBEDTLS_AESNI_C
+ * MBEDTLS_PADLOCK_C
+ *
+ * Comment to disable the use of assembly code.
+ */
+#define MBEDTLS_HAVE_ASM
+
+/**
+ * \def MBEDTLS_NO_UDBL_DIVISION
+ *
+ * The platform lacks support for double-width integer division (64-bit
+ * division on a 32-bit platform, 128-bit division on a 64-bit platform).
+ *
+ * Used in:
+ * include/mbedtls/bignum.h
+ * library/bignum.c
+ *
+ * The bignum code uses double-width division to speed up some operations.
+ * Double-width division is often implemented in software that needs to
+ * be linked with the program. The presence of a double-width integer
+ * type is usually detected automatically through preprocessor macros,
+ * but the automatic detection cannot know whether the code needs to
+ * and can be linked with an implementation of division for that type.
+ * By default division is assumed to be usable if the type is present.
+ * Uncomment this option to prevent the use of double-width division.
+ *
+ * Note that division for the native integer type is always required.
+ * Furthermore, a 64-bit type is always required even on a 32-bit
+ * platform, but it need not support multiplication or division. In some
+ * cases it is also desirable to disable some double-width operations. For
+ * example, if double-width division is implemented in software, disabling
+ * it can reduce code size in some embedded targets.
+ */
+//#define MBEDTLS_NO_UDBL_DIVISION
+
+/**
+ * \def MBEDTLS_NO_64BIT_MULTIPLICATION
+ *
+ * The platform lacks support for 32x32 -> 64-bit multiplication.
+ *
+ * Used in:
+ * library/poly1305.c
+ *
+ * Some parts of the library may use multiplication of two unsigned 32-bit
+ * operands with a 64-bit result in order to speed up computations. On some
+ * platforms, this is not available in hardware and has to be implemented in
+ * software, usually in a library provided by the toolchain.
+ *
+ * Sometimes it is not desirable to have to link to that library. This option
+ * removes the dependency of that library on platforms that lack a hardware
+ * 64-bit multiplier by embedding a software implementation in Mbed TLS.
+ *
+ * Note that depending on the compiler, this may decrease performance compared
+ * to using the library function provided by the toolchain.
+ */
+//#define MBEDTLS_NO_64BIT_MULTIPLICATION
+
+/**
+ * \def MBEDTLS_HAVE_SSE2
+ *
+ * CPU supports SSE2 instruction set.
+ *
+ * Uncomment if the CPU supports SSE2 (IA-32 specific).
+ */
+//#define MBEDTLS_HAVE_SSE2
+
+/**
+ * \def MBEDTLS_HAVE_TIME
+ *
+ * System has time.h and time().
+ * The time does not need to be correct, only time differences are used,
+ * by contrast with MBEDTLS_HAVE_TIME_DATE
+ *
+ * Defining MBEDTLS_HAVE_TIME allows you to specify MBEDTLS_PLATFORM_TIME_ALT,
+ * MBEDTLS_PLATFORM_TIME_MACRO, MBEDTLS_PLATFORM_TIME_TYPE_MACRO and
+ * MBEDTLS_PLATFORM_STD_TIME.
+ *
+ * Comment if your system does not support time functions
+ */
+#define MBEDTLS_HAVE_TIME
+
+/**
+ * \def MBEDTLS_HAVE_TIME_DATE
+ *
+ * System has time.h, time(), and an implementation for
+ * mbedtls_platform_gmtime_r() (see below).
+ * The time needs to be correct (not necesarily very accurate, but at least
+ * the date should be correct). This is used to verify the validity period of
+ * X.509 certificates.
+ *
+ * Comment if your system does not have a correct clock.
+ *
+ * \note mbedtls_platform_gmtime_r() is an abstraction in platform_util.h that
+ * behaves similarly to the gmtime_r() function from the C standard. Refer to
+ * the documentation for mbedtls_platform_gmtime_r() for more information.
+ *
+ * \note It is possible to configure an implementation for
+ * mbedtls_platform_gmtime_r() at compile-time by using the macro
+ * MBEDTLS_PLATFORM_GMTIME_R_ALT.
+ */
+#define MBEDTLS_HAVE_TIME_DATE
+
+/**
+ * \def MBEDTLS_PLATFORM_MEMORY
+ *
+ * Enable the memory allocation layer.
+ *
+ * By default mbed TLS uses the system-provided calloc() and free().
+ * This allows different allocators (self-implemented or provided) to be
+ * provided to the platform abstraction layer.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY without the
+ * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide
+ * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and
+ * free() function pointer at runtime.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY and specifying
+ * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the
+ * alternate function at compile time.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Enable this layer to allow use of alternative memory allocators.
+ */
+#define MBEDTLS_PLATFORM_MEMORY
+
+/**
+ * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+ *
+ * Do not assign standard functions in the platform layer (e.g. calloc() to
+ * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF)
+ *
+ * This makes sure there are no linking errors on platforms that do not support
+ * these functions. You will HAVE to provide alternatives, either at runtime
+ * via the platform_set_xxx() functions or at compile time by setting
+ * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a
+ * MBEDTLS_PLATFORM_XXX_MACRO.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Uncomment to prevent default assignment of standard functions in the
+ * platform layer.
+ */
+//#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+
+/**
+ * \def MBEDTLS_PLATFORM_EXIT_ALT
+ *
+ * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the
+ * function in the platform abstraction layer.
+ *
+ * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will
+ * provide a function "mbedtls_platform_set_printf()" that allows you to set an
+ * alternative printf function pointer.
+ *
+ * All these define require MBEDTLS_PLATFORM_C to be defined!
+ *
+ * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows;
+ * it will be enabled automatically by check_config.h
+ *
+ * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as
+ * MBEDTLS_PLATFORM_XXX_MACRO!
+ *
+ * Requires: MBEDTLS_PLATFORM_TIME_ALT requires MBEDTLS_HAVE_TIME
+ *
+ * Uncomment a macro to enable alternate implementation of specific base
+ * platform function
+ */
+//#define MBEDTLS_PLATFORM_EXIT_ALT
+//#define MBEDTLS_PLATFORM_TIME_ALT
+//#define MBEDTLS_PLATFORM_FPRINTF_ALT
+//#define MBEDTLS_PLATFORM_PRINTF_ALT
+//#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_NV_SEED_ALT
+//#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
+
+/**
+ * \def MBEDTLS_DEPRECATED_WARNING
+ *
+ * Mark deprecated functions so that they generate a warning if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * This only works with GCC and Clang. With other compilers, you may want to
+ * use MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Uncomment to get warnings on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_WARNING
+
+/**
+ * \def MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Remove deprecated functions so that they generate an error if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * Uncomment to get errors on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_REMOVED
+
+/**
+ * \def MBEDTLS_CHECK_PARAMS
+ *
+ * This configuration option controls whether the library validates more of
+ * the parameters passed to it.
+ *
+ * When this flag is not defined, the library only attempts to validate an
+ * input parameter if: (1) they may come from the outside world (such as the
+ * network, the filesystem, etc.) or (2) not validating them could result in
+ * internal memory errors such as overflowing a buffer controlled by the
+ * library. On the other hand, it doesn't attempt to validate parameters whose
+ * values are fully controlled by the application (such as pointers).
+ *
+ * When this flag is defined, the library additionally attempts to validate
+ * parameters that are fully controlled by the application, and should always
+ * be valid if the application code is fully correct and trusted.
+ *
+ * For example, when a function accepts as input a pointer to a buffer that may
+ * contain untrusted data, and its documentation mentions that this pointer
+ * must not be NULL:
+ * - the pointer is checked to be non-NULL only if this option is enabled
+ * - the content of the buffer is always validated
+ *
+ * When this flag is defined, if a library function receives a parameter that
+ * is invalid, it will:
+ * - invoke the macro MBEDTLS_PARAM_FAILED() which by default expands to a
+ * call to the function mbedtls_param_failed()
+ * - immediately return (with a specific error code unless the function
+ * returns void and can't communicate an error).
+ *
+ * When defining this flag, you also need to:
+ * - either provide a definition of the function mbedtls_param_failed() in
+ * your application (see platform_util.h for its prototype) as the library
+ * calls that function, but does not provide a default definition for it,
+ * - or provide a different definition of the macro MBEDTLS_PARAM_FAILED()
+ * below if the above mechanism is not flexible enough to suit your needs.
+ * See the documentation of this macro later in this file.
+ *
+ * Uncomment to enable validation of application-controlled parameters.
+ */
+//#define MBEDTLS_CHECK_PARAMS
+
+/* \} name SECTION: System support */
+
+/**
+ * \name SECTION: mbed TLS feature support
+ *
+ * This section sets support for features that are or are not needed
+ * within the modules that are enabled.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_TIMING_ALT
+ *
+ * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(),
+ * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay()
+ *
+ * Only works if you have MBEDTLS_TIMING_C enabled.
+ *
+ * You will need to provide a header "timing_alt.h" and an implementation at
+ * compile time.
+ */
+//#define MBEDTLS_TIMING_ALT
+
+/**
+ * \def MBEDTLS_AES_ALT
+ *
+ * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternate core implementation of a symmetric crypto, an arithmetic or hash
+ * module (e.g. platform specific assembly optimized implementations). Keep
+ * in mind that the function prototypes should remain the same.
+ *
+ * This replaces the whole module. If you only want to replace one of the
+ * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer
+ * provide the "struct mbedtls_aes_context" definition and omit the base
+ * function declarations and implementations. "aes_alt.h" will be included from
+ * "aes.h" to include the new function definitions.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * module.
+ *
+ * \warning MD2, MD4, MD5, ARC4, DES and SHA-1 are considered weak and their
+ * use constitutes a security risk. If possible, we recommend
+ * avoiding dependencies on them, and considering stronger message
+ * digests and ciphers instead.
+ *
+ */
+#define MBEDTLS_AES_ALT
+//#define MBEDTLS_ARC4_ALT
+//#define MBEDTLS_ARIA_ALT
+//#define MBEDTLS_BLOWFISH_ALT
+//#define MBEDTLS_CAMELLIA_ALT
+#define MBEDTLS_CCM_ALT
+#define MBEDTLS_CHACHA20_ALT
+#define MBEDTLS_CHACHAPOLY_ALT
+#define MBEDTLS_CMAC_ALT
+//#define MBEDTLS_DES_ALT
+#define MBEDTLS_DHM_ALT
+//#define MBEDTLS_ECJPAKE_ALT
+#define MBEDTLS_GCM_ALT
+//#define MBEDTLS_NIST_KW_ALT
+//#define MBEDTLS_MD2_ALT
+//#define MBEDTLS_MD4_ALT
+//#define MBEDTLS_MD5_ALT
+#define MBEDTLS_POLY1305_ALT
+//#define MBEDTLS_RIPEMD160_ALT
+//#define MBEDTLS_XTEA_ALT
+#define MBEDTLS_SHA1_ALT
+#define MBEDTLS_SHA256_ALT
+//#define MBEDTLS_SHA512_ALT
+#define MBEDTLS_RSA_ALT
+
+
+/*
+ * When replacing the elliptic curve module, pleace consider, that it is
+ * implemented with two .c files:
+ * - ecp.c
+ * - ecp_curves.c
+ * You can replace them very much like all the other MBEDTLS__MODULE_NAME__ALT
+ * macros as described above. The only difference is that you have to make sure
+ * that you provide functionality for both .c files.
+ */
+//#define MBEDTLS_ECP_ALT
+
+/**
+ * \def MBEDTLS_MD2_PROCESS_ALT
+ *
+ * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you
+ * alternate core implementation of symmetric crypto or hash function. Keep in
+ * mind that function prototypes should remain the same.
+ *
+ * This replaces only one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will
+ * no longer provide the mbedtls_sha1_process() function, but it will still provide
+ * the other function (using your mbedtls_sha1_process() function) and the definition
+ * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible
+ * with this definition.
+ *
+ * \note Because of a signature change, the core AES encryption and decryption routines are
+ * currently named mbedtls_aes_internal_encrypt and mbedtls_aes_internal_decrypt,
+ * respectively. When setting up alternative implementations, these functions should
+ * be overriden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
+ * must stay untouched.
+ *
+ * \note If you use the AES_xxx_ALT macros, then is is recommended to also set
+ * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
+ * tables.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ *
+ * \warning MD2, MD4, MD5, DES and SHA-1 are considered weak and their use
+ * constitutes a security risk. If possible, we recommend avoiding
+ * dependencies on them, and considering stronger message digests
+ * and ciphers instead.
+ *
+ */
+//#define MBEDTLS_MD2_PROCESS_ALT
+//#define MBEDTLS_MD4_PROCESS_ALT
+//#define MBEDTLS_MD5_PROCESS_ALT
+//#define MBEDTLS_RIPEMD160_PROCESS_ALT
+//#define MBEDTLS_SHA1_PROCESS_ALT
+//#define MBEDTLS_SHA256_PROCESS_ALT
+//#define MBEDTLS_SHA512_PROCESS_ALT
+//#define MBEDTLS_DES_SETKEY_ALT
+//#define MBEDTLS_DES_CRYPT_ECB_ALT
+//#define MBEDTLS_DES3_CRYPT_ECB_ALT
+//#define MBEDTLS_AES_SETKEY_ENC_ALT
+//#define MBEDTLS_AES_SETKEY_DEC_ALT
+//#define MBEDTLS_AES_ENCRYPT_ALT
+//#define MBEDTLS_AES_DECRYPT_ALT
+#define MBEDTLS_ECDH_GEN_PUBLIC_ALT
+#define MBEDTLS_ECDH_COMPUTE_SHARED_ALT
+#define MBEDTLS_ECDSA_VERIFY_ALT
+#define MBEDTLS_ECDSA_SIGN_ALT
+#define MBEDTLS_ECDSA_GENKEY_ALT
+
+/**
+ * \def MBEDTLS_ECP_INTERNAL_ALT
+ *
+ * Expose a part of the internal interface of the Elliptic Curve Point module.
+ *
+ * MBEDTLS_ECP__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternative core implementation of elliptic curve arithmetic. Keep in mind
+ * that function prototypes should remain the same.
+ *
+ * This partially replaces one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS_ECP_ALT flag. The original implementation
+ * is still present and it is used for group structures not supported by the
+ * alternative.
+ *
+ * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
+ * and implementing the following functions:
+ * unsigned char mbedtls_internal_ecp_grp_capable(
+ * const mbedtls_ecp_group *grp )
+ * int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp )
+ * void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp )
+ * The mbedtls_internal_ecp_grp_capable function should return 1 if the
+ * replacement functions implement arithmetic for the given group and 0
+ * otherwise.
+ * The functions mbedtls_internal_ecp_init and mbedtls_internal_ecp_free are
+ * called before and after each point operation and provide an opportunity to
+ * implement optimized set up and tear down instructions.
+ *
+ * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and
+ * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac
+ * function, but will use your mbedtls_internal_ecp_double_jac if the group is
+ * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when
+ * receives it as an argument). If the group is not supported then the original
+ * implementation is used. The other functions and the definition of
+ * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your
+ * implementation of mbedtls_internal_ecp_double_jac and
+ * mbedtls_internal_ecp_grp_capable must be compatible with this definition.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ */
+/* Required for all the functions in this section */
+//#define MBEDTLS_ECP_INTERNAL_ALT
+/* Support for Weierstrass curves with Jacobi representation */
+//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
+//#define MBEDTLS_ECP_ADD_MIXED_ALT
+//#define MBEDTLS_ECP_DOUBLE_JAC_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_ALT
+/* Support for curves with Montgomery arithmetic */
+//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT
+//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
+//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
+
+/**
+ * \def MBEDTLS_TEST_NULL_ENTROPY
+ *
+ * Enables testing and use of mbed TLS without any configured entropy sources.
+ * This permits use of the library on platforms before an entropy source has
+ * been integrated (see for example the MBEDTLS_ENTROPY_HARDWARE_ALT or the
+ * MBEDTLS_ENTROPY_NV_SEED switches).
+ *
+ * WARNING! This switch MUST be disabled in production builds, and is suitable
+ * only for development.
+ * Enabling the switch negates any security provided by the library.
+ *
+ * Requires MBEDTLS_ENTROPY_C, MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ */
+//#define MBEDTLS_TEST_NULL_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_HARDWARE_ALT
+ *
+ * Uncomment this macro to let mbed TLS use your own implementation of a
+ * hardware entropy collector.
+ *
+ * Your function must be called \c mbedtls_hardware_poll(), have the same
+ * prototype as declared in entropy_poll.h, and accept NULL as first argument.
+ *
+ * Uncomment to use your own hardware entropy collector.
+ */
+#define MBEDTLS_ENTROPY_HARDWARE_ALT
+
+/**
+ * \def MBEDTLS_AES_ROM_TABLES
+ *
+ * Use precomputed AES tables stored in ROM.
+ *
+ * Uncomment this macro to use precomputed AES tables stored in ROM.
+ * Comment this macro to generate AES tables in RAM at runtime.
+ *
+ * Tradeoff: Using precomputed ROM tables reduces RAM usage by ~8kb
+ * (or ~2kb if \c MBEDTLS_AES_FEWER_TABLES is used) and reduces the
+ * initialization time before the first AES operation can be performed.
+ * It comes at the cost of additional ~8kb ROM use (resp. ~2kb if \c
+ * MBEDTLS_AES_FEWER_TABLES below is used), and potentially degraded
+ * performance if ROM access is slower than RAM access.
+ *
+ * This option is independent of \c MBEDTLS_AES_FEWER_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_ROM_TABLES
+
+/**
+ * \def MBEDTLS_AES_FEWER_TABLES
+ *
+ * Use less ROM/RAM for AES tables.
+ *
+ * Uncommenting this macro omits 75% of the AES tables from
+ * ROM / RAM (depending on the value of \c MBEDTLS_AES_ROM_TABLES)
+ * by computing their values on the fly during operations
+ * (the tables are entry-wise rotations of one another).
+ *
+ * Tradeoff: Uncommenting this reduces the RAM / ROM footprint
+ * by ~6kb but at the cost of more arithmetic operations during
+ * runtime. Specifically, one has to compare 4 accesses within
+ * different tables to 4 accesses with additional arithmetic
+ * operations within the same table. The performance gain/loss
+ * depends on the system and memory details.
+ *
+ * This option is independent of \c MBEDTLS_AES_ROM_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_FEWER_TABLES
+
+/**
+ * \def MBEDTLS_CAMELLIA_SMALL_MEMORY
+ *
+ * Use less ROM for the Camellia implementation (saves about 768 bytes).
+ *
+ * Uncomment this macro to use less memory for Camellia.
+ */
+//#define MBEDTLS_CAMELLIA_SMALL_MEMORY
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_XTS
+ *
+ * Enable Cipher Block XTS for symmetric ciphers.
+ */
+//#define MBEDTLS_CIPHER_MODE_XTS
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CBC
+ *
+ * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CBC
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CFB
+ *
+ * Enable Cipher Feedback mode (CFB) for symmetric ciphers.
+ */
+//#define MBEDTLS_CIPHER_MODE_CFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CTR
+ *
+ * Enable Counter Block Cipher mode (CTR) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CTR
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_OFB
+ *
+ * Enable Output Feedback Cipher mode (OFB) for symmetric
+ * ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_OFB
+
+/**
+ * \def MBEDTLS_CIPHER_NULL_CIPHER
+ *
+ * Enable NULL cipher.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * encryption or channels without any security!
+ *
+ * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable
+ * the following ciphersuites:
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA
+ *
+ * Uncomment this macro to enable the NULL cipher and ciphersuites
+ */
+//#define MBEDTLS_CIPHER_NULL_CIPHER
+
+/**
+ * \def MBEDTLS_CIPHER_PADDING_PKCS7
+ *
+ * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for
+ * specific padding modes in the cipher layer with cipher modes that support
+ * padding (e.g. CBC)
+ *
+ * If you disable all padding modes, only full blocks can be used with CBC.
+ *
+ * Enable padding modes in the cipher layer.
+ */
+//#define MBEDTLS_CIPHER_PADDING_PKCS7
+//#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+//#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+//#define MBEDTLS_CIPHER_PADDING_ZEROS
+
+/**
+ * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+ *
+ * Enable weak ciphersuites in SSL / TLS.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * channels with virtually no security at all!
+ *
+ * This enables the following ciphersuites:
+ * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA
+ *
+ * Uncomment this macro to enable weak ciphersuites
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+ *
+ * Remove RC4 ciphersuites by default in SSL / TLS.
+ * This flag removes the ciphersuites based on RC4 from the default list as
+ * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to
+ * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them
+ * explicitly.
+ *
+ * Uncomment this macro to remove RC4 ciphersuites by default.
+ */
+//#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED
+ *
+ * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve
+ * module. By default all supported curves are enabled.
+ *
+ * Comment macros to disable the curve and functions for it
+ */
+
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+/* CryptoCell only supports BP256R1 brainpool curve at this stage */
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+//#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+//#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+//#define MBEDTLS_ECP_DP_CURVE448_ENABLED
+
+/**
+ * \def MBEDTLS_ECP_NIST_OPTIM
+ *
+ * Enable specific 'modulo p' routines for each NIST prime.
+ * Depending on the prime and architecture, makes operations 4 to 8 times
+ * faster on the corresponding curve.
+ *
+ * Comment this macro to disable NIST curves optimization.
+ */
+#define MBEDTLS_ECP_NIST_OPTIM
+
+/**
+ * \def MBEDTLS_ECP_RESTARTABLE
+ *
+ * Enable "non-blocking" ECC operations that can return early and be resumed.
+ *
+ * This allows various functions to pause by returning
+ * #MBEDTLS_ERR_ECP_IN_PROGRESS (or, for functions in the SSL module,
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS) and then be called later again in
+ * order to further progress and eventually complete their operation. This is
+ * controlled through mbedtls_ecp_set_max_ops() which limits the maximum
+ * number of ECC operations a function may perform before pausing; see
+ * mbedtls_ecp_set_max_ops() for more information.
+ *
+ * This is useful in non-threaded environments if you want to avoid blocking
+ * for too long on ECC (and, hence, X.509 or SSL/TLS) operations.
+ *
+ * Uncomment this macro to enable restartable ECC computations.
+ *
+ * \note This option only works with the default software implementation of
+ * elliptic curve functionality. It is incompatible with
+ * MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ */
+//#define MBEDTLS_ECP_RESTARTABLE
+
+/**
+ * \def MBEDTLS_ECDSA_DETERMINISTIC
+ *
+ * Enable deterministic ECDSA (RFC 6979).
+ * Standard ECDSA is "fragile" in the sense that lack of entropy when signing
+ * may result in a compromise of the long-term signing key. This is avoided by
+ * the deterministic variant.
+ *
+ * Requires: MBEDTLS_HMAC_DRBG_C
+ *
+ * Comment this macro to disable deterministic ECDSA.
+ */
+#define MBEDTLS_ECDSA_DETERMINISTIC
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+ *
+ * Enable the PSK based ciphersuite modes in SSL / TLS.
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+ *
+ * Enable the DHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+//#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+ *
+ * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+ *
+ * Enable the RSA-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+ *
+ * Enable the RSA-only based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ */
+//#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+ *
+ * Enable the DHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+//#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+ *
+ * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ *
+ * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C,
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+ *
+ * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+ *
+ * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+ *
+ * Enable the ECJPAKE based ciphersuite modes in SSL / TLS.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Requires: MBEDTLS_ECJPAKE_C
+ * MBEDTLS_SHA256_C
+ * MBEDTLS_ECP_DP_SECP256R1_ENABLED
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+
+/**
+ * \def MBEDTLS_PK_PARSE_EC_EXTENDED
+ *
+ * Enhance support for reading EC keys using variants of SEC1 not allowed by
+ * RFC 5915 and RFC 5480.
+ *
+ * Currently this means parsing the SpecifiedECDomain choice of EC
+ * parameters (only known groups are supported, not arbitrary domains, to
+ * avoid validation issues).
+ *
+ * Disable if you only need to support RFC 5915 + 5480 key formats.
+ */
+//#define MBEDTLS_PK_PARSE_EC_EXTENDED
+
+/**
+ * \def MBEDTLS_ERROR_STRERROR_DUMMY
+ *
+ * Enable a dummy error function to make use of mbedtls_strerror() in
+ * third party libraries easier when MBEDTLS_ERROR_C is disabled
+ * (no effect when MBEDTLS_ERROR_C is enabled).
+ *
+ * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're
+ * not using mbedtls_strerror() or error_strerror() in your application.
+ *
+ * Disable if you run into name conflicts and want to really remove the
+ * mbedtls_strerror()
+ */
+#define MBEDTLS_ERROR_STRERROR_DUMMY
+
+/**
+ * \def MBEDTLS_GENPRIME
+ *
+ * Enable the prime-number generation code.
+ *
+ * Requires: MBEDTLS_BIGNUM_C
+ */
+#define MBEDTLS_GENPRIME
+
+/**
+ * \def MBEDTLS_FS_IO
+ *
+ * Enable functions that use the filesystem.
+ */
+//#define MBEDTLS_FS_IO
+
+/**
+ * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ * Do not add default entropy sources. These are the platform specific,
+ * mbedtls_timing_hardclock and HAVEGE based poll functions.
+ *
+ * This is useful to have more control over the added entropy sources in an
+ * application.
+ *
+ * Uncomment this macro to prevent loading of default entropy functions.
+ */
+//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+
+/**
+ * \def MBEDTLS_NO_PLATFORM_ENTROPY
+ *
+ * Do not use built-in platform entropy functions.
+ * This is useful if your platform does not support
+ * standards like the /dev/urandom or Windows CryptoAPI.
+ *
+ * Uncomment this macro to disable the built-in platform entropy functions.
+ */
+//#define MBEDTLS_NO_PLATFORM_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_FORCE_SHA256
+ *
+ * Force the entropy accumulator to use a SHA-256 accumulator instead of the
+ * default SHA-512 based one (if both are available).
+ *
+ * Requires: MBEDTLS_SHA256_C
+ *
+ * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option
+ * if you have performance concerns.
+ *
+ * This option is only useful if both MBEDTLS_SHA256_C and
+ * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used.
+ */
+//#define MBEDTLS_ENTROPY_FORCE_SHA256
+
+/**
+ * \def MBEDTLS_ENTROPY_NV_SEED
+ *
+ * Enable the non-volatile (NV) seed file-based entropy source.
+ * (Also enables the NV seed read/write functions in the platform layer)
+ *
+ * This is crucial (if not required) on systems that do not have a
+ * cryptographic entropy source (in hardware or kernel) available.
+ *
+ * Requires: MBEDTLS_ENTROPY_C, MBEDTLS_PLATFORM_C
+ *
+ * \note The read/write functions that are used by the entropy source are
+ * determined in the platform layer, and can be modified at runtime and/or
+ * compile-time depending on the flags (MBEDTLS_PLATFORM_NV_SEED_*) used.
+ *
+ * \note If you use the default implementation functions that read a seedfile
+ * with regular fopen(), please make sure you make a seedfile with the
+ * proper name (defined in MBEDTLS_PLATFORM_STD_NV_SEED_FILE) and at
+ * least MBEDTLS_ENTROPY_BLOCK_SIZE bytes in size that can be read from
+ * and written to or you will get an entropy source error! The default
+ * implementation will only use the first MBEDTLS_ENTROPY_BLOCK_SIZE
+ * bytes from the file.
+ *
+ * \note The entropy collector will write to the seed file before entropy is
+ * given to an external source, to update it.
+ */
+//#define MBEDTLS_ENTROPY_NV_SEED
+
+/**
+ * \def MBEDTLS_MEMORY_DEBUG
+ *
+ * Enable debugging of buffer allocator memory issues. Automatically prints
+ * (to stderr) all (fatal) messages on memory allocation issues. Enables
+ * function for 'debug output' of allocated memory.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Uncomment this macro to let the buffer allocator print out error messages.
+ */
+//#define MBEDTLS_MEMORY_DEBUG
+
+/**
+ * \def MBEDTLS_MEMORY_BACKTRACE
+ *
+ * Include backtrace information with each allocated block.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ * GLIBC-compatible backtrace() an backtrace_symbols() support
+ *
+ * Uncomment this macro to include backtrace information
+ */
+//#define MBEDTLS_MEMORY_BACKTRACE
+
+/**
+ * \def MBEDTLS_PK_RSA_ALT_SUPPORT
+ *
+ * Support external private RSA keys (eg from a HSM) in the PK layer.
+ *
+ * Comment this macro to disable support for external private RSA keys.
+ */
+//#define MBEDTLS_PK_RSA_ALT_SUPPORT
+
+/**
+ * \def MBEDTLS_PKCS1_V15
+ *
+ * Enable support for PKCS#1 v1.5 encoding.
+ *
+ * Requires: MBEDTLS_RSA_C
+ *
+ * This enables support for PKCS#1 v1.5 operations.
+ */
+#define MBEDTLS_PKCS1_V15
+
+/**
+ * \def MBEDTLS_PKCS1_V21
+ *
+ * Enable support for PKCS#1 v2.1 encoding.
+ *
+ * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C
+ *
+ * This enables support for RSAES-OAEP and RSASSA-PSS operations.
+ */
+#define MBEDTLS_PKCS1_V21
+
+/**
+ * \def MBEDTLS_RSA_NO_CRT
+ *
+ * Do not use the Chinese Remainder Theorem
+ * for the RSA private operation.
+ *
+ * Uncomment this macro to disable the use of CRT in RSA.
+ *
+ */
+//#define MBEDTLS_RSA_NO_CRT
+
+/**
+ * \def MBEDTLS_SELF_TEST
+ *
+ * Enable the checkup functions (*_self_test).
+ */
+//#define MBEDTLS_SELF_TEST
+
+/**
+ * \def MBEDTLS_SHA256_SMALLER
+ *
+ * Enable an implementation of SHA-256 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * The default implementation is meant to be a reasonnable compromise between
+ * performance and size. This version optimizes more aggressively for size at
+ * the expense of performance. Eg on Cortex-M4 it reduces the size of
+ * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about
+ * 30%.
+ *
+ * Uncomment to enable the smaller implementation of SHA256.
+ */
+//#define MBEDTLS_SHA256_SMALLER
+
+/**
+ * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
+ *
+ * Enable sending of alert messages in case of encountered errors as per RFC.
+ * If you choose not to send the alert messages, mbed TLS can still communicate
+ * with other servers, only debugging of failures is harder.
+ *
+ * The advantage of not sending alert messages, is that no information is given
+ * about reasons for failures thus preventing adversaries of gaining intel.
+ *
+ * Enable sending of all alert messages
+ */
+//#define MBEDTLS_SSL_ALL_ALERT_MESSAGES
+
+/**
+ * \def MBEDTLS_SSL_ASYNC_PRIVATE
+ *
+ * Enable asynchronous external private key operations in SSL. This allows
+ * you to configure an SSL connection to call an external cryptographic
+ * module to perform private key operations instead of performing the
+ * operation inside the library.
+ *
+ */
+//#define MBEDTLS_SSL_ASYNC_PRIVATE
+
+/**
+ * \def MBEDTLS_SSL_DEBUG_ALL
+ *
+ * Enable the debug messages in SSL module for all issues.
+ * Debug messages have been disabled in some places to prevent timing
+ * attacks due to (unbalanced) debugging function calls.
+ *
+ * If you need all error reporting you should enable this during debugging,
+ * but remove this for production servers that should log as well.
+ *
+ * Uncomment this macro to report all debug messages on errors introducing
+ * a timing side-channel.
+ *
+ */
+//#define MBEDTLS_SSL_DEBUG_ALL
+
+/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
+ *
+ * Enable support for Encrypt-then-MAC, RFC 7366.
+ *
+ * This allows peers that both support it to use a more robust protection for
+ * ciphersuites using CBC, providing deep resistance against timing attacks
+ * on the padding or underlying cipher.
+ *
+ * This only affects CBC ciphersuites, and is useless if none is defined.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Encrypt-then-MAC
+ */
+//#define MBEDTLS_SSL_ENCRYPT_THEN_MAC
+
+/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+ *
+ * Enable support for Extended Master Secret, aka Session Hash
+ * (draft-ietf-tls-session-hash-02).
+ *
+ * This was introduced as "the proper fix" to the Triple Handshake familiy of
+ * attacks, but it is recommended to always use it (even if you disable
+ * renegotiation), since it actually fixes a more fundamental issue in the
+ * original SSL/TLS design, and has implications beyond Triple Handshake.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Extended Master Secret.
+ */
+//#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+
+/**
+ * \def MBEDTLS_SSL_FALLBACK_SCSV
+ *
+ * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ *
+ * For servers, it is recommended to always enable this, unless you support
+ * only one version of TLS, or know for sure that none of your clients
+ * implements a fallback strategy.
+ *
+ * For clients, you only need this if you're using a fallback strategy, which
+ * is not recommended in the first place, unless you absolutely need it to
+ * interoperate with buggy (version-intolerant) servers.
+ *
+ * Comment this macro to disable support for FALLBACK_SCSV
+ */
+//#define MBEDTLS_SSL_FALLBACK_SCSV
+
+/**
+ * \def MBEDTLS_SSL_HW_RECORD_ACCEL
+ *
+ * Enable hooking functions in SSL module for hardware acceleration of
+ * individual records.
+ *
+ * Uncomment this macro to enable hooking functions.
+ */
+//#define MBEDTLS_SSL_HW_RECORD_ACCEL
+
+/**
+ * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING
+ *
+ * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0.
+ *
+ * This is a countermeasure to the BEAST attack, which also minimizes the risk
+ * of interoperability issues compared to sending 0-length records.
+ *
+ * Comment this macro to disable 1/n-1 record splitting.
+ */
+//#define MBEDTLS_SSL_CBC_RECORD_SPLITTING
+
+/**
+ * \def MBEDTLS_SSL_RENEGOTIATION
+ *
+ * Disable support for TLS renegotiation.
+ *
+ * The two main uses of renegotiation are (1) refresh keys on long-lived
+ * connections and (2) client authentication after the initial handshake.
+ * If you don't need renegotiation, it's probably better to disable it, since
+ * it has been associated with security issues in the past and is easy to
+ * misuse/misunderstand.
+ *
+ * Comment this to disable support for renegotiation.
+ *
+ * \note Even if this option is disabled, both client and server are aware
+ * of the Renegotiation Indication Extension (RFC 5746) used to
+ * prevent the SSL renegotiation attack (see RFC 5746 Sect. 1).
+ * (See \c mbedtls_ssl_conf_legacy_renegotiation for the
+ * configuration of this extension).
+ *
+ */
+//#define MBEDTLS_SSL_RENEGOTIATION
+
+/**
+ * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+ *
+ * Enable support for receiving and parsing SSLv2 Client Hello messages for the
+ * SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to enable support for SSLv2 Client Hello messages.
+ */
+//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+
+/**
+ * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+ *
+ * Pick the ciphersuite according to the client's preferences rather than ours
+ * in the SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to respect client's ciphersuite order
+ */
+//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+
+/**
+ * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ *
+ * Enable support for RFC 6066 max_fragment_length extension in SSL.
+ *
+ * Comment this macro to disable support for the max_fragment_length extension
+ */
+//#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+
+/**
+ * \def MBEDTLS_SSL_PROTO_SSL3
+ *
+ * Enable support for SSL 3.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for SSL 3.0
+ */
+//#define MBEDTLS_SSL_PROTO_SSL3
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1
+ *
+ * Enable support for TLS 1.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.0
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_1
+ *
+ * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.1 / DTLS 1.0
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C
+ * (Depends on ciphersuites)
+ *
+ * Comment this macro to disable support for TLS 1.2 / DTLS 1.2
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_2
+
+/**
+ * \def MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Enable support for DTLS (all available versions).
+ *
+ * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0,
+ * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1_1
+ * or MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for DTLS
+ */
+//#define MBEDTLS_SSL_PROTO_DTLS
+
+/**
+ * \def MBEDTLS_SSL_ALPN
+ *
+ * Enable support for RFC 7301 Application Layer Protocol Negotiation.
+ *
+ * Comment this macro to disable support for ALPN.
+ */
+//#define MBEDTLS_SSL_ALPN
+
+/**
+ * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY
+ *
+ * Enable support for the anti-replay mechanism in DTLS.
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ * MBEDTLS_SSL_PROTO_DTLS
+ *
+ * \warning Disabling this is often a security risk!
+ * See mbedtls_ssl_conf_dtls_anti_replay() for details.
+ *
+ * Comment this to disable anti-replay in DTLS.
+ */
+//#define MBEDTLS_SSL_DTLS_ANTI_REPLAY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Enable support for HelloVerifyRequest on DTLS servers.
+ *
+ * This feature is highly recommended to prevent DTLS servers being used as
+ * amplifiers in DoS attacks against other hosts. It should always be enabled
+ * unless you know for sure amplification cannot be a problem in the
+ * environment in which your server operates.
+ *
+ * \warning Disabling this can ba a security risk! (see above)
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Comment this to disable support for HelloVerifyRequest.
+ */
+//#define MBEDTLS_SSL_DTLS_HELLO_VERIFY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+ *
+ * Enable server-side support for clients that reconnect from the same port.
+ *
+ * Some clients unexpectedly close the connection and try to reconnect using the
+ * same source port. This needs special support from the server to handle the
+ * new connection securely, as described in section 4.2.8 of RFC 6347. This
+ * flag enables that support.
+ *
+ * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Comment this to disable support for clients reusing the source port.
+ */
+//#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+
+/**
+ * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+ *
+ * Enable support for a limit of records with bad MAC.
+ *
+ * See mbedtls_ssl_conf_dtls_badmac_limit().
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ */
+//#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+
+/**
+ * \def MBEDTLS_SSL_SESSION_TICKETS
+ *
+ * Enable support for RFC 5077 session tickets in SSL.
+ * Client-side, provides full support for session tickets (maintainance of a
+ * session store remains the responsibility of the application, though).
+ * Server-side, you also need to provide callbacks for writing and parsing
+ * tickets, including authenticated encryption and key management. Example
+ * callbacks are provided by MBEDTLS_SSL_TICKET_C.
+ *
+ * Comment this macro to disable support for SSL session tickets
+ */
+//#define MBEDTLS_SSL_SESSION_TICKETS
+
+/**
+ * \def MBEDTLS_SSL_EXPORT_KEYS
+ *
+ * Enable support for exporting key block and master secret.
+ * This is required for certain users of TLS, e.g. EAP-TLS.
+ *
+ * Comment this macro to disable support for key export
+ */
+//#define MBEDTLS_SSL_EXPORT_KEYS
+
+/**
+ * \def MBEDTLS_SSL_SERVER_NAME_INDICATION
+ *
+ * Enable support for RFC 6066 server name indication (SNI) in SSL.
+ *
+ * Requires: MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Comment this macro to disable support for server name indication in SSL
+ */
+//#define MBEDTLS_SSL_SERVER_NAME_INDICATION
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC
+ *
+ * Enable support for RFC 6066 truncated HMAC in SSL.
+ *
+ * Comment this macro to disable support for truncated HMAC in SSL
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+ *
+ * Fallback to old (pre-2.7), non-conforming implementation of the truncated
+ * HMAC extension which also truncates the HMAC key. Note that this option is
+ * only meant for a transitory upgrade period and is likely to be removed in
+ * a future version of the library.
+ *
+ * \warning The old implementation is non-compliant and has a security weakness
+ * (2^80 brute force attack on the HMAC key used for a single,
+ * uninterrupted connection). This should only be enabled temporarily
+ * when (1) the use of truncated HMAC is essential in order to save
+ * bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
+ * the fixed implementation yet (pre-2.7).
+ *
+ * \deprecated This option is deprecated and will likely be removed in a
+ * future version of Mbed TLS.
+ *
+ * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
+ *
+ * Requires: MBEDTLS_SSL_TRUNCATED_HMAC
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+
+/**
+ * \def MBEDTLS_THREADING_ALT
+ *
+ * Provide your own alternate threading implementation.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to allow your own alternate threading implementation.
+ */
+//#define MBEDTLS_THREADING_ALT
+
+/**
+ * \def MBEDTLS_THREADING_PTHREAD
+ *
+ * Enable the pthread wrapper layer for the threading layer.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to enable pthread mutexes.
+ */
+#define MBEDTLS_THREADING_PTHREAD
+
+/**
+ * \def MBEDTLS_VERSION_FEATURES
+ *
+ * Allow run-time checking of compile-time enabled features. Thus allowing users
+ * to check at run-time if the library is for instance compiled with threading
+ * support via mbedtls_version_check_feature().
+ *
+ * Requires: MBEDTLS_VERSION_C
+ *
+ * Comment this to disable run-time checking and save ROM space
+ */
+#define MBEDTLS_VERSION_FEATURES
+
+/**
+ * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an extension in a v1 or v2 certificate.
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+
+/**
+ * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an unknown critical extension.
+ *
+ * \warning Depending on your PKI use, enabling this can be a security risk!
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+
+/**
+ * \def MBEDTLS_X509_CHECK_KEY_USAGE
+ *
+ * Enable verification of the keyUsage extension (CA and leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused
+ * (intermediate) CA and leaf certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip keyUsage checking for both CA and leaf certificates.
+ */
+//#define MBEDTLS_X509_CHECK_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+ *
+ * Enable verification of the extendedKeyUsage extension (leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip extendedKeyUsage checking for certificates.
+ */
+//#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
+ *
+ * Enable parsing and verification of X.509 certificates, CRLs and CSRS
+ * signed with RSASSA-PSS (aka PKCS#1 v2.1).
+ *
+ * Comment this macro to disallow using RSASSA-PSS in certificates.
+ */
+//#define MBEDTLS_X509_RSASSA_PSS_SUPPORT
+
+/**
+ * \def MBEDTLS_ZLIB_SUPPORT
+ *
+ * If set, the SSL/TLS module uses ZLIB to support compression and
+ * decompression of packet data.
+ *
+ * \warning TLS-level compression MAY REDUCE SECURITY! See for example the
+ * CRIME attack. Before enabling this option, you should examine with care if
+ * CRIME or similar exploits may be a applicable to your use case.
+ *
+ * \note Currently compression can't be used with DTLS.
+ *
+ * \deprecated This feature is deprecated and will be removed
+ * in the next major revision of the library.
+ *
+ * Used in: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This feature requires zlib library and headers to be present.
+ *
+ * Uncomment to enable use of ZLIB
+ */
+//#define MBEDTLS_ZLIB_SUPPORT
+/* \} name SECTION: mbed TLS feature support */
+
+/**
+ * \name SECTION: mbed TLS modules
+ *
+ * This section enables or disables entire modules in mbed TLS
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_AESNI_C
+ *
+ * Enable AES-NI support on x86-64.
+ *
+ * Module: library/aesni.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the AES-NI instructions on x86-64
+ */
+//#define MBEDTLS_AESNI_C
+
+/**
+ * \def MBEDTLS_AES_C
+ *
+ * Enable the AES block cipher.
+ *
+ * Module: library/aes.c
+ * Caller: library/cipher.c
+ * library/pem.c
+ * library/ctr_drbg.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ *
+ * PEM_PARSE uses AES for decrypting encrypted keys.
+ */
+#define MBEDTLS_AES_C
+
+/**
+ * \def MBEDTLS_ARC4_C
+ *
+ * Enable the ARCFOUR stream cipher.
+ *
+ * Module: library/arc4.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. If possible, we recommend avoidng dependencies on
+ * it, and considering stronger ciphers instead.
+ *
+ */
+//#define MBEDTLS_ARC4_C
+
+/**
+ * \def MBEDTLS_ASN1_PARSE_C
+ *
+ * Enable the generic ASN1 parser.
+ *
+ * Module: library/asn1.c
+ * Caller: library/x509.c
+ * library/dhm.c
+ * library/pkcs12.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ */
+#define MBEDTLS_ASN1_PARSE_C
+
+/**
+ * \def MBEDTLS_ASN1_WRITE_C
+ *
+ * Enable the generic ASN1 writer.
+ *
+ * Module: library/asn1write.c
+ * Caller: library/ecdsa.c
+ * library/pkwrite.c
+ * library/x509_create.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ */
+#define MBEDTLS_ASN1_WRITE_C
+
+/**
+ * \def MBEDTLS_BASE64_C
+ *
+ * Enable the Base64 module.
+ *
+ * Module: library/base64.c
+ * Caller: library/pem.c
+ *
+ * This module is required for PEM support (required by X.509).
+ */
+#define MBEDTLS_BASE64_C
+
+/**
+ * \def MBEDTLS_BIGNUM_C
+ *
+ * Enable the multi-precision integer library.
+ *
+ * Module: library/bignum.c
+ * Caller: library/dhm.c
+ * library/ecp.c
+ * library/ecdsa.c
+ * library/rsa.c
+ * library/rsa_internal.c
+ * library/ssl_tls.c
+ *
+ * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support.
+ */
+#define MBEDTLS_BIGNUM_C
+
+/**
+ * \def MBEDTLS_BLOWFISH_C
+ *
+ * Enable the Blowfish block cipher.
+ *
+ * Module: library/blowfish.c
+ */
+//#define MBEDTLS_BLOWFISH_C
+
+/**
+ * \def MBEDTLS_CAMELLIA_C
+ *
+ * Enable the Camellia block cipher.
+ *
+ * Module: library/camellia.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ */
+//#define MBEDTLS_CAMELLIA_C
+
+/**
+ * \def MBEDTLS_ARIA_C
+ *
+ * Enable the ARIA block cipher.
+ *
+ * Module: library/aria.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384
+ */
+//#define MBEDTLS_ARIA_C
+
+/**
+ * \def MBEDTLS_CCM_C
+ *
+ * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher.
+ *
+ * Module: library/ccm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-CCM ciphersuites, if other requisites are
+ * enabled as well.
+ */
+#define MBEDTLS_CCM_C
+
+/**
+ * \def MBEDTLS_CERTS_C
+ *
+ * Enable the test certificates.
+ *
+ * Module: library/certs.c
+ * Caller:
+ *
+ * This module is used for testing (ssl_client/server).
+ */
+//#define MBEDTLS_CERTS_C
+
+/**
+ * \def MBEDTLS_CHACHA20_C
+ *
+ * Enable the ChaCha20 stream cipher.
+ *
+ * Module: library/chacha20.c
+ */
+#define MBEDTLS_CHACHA20_C
+
+/**
+ * \def MBEDTLS_CHACHAPOLY_C
+ *
+ * Enable the ChaCha20-Poly1305 AEAD algorithm.
+ *
+ * Module: library/chachapoly.c
+ *
+ * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C
+ */
+#define MBEDTLS_CHACHAPOLY_C
+
+/**
+ * \def MBEDTLS_CIPHER_C
+ *
+ * Enable the generic cipher layer.
+ *
+ * Module: library/cipher.c
+ * Caller: library/ssl_tls.c
+ *
+ * Uncomment to enable generic cipher wrappers.
+ */
+#define MBEDTLS_CIPHER_C
+
+/**
+ * \def MBEDTLS_CMAC_C
+ *
+ * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
+ * ciphers.
+ *
+ * Module: library/cmac.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
+ *
+ */
+#define MBEDTLS_CMAC_C
+
+/**
+ * \def MBEDTLS_CTR_DRBG_C
+ *
+ * Enable the CTR_DRBG AES-based random generator.
+ * The CTR_DRBG generator uses AES-256 by default.
+ * To use AES-128 instead, enable MBEDTLS_CTR_DRBG_USE_128_BIT_KEY below.
+ *
+ * Module: library/ctr_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * This module provides the CTR_DRBG AES-256 random number generator.
+ */
+#define MBEDTLS_CTR_DRBG_C
+
+/**
+ * \def MBEDTLS_DEBUG_C
+ *
+ * Enable the debug functions.
+ *
+ * Module: library/debug.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module provides debugging functions.
+ */
+//#define MBEDTLS_DEBUG_C
+
+/**
+ * \def MBEDTLS_DES_C
+ *
+ * Enable the DES block cipher.
+ *
+ * Module: library/des.c
+ * Caller: library/pem.c
+ * library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ *
+ * PEM_PARSE uses DES/3DES for decrypting encrypted keys.
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_DES_C
+
+/**
+ * \def MBEDTLS_DHM_C
+ *
+ * Enable the Diffie-Hellman-Merkle module.
+ *
+ * Module: library/dhm.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * DHE-RSA, DHE-PSK
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_DHM_C
+
+/**
+ * \def MBEDTLS_ECDH_C
+ *
+ * Enable the elliptic curve Diffie-Hellman library.
+ *
+ * Module: library/ecdh.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK
+ *
+ * Requires: MBEDTLS_ECP_C
+ */
+#define MBEDTLS_ECDH_C
+
+/**
+ * \def MBEDTLS_ECDSA_C
+ *
+ * Enable the elliptic curve DSA library.
+ *
+ * Module: library/ecdsa.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ */
+#define MBEDTLS_ECDSA_C
+
+/**
+ * \def MBEDTLS_ECJPAKE_C
+ *
+ * Enable the elliptic curve J-PAKE library.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Module: library/ecjpake.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECJPAKE
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C
+ */
+//#define MBEDTLS_ECJPAKE_C
+
+/**
+ * \def MBEDTLS_ECP_C
+ *
+ * Enable the elliptic curve over GF(p) library.
+ *
+ * Module: library/ecp.c
+ * Caller: library/ecdh.c
+ * library/ecdsa.c
+ * library/ecjpake.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED
+ */
+#define MBEDTLS_ECP_C
+
+/**
+ * \def MBEDTLS_ENTROPY_C
+ *
+ * Enable the platform-specific entropy code.
+ *
+ * Module: library/entropy.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C
+ *
+ * This module provides a generic entropy pool
+ */
+#define MBEDTLS_ENTROPY_C
+
+/**
+ * \def MBEDTLS_ERROR_C
+ *
+ * Enable error code to error string conversion.
+ *
+ * Module: library/error.c
+ * Caller:
+ *
+ * This module enables mbedtls_strerror().
+ */
+//#define MBEDTLS_ERROR_C
+
+/**
+ * \def MBEDTLS_GCM_C
+ *
+ * Enable the Galois/Counter Mode (GCM) for AES.
+ *
+ * Module: library/gcm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
+ * requisites are enabled as well.
+ */
+#define MBEDTLS_GCM_C
+
+/**
+ * \def MBEDTLS_HAVEGE_C
+ *
+ * Enable the HAVEGE random generator.
+ *
+ * Warning: the HAVEGE random generator is not suitable for virtualized
+ * environments
+ *
+ * Warning: the HAVEGE random generator is dependent on timing and specific
+ * processor traits. It is therefore not advised to use HAVEGE as
+ * your applications primary random generator or primary entropy pool
+ * input. As a secondary input to your entropy pool, it IS able add
+ * the (limited) extra entropy it provides.
+ *
+ * Module: library/havege.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_TIMING_C
+ *
+ * Uncomment to enable the HAVEGE random generator.
+ */
+//#define MBEDTLS_HAVEGE_C
+
+/**
+ * \def MBEDTLS_HKDF_C
+ *
+ * Enable the HKDF algorithm (RFC 5869).
+ *
+ * Module: library/hkdf.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the Hashed Message Authentication Code
+ * (HMAC)-based key derivation function (HKDF).
+ */
+#define MBEDTLS_HKDF_C
+
+/**
+ * \def MBEDTLS_HMAC_DRBG_C
+ *
+ * Enable the HMAC_DRBG random generator.
+ *
+ * Module: library/hmac_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * Uncomment to enable the HMAC_DRBG random number geerator.
+ */
+#define MBEDTLS_HMAC_DRBG_C
+
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable the Key Wrapping mode for 128-bit block ciphers,
+ * as defined in NIST SP 800-38F. Only KW and KWP modes
+ * are supported. At the moment, only AES is approved by NIST.
+ *
+ * Module: library/nist_kw.c
+ *
+ * Requires: MBEDTLS_AES_C and MBEDTLS_CIPHER_C
+ */
+#define MBEDTLS_NIST_KW_C
+
+/**
+ * \def MBEDTLS_MD_C
+ *
+ * Enable the generic message digest layer.
+ *
+ * Module: library/md.c
+ * Caller:
+ *
+ * Uncomment to enable generic message digest wrappers.
+ */
+#define MBEDTLS_MD_C
+
+/**
+ * \def MBEDTLS_MD2_C
+ *
+ * Enable the MD2 hash algorithm.
+ *
+ * Module: library/md2.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD2-signed X.509 certs.
+ *
+ * \warning MD2 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD2_C
+
+/**
+ * \def MBEDTLS_MD4_C
+ *
+ * Enable the MD4 hash algorithm.
+ *
+ * Module: library/md4.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD4-signed X.509 certs.
+ *
+ * \warning MD4 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD4_C
+
+/**
+ * \def MBEDTLS_MD5_C
+ *
+ * Enable the MD5 hash algorithm.
+ *
+ * Module: library/md5.c
+ * Caller: library/md.c
+ * library/pem.c
+ * library/ssl_tls.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, and for TLS 1.2
+ * depending on the handshake parameters. Further, it is used for checking
+ * MD5-signed certificates, and for PBKDF1 when decrypting PEM-encoded
+ * encrypted keys.
+ *
+ * \warning MD5 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD5_C
+
+/**
+ * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Enable the buffer allocator implementation that makes use of a (stack)
+ * based buffer to 'allocate' dynamic memory. (replaces calloc() and free()
+ * calls)
+ *
+ * Module: library/memory_buffer_alloc.c
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS)
+ *
+ * Enable this module to enable the buffer memory allocator.
+ */
+#define MBEDTLS_MEMORY_BUFFER_ALLOC_C
+
+/**
+ * \def MBEDTLS_NET_C
+ *
+ * Enable the TCP and UDP over IPv6/IPv4 networking routines.
+ *
+ * \note This module only works on POSIX/Unix (including Linux, BSD and OS X)
+ * and Windows. For other platforms, you'll want to disable it, and write your
+ * own networking callbacks to be passed to \c mbedtls_ssl_set_bio().
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/net_sockets.c
+ *
+ * This module provides networking routines.
+ */
+//#define MBEDTLS_NET_C
+
+/**
+ * \def MBEDTLS_OID_C
+ *
+ * Enable the OID database.
+ *
+ * Module: library/oid.c
+ * Caller: library/asn1write.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ * library/pkwrite.c
+ * library/rsa.c
+ * library/x509.c
+ * library/x509_create.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * This modules translates between OIDs and internal values.
+ */
+#define MBEDTLS_OID_C
+
+/**
+ * \def MBEDTLS_PADLOCK_C
+ *
+ * Enable VIA Padlock support on x86.
+ *
+ * Module: library/padlock.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the VIA PadLock on x86.
+ */
+//#define MBEDTLS_PADLOCK_C
+
+/**
+ * \def MBEDTLS_PEM_PARSE_C
+ *
+ * Enable PEM decoding / parsing.
+ *
+ * Module: library/pem.c
+ * Caller: library/dhm.c
+ * library/pkparse.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for decoding / parsing PEM files.
+ */
+#define MBEDTLS_PEM_PARSE_C
+
+/**
+ * \def MBEDTLS_PEM_WRITE_C
+ *
+ * Enable PEM encoding / writing.
+ *
+ * Module: library/pem.c
+ * Caller: library/pkwrite.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for encoding / writing PEM files.
+ */
+#define MBEDTLS_PEM_WRITE_C
+
+/**
+ * \def MBEDTLS_PK_C
+ *
+ * Enable the generic public (asymetric) key layer.
+ *
+ * Module: library/pk.c
+ * Caller: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C
+ *
+ * Uncomment to enable generic public key wrappers.
+ */
+#define MBEDTLS_PK_C
+
+/**
+ * \def MBEDTLS_PK_PARSE_C
+ *
+ * Enable the generic public (asymetric) key parser.
+ *
+ * Module: library/pkparse.c
+ * Caller: library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key parse functions.
+ */
+#define MBEDTLS_PK_PARSE_C
+
+/**
+ * \def MBEDTLS_PK_WRITE_C
+ *
+ * Enable the generic public (asymetric) key writer.
+ *
+ * Module: library/pkwrite.c
+ * Caller: library/x509write.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key write functions.
+ */
+#define MBEDTLS_PK_WRITE_C
+
+/**
+ * \def MBEDTLS_PKCS5_C
+ *
+ * Enable PKCS#5 functions.
+ *
+ * Module: library/pkcs5.c
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the PKCS#5 functions.
+ */
+#define MBEDTLS_PKCS5_C
+
+/**
+ * \def MBEDTLS_PKCS11_C
+ *
+ * Enable wrapper for PKCS#11 smartcard support.
+ *
+ * Module: library/pkcs11.c
+ * Caller: library/pk.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * This module enables SSL/TLS PKCS #11 smartcard support.
+ * Requires the presence of the PKCS#11 helper library (libpkcs11-helper)
+ */
+//#define MBEDTLS_PKCS11_C
+
+/**
+ * \def MBEDTLS_PKCS12_C
+ *
+ * Enable PKCS#12 PBE functions.
+ * Adds algorithms for parsing PKCS#8 encrypted private keys
+ *
+ * Module: library/pkcs12.c
+ * Caller: library/pkparse.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * Can use: MBEDTLS_ARC4_C
+ *
+ * This module enables PKCS#12 functions.
+ */
+//#define MBEDTLS_PKCS12_C
+
+/**
+ * \def MBEDTLS_PLATFORM_C
+ *
+ * Enable the platform abstraction layer that allows you to re-assign
+ * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit().
+ *
+ * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT
+ * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned
+ * above to be specified at runtime or compile time respectively.
+ *
+ * \note This abstraction layer must be enabled on Windows (including MSYS2)
+ * as other module rely on it for a fixed snprintf implementation.
+ *
+ * Module: library/platform.c
+ * Caller: Most other .c files
+ *
+ * This module enables abstraction of common (libc) functions.
+ */
+#define MBEDTLS_PLATFORM_C
+
+/**
+ * \def MBEDTLS_POLY1305_C
+ *
+ * Enable the Poly1305 MAC algorithm.
+ *
+ * Module: library/poly1305.c
+ * Caller: library/chachapoly.c
+ */
+#define MBEDTLS_POLY1305_C
+
+/**
+ * \def MBEDTLS_RIPEMD160_C
+ *
+ * Enable the RIPEMD-160 hash algorithm.
+ *
+ * Module: library/ripemd160.c
+ * Caller: library/md.c
+ *
+ */
+//#define MBEDTLS_RIPEMD160_C
+
+/**
+ * \def MBEDTLS_RSA_C
+ *
+ * Enable the RSA public-key cryptosystem.
+ *
+ * Module: library/rsa.c
+ * library/rsa_internal.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509.c
+ *
+ * This module is used by the following key exchanges:
+ * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C
+ */
+#define MBEDTLS_RSA_C
+
+/**
+ * \def MBEDTLS_SHA1_C
+ *
+ * Enable the SHA1 cryptographic hash algorithm.
+ *
+ * Module: library/sha1.c
+ * Caller: library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509write_crt.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, for TLS 1.2
+ * depending on the handshake parameters, and for SHA1-signed certificates.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_SHA1_C
+
+/**
+ * \def MBEDTLS_SHA256_C
+ *
+ * Enable the SHA-224 and SHA-256 cryptographic hash algorithms.
+ *
+ * Module: library/sha256.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module adds support for SHA-224 and SHA-256.
+ * This module is required for the SSL/TLS 1.2 PRF function.
+ */
+#define MBEDTLS_SHA256_C
+
+/**
+ * \def MBEDTLS_SHA512_C
+ *
+ * Enable the SHA-384 and SHA-512 cryptographic hash algorithms.
+ *
+ * Module: library/sha512.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module adds support for SHA-384 and SHA-512.
+ */
+#define MBEDTLS_SHA512_C
+
+/**
+ * \def MBEDTLS_SSL_CACHE_C
+ *
+ * Enable simple SSL cache implementation.
+ *
+ * Module: library/ssl_cache.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_CACHE_C
+ */
+//#define MBEDTLS_SSL_CACHE_C
+
+/**
+ * \def MBEDTLS_SSL_COOKIE_C
+ *
+ * Enable basic implementation of DTLS cookies for hello verification.
+ *
+ * Module: library/ssl_cookie.c
+ * Caller:
+ */
+//#define MBEDTLS_SSL_COOKIE_C
+
+/**
+ * \def MBEDTLS_SSL_TICKET_C
+ *
+ * Enable an implementation of TLS server-side callbacks for session tickets.
+ *
+ * Module: library/ssl_ticket.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_CIPHER_C
+ */
+//#define MBEDTLS_SSL_TICKET_C
+
+/**
+ * \def MBEDTLS_SSL_CLI_C
+ *
+ * Enable the SSL/TLS client code.
+ *
+ * Module: library/ssl_cli.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS client support.
+ */
+//#define MBEDTLS_SSL_CLI_C
+
+/**
+ * \def MBEDTLS_SSL_SRV_C
+ *
+ * Enable the SSL/TLS server code.
+ *
+ * Module: library/ssl_srv.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS server support.
+ */
+//#define MBEDTLS_SSL_SRV_C
+
+/**
+ * \def MBEDTLS_SSL_TLS_C
+ *
+ * Enable the generic SSL/TLS code.
+ *
+ * Module: library/ssl_tls.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * and at least one of the MBEDTLS_SSL_PROTO_XXX defines
+ *
+ * This module is required for SSL/TLS.
+ */
+//#define MBEDTLS_SSL_TLS_C
+
+/**
+ * \def MBEDTLS_THREADING_C
+ *
+ * Enable the threading abstraction layer.
+ * By default mbed TLS assumes it is used in a non-threaded environment or that
+ * contexts are not shared between threads. If you do intend to use contexts
+ * between threads, you will need to enable this layer to prevent race
+ * conditions. See also our Knowledge Base article about threading:
+ * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
+ *
+ * Module: library/threading.c
+ *
+ * This allows different threading implementations (self-implemented or
+ * provided).
+ *
+ * You will have to enable either MBEDTLS_THREADING_ALT or
+ * MBEDTLS_THREADING_PTHREAD.
+ *
+ * Enable this layer to allow use of mutexes within mbed TLS
+ */
+#define MBEDTLS_THREADING_C
+
+/**
+ * \def MBEDTLS_TIMING_C
+ *
+ * Enable the semi-portable timing interface.
+ *
+ * \note The provided implementation only works on POSIX/Unix (including Linux,
+ * BSD and OS X) and Windows. On other platforms, you can either disable that
+ * module and provide your own implementations of the callbacks needed by
+ * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide
+ * your own implementation of the whole module by setting
+ * \c MBEDTLS_TIMING_ALT in the current file.
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/timing.c
+ * Caller: library/havege.c
+ *
+ * This module is used by the HAVEGE random number generator.
+ */
+#define MBEDTLS_TIMING_C
+
+/**
+ * \def MBEDTLS_VERSION_C
+ *
+ * Enable run-time version information.
+ *
+ * Module: library/version.c
+ *
+ * This module provides run-time version information.
+ */
+#define MBEDTLS_VERSION_C
+
+/**
+ * \def MBEDTLS_X509_USE_C
+ *
+ * Enable X.509 core for using certificates.
+ *
+ * Module: library/x509.c
+ * Caller: library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C,
+ * MBEDTLS_PK_PARSE_C
+ *
+ * This module is required for the X.509 parsing modules.
+ */
+//#define MBEDTLS_X509_USE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Enable X.509 certificate parsing.
+ *
+ * Module: library/x509_crt.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 certificate parsing.
+ */
+//#define MBEDTLS_X509_CRT_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CRL_PARSE_C
+ *
+ * Enable X.509 CRL parsing.
+ *
+ * Module: library/x509_crl.c
+ * Caller: library/x509_crt.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 CRL parsing.
+ */
+//#define MBEDTLS_X509_CRL_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_PARSE_C
+ *
+ * Enable X.509 Certificate Signing Request (CSR) parsing.
+ *
+ * Module: library/x509_csr.c
+ * Caller: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is used for reading X.509 certificate request.
+ */
+//#define MBEDTLS_X509_CSR_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CREATE_C
+ *
+ * Enable X.509 core for creating certificates.
+ *
+ * Module: library/x509_create.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C
+ *
+ * This module is the basis for creating X.509 certificates and CSRs.
+ */
+//#define MBEDTLS_X509_CREATE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_WRITE_C
+ *
+ * Enable creating X.509 certificates.
+ *
+ * Module: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate creation.
+ */
+//#define MBEDTLS_X509_CRT_WRITE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_WRITE_C
+ *
+ * Enable creating X.509 Certificate Signing Requests (CSR).
+ *
+ * Module: library/x509_csr_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate request writing.
+ */
+//#define MBEDTLS_X509_CSR_WRITE_C
+
+/**
+ * \def MBEDTLS_XTEA_C
+ *
+ * Enable the XTEA block cipher.
+ *
+ * Module: library/xtea.c
+ * Caller:
+ */
+//#define MBEDTLS_XTEA_C
+
+/* \} name SECTION: mbed TLS modules */
+
+/**
+ * \name SECTION: Module configuration options
+ *
+ * This section allows for the setting of module specific sizes and
+ * configuration options. The default values are already present in the
+ * relevant header files and should suffice for the regular use cases.
+ *
+ * Our advice is to enable options and change their values here
+ * only if you have a good reason and know the consequences.
+ *
+ * Please check the respective header file for documentation on these
+ * parameters (to prevent duplicate documentation).
+ * \{
+ */
+
+/* MPI / BIGNUM options */
+//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */
+//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */
+
+/* CTR_DRBG options */
+//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */
+/*! Maximal reseed counter - indicates maximal number of
+requests allowed between reseeds; according to NIST 800-90
+it is (2^48 - 1), our restriction is : (int - 0xFFFF - 0xF).*/
+#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 0xFFF0 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+//#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY /**< Use 128-bit key for CTR_DRBG - may reduce security (see ctr_drbg.h) */
+
+/* HMAC_DRBG options */
+//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+
+/* ECP options */
+//#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */
+//#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */
+//#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */
+
+/* Entropy options */
+//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */
+#define MBEDTLS_ENTROPY_MAX_GATHER 144 /**< Maximum amount requested from entropy sources */
+//#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Default minimum number of bytes required for the hardware entropy source mbedtls_hardware_poll() before entropy is released */
+
+/* Memory buffer allocator options */
+//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */
+
+/* Platform options */
+//#define MBEDTLS_PLATFORM_STD_MEM_HDR <stdlib.h> /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */
+//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_TIME time /**< Default time to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS 0 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE 1 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile" /**< Seed file to read/write with default implementation */
+
+/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */
+/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */
+//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_TIME_MACRO time /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_TIME_TYPE_MACRO time_t /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+
+/**
+ * \brief This macro is invoked by the library when an invalid parameter
+ * is detected that is only checked with MBEDTLS_CHECK_PARAMS
+ * (see the documentation of that option for context).
+ *
+ * When you leave this undefined here, a default definition is
+ * provided that invokes the function mbedtls_param_failed(),
+ * which is declared in platform_util.h for the benefit of the
+ * library, but that you need to define in your application.
+ *
+ * When you define this here, this replaces the default
+ * definition in platform_util.h (which no longer declares the
+ * function mbedtls_param_failed()) and it is your responsibility
+ * to make sure this macro expands to something suitable (in
+ * particular, that all the necessary declarations are visible
+ * from within the library - you can ensure that by providing
+ * them in this file next to the macro definition).
+ *
+ * Note that you may define this macro to expand to nothing, in
+ * which case you don't have to worry about declarations or
+ * definitions. However, you will then be notified about invalid
+ * parameters only in non-void functions, and void function will
+ * just silently return early on invalid parameters, which
+ * partially negates the benefits of enabling
+ * #MBEDTLS_CHECK_PARAMS in the first place, so is discouraged.
+ *
+ * \param cond The expression that should evaluate to true, but doesn't.
+ */
+//#define MBEDTLS_PARAM_FAILED( cond ) assert( cond )
+
+/* SSL Cache options */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */
+
+/* SSL options */
+
+/** \def MBEDTLS_SSL_MAX_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming and outgoing plaintext fragments.
+ *
+ * This determines the size of both the incoming and outgoing TLS I/O buffers
+ * in such a way that both are capable of holding the specified amount of
+ * plaintext data, regardless of the protection mechanism used.
+ *
+ * To configure incoming and outgoing I/O buffers separately, use
+ * #MBEDTLS_SSL_IN_CONTENT_LEN and #MBEDTLS_SSL_OUT_CONTENT_LEN,
+ * which overwrite the value set by this option.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ * recommended to use the Maximum Fragment Length (MFL) extension to
+ * inform the server about this limitation. On the server, there
+ * is no supported, standardized way of informing the client about
+ * restriction on the maximum size of incoming messages, and unless
+ * the limitation has been communicated by other means, it is recommended
+ * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ * while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of both
+ * incoming and outgoing I/O buffers.
+ */
+//#define MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_IN_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming plaintext fragments.
+ *
+ * This determines the size of the incoming TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option is undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ * recommended to use the Maximum Fragment Length (MFL) extension to
+ * inform the server about this limitation. On the server, there
+ * is no supported, standardized way of informing the client about
+ * restriction on the maximum size of incoming messages, and unless
+ * the limitation has been communicated by other means, it is recommended
+ * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ * while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of the incoming I/O buffer
+ * independently of the outgoing I/O buffer.
+ */
+//#define MBEDTLS_SSL_IN_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_OUT_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of outgoing plaintext fragments.
+ *
+ * This determines the size of the outgoing TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * It is possible to save RAM by setting a smaller outward buffer, while keeping
+ * the default inward 16384 byte buffer to conform to the TLS specification.
+ *
+ * The minimum required outward buffer size is determined by the handshake
+ * protocol's usage. Handshaking will fail if the outward buffer is too small.
+ * The specific size requirement depends on the configured ciphers and any
+ * certificate data which is sent during the handshake.
+ *
+ * Uncomment to set the maximum plaintext size of the outgoing I/O buffer
+ * independently of the incoming I/O buffer.
+ */
+//#define MBEDTLS_SSL_OUT_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_DTLS_MAX_BUFFERING
+ *
+ * Maximum number of heap-allocated bytes for the purpose of
+ * DTLS handshake message reassembly and future message buffering.
+ *
+ * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN
+ * to account for a reassembled handshake message of maximum size,
+ * together with its reassembly bitmap.
+ *
+ * A value of 2 * MBEDTLS_SSL_IN_CONTENT_LEN (32768 by default)
+ * should be sufficient for all practical situations as it allows
+ * to reassembly a large handshake message (such as a certificate)
+ * while buffering multiple smaller handshake messages.
+ *
+ */
+//#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
+
+//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */
+//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
+//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
+
+/**
+ * Complete list of ciphersuites to use, in order of preference.
+ *
+ * \warning No dependency checking is done on that field! This option can only
+ * be used to restrict the set of available ciphersuites. It is your
+ * responsibility to make sure the needed modules are active.
+ *
+ * Use this to save a few hundred bytes of ROM (default ordering of all
+ * available ciphersuites) and a few to a few hundred bytes of RAM.
+ *
+ * The value below is only an example, not the default.
+ */
+//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+
+/* X509 options */
+//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */
+//#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */
+
+/**
+ * Allow SHA-1 in the default TLS configuration for certificate signing.
+ * Without this build-time option, SHA-1 support must be activated explicitly
+ * through mbedtls_ssl_conf_cert_profile. Turning on this option is not
+ * recommended because of it is possible to generate SHA-1 collisions, however
+ * this may be safe for legacy infrastructure where additional controls apply.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+// #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES
+
+/**
+ * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
+ * signature and ciphersuite selection. Without this build-time option, SHA-1
+ * support must be activated explicitly through mbedtls_ssl_conf_sig_hashes.
+ * The use of SHA-1 in TLS <= 1.1 and in HMAC-SHA-1 is always allowed by
+ * default. At the time of writing, there is no practical attack on the use
+ * of SHA-1 in handshake signatures, hence this option is turned on by default
+ * to preserve compatibility with existing peers, but the general
+ * warning applies nonetheless:
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+
+/**
+ * Uncomment the macro to let mbed TLS use your alternate implementation of
+ * mbedtls_platform_zeroize(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * mbedtls_platform_zeroize() is a widely used function across the library to
+ * zero a block of memory. The implementation is expected to be secure in the
+ * sense that it has been written to prevent the compiler from removing calls
+ * to mbedtls_platform_zeroize() as part of redundant code elimination
+ * optimizations. However, it is difficult to guarantee that calls to
+ * mbedtls_platform_zeroize() will not be optimized by the compiler as older
+ * versions of the C language standards do not provide a secure implementation
+ * of memset(). Therefore, MBEDTLS_PLATFORM_ZEROIZE_ALT enables users to
+ * configure their own implementation of mbedtls_platform_zeroize(), for
+ * example by using directives specific to their compiler, features from newer
+ * C standards (e.g using memset_s() in C11) or calling a secure memset() from
+ * their system (e.g explicit_bzero() in BSD).
+ */
+//#define MBEDTLS_PLATFORM_ZEROIZE_ALT
+
+/**
+ * Uncomment the macro to let Mbed TLS use your alternate implementation of
+ * mbedtls_platform_gmtime_r(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * gmtime() is not a thread-safe function as defined in the C standard. The
+ * library will try to use safer implementations of this function, such as
+ * gmtime_r() when available. However, if Mbed TLS cannot identify the target
+ * system, the implementation of mbedtls_platform_gmtime_r() will default to
+ * using the standard gmtime(). In this case, calls from the library to
+ * gmtime() will be guarded by the global mutex mbedtls_threading_gmtime_mutex
+ * if MBEDTLS_THREADING_C is enabled. We recommend that calls from outside the
+ * library are also guarded with this mutex to avoid race conditions. However,
+ * if the macro MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, Mbed TLS will
+ * unconditionally use the implementation for mbedtls_platform_gmtime_r()
+ * supplied at compile time.
+ */
+//#define MBEDTLS_PLATFORM_GMTIME_R_ALT
+
+/* \} name SECTION: Customisation configuration options */
+
+/* Target and application specific configurations */
+//#define YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE "mbedtls/target_config.h"
+
+#if defined(TARGET_LIKE_MBED) && defined(YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE)
+#include YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE
+#endif
+
+/*
+ * Allow user to override any previous default.
+ *
+ * Use two macro names for that, as:
+ * - with yotta the prefix YOTTA_CFG_ is forced
+ * - without yotta is looks weird to have a YOTTA prefix.
+ */
+#if defined(YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE)
+#include YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE
+#elif defined(MBEDTLS_USER_CONFIG_FILE)
+#include MBEDTLS_USER_CONFIG_FILE
+#endif
+
+#include "mbedtls/check_config.h"
+
+#endif /* MBEDTLS_CONFIG_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/dhm_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/dhm_alt.h
new file mode 100644
index 0000000..9a0382d
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/dhm_alt.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_DHM_ALT_H
+#define MBEDTLS_DHM_ALT_H
+
+
+#if defined(MBEDTLS_DHM_ALT)
+
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/*
+ * DHM Error codes
+ */
+#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA -0x3080 /**< Bad input parameters. */
+#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED -0x3100 /**< Reading of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED -0x3180 /**< Making of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED -0x3200 /**< Reading of the public values failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED -0x3280 /**< Making of the public value failed. */
+#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED -0x3300 /**< Calculation of the DHM secret failed. */
+#define MBEDTLS_ERR_DHM_INVALID_FORMAT -0x3380 /**< The ASN.1 data is not formatted correctly. */
+#define MBEDTLS_ERR_DHM_ALLOC_FAILED -0x3400 /**< Allocation of memory failed. */
+#define MBEDTLS_ERR_DHM_FILE_IO_ERROR -0x3480 /**< Read or write of file failed. */
+#define MBEDTLS_ERR_DHM_HW_ACCEL_FAILED -0x3500 /**< DHM hardware accelerator failed. */
+#define MBEDTLS_ERR_DHM_SET_GROUP_FAILED -0x3580 /**< Setting the modulus and generator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief The DHM context structure.
+ */
+typedef struct
+{
+ size_t len; /*!< The size of \p P in Bytes. */
+ mbedtls_mpi P; /*!< The prime modulus. */
+ mbedtls_mpi G; /*!< The generator. */
+ mbedtls_mpi X; /*!< Our secret value. */
+ mbedtls_mpi GX; /*!< Our public key = \c G^X mod \c P. */
+ mbedtls_mpi GY; /*!< The public key of the peer = \c G^Y mod \c P. */
+ mbedtls_mpi K; /*!< The shared secret = \c G^(XY) mod \c P. */
+ mbedtls_mpi RP; /*!< The cached value = \c R^2 mod \c P. */
+ mbedtls_mpi Vi; /*!< The blinding value. */
+ mbedtls_mpi Vf; /*!< The unblinding value. */
+ mbedtls_mpi pX; /*!< The previous \c X. */
+}
+mbedtls_dhm_context;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_DHM_ALT - use alternative code */
+#endif /* MBEDTLS_DHM_ALT_H - include only once */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/gcm_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/gcm_alt.h
new file mode 100644
index 0000000..239a714
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/gcm_alt.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_GCM_ALT_H
+#define MBEDTLS_GCM_ALT_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_GCM_C)
+
+#include <stddef.h>
+#include <stdint.h>
+#include "mbedtls/cipher.h"
+
+#define MBEDTLS_GCM_ENCRYPT 1
+#define MBEDTLS_GCM_DECRYPT 0
+
+#define MBEDTLS_ERR_GCM_AUTH_FAILED -0x0012 /**< Authenticated decryption failed. */
+#define MBEDTLS_ERR_GCM_BAD_INPUT -0x0014 /**< Bad input parameters to function. */
+
+/* hide internal implementation of the struct. Allocate enough space for it.*/
+#define MBEDTLS_GCM_CONTEXT_SIZE_IN_WORDS 40
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief GCM context structure
+ */
+typedef struct {
+ uint32_t buf[MBEDTLS_GCM_CONTEXT_SIZE_IN_WORDS];
+}
+mbedtls_gcm_context;
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /* MBEDTLS_GCM_C */
+#endif /* MBEDTLS_GCM_ALT_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/poly1305_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/poly1305_alt.h
new file mode 100644
index 0000000..e70ce59
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/poly1305_alt.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _MBEDTLS_POLY1305_ALT_H
+#define _MBEDTLS_POLY1305_ALT_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(MBEDTLS_POLY1305_ALT)
+
+/************************ defines ****************************/
+/*! The size of the POLY key in words. */
+#define MBEDTLS_POLY_KEY_SIZE_WORDS 8
+
+/*! The size of the POLY key in bytes. */
+#define MBEDTLS_POLY_KEY_SIZE_BYTES 32
+
+/*! The size of the POLY MAC in words. */
+#define MBEDTLS_POLY_MAC_SIZE_WORDS 4
+
+/*! The size of the POLY MAC in bytes. */
+#define MBEDTLS_POLY_MAC_SIZE_BYTES 16
+
+/************************ Typedefs ****************************/
+/*! The definition of the ChaCha-MAC buffer. */
+typedef uint32_t mbedtls_poly_mac[MBEDTLS_POLY_MAC_SIZE_WORDS];
+
+/*! The definition of the ChaCha-key buffer. */
+typedef uint32_t mbedtls_poly_key[MBEDTLS_POLY_KEY_SIZE_WORDS];
+
+typedef struct mbedtls_poly1305_context
+{
+ uint32_t r[4]; /** The value for 'r' (low 128 bits of the key). */
+ uint32_t s[4]; /** The value for 's' (high 128 bits of the key). */
+ uint32_t acc[5]; /** The accumulator number. */
+ uint8_t queue[16]; /** The current partial block of data. */
+ size_t queue_len; /** The number of bytes stored in 'queue'. */
+}
+mbedtls_poly1305_context;
+
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* poly1305_alt.h */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/rsa_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/rsa_alt.h
new file mode 100644
index 0000000..2eef069
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/rsa_alt.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_RSA_ALT_H
+#define MBEDTLS_RSA_ALT_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined (MBEDTLS_RSA_ALT)
+
+// Regular implementation
+//
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief The RSA context structure.
+ *
+ * \note Direct manipulation of the members of this structure
+ * is deprecated. All manipulation should instead be done through
+ * the public interface functions.
+ */
+typedef struct
+{
+ int ver; /*!< always 0 */
+ size_t len; /*!< size(N) in chars */
+
+ mbedtls_mpi N; /*!< public modulus */
+ mbedtls_mpi E; /*!< public exponent */
+
+ mbedtls_mpi D; /*!< private exponent */
+ mbedtls_mpi P; /*!< 1st prime factor */
+ mbedtls_mpi Q; /*!< 2nd prime factor */
+
+ mbedtls_mpi DP; /*!< D % (P - 1) */
+ mbedtls_mpi DQ; /*!< D % (Q - 1) */
+ mbedtls_mpi QP; /*!< 1 / (Q % P) */
+
+ mbedtls_mpi RN; /*!< cached R^2 mod N */
+
+ mbedtls_mpi RP; /*!< cached R^2 mod P */
+ mbedtls_mpi RQ; /*!< cached R^2 mod Q */
+
+ mbedtls_mpi Vi; /*!< cached blinding value */
+ mbedtls_mpi Vf; /*!< cached un-blinding value */
+
+ mbedtls_mpi NP; /*!< Barrett mod N tag NP for N-modulus */
+ mbedtls_mpi BQP; /*!< Barrett mod Q tag QP for Q-factor */
+ mbedtls_mpi BPP; /*!< Barrett mod P tag PP for P-factor */
+
+ int padding; /*!< MBEDTLS_RSA_PKCS_V15 for 1.5 padding and
+ MBEDTLS_RSA_PKCS_v21 for OAEP/PSS */
+ int hash_id; /*!< Hash identifier of mbedtls_md_type_t as
+ specified in the mbedtls_md.h header file
+ for the EME-OAEP and EMSA-PSS
+ encoding */
+#if defined(MBEDTLS_THREADING_C)
+ mbedtls_threading_mutex_t mutex; /*!< Thread-safety mutex */
+#endif
+}
+mbedtls_rsa_context;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_RSA_ALT */
+
+#endif /* MBEDTLS_RSA_ALT_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/sha1_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/sha1_alt.h
new file mode 100644
index 0000000..62b8694
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/sha1_alt.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_SHA1_ALT_H
+#define MBEDTLS_SHA1_ALT_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "cc_hash_defs_proj.h"
+#if defined (MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#define MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED -0x0035 /**< SHA-1 hardware accelerator failed */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief SHA-1 context structure
+ */
+typedef struct mbedtls_sha1_context {
+ /*! Internal buffer */
+ uint32_t buff[CC_HASH_USER_CTX_SIZE_IN_WORDS]; // defined in cc_hash_defs_proj.h
+} mbedtls_sha1_context;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_SHA1_ALT_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/sha256_alt.h b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/sha256_alt.h
new file mode 100644
index 0000000..20d08d4
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/mbedtls/sha256_alt.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MBEDTLS_SHA256_ALT_H
+#define MBEDTLS_SHA256_ALT_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "cc_hash_defs_proj.h"
+#if defined (MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+
+#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED -0x0037 /**< SHA-256 hardware accelerator failed */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief SHA-256 context structure
+ */
+typedef struct mbedtls_sha256_context {
+ /*! Internal buffer */
+ uint32_t buff[CC_HASH_USER_CTX_SIZE_IN_WORDS]; // defined in cc_hash_defs.h
+} mbedtls_sha256_context;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_SHA256_ALT_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_log_mask.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_log_mask.h
new file mode 100644
index 0000000..234ebd9
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_log_mask.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_LOG_MASK_H_
+#define _CC_LOG_MASK_H_
+
+#define CC_LOG_MASK_CCLIB (1<<1)
+#define CC_LOG_MASK_SECURE_BOOT (1<<2)
+#define CC_LOG_MASK_CMPU (1<<3)
+#define CC_LOG_MASK_DMPU (1<<4)
+#define CC_LOG_MASK_CC_API (1<<5)
+#define CC_LOG_MASK_CC_SYM_DRIVER (1<<6)
+#define CC_LOG_MASK_MLLI (1<<7)
+#define CC_LOG_MASK_HW_QUEUE (1<<8)
+#define CC_LOG_MASK_COMPLETION (1<<9)
+#define CC_LOG_MASK_INFRA (1<<10)
+#define CC_LOG_MASK_LLF (1<<13)
+#define CC_LOG_MASK_ASYM_ECC (1<<14)
+#define CC_LOG_MASK_ASYM_RSA_DH (1<<15)
+#define CC_LOG_MASK_ASYM_KDF (1<<16)
+#define CC_LOG_MASK_ASYM_LLF (1<<17)
+#define CC_LOG_MASK_ASYM_RND (1<<18)
+#define CC_LOG_MASK_UTILS (1<<19)
+
+
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_abort.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_abort.h
new file mode 100644
index 0000000..a46d034
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_abort.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+ /*!
+ @addtogroup cc_pal_abort
+ @{
+ */
+
+/*!
+ @file
+ @brief This file includes all PAL APIs.
+ */
+
+#ifndef _CC_PAL_ABORT_H
+#define _CC_PAL_ABORT_H
+
+
+#include "cc_pal_abort_plat.h"
+
+
+/*!
+ @brief This function performs the "Abort" operation.
+
+ Must be implemented according to platform and OS.
+*/
+void CC_PalAbort(
+ /*! [in] An optional parameter for a string of chars to indicate the abort
+ operation. */
+ const char * exp
+);
+
+/*!
+ @}
+ */
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_apbc.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_apbc.h
new file mode 100644
index 0000000..b0b0c7e
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_apbc.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_apbc
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the definitions and APIs for APB-C implementation.
+
+ This is a placeholder for platform-specific APB-C implementation.
+*/
+
+#ifndef _CC_PAL_APBC_H
+#define _CC_PAL_APBC_H
+
+/*!
+ @brief This function initiates an atomic counter.
+
+ @return Void.
+ */
+void CC_PalApbcCntrInit(void);
+
+/*!
+ @brief This function returns the number of APB-C access operations.
+
+ @return The value of the atomic counter.
+ */
+int32_t CC_PalApbcCntrValue(void);
+
+/*!
+ @brief This function updates the atomic counter on each call to APB-C access.
+
+ On each call to APB-C access, the counter is increased. At the end of each
+ operation, the counter is decreased.
+
+ @return \c 0 on success.
+ @return A non-zero value on failure.
+ */
+CCError_t CC_PalApbcModeSelect(
+ /*! [in] Determines the APB-C mode: TRUE (APB-C start access).
+ FALSE (APB-C finish access). */
+ CCBool isApbcInc
+ );
+
+
+/*!
+ @}
+ */
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_barrier.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_barrier.h
new file mode 100644
index 0000000..014206a
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_barrier.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_barrier
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the definitions and APIs for memory-barrier
+ implementation.
+
+ This is a placeholder for platform-specific memory barrier implementation.
+ The secure core driver should include a memory barrier, before and after
+ the last word of the descriptor, to allow correct order between the words
+ and different descriptors.
+ */
+
+
+#ifndef _CC_PAL_BARRIER_H
+#define _CC_PAL_BARRIER_H
+
+
+/*!
+ This macro puts the memory barrier after the write operation.
+
+ @return None
+ */
+
+void CC_PalWmb(void);
+
+/*!
+ This macro puts the memory barrier before the read operation.
+
+ @return None
+ */
+void CC_PalRmb(void);
+
+/*!
+ @}
+*/
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_buff_attr.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_buff_attr.h
new file mode 100644
index 0000000..be590da
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_buff_attr.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+
+#ifndef _CC_PAL_BUFF_ATTR_H
+#define _CC_PAL_BUFF_ATTR_H
+
+/*!
+@file
+@brief This file contains the definitions and APIs to get inout data buffer attributes.
+ This is a place holder for platform specific inout data attributes functions implementation
+ The module should be updated whether data buffer is secure or non-secure,
+ in order to notify the low level driver how to configure the HW accordigly.
+@defgroup cc_pal_buff_attr CryptoCell PAL Data Buffer Attributes APIs
+@{
+@ingroup cc_pal
+
+*/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_types.h"
+
+/******************************************************************************
+* Buffer Information
+******************************************************************************/
+
+/*! User buffer attribute (secure / non-secure). */
+#define DATA_BUFFER_IS_NONSECURE 1
+#define DATA_BUFFER_IS_SECURE 0
+/*! Buffer attribute (secure / non-secure) as used by arm_cmse.h . */
+#define CMSE_NONSECURE 0
+#define CMSE_SECURE 1
+
+/******************************************************************************
+* Functions
+******************************************************************************/
+
+/**
+ * @brief This function purpose is to verify the buffer's attributes according to address, size, and type (in/out).
+ * The function returns whether the buffer is secure or non-secure.
+ * In any case of invalid memory, the function shall return an error (i.e.mixed regions of secured and non-secure memory).
+ *
+ * @return Zero on success.
+ * @return A non-zero value in case of failure.
+ */
+CCError_t CC_PalDataBufferAttrGet(const unsigned char *pDataBuffer, /*!< [in] Address of data buffer. */
+ size_t buffSize, /*!< [in] Buffer size in bytes. */
+ uint8_t buffType, /* ! [in] Input for read / output for write */
+ uint8_t *pBuffNs /*!< [out] HNONSEC buffer attribute (0 for secure, 1 for non-secure) */
+ );
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_compiler.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_compiler.h
new file mode 100644
index 0000000..6e38712
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_compiler.h
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_compiler
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains CryptoCell PAL platform-dependent compiler-related
+ definitions.
+ */
+
+
+#ifndef __CC_PAL_COMPILER_H__
+#define __CC_PAL_COMPILER_H__
+
+#ifdef __GNUC__
+
+/* *********************** Defines ******************************/
+
+/*! Associate a symbol with a link section. */
+#define CC_PAL_COMPILER_SECTION(sectionName) __attribute__((section(sectionName)))
+
+/*! Mark symbol as used, that is, prevent the garbage collector from
+dropping it. */
+#define CC_PAL_COMPILER_KEEP_SYMBOL __attribute__((used))
+
+/*! Align a given data item in bytes. */
+#define CC_PAL_COMPILER_ALIGN(alignement) __attribute__((aligned(alignement)))
+
+/*! Mark a function that never returns. */
+#define CC_PAL_COMPILER_FUNC_NEVER_RETURNS __attribute__((noreturn))
+
+/*! Prevent a function from being inlined. */
+#define CC_PAL_COMPILER_FUNC_DONT_INLINE __attribute__((noinline))
+
+/*! Given data type might serve as an alias for another data-type pointer. */
+/* (this is used for "superclass" struct casting) */
+#define CC_PAL_COMPILER_TYPE_MAY_ALIAS __attribute__((__may_alias__))
+
+/*! Get the size of a structure-type member. */
+#define CC_PAL_COMPILER_SIZEOF_STRUCT_MEMBER(type_name, member_name) \
+ sizeof(((type_name *)0)->member_name)
+
+/*! Definition of assertion. */
+#define CC_ASSERT_CONCAT_(a, b) a##b
+/*! Definition of assertion. */
+#define CC_ASSERT_CONCAT(a, b) CC_ASSERT_CONCAT_(a, b)
+/*! Definition of assertion. */
+#define CC_PAL_COMPILER_ASSERT(cond, message) \
+ enum { CC_ASSERT_CONCAT(assert_line_, __LINE__) = 1/(!!(cond)) }
+
+#elif defined(__ARM_DSM__)
+#define inline
+
+/*! Associate a symbol with a link section. */
+#define CC_PAL_COMPILER_SECTION(sectionName) __attribute__((section(sectionName)))
+
+/*! Mark a symbol as used, that is, prevent garbage collector from
+dropping it. */
+#define CC_PAL_COMPILER_KEEP_SYMBOL __attribute__((used))
+
+/*! Align a given data item in bytes. */
+#define CC_PAL_COMPILER_ALIGN(alignement) __attribute__((aligned(alignement)))
+
+/*! Mark a function that never returns. */
+#define CC_PAL_COMPILER_FUNC_NEVER_RETURNS __attribute__((noreturn))
+
+/*! Prevent a function from being inlined. */
+#define CC_PAL_COMPILER_FUNC_DONT_INLINE __attribute__((noinline))
+
+/*! Given data type might serve as an alias for another data-type pointer. */
+/* (this is used for "superclass" struct casting) */
+#define CC_PAL_COMPILER_TYPE_MAY_ALIAS __attribute__((__may_alias__))
+
+/*! Get the size of a structure-type member. */
+#define CC_PAL_COMPILER_SIZEOF_STRUCT_MEMBER(type_name, member_name) \
+ sizeof(((type_name *)0)->member_name)
+
+/*! Definition of assertion. */
+#define CC_ASSERT_CONCAT_(a, b) a##b
+/*! Definition of assertion. */
+#define CC_ASSERT_CONCAT(a, b) CC_ASSERT_CONCAT_(a, b)
+/*! Definition of assertion. */
+#define CC_PAL_COMPILER_ASSERT(cond, message) \
+ enum { CC_ASSERT_CONCAT(assert_line_, __LINE__) = 1/(!!(cond)) }
+
+
+#elif defined(__ARM_DS__)
+#define inline
+
+/*! Associate a symbol with a link section. */
+#define CC_PAL_COMPILER_SECTION(sectionName) __attribute__((section(sectionName)))
+
+/*! Mark a symbol as used, that is, prevent garbage collector from
+dropping it. */
+#define CC_PAL_COMPILER_KEEP_SYMBOL __attribute__((used))
+
+/*! Align a given data item in bytes. */
+#define CC_PAL_COMPILER_ALIGN(alignement) __attribute__((aligned(alignement)))
+
+/*! Mark a function that never returns. */
+#define CC_PAL_COMPILER_FUNC_NEVER_RETURNS __attribute__((noreturn))
+
+/*! Prevent a function from being inlined. */
+#define CC_PAL_COMPILER_FUNC_DONT_INLINE __attribute__((noinline))
+
+/*! Given data type might serve as an alias for another data-type pointer. */
+/* (this is used for "superclass" struct casting) */
+#define CC_PAL_COMPILER_TYPE_MAY_ALIAS
+
+/*! Get the size of a structure-type member. */
+#define CC_PAL_COMPILER_SIZEOF_STRUCT_MEMBER(type_name, member_name) \
+ sizeof(((type_name *)0)->member_name)
+
+/*! Definition of assertion. */
+#define CC_ASSERT_CONCAT_(a, b) a##b
+/*! Definition of assertion. */
+#define CC_ASSERT_CONCAT(a, b) CC_ASSERT_CONCAT_(a, b)
+/*! Definition of assertion. */
+#define CC_PAL_COMPILER_ASSERT(cond, message) \
+ enum { CC_ASSERT_CONCAT(assert_line_, __LINE__) = 1/(!!(cond)) }
+
+
+#elif defined(__ARM_DS5__)
+#define inline __inline
+
+
+/*! Associate a symbol with a link section. */
+#define CC_PAL_COMPILER_SECTION(sectionName) __attribute__((section(sectionName)))
+
+/*! Mark a symbol as used, that is, prevent garbage collector from
+dropping it. */
+#define CC_PAL_COMPILER_KEEP_SYMBOL __attribute__((used))
+
+/*! Align a given data item in bytes. */
+#define CC_PAL_COMPILER_ALIGN(alignement) __attribute__((aligned(alignement)))
+
+/*! Mark a function that never returns. */
+#define CC_PAL_COMPILER_FUNC_NEVER_RETURNS __attribute__((noreturn))
+
+/*! Prevent a function from being inlined. */
+#define CC_PAL_COMPILER_FUNC_DONT_INLINE __attribute__((noinline))
+
+/*! Given data type might serve as an alias for another data-type pointer. */
+/* (this is used for "superclass" struct casting) */
+#define CC_PAL_COMPILER_TYPE_MAY_ALIAS
+
+/*! Get the size of a structure-type member. */
+#define CC_PAL_COMPILER_SIZEOF_STRUCT_MEMBER(type_name, member_name) \
+ sizeof(((type_name *)0)->member_name)
+
+/*! Definition of assertion. */
+#define CC_ASSERT_CONCAT_(a, b) a##b
+/*! Definition of assertion. */
+#define CC_ASSERT_CONCAT(a, b) CC_ASSERT_CONCAT_(a, b)
+/*! Definition of assertion. */
+#define CC_PAL_COMPILER_ASSERT(cond, message) \
+ enum { CC_ASSERT_CONCAT(assert_line_, __LINE__) = 1/(!!(cond)) }
+
+#else
+#error Unsupported compiler.
+#endif
+
+/*!
+ @}
+ */
+
+#endif /*__CC_PAL_COMPILER_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_dma.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_dma.h
new file mode 100644
index 0000000..a6979f5
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_dma.h
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+
+#ifndef _CC_PAL_DMA_H
+#define _CC_PAL_DMA_H
+
+/*!
+@file
+@brief This file contains definitions that are used for DMA-related APIs. The implementation of these functions
+need to be replaced according to the platform and OS.
+@defgroup ssi_pal_dma CryptoCell PAL DMA related APIs
+@{
+@ingroup ssi_pal
+
+*/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_types.h"
+#include "cc_pal_dma_plat.h"
+#include "cc_pal_dma_defs.h"
+
+/*! User buffer scatter information. */
+typedef struct {
+ CCDmaAddr_t blockPhysAddr; /*!< The physical address of the user buffer.*/
+ uint32_t blockSize; /*!< The block size of the user buffer.*/
+}CCPalDmaBlockInfo_t;
+
+#ifdef BIG__ENDIAN
+/*! Definition for big to little endian. */
+#define SET_WORD_LE(val) cpu_to_le32(val)
+#else
+/*! Definition for big to little endian. */
+#define SET_WORD_LE
+#endif
+
+/**
+ * @brief This function is called by the CryptoCell runtime library before the HW is used.
+ * It maps a given data buffer (virtual address) for CryptoCell HW DMA use (physical address), and returns the list of
+ * one or more DMA-able (physical) blocks. Once it is called,
+ * only CryptoCell HW access to the buffer is allowed, until it is unmapped.
+ * \note If the data buffer was already mapped by the secure OS prior to calling the CryptoCell runtime library,
+ * this API does not have to perform any actual mapping operation, but only return the list of DMA-able blocks.
+ *
+ * @return A non-zero value in case of failure.
+ */
+uint32_t CC_PalDmaBufferMap(
+ uint8_t *pDataBuffer, /*!< [in] The address of the buffer to map. */
+ uint32_t buffSize, /*!< [in] The buffer size in Bytes. */
+ CCPalDmaBufferDirection_t copyDirection, /*!< [in] The copy direction of the buffer, according to ::CCPalDmaBufferDirection_t:
+ <ul><li>TO_DEVICE - the original buffer is the input to the operation,
+ and this function should copy it to the temporary buffer,
+ prior to the activating the HW on the temporary buffer.</li>
+ <li>FROM_DEVICE - not relevant for this API.</li>
+ <li>BI_DIRECTION - used when the cryptographic operation is "in-place", that is,
+ the result of encryption or decryption is written over the original data
+ at the same address. Should be treated by this API same as
+ TO_DEVICE. </li></ul> */
+ uint32_t *pNumOfBlocks, /*!< [in/out] <ul><li> In - The maximal number of blocks to fill.</li><li>Out - the actual number of blocks.</li></ul> */
+ CCPalDmaBlockInfo_t *pDmaBlockList, /*!< [out] The list of DMA-able blocks that the buffer maps to. */
+ CC_PalDmaBufferHandle *dmaBuffHandle /*!< [out] A handle to the private resources of the mapped buffer.*/ );
+
+
+/**
+ * @brief This function is called by the CryptoCell runtime library after the HW is used.
+ * It unmaps a given buffer and frees its associated resources, if needed. It may unlock the buffer and flush it for CPU use.
+ * Once it is called, CryptoCell HW does not require any further access to this buffer.
+ * \note If the data buffer was already unmapped by the secure OS prior to calling the CryptoCell runtime library,
+ * this API does not have to perform any unmapping operation, and the actual unmapping can be done by the secure OS
+ * outside the context of the CryptoCell runtime library.
+ * @return A non-zero value in case of failure.
+ */
+uint32_t CC_PalDmaBufferUnmap(uint8_t *pDataBuffer, /*!< [in] The address of the buffer to unmap. */
+ uint32_t buffSize, /*!< [in] The buffer size in Bytes. */
+ CCPalDmaBufferDirection_t copyDirection, /*!< [in] The copy direction of the buffer, according to ::CCPalDmaBufferDirection_t:
+ <ul><li>TO_DEVICE - not relevant for this API. </li>
+ <li>FROM_DEVICE - the temporary buffer holds the output of the HW, and this
+ API should copy it to the actual output buffer.</li>
+ <li>BI_DIRECTION - used when the cryptographic operation is "in-place", that is,
+ the result of encryption or decryption is written over the original data
+ at the same address. Should be treated by this API same as
+ FROM_DEVICE.</li></ul> */
+ uint32_t numOfBlocks, /*!< [in] The number of DMA-able blocks that the buffer maps to. */
+ CCPalDmaBlockInfo_t *pDmaBlockList, /*!< [in] The list of DMA-able blocks that the buffer maps to. */
+ CC_PalDmaBufferHandle dmaBuffHandle /*!< [in] A handle to the private resources of the mapped buffer. */);
+
+
+/**
+ * @brief Allocates a DMA-contiguous buffer for CPU use, and returns its virtual address.
+ * Before passing the buffer to the CryptoCell HW, ::CC_PalDmaBufferMap should be called.
+ * \note The returned address must be aligned to 32bits.
+ *
+ *
+ * @return A non-zero value in case of failure.
+ */
+uint32_t CC_PalDmaContigBufferAllocate(uint32_t buffSize, /*!< [in] The buffer size in Bytes.*/
+ uint8_t **ppVirtBuffAddr /*!< [out] The virtual address of the allocated buffer.*/);
+
+
+
+/**
+ * @brief Frees resources previously allocated by ::CC_PalDmaContigBufferAllocate.
+ *
+ *
+ * @return A non-zero value in case of failure.
+ */
+uint32_t CC_PalDmaContigBufferFree(uint32_t buffSize, /*!< [in] The buffer size in Bytes. */
+ uint8_t *pVirtBuffAddr /*!< [in] The virtual address of the buffer to free. */);
+
+
+
+/**
+ * @brief Checks whether the buffer is guaranteed to be a single contiguous DMA block.
+ *
+ *
+ * @return TRUE if the buffer is guaranteed to be a single contiguous DMA block.
+ * @return FALSE otherwise.
+ */
+uint32_t CC_PalIsDmaBufferContiguous(uint8_t *pDataBuffer, /*!< [in] The address of the user buffer. */
+ uint32_t buffSize /*!< [in] The size of the user buffer. */);
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_dma_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_dma_defs.h
new file mode 100644
index 0000000..89cd353
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_dma_defs.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+/*!
+@file
+@brief This file contains the platform-dependent DMA definitions.
+@defgroup ssi_pal_dma_defs CryptoCell PAL DMA specific definitions
+@{
+@ingroup ssi_pal
+*/
+
+#ifndef _CC_PAL_DMA_DEFS_H
+#define _CC_PAL_DMA_DEFS_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*! Definition for DMA buffer handle.*/
+typedef void *CC_PalDmaBufferHandle;
+
+/*! DMA directions configuration. */
+typedef enum {
+ CC_PAL_DMA_DIR_NONE = 0, /*!< No direction. */
+ CC_PAL_DMA_DIR_TO_DEVICE = 1, /*!< The original buffer is the input to the operation. It should be copied or mapped to the temporary buffer prior to activating the HW on it. */
+ CC_PAL_DMA_DIR_FROM_DEVICE = 2, /*!< The temporary buffer holds the output of the HW. This API should copy or map it to the original output buffer.*/
+ CC_PAL_DMA_DIR_BI_DIRECTION = 3, /*!< The result is written over the original data at the same address. Should be treated as \p CC_PAL_DMA_DIR_TO_DEVICE and \p CC_PAL_DMA_DIR_FROM_DEVICE.*/
+ CC_PAL_DMA_DIR_MAX, /*!< Maximal DMA direction options. */
+ CC_PAL_DMA_DIR_RESERVE32 = 0x7FFFFFFF /*!< Reserved.*/
+}CCPalDmaBufferDirection_t;
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_error.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_error.h
new file mode 100644
index 0000000..b3d87df
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_error.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_error
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the error definitions of the platform-dependent PAL APIs.
+ */
+
+
+
+#ifndef _CC_PAL_ERROR_H
+#define _CC_PAL_ERROR_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*! The PAL error base.*/
+#define CC_PAL_BASE_ERROR 0x0F000000
+
+/* Memory error returns */
+/*! Buffer one is greater than buffer two error.*/
+#define CC_PAL_MEM_BUF1_GREATER CC_PAL_BASE_ERROR + 0x01UL
+/*! Buffer two is greater than buffer one error.*/
+#define CC_PAL_MEM_BUF2_GREATER CC_PAL_BASE_ERROR + 0x02UL
+
+/* Semaphore error returns */
+/*! Semaphore creation failed.*/
+#define CC_PAL_SEM_CREATE_FAILED CC_PAL_BASE_ERROR + 0x03UL
+/*! Semaphore deletion failed.*/
+#define CC_PAL_SEM_DELETE_FAILED CC_PAL_BASE_ERROR + 0x04UL
+/*! Semaphore reached timeout.*/
+#define CC_PAL_SEM_WAIT_TIMEOUT CC_PAL_BASE_ERROR + 0x05UL
+/*! Semaphore wait failed.*/
+#define CC_PAL_SEM_WAIT_FAILED CC_PAL_BASE_ERROR + 0x06UL
+/*! Semaphore release failed.*/
+#define CC_PAL_SEM_RELEASE_FAILED CC_PAL_BASE_ERROR + 0x07UL
+/*! Illegal PAL address.*/
+#define CC_PAL_ILLEGAL_ADDRESS CC_PAL_BASE_ERROR + 0x08UL
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_fips.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_fips.h
new file mode 100644
index 0000000..8f21ac2
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_fips.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_FIPS_H
+#define _CC_PAL_FIPS_H
+
+/*!
+@file
+@brief This file contains definitions that are used by the FIPS related APIs. The implementation of these functions
+need to be replaced according to the Platform and TEE_OS.
+*/
+
+#include "cc_pal_types_plat.h"
+#include "cc_fips.h"
+#include "cc_fips_defs.h"
+
+/**
+ * @brief This function purpose is to get the FIPS state.
+ *
+ *
+ * @return Zero on success.
+ * @return A non-zero value on failure.
+ */
+CCError_t CC_PalFipsGetState(CCFipsState_t *pFipsState);
+
+
+/**
+ * @brief This function purpose is to get the FIPS Error.
+ *
+ *
+ * @return Zero on success.
+ * @return A non-zero value on failure.
+ */
+CCError_t CC_PalFipsGetError(CCFipsError_t *pFipsError);
+
+
+/**
+ * @brief This function purpose is to get the FIPS trace.
+ *
+ *
+ * @return Zero on success.
+ * @return A non-zero value on failure.
+ */
+CCError_t CC_PalFipsGetTrace(CCFipsTrace_t *pFipsTrace);
+
+
+/**
+ * @brief This function purpose is to set the FIPS state.
+ *
+ *
+ * @return Zero on success.
+ * @return A non-zero value on failure.
+ */
+CCError_t CC_PalFipsSetState(CCFipsState_t fipsState);
+
+
+/**
+ * @brief This function purpose is to set the FIPS error.
+ *
+ *
+ * @return Zero on success.
+ * @return A non-zero value on failure.
+ */
+CCError_t CC_PalFipsSetError(CCFipsError_t fipsError);
+
+
+/**
+ * @brief This function purpose is to set the FIPS trace.
+ *
+ *
+ * @return Zero on success.
+ * @return A non-zero value on failure.
+ */
+CCError_t CC_PalFipsSetTrace(CCFipsTrace_t fipsTrace);
+
+
+/**
+ * @brief This function purpose is to wait for FIPS interrupt.
+ * After GPR0 (==FIPS) interrupt is detected, clear the interrupt in ICR,
+ * and call CC_FipsIrqHandle
+ *
+ *
+ * @return Zero on success.
+ * @return A non-zero value on failure.
+ */
+CCError_t CC_PalFipsWaitForReeStatus(void);
+
+/**
+ * @brief This function purpose is to stop waiting for REE FIPS interrupt.
+ * since TEE lib is terminating
+ *
+ *
+ * @return Zero on success.
+ * @return A non-zero value on failure.
+ */
+CCError_t CC_PalFipsStopWaitingRee(void);
+
+#endif // _CC_PAL_FIPS_H
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_init.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_init.h
new file mode 100644
index 0000000..0b052bf
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_init.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_init
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the PAL layer entry point.
+
+ It includes the definitions and APIs for PAL initialization and termination.
+ */
+
+#ifndef _CC_PAL_INIT_H
+#define _CC_PAL_INIT_H
+
+#include "cc_pal_types.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/*!
+ @brief This function performs all initializations that may be required by
+ your PAL implementation, specifically by the DMA-able buffer scheme.
+
+ It is called by ::CC_LibInit.
+
+ The existing implementation allocates a contiguous memory pool that is later
+ used by the CryptoCell implementation.
+ If no initializations are needed in your environment, the function can be
+ minimized to return OK.
+
+ @return A non-zero value on failure.
+ */
+int CC_PalInit(void);
+
+
+
+/*!
+ @brief This function terminates the PAL implementation and frees the resources
+ that were allocated by ::CC_PalInit.
+
+ @return Void.
+ */
+void CC_PalTerminate(void);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_log.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_log.h
new file mode 100644
index 0000000..41d87c5
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_log.h
@@ -0,0 +1,190 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_log
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the PAL layer log definitions.
+
+ The log is disabled by default.
+ */
+
+
+#ifndef _CC_PAL_LOG_H_
+#define _CC_PAL_LOG_H_
+
+#include "cc_pal_types.h"
+#include "cc_pal_log_plat.h"
+
+/* PAL log levels (to be used in CC_PAL_logLevel) */
+/*! PAL log level - disabled. */
+#define CC_PAL_LOG_LEVEL_NULL (-1)
+/*! PAL log level - error. */
+#define CC_PAL_LOG_LEVEL_ERR 0
+/*! PAL log level - warning. */
+#define CC_PAL_LOG_LEVEL_WARN 1
+/*! PAL log level - info. */
+#define CC_PAL_LOG_LEVEL_INFO 2
+/*! PAL log level - debug. */
+#define CC_PAL_LOG_LEVEL_DEBUG 3
+/*! PAL log level - trace. */
+#define CC_PAL_LOG_LEVEL_TRACE 4
+/*! PAL log level - data. */
+#define CC_PAL_LOG_LEVEL_DATA 5
+
+#ifndef CC_PAL_LOG_CUR_COMPONENT
+/* Setting default component mask in case caller did not define */
+/* (a mask that is always on for every log mask value but full masking) */
+/*! Default log debugged component. */
+#define CC_PAL_LOG_CUR_COMPONENT 0xFFFFFFFF
+#endif
+#ifndef CC_PAL_LOG_CUR_COMPONENT_NAME
+/*! Default log debugged component. */
+#define CC_PAL_LOG_CUR_COMPONENT_NAME "CC"
+#endif
+
+/* Select compile time log level (default if not explicitly specified by caller) */
+#ifndef CC_PAL_MAX_LOG_LEVEL /* Can be overriden by external definition of this constant */
+#ifdef DEBUG
+/*! Default debug log level, when debug is set to on. */
+#define CC_PAL_MAX_LOG_LEVEL CC_PAL_LOG_LEVEL_ERR /*CC_PAL_LOG_LEVEL_DEBUG*/
+#else /* Disable logging */
+/*! Default debug log level, when debug is set to off. */
+#define CC_PAL_MAX_LOG_LEVEL CC_PAL_LOG_LEVEL_NULL
+#endif
+#endif /*CC_PAL_MAX_LOG_LEVEL*/
+/*! Evaluate \p CC_PAL_MAX_LOG_LEVEL in case provided by caller. */
+#define __CC_PAL_LOG_LEVEL_EVAL(level) level
+/*! The maximal log-level definition. */
+#define _CC_PAL_MAX_LOG_LEVEL __CC_PAL_LOG_LEVEL_EVAL(CC_PAL_MAX_LOG_LEVEL)
+
+
+#ifdef __ARM_DS5__
+#define inline __inline
+#endif
+
+#ifdef ARM_DSM
+/*! Log initialization function. */
+#define CC_PalLogInit() do {} while (0)
+/*! Log set-level function - sets the level of logging in case of debug. */
+#define CC_PalLogLevelSet(setLevel) do {} while (0)
+/*! Log set-mask function - sets the component-masking in case of debug. */
+#define CC_PalLogMaskSet(setMask) do {} while (0)
+#else
+#if _CC_PAL_MAX_LOG_LEVEL > CC_PAL_LOG_LEVEL_NULL
+/*! Log initialization function - platform dependent. */
+void CC_PalLogInit(void);
+/*! Log set-level function - sets the level of logging in case of debug. */
+void CC_PalLogLevelSet(int setLevel);
+/*! Log set-mask function - sets the component-masking in case of debug. */
+void CC_PalLogMaskSet(uint32_t setMask);
+/*! Global variable for log level. */
+extern int CC_PAL_logLevel;
+/*! Global variable for log mask. */
+extern uint32_t CC_PAL_logMask;
+#else /* No log - functions are not platform dependent in case of DEBUG=0*/
+/*! Log initialization function. */
+static inline void CC_PalLogInit(void) {}
+/*! Log set-level function - sets the level of logging in case of debug. */
+static inline void CC_PalLogLevelSet(int setLevel) {CC_UNUSED_PARAM(setLevel);}
+/*! Log set-mask function - sets the component-masking in case of debug. */
+static inline void CC_PalLogMaskSet(uint32_t setMask) {CC_UNUSED_PARAM(setMask);}
+#endif
+#endif
+
+/*! Filter logging based on \p logMask, and dispatch to platform-specific
+logging mechanism. */
+#define _CC_PAL_LOG(level, format, ...) \
+ if (CC_PAL_logMask & CC_PAL_LOG_CUR_COMPONENT) \
+ CC_PalLog(CC_PAL_LOG_LEVEL_ ## level, "%s:%s: " format, CC_PAL_LOG_CUR_COMPONENT_NAME, __func__, ##__VA_ARGS__)
+
+#if (_CC_PAL_MAX_LOG_LEVEL >= CC_PAL_LOG_LEVEL_ERR)
+/*! Log messages according to log level.*/
+#define CC_PAL_LOG_ERR(format, ... ) \
+ _CC_PAL_LOG(ERR, format, ##__VA_ARGS__)
+#else
+/*! Log messages according to log level.*/
+#define CC_PAL_LOG_ERR( ... ) do {} while (0)
+#endif
+
+#if (_CC_PAL_MAX_LOG_LEVEL >= CC_PAL_LOG_LEVEL_WARN)
+/*! Log messages according to log level.*/
+#define CC_PAL_LOG_WARN(format, ... ) \
+ if (CC_PAL_logLevel >= CC_PAL_LOG_LEVEL_WARN) \
+ _CC_PAL_LOG(WARN, format, ##__VA_ARGS__)
+#else
+/*! Log messages according to log level.*/
+#define CC_PAL_LOG_WARN( ... ) do {} while (0)
+#endif
+
+#if (_CC_PAL_MAX_LOG_LEVEL >= CC_PAL_LOG_LEVEL_INFO)
+/*! Log messages according to log level.*/
+#define CC_PAL_LOG_INFO(format, ... ) \
+ if (CC_PAL_logLevel >= CC_PAL_LOG_LEVEL_INFO) \
+ _CC_PAL_LOG(INFO, format, ##__VA_ARGS__)
+#else
+/*! Log messages according to log level.*/
+#define CC_PAL_LOG_INFO( ... ) do {} while (0)
+#endif
+
+#if (_CC_PAL_MAX_LOG_LEVEL >= CC_PAL_LOG_LEVEL_DEBUG)
+/*! Log messages according to log level.*/
+#define CC_PAL_LOG_DEBUG(format, ... ) \
+ if (CC_PAL_logLevel >= CC_PAL_LOG_LEVEL_DEBUG) \
+ _CC_PAL_LOG(DEBUG, format, ##__VA_ARGS__)
+
+/*! Log message buffer.*/
+#define CC_PAL_LOG_DUMP_BUF(msg, buf, size) \
+ do { \
+ int i; \
+ uint8_t *pData = (uint8_t*)buf; \
+ \
+ PRINTF("%s (%d):\n", msg, size); \
+ for (i = 0; i < size; i++) { \
+ PRINTF("0x%02X ", pData[i]); \
+ if ((i & 0xF) == 0xF) { \
+ PRINTF("\n"); \
+ } \
+ } \
+ PRINTF("\n"); \
+ } while (0)
+#else
+/*! Log debug messages.*/
+#define CC_PAL_LOG_DEBUG( ... ) do {} while (0)
+/*! Log debug buffer.*/
+#define CC_PAL_LOG_DUMP_BUF(msg, buf, size) do {} while (0)
+#endif
+
+#if (_CC_PAL_MAX_LOG_LEVEL >= CC_PAL_LOG_LEVEL_TRACE)
+/*! Log debug trace.*/
+#define CC_PAL_LOG_TRACE(format, ... ) \
+ if (CC_PAL_logLevel >= CC_PAL_LOG_LEVEL_TRACE) \
+ _CC_PAL_LOG(TRACE, format, ##__VA_ARGS__)
+#else
+/*! Log debug trace.*/
+#define CC_PAL_LOG_TRACE(...) do {} while (0)
+#endif
+
+#if (_CC_PAL_MAX_LOG_LEVEL >= CC_PAL_LOG_LEVEL_TRACE)
+/*! Log debug data.*/
+#define CC_PAL_LOG_DATA(format, ...) \
+ if (CC_PAL_logLevel >= CC_PAL_LOG_LEVEL_TRACE) \
+ _CC_PAL_LOG(DATA, format, ##__VA_ARGS__)
+#else
+/*! Log debug data.*/
+#define CC_PAL_LOG_DATA( ...) do {} while (0)
+#endif
+
+/*!
+ @}
+ */
+
+#endif /*_CC_PAL_LOG_H_*/
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_mem.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_mem.h
new file mode 100644
index 0000000..07e4929
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_mem.h
@@ -0,0 +1,123 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_mem
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains functions for memory operations.
+
+ The functions are generally implemented as wrappers to different
+ operating-system calls.
+
+ \note None of the described functions validate the input parameters, so that
+ the behavior of the APIs in case of an illegal parameter is dependent on the
+ behavior of the operating system.
+ */
+
+
+
+#ifndef _CC_PAL_MEM_H
+#define _CC_PAL_MEM_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_types.h"
+#include "cc_pal_mem_plat.h"
+#include "cc_pal_malloc_plat.h"
+#include <stdlib.h>
+#include <string.h>
+
+ /*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+ /**** ----- Memory Operations APIs ----- ****/
+
+/*!
+ @brief This function compares between two given buffers, according to the
+ given size.
+
+ @return The return values are according to operating-system return values.
+ */
+#define CC_PalMemCmp(aTarget, aSource, aSize) CC_PalMemCmpPlat(aTarget, aSource, aSize)
+
+/*!
+ @brief This function copies \p aSize bytes from the source buffer to the
+ destination buffer.
+
+ @return void.
+ */
+#define CC_PalMemCopy(aDestination, aSource, aSize) CC_PalMemCopyPlat(aDestination, aSource, aSize)
+
+/*!
+ @brief This function moves \p aSize bytes from the source buffer to the
+ destination buffer.
+
+ This function supports overlapped buffers.
+
+ @return void.
+ */
+#define CC_PalMemMove(aDestination, aSource, aSize) CC_PalMemMovePlat(aDestination, aSource, aSize)
+
+
+/*!
+ @brief This function sets \p aSize bytes of \p aChar in the given buffer.
+
+ @return void.
+ */
+#define CC_PalMemSet(aTarget, aChar, aSize) CC_PalMemSetPlat(aTarget, aChar, aSize)
+
+
+/*!
+ @brief This function sets \p aSize bytes in the given buffer to zeroes.
+
+ @return void.
+ */
+#define CC_PalMemSetZero(aTarget, aSize) CC_PalMemSetZeroPlat(aTarget, aSize)
+
+
+/*!
+ @brief This function allocates a memory buffer according to \p aSize.
+
+ @return A pointer to the allocated buffer on success.
+ @return NULL on failure.
+ */
+#define CC_PalMemMalloc(aSize) CC_PalMemMallocPlat(aSize)
+
+/*!
+ @brief This function reallocates a memory buffer according to \p aNewSize.
+ The content of the old buffer is moved to the new location.
+
+ @return A pointer to the newly-allocated buffer on success.
+ @return NULL on failure.
+ */
+#define CC_PalMemRealloc(aBuffer, aNewSize) CC_PalMemReallocPlat(aBuffer, aNewSize)
+
+/*!
+ @brief This function frees a previously-allocated buffer.
+
+ @return void.
+ */
+#define CC_PalMemFree(aBuffer) CC_PalMemFreePlat(aBuffer)
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_memmap.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_memmap.h
new file mode 100644
index 0000000..5b2ed63
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_memmap.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_memmap
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains functions for memory mapping.
+
+ \note None of the described functions validate the input parameters, so
+ that the behavior of the APIs in case of an illegal parameter is dependent
+ on the behavior of the operating system.
+ */
+
+#ifndef _CC_PAL_MEMMAP_H
+#define _CC_PAL_MEMMAP_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+#include "cc_pal_types.h"
+#include "cc_address_defs.h"
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+/*!
+ @brief This function returns the base virtual address that maps the base
+ physical address.
+
+ @return \c 0 on success.
+ @return A non-zero value in case of failure.
+ */
+uint32_t CC_PalMemMap(
+ /*! [in] The starting physical address of the I/O range to be mapped. */
+ CCDmaAddr_t physicalAddress,
+ /*! [in] The number of bytes that were mapped. */
+ uint32_t mapSize,
+ /*! [out] A pointer to the base virtual address to which the physical
+ pages were mapped. */
+ uint32_t **ppVirtBuffAddr);
+
+
+/*!
+ @brief This function unmaps a specified address range that was previously
+ mapped by #CC_PalMemMap.
+
+ @return \c 0 on success.
+ @return A non-zero value in case of failure.
+ */
+uint32_t CC_PalMemUnMap(
+ /*! [in] A pointer to the base virtual address to which the physical
+ pages were mapped. */
+ uint32_t *pVirtBuffAddr,
+ /*! [in] The number of bytes that were mapped. */
+ uint32_t mapSize);
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_mutex.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_mutex.h
new file mode 100644
index 0000000..de4d94c
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_mutex.h
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_mutex
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains functions for resource management (mutex operations).
+
+ These functions are generally implemented as wrappers to different
+ operating-system calls.
+
+ \note None of the described functions validate the input parameters, so that
+ the behavior of the APIs in case of an illegal parameter is dependent on the
+ behavior of the operating system.
+ */
+
+#ifndef _CC_PAL_MUTEX_H
+#define _CC_PAL_MUTEX_H
+
+#include "cc_pal_mutex_plat.h"
+#include "cc_pal_types_plat.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+/*!
+ @brief This function creates a mutex.
+
+
+ @return \c 0 on success.
+ @return A non-zero value on failure.
+ */
+CCError_t CC_PalMutexCreate(
+ /*! [out] A pointer to the handle of the created mutex. */
+ CC_PalMutex *pMutexId
+ );
+
+
+/*!
+ @brief This function destroys a mutex.
+
+
+ @return \c 0 on success.
+ @return A non-zero value on failure.
+ */
+CCError_t CC_PalMutexDestroy(
+ /*! [in] A pointer to handle of the mutex to destroy. */
+ CC_PalMutex *pMutexId
+ );
+
+
+/*!
+ @brief This function waits for a mutex with \p aTimeOut.
+
+ \p aTimeOut is specified in milliseconds. A value of \p aTimeOut=CC_INFINITE
+ means that the function will not return.
+
+ @return \c 0 on success.
+ @return A non-zero value on failure.
+ */
+CCError_t CC_PalMutexLock(
+ /*! [in] A pointer to handle of the mutex. */
+ CC_PalMutex *pMutexId,
+ /*! [in] The timeout in mSec, or CC_INFINITE. */
+ uint32_t aTimeOut
+ );
+
+
+/*!
+ @brief This function releases the mutex.
+
+ @return \c 0 on success.
+ @return A non-zero value on failure.
+ */
+CCError_t CC_PalMutexUnlock(
+ /*! [in] A pointer to the handle of the mutex. */
+ CC_PalMutex *pMutexId
+ );
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_perf.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_perf.h
new file mode 100644
index 0000000..d980ba0
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_perf.h
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_PERF_H_
+#define _CC_PAL_PERF_H_
+
+#include <string.h>
+
+#ifdef LIB_PERF
+#include "cc_pal_perf_plat.h"
+#endif
+
+typedef enum
+{
+ PERF_TEST_TYPE_AES_INIT,
+ PERF_TEST_TYPE_AES_SET_KEY,
+ PERF_TEST_TYPE_AES_BLOCK,
+ PERF_TEST_TYPE_AES_FIN,
+ PERF_TEST_TYPE_CC_AES_INIT,
+ PERF_TEST_TYPE_CC_AES_BLOCK,
+ PERF_TEST_TYPE_CC_AES_FIN,
+ PERF_TEST_TYPE_HW_CMPLT ,
+ PERF_TEST_TYPE_PAL_MAP,
+ PERF_TEST_TYPE_PAL_UNMAP,
+ PERF_TEST_TYPE_MLLI_BUILD,
+ PERF_TEST_TYPE_SYM_DRV_INIT,
+ PERF_TEST_TYPE_SYM_DRV_PROC,
+ PERF_TEST_TYPE_SYM_DRV_FIN,
+ PERF_TEST_TYPE_CC_HASH_INIT,
+ PERF_TEST_TYPE_CC_HASH_UPDATE,
+ PERF_TEST_TYPE_CC_HASH_FIN,
+ PERF_TEST_TYPE_CC_HMAC_INIT,
+ PERF_TEST_TYPE_CC_HMAC_UPDATE,
+ PERF_TEST_TYPE_CC_HMAC_FIN,
+ PERF_TEST_TYPE_CMPLT_SLEEP,
+ PERF_TEST_TYPE_CC_ECDSA_SIGN_INIT,
+ PERF_TEST_TYPE_CC_ECDSA_SIGN_UPDATE,
+ PERF_TEST_TYPE_CC_ECDSA_SIGN_FINISH,
+ PERF_TEST_TYPE_CC_ECDSA_VERIFY_INIT,
+ PERF_TEST_TYPE_CC_ECDSA_VERIFY_UPDATE,
+ PERF_TEST_TYPE_CC_ECDSA_VERIFY_FINISH,
+ PERF_TEST_TYPE_PKA_EC_WRST_SCALAR_MULT,
+ PERF_TEST_TYPE_CALC_SIGNATURE,
+ PERF_TEST_TYPE_PKA_SCALAR_MULT_AFF,
+ PERF_TEST_TYPE_PKA_SCALAR_MULT_SCA,
+ PERF_TEST_TYPE_PKA_ECDSA_VERIFY,
+ PERF_TEST_TYPE_PKA_ModExp = 0x30,
+ PERF_TEST_TYPE_TEST_BASE = 0x100,
+ PERF_TEST_TYPE_MAX,
+ PERF_TEST_TYPE_RESERVE32 = 0x7FFFFFFF
+} CCPalPerfType_t;
+
+#ifdef LIB_PERF
+
+static char* CC_PalPerfTypeStr(CCPalPerfType_t type, char* pStr, uint32_t buffLen)
+{
+ #define CCPalPerfTypeStr_str(a) case a: strncpy(pStr, #a + strlen("PERF_TEST_TYPE_"), buffLen); break;
+
+ switch (type)
+ {
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_AES_INIT);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_AES_SET_KEY);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_AES_BLOCK);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_AES_FIN);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_AES_INIT);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_AES_BLOCK);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_AES_FIN);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_HW_CMPLT );
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_PAL_MAP);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_PAL_UNMAP);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_MLLI_BUILD);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_SYM_DRV_INIT);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_SYM_DRV_PROC);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_SYM_DRV_FIN);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_HASH_INIT);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_HASH_UPDATE);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_HASH_FIN);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_HMAC_INIT);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_HMAC_UPDATE);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_HMAC_FIN);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CMPLT_SLEEP);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_ECDSA_SIGN_INIT);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_ECDSA_SIGN_UPDATE);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_ECDSA_SIGN_FINISH);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_ECDSA_VERIFY_INIT);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_ECDSA_VERIFY_UPDATE);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CC_ECDSA_VERIFY_FINISH);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_PKA_EC_WRST_SCALAR_MULT);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_CALC_SIGNATURE);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_PKA_SCALAR_MULT_AFF);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_PKA_SCALAR_MULT_SCA);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_PKA_ECDSA_VERIFY);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_PKA_ModExp);
+ CCPalPerfTypeStr_str(PERF_TEST_TYPE_TEST_BASE);
+ default: strncpy(pStr, "PERF_TEST_TYPE_UNKNOWN", buffLen);
+ }
+
+ return pStr;
+}
+
+#define CC_PAL_PERF_INIT CC_PalPerfInit
+#define CC_PAL_PERF_OPEN_NEW_ENTRY(num, type) num = CC_PalPerfOpenNewEntry(type)
+#define CC_PAL_PERF_CLOSE_ENTRY(num, type) CC_PalPerfCloseEntry(num, type)
+#define CC_PAL_PERF_DUMP CC_PalPerfDump
+#define CC_PAL_PERF_FIN CC_PalPerfFin
+
+/**
+ * @brief initialize performance test mechanism
+ *
+ * @param[in]
+ * *
+ * @return None
+ */
+void CC_PalPerfInit(void);
+
+
+/**
+ * @brief opens new entry in perf buffer to record new entry
+ *
+ * @param[in] entryType - entry type (defined in cc_pal_perf.h) to be recorded in buffer
+ *
+ * @return A non-zero value in case of failure.
+ */
+CCPalPerfData_t CC_PalPerfOpenNewEntry(CCPalPerfType_t entryType);
+
+
+/**
+ * @brief closes entry in perf buffer previously opened by CC_PalPerfOpenNewEntry
+ *
+ * @param[in] idx - index of the entry to be closed, the return value of CC_PalPerfOpenNewEntry
+ * @param[in] entryType - entry type (defined in cc_pal_perf.h) to be recorded in buffer
+ *
+ * @return A non-zero value in case of failure.
+ */
+void CC_PalPerfCloseEntry(CCPalPerfData_t idx, CCPalPerfType_t entryType);
+
+
+/**
+ * @brief dumps the performance buffer
+ *
+ * @param[in] None
+ *
+ * @return None
+ */
+void CC_PalPerfDump(void);
+
+
+/**
+ * @brief terminates resources used for performance tests
+ *
+ * @param[in]
+ * *
+ * @return None
+ */
+void CC_PalPerfFin(void);
+
+#else //LIB_PERF
+#define CC_PAL_PERF_INIT()
+#define CC_PAL_PERF_OPEN_NEW_ENTRY(num, type) (num=num)
+#define CC_PAL_PERF_CLOSE_ENTRY(num, type)
+#define CC_PAL_PERF_DUMP()
+#define CC_PAL_PERF_FIN()
+
+
+typedef unsigned int CCPalPerfData_t;
+
+#endif //LIB_PERF
+
+
+#endif /*_CC_PAL_PERF_H__*/
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_pm.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_pm.h
new file mode 100644
index 0000000..2b7d9c2
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_pm.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_pm
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the definitions and APIs for power-management
+ implementation.
+
+ This is a placeholder for platform-specific power management implementation.
+ The module should be updated whether CryptoCell is active or not,
+ to notify the external PMU when CryptoCell might be powered down.
+ */
+
+#ifndef _CC_PAL_PM_H
+#define _CC_PAL_PM_H
+
+
+/*
+******** Function pointer definitions **********
+*/
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+/*!
+ @brief This function initiates an atomic counter.
+
+ @return Void.
+ */
+void CC_PalPowerSaveModeInit(void);
+
+/*!
+ @brief This function returns the number of active registered CryptoCell
+ operations.
+
+ @return The value of the atomic counter.
+ */
+int32_t CC_PalPowerSaveModeStatus(void);
+
+/*!
+ @brief This function updates the atomic counter on each call to CryptoCell.
+
+ On each call to CryptoCell, the counter is increased. At the end of each operation
+ the counter is decreased.
+ Once the counter is zero, an external callback is called.
+
+ @return \c 0 on success.
+ @return A non-zero value on failure.
+ */
+CCError_t CC_PalPowerSaveModeSelect(
+ /*! [in] TRUE: CryptoCell is active. FALSE: CryptoCell is idle. */
+ CCBool isPowerSaveMode
+ );
+
+
+/*!
+ @}
+ */
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_trng.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_trng.h
new file mode 100644
index 0000000..6927366
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_trng.h
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_trng
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains APIs for retrieving TRNG user parameters.
+ */
+
+#ifndef _CC_PAL_TRNG_H
+#define _CC_PAL_TRNG_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_types.h"
+
+#if (CC_CONFIG_TRNG_MODE==1)
+/*!
+ @brief The random-generator parameters of CryptoCell for TRNG mode.
+
+ This is as defined in <em>NIST SP 90B: Recommendation for
+ the Entropy Sources Used for Random Bit Generation</em>.
+ */
+typedef struct CC_PalTrngModeParams_t
+{
+ /*! The amount of bytes for the required entropy bits. It is calculated as
+ ROUND_UP(ROUND_UP(((required entropy bits)/(entropy per bit)), 1024),
+ (EHR width in bytes)) / 8.
+ The 1024 bits is the multiple of the window size. The multiple of the EHR
+ width, which is 192 bits. */
+ uint32_t numOfBytes;
+ /*! The repetition counter cutoff, as defined in <em>NIST SP 90B:
+ Recommendation for the Entropy Sources Used for Random Bit
+ Generation</em>, section 4.4.1.
+ This is calculated as C = ROUND_UP(1+(-log(W)/H)), W = 2^(-40),
+ H=(entropy per bit). */
+ uint32_t repetitionCounterCutoff;
+ /*! The adaptive proportion cutoff, as defined in <em>NIST SP 90B:
+ Recommendation for the Entropy Sources Used for Random Bit
+ Generation</em>, section 4.4.2.
+ This is calculated as C =CRITBINOM(W, power(2,(-H)),1-a), W = 1024,
+ a = 2^(-40), H=(entropy per bit). */
+ uint32_t adaptiveProportionCutOff;
+
+} CC_PalTrngModeParams_t;
+#endif
+
+/*! Definition for the structure of the random-generator parameters
+ of CryptoCell, containing the user-given parameters. */
+typedef struct CC_PalTrngParams_t
+{
+ /*! The sampling ratio of ROSC #1.*/
+ uint32_t SubSamplingRatio1;
+ /*! The sampling ratio of ROSC #2.*/
+ uint32_t SubSamplingRatio2;
+ /*! The sampling ratio of ROSC #3.*/
+ uint32_t SubSamplingRatio3;
+ /*! The sampling ratio of ROSC #4.*/
+ uint32_t SubSamplingRatio4;
+#if (CC_CONFIG_TRNG_MODE==1)
+ /*! Specific parameters of the TRNG mode.*/
+ CC_PalTrngModeParams_t trngModeParams;
+#endif
+} CC_PalTrngParams_t;
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+/*!
+ @brief This function returns the TRNG user parameters.
+
+ @return \c 0 on success.
+ @return A non-zero value on failure.
+ */
+CCError_t CC_PalTrngParamGet(
+ /*! [out] A pointer to the TRNG user parameters. */
+ CC_PalTrngParams_t *pTrngParams,
+ /*! [in/out] A pointer to the size of the TRNG-user-parameters
+ structure used. Input: the function must verify its size is the
+ same as #CC_PalTrngParams_t. Output: the function returns the size
+ of #CC_PalTrngParams_t for library-size verification. */
+ size_t *pParamsSize
+ );
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_types.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_types.h
new file mode 100644
index 0000000..c49563a
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/cc_pal_types.h
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pal_types
+ @{
+*/
+
+/*!
+ @file
+ @brief This file contains definitions and types of CryptoCell PAL platform-dependent APIs.
+ */
+
+#ifndef CC_PAL_TYPES_H
+#define CC_PAL_TYPES_H
+
+#include "cc_pal_types_plat.h"
+
+/*! Boolean types.*/
+typedef enum {
+ /*! Boolean false definition.*/
+ CC_FALSE = 0,
+ /*! Boolean true definition.*/
+ CC_TRUE = 1
+} CCBool;
+
+/*! Success definition. */
+#define CC_SUCCESS 0UL
+/*! Failure definition. */
+#define CC_FAIL 1UL
+
+/*! Success (OK) definition. */
+#define CC_OK 0
+
+/*! Handles unused parameters in the code, to avoid compilation warnings. */
+#define CC_UNUSED_PARAM(prm) ((void)prm)
+
+/*! The maximal uint32 value.*/
+#define CC_MAX_UINT32_VAL (0xFFFFFFFF)
+
+
+/* Minimal and Maximal macros */
+#ifdef min
+/*! Definition for minimal calculation. */
+#define CC_MIN(a,b) min( a , b )
+#else
+/*! Definition for minimal calculation. */
+#define CC_MIN( a , b ) ( ( (a) < (b) ) ? (a) : (b) )
+#endif
+
+#ifdef max
+/*! Definition for maximal calculation. */
+#define CC_MAX(a,b) max( a , b )
+#else
+/*! Definition for maximal calculation.. */
+#define CC_MAX( a , b ) ( ( (a) > (b) ) ? (a) : (b) )
+#endif
+
+/*! This macro calculates the number of full bytes from bits, where seven bits
+are one byte. */
+#define CALC_FULL_BYTES(numBits) ((numBits)/CC_BITS_IN_BYTE + (((numBits) & (CC_BITS_IN_BYTE-1)) > 0))
+/*! This macro calculates the number of full 32-bit words from bits, where
+31 bits are one word. */
+#define CALC_FULL_32BIT_WORDS(numBits) ((numBits)/CC_BITS_IN_32BIT_WORD + (((numBits) & (CC_BITS_IN_32BIT_WORD-1)) > 0))
+/*! This macro calculates the number of full 32-bit words from bytes, where
+three bytes are one word. */
+#define CALC_32BIT_WORDS_FROM_BYTES(sizeBytes) ((sizeBytes)/CC_32BIT_WORD_SIZE + (((sizeBytes) & (CC_32BIT_WORD_SIZE-1)) > 0))
+/*! This macro calculates the number of full 32-bit words from 64-bits
+dwords. */
+#define CALC_32BIT_WORDS_FROM_64BIT_DWORD(sizeWords) (sizeWords * CC_32BIT_WORD_IN_64BIT_DWORD)
+/*! This macro rounds up bits to 32-bit words. */
+#define ROUNDUP_BITS_TO_32BIT_WORD(numBits) (CALC_FULL_32BIT_WORDS(numBits) * CC_BITS_IN_32BIT_WORD)
+/*! This macro rounds up bits to bytes. */
+#define ROUNDUP_BITS_TO_BYTES(numBits) (CALC_FULL_BYTES(numBits) * CC_BITS_IN_BYTE)
+/*! This macro rounds up bytes to 32-bit words. */
+#define ROUNDUP_BYTES_TO_32BIT_WORD(sizeBytes) (CALC_32BIT_WORDS_FROM_BYTES(sizeBytes) * CC_32BIT_WORD_SIZE)
+/*! Definition of 1 KB in bytes. */
+#define CC_1K_SIZE_IN_BYTES 1024
+/*! Definition of number of bits in a byte. */
+#define CC_BITS_IN_BYTE 8
+/*! Definition of number of bits in a 32-bits word. */
+#define CC_BITS_IN_32BIT_WORD 32
+/*! Definition of number of bytes in a 32-bits word. */
+#define CC_32BIT_WORD_SIZE 4
+/*! Definition of number of 32-bits words in a 64-bits dword. */
+#define CC_32BIT_WORD_IN_64BIT_DWORD 2
+
+
+/*!
+ @}
+*/
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_abort_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_abort_plat.h
new file mode 100644
index 0000000..4c6ef6d
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_abort_plat.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_ABORT_PLAT_H
+#define _CC_PAL_ABORT_PLAT_H
+
+#include "cc_pal_log.h"
+#include <stdlib.h>
+
+void CC_PalAbort(const char * exp);
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_dma_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_dma_plat.h
new file mode 100644
index 0000000..207b5ff
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_dma_plat.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_DMA_PLAT_H
+#define _CC_PAL_DMA_PLAT_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_address_defs.h"
+
+/**
+ * @brief stub function, the function should initialize the DMA mapping of the platform (if needed)
+ *
+ * @param[in] buffSize - buffer size in Bytes
+ * @param[in] physBuffAddr - physical start address of the memory to map
+ *
+ * @return Start address of contiguous memory
+ */
+extern uint32_t CC_PalDmaInit(uint32_t buffSize, /*!< [in] Buffer size in Bytes. */
+ CCDmaAddr_t physBuffAddr /*!< [in] Physical start address of the memory to map. */);
+
+/**
+ * @brief free system resources created in PD_PAL_DmaInit()
+ *
+ *
+ * @return void
+ */
+extern void CC_PalDmaTerminate(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_interrupt_ctrl_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_interrupt_ctrl_plat.h
new file mode 100644
index 0000000..eb80a2e
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_interrupt_ctrl_plat.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_INTERRUPTCTRL_PLAT_H
+#define _CC_PAL_INTERRUPTCTRL_PLAT_H
+
+#include "FreeRTOS.h"
+#include "InterruptCtrl.h"
+
+#ifdef SSE_200
+#define CRYPTOCELL_INTERRUPT 8 /*Connected to HOST_IRR*/
+#else
+#define CRYPTOCELL_INTERRUPT 24 /*Connected to HOST_IRR*/
+#endif
+/**
+ * @brief This function sets one of the handler function pointers that are
+ * in handlerFuncPtrArr, according to given index.
+ *
+ * @param[in]
+ * handlerIndx - Irq index.
+ * funcPtr - Address of the new handler function.
+ *
+ * @param[out]
+ *
+ * @return - CC_SUCCESS for success, CC_FAIL for failure.
+ */
+CCError_t CC_PalRequestIrq(uint32_t irq, IrqHandlerPtr funcPtr,
+ const char *name, uint8_t nameLength, void *args);
+
+/**
+ * @brief This function removes an interrupt handler.
+ *
+ * @param[in]
+ * irq - Irq index.
+ *
+ * @param[out]
+ *
+ * @return
+ */
+void CC_PalFreeIrq(uint32_t irq);
+
+/**
+ * @brief This function enables an IRQ according to given index.
+ *
+ * @param[in]
+ * irq - Irq index.
+ *
+ * @param[out]
+ *
+ * @return - CC_SUCCESS for success, CC_FAIL for failure.
+ */
+CCError_t CC_PalEnableIrq(uint32_t irq);
+
+/**
+ * @brief This function disables an IRQ according to given index.
+ *
+ * @param[in]
+ * irq - Irq index.
+ *
+ * @param[out]
+ *
+ * @return - CC_SUCCESS for success, CC_FAIL for failure.
+ */
+CCError_t CC_PalDisableIrq(uint32_t irq);
+
+/**
+ * @brief This function removes the interrupt handler for
+ * cryptocell interrupts.
+ *
+ */
+void CC_PalFinishIrq(void);
+
+/* @brief
+*
+* @param[in]
+*
+* @param[out]
+*
+* @return - CC_SUCCESS for success, CC_FAIL for failure.
+*/
+CCError_t CC_PalInitIrq(void);
+
+/*!
+ * Busy wait upon Interrupt Request Register (IRR) signals.
+ * This function notifys for any ARM CryptoCell interrupt, it is the caller responsiblity
+ * to verify and prompt the expected case interupt source.
+ *
+ * @param[in] data - input data for future use
+ * \return CCError_t - CC_OK upon success
+ */
+CCError_t CC_PalWaitInterrupt( uint32_t data);
+
+
+#endif /* _CC_PAL_INTERRUPTCTRL_H */
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_log_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_log_plat.h
new file mode 100644
index 0000000..a3f3ef4
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_log_plat.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_LOG_PLAT_H_
+#define _CC_PAL_LOG_PLAT_H_
+
+#include "cc_log_mask.h"
+#include <stdio.h>
+
+/************** PRINTF rules ******************/
+#if defined(DEBUG)
+
+void CC_PalLog(int level, const char * format, ...);
+
+#else /* Disable all prints */
+
+#define CC_PalLog(...) do {} while (0)
+
+#endif
+
+
+#endif /*_CC_PAL_LOG_PLAT_H_*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_malloc_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_malloc_plat.h
new file mode 100644
index 0000000..20f6fa8
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_malloc_plat.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_MEMALLOC_INT_H
+#define _CC_PAL_MEMALLOC_INT_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdlib.h>
+#include "FreeRTOS.h"
+
+/**
+* @brief File Description:
+* This file contains wrappers for memory operations APIs.
+*/
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+/*!
+ * @brief This function purpose is to allocate a memory buffer according to aSize.
+ *
+ *
+ * @return The function returns a pointer to allocated buffer or NULL if allocation failed.
+ */
+void* CC_PalMemMallocPlat(size_t aSize /*!< [in] Number of bytes to allocate. */);
+
+/*!
+ * @brief This function purpose is to reallocate a memory buffer according to aNewSize.
+ * The content of the old buffer is moved to the new location.
+ *
+ * @return The function returns a pointer to the newly allocated buffer or NULL if allocation failed.
+ */
+void* CC_PalMemReallocPlat( void* aBuffer, /*!< [in] Pointer to allocated buffer. */
+ size_t aNewSize /*!< [in] Number of bytes to reallocate. */);
+
+/*!
+ * @brief This function purpose is to free allocated buffer.
+ *
+ *
+ * @return void.
+ */
+void CC_PalMemFreePlat(void* aBuffer /*!< [in] Pointer to allocated buffer.*/);
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_mem_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_mem_plat.h
new file mode 100644
index 0000000..f0aa015
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_mem_plat.h
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_MEM_INT_H
+#define _CC_PAL_MEM_INT_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "cc_pal_compiler.h"
+
+/**
+ * @brief File Description:
+ * This file contains the implementation for memory operations APIs.
+ * The functions implementations are generally just wrappers to different operating system calls.
+ */
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-------------------------------*/
+
+
+/*!
+ * @brief This function purpose is to compare between two given buffers according to given size.
+ *
+ * @return The return values is according to operating system return values.
+ */
+int32_t CC_PalMemCmpPlat( const void* aTarget, /*!< [in] The target buffer to compare. */
+ const void* aSource, /*!< [in] The Source buffer to compare to. */
+ size_t aSize /*!< [in] Number of bytes to compare. */);
+/*!
+ * @brief This function purpose is to copy aSize bytes from source buffer to destination buffer.
+ *
+ * @return void.
+ */
+void* CC_PalMemCopyPlat( void* aDestination, /*!< [out] The destination buffer to copy bytes to. */
+ const void* aSource, /*!< [in] The Source buffer to copy from. */
+ size_t aSize /*!< [in] Number of bytes to copy. */ );
+
+
+/*!
+ * @brief This function purpose is to copy aSize bytes from source buffer to destination buffer.
+ * This function Supports overlapped buffers.
+ *
+ * @return void.
+ */
+void CC_PalMemMovePlat( void* aDestination, /*!< [out] The destination buffer to copy bytes to. */
+ const void* aSource, /*!< [in] The Source buffer to copy from. */
+ size_t aSize /*!< [in] Number of bytes to copy. */);
+
+
+
+/*!
+ * @brief This function purpose is to set aSize bytes in the given buffer with aChar.
+ *
+ * @return void.
+ */
+void CC_PalMemSetPlat( void* aTarget, /*!< [out] The target buffer to set. */
+ uint8_t aChar, /*!< [in] The char to set into aTarget. */
+ size_t aSize /*!< [in] Number of bytes to set. */);
+
+/*!
+ * @brief This function purpose is to set aSize bytes in the given buffer with zeroes.
+ *
+ * @return void.
+ */
+void CC_PalMemSetZeroPlat( void* aTarget, /*!< [out] The target buffer to set. */
+ size_t aSize /*!< [in] Number of bytes to set. */);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_mutex_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_mutex_plat.h
new file mode 100644
index 0000000..e5541a7
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_mutex_plat.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_MUTEX_PLAT_H
+#define _CC_PAL_MUTEX_PLAT_H
+
+#include "FreeRTOS.h"
+#include "semphr.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/**
+* @brief File Description:
+* This file contains functions for resource management (semaphor operations).
+* The functions implementations are generally just wrappers to different operating system calls.
+* None of the described functions will check the input parameters so the behavior
+* of the APIs in illegal parameters case is dependent on the operating system behavior.
+*
+*/
+
+typedef SemaphoreHandle_t CC_PalMutex;
+
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_perf_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_perf_plat.h
new file mode 100644
index 0000000..75986dc
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_perf_plat.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_PERF_PLAT_H__
+#define _CC_PAL_PERF_PLAT_H__
+
+#include "stdlib.h"
+#include "stdint.h"
+
+typedef unsigned int CCPalPerfData_t;
+
+#endif /*_CC_PAL_PERF_PLAT_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_types_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_types_plat.h
new file mode 100644
index 0000000..c1a066f
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/freertos/cc_pal_types_plat.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+/*! @file
+@brief This file contains basic platform-dependent type definitions.
+*/
+#ifndef _CC_PAL_TYPES_PLAT_H
+#define _CC_PAL_TYPES_PLAT_H
+/* Host specific types for standard (ISO-C99) compilant platforms */
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+typedef uintptr_t CCVirtAddr_t;
+typedef uint32_t CCBool_t;
+typedef uint32_t CCStatus;
+
+#define CCError_t CCStatus
+#define CC_INFINITE 0xFFFFFFFF
+
+#define CEXPORT_C
+#define CIMPORT_C
+
+#endif /*_CC_PAL_TYPES_PLAT_H*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_abort_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_abort_plat.h
new file mode 100644
index 0000000..bd5a4dc
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_abort_plat.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_ABORT_PLAT_H
+#define _CC_PAL_ABORT_PLAT_H
+
+#include "cc_pal_log.h"
+#include "cc_pal_compiler.h"
+#include "stdlib.h"
+
+void _CC_PalAbort(const char * exp);
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_dma_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_dma_plat.h
new file mode 100644
index 0000000..188eef1
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_dma_plat.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_DMA_PLAT_H
+#define _CC_PAL_DMA_PLAT_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_address_defs.h"
+
+/**
+ * @brief Initializes contiguous memory pool required for CC_PalDmaContigBufferAllocate() and CC_PalDmaContigBufferFree(). Our
+ * example implementation is to mmap 0x30000000 and call to bpool(), for use of bget() in CC_PalDmaContigBufferAllocate(),
+ * and brel() in CC_PalDmaContigBufferFree().
+ *
+ * @return A non-zero value in case of failure.
+ */
+extern uint32_t CC_PalDmaInit(uint32_t buffSize, /*!< [in] Buffer size in Bytes. */
+ CCDmaAddr_t physBuffAddr /*!< [in] Physical start address of the memory to map. */);
+
+/**
+ * @brief free system resources created in CC_PalDmaInit()
+ *
+ * @param[in] buffSize - buffer size in Bytes
+ *
+ * @return void
+ */
+extern void CC_PalDmaTerminate(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_interrupt_ctrl_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_interrupt_ctrl_plat.h
new file mode 100644
index 0000000..43dc04d
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_interrupt_ctrl_plat.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_INTERRUPTCTRL_PLAT_H
+#define _CC_PAL_INTERRUPTCTRL_PLAT_H
+
+
+
+/**
+ * @brief This function removes the interrupt handler for
+ * cryptocell interrupts.
+ *
+ */
+void CC_PalFinishIrq(void);
+
+/* @brief
+*
+* @param[in]
+*
+* @param[out]
+*
+* @return - CC_SUCCESS for success, CC_FAIL for failure.
+*/
+CCError_t CC_PalInitIrq(void);
+
+/*!
+ * Busy wait upon Interrupt Request Register (IRR) signals.
+ * This function notifys for any ARM CryptoCell interrupt, it is the caller responsiblity
+ * to verify and prompt the expected case interupt source.
+ *
+ * @param[in] data - input data for future use
+ * \return CCError_t - CC_OK upon success
+ */
+CCError_t CC_PalWaitInterrupt( uint32_t data);
+
+
+#endif /* _CC_PAL_INTERRUPTCTRL_H */
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_log_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_log_plat.h
new file mode 100644
index 0000000..5dbc7de
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_log_plat.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_LOG_PLAT_H_
+#define _CC_PAL_LOG_PLAT_H_
+
+#include "cc_log_mask.h"
+#include <syslog.h>
+
+void CC_PalLog(int level, const char * format, ...);
+
+#endif /*_CC_PAL_LOG_PLAT_H_*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_malloc_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_malloc_plat.h
new file mode 100644
index 0000000..fa84651
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_malloc_plat.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_MEMALLOC_INT_H
+#define _CC_PAL_MEMALLOC_INT_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdlib.h>
+/**
+* @brief File Description:
+* This file contains wrappers for memory operations APIs.
+*/
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+/*!
+ * @brief This function purpose is to allocate a memory buffer according to aSize.
+ *
+ *
+ * @return The function returns a pointer to allocated buffer or NULL if allocation failed.
+ */
+void* CC_PalMemMallocPlat(size_t aSize /*!< [in] Number of bytes to allocate. */);
+
+/*!
+ * @brief This function purpose is to reallocate a memory buffer according to aNewSize.
+ * The content of the old buffer is moved to the new location.
+ *
+ * @return The function returns a pointer to the newly allocated buffer or NULL if allocation failed.
+ */
+void* CC_PalMemReallocPlat( void* aBuffer, /*!< [in] Pointer to allocated buffer. */
+ size_t aNewSize /*!< [in] Number of bytes to reallocate. */);
+
+/*!
+ * @brief This function purpose is to free allocated buffer.
+ *
+ *
+ * @return void.
+ */
+void CC_PalMemFreePlat(void* aBuffer /*!< [in] Pointer to allocated buffer.*/);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_mem_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_mem_plat.h
new file mode 100644
index 0000000..51ea8e1
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_mem_plat.h
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_MEM_PLAT_H
+#define _CC_PAL_MEM_PLAT_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdlib.h>
+#include <string.h>
+
+
+/**
+ * @brief File Description:
+ * This file contains the implementation for memory operations APIs.
+ * The functions implementations are generally just wrappers to different operating system calls.
+ */
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-------------------------------*/
+
+
+/*!
+ * @brief This function purpose is to compare between two given buffers according to given size.
+ *
+ * @return The return values is according to operating system return values.
+ */
+int32_t CC_PalMemCmpPlat( const void* aTarget, /*!< [in] The target buffer to compare. */
+ const void* aSource, /*!< [in] The Source buffer to compare to. */
+ size_t aSize /*!< [in] Number of bytes to compare. */);
+
+/*!
+ * @brief This function purpose is to copy aSize bytes from source buffer to destination buffer.
+ *
+ * @return void.
+ */
+void* CC_PalMemCopyPlat( void* aDestination, /*!< [out] The destination buffer to copy bytes to. */
+ const void* aSource, /*!< [in] The Source buffer to copy from. */
+ size_t aSize /*!< [in] Number of bytes to copy. */ );
+
+
+/*!
+ * @brief This function purpose is to copy aSize bytes from source buffer to destination buffer.
+ * This function Supports overlapped buffers.
+ *
+ * @return void.
+ */
+void CC_PalMemMovePlat( void* aDestination, /*!< [out] The destination buffer to copy bytes to. */
+ const void* aSource, /*!< [in] The Source buffer to copy from. */
+ size_t aSize /*!< [in] Number of bytes to copy. */);
+
+
+
+/*!
+ * @brief This function purpose is to set aSize bytes in the given buffer with aChar.
+ *
+ * @return void.
+ */
+void CC_PalMemSetPlat( void* aTarget, /*!< [out] The target buffer to set. */
+ uint8_t aChar, /*!< [in] The char to set into aTarget. */
+ size_t aSize /*!< [in] Number of bytes to set. */);
+
+/*!
+ * @brief This function purpose is to set aSize bytes in the given buffer with zeroes.
+ *
+ * @return void.
+ */
+void CC_PalMemSetZeroPlat( void* aTarget, /*!< [out] The target buffer to set. */
+ size_t aSize /*!< [in] Number of bytes to set. */);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_mutex_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_mutex_plat.h
new file mode 100644
index 0000000..eda3970
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_mutex_plat.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_MUTEX_PLAT_H
+#define _CC_PAL_MUTEX_PLAT_H
+
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+#include <pthread.h>
+
+/**
+* @brief File Description:
+* This file contains functions for resource management (semaphor operations).
+* The functions implementations are generally just wrappers to different operating system calls.
+* None of the described functions will check the input parameters so the behavior
+* of the APIs in illegal parameters case is dependent on the operating system behavior.
+*
+*/
+
+typedef pthread_mutex_t CC_PalMutex;
+
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_perf_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_perf_plat.h
new file mode 100644
index 0000000..3bfb386
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_perf_plat.h
@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_PERF_PLAT_H__
+#define _CC_PAL_PERF_PLAT_H__
+
+typedef uint32_t CCPalPerfData_t;
+#endif /*_CC_PAL_PERF_PLAT_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_types_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_types_plat.h
new file mode 100644
index 0000000..db23f2c
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/linux/cc_pal_types_plat.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_TYPES_PLAT_H
+#define _CC_PAL_TYPES_PLAT_H
+
+/*! @file
+@brief This file contains basic platform-dependent type definitions.
+*/
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+typedef uintptr_t CCVirtAddr_t;
+typedef uint32_t CCBool_t;
+typedef uint32_t CCStatus;
+
+#define CCError_t CCStatus
+#define CC_INFINITE 0xFFFFFFFF
+
+#define CEXPORT_C
+#define CIMPORT_C
+
+/* Define macros for host to SeP endianess conversion (for host wrappers) */
+#include <endian.h>
+#include <byteswap.h>
+#if __BYTE_ORDER == __BIG_ENDIAN
+#define cpu_to_le16(x) bswap_16(x)
+#define le16_to_cpu(x) bswap_16(x)
+#define cpu_to_le32(x) bswap_32(x)
+#define le32_to_cpu(x) bswap_32(x)
+#else /*__LITTLE_ENDIAN*/
+#define cpu_to_le16(x) x
+#define le16_to_cpu(x) x
+#define cpu_to_le32(x) x
+#define le32_to_cpu(x) x
+#endif /*__BYTE_ORDER*/
+
+#endif /*_CC_PAL_TYPES_PLAT_H*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_abort_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_abort_plat.h
new file mode 100644
index 0000000..4c6ef6d
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_abort_plat.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_ABORT_PLAT_H
+#define _CC_PAL_ABORT_PLAT_H
+
+#include "cc_pal_log.h"
+#include <stdlib.h>
+
+void CC_PalAbort(const char * exp);
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_dma_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_dma_plat.h
new file mode 100644
index 0000000..207b5ff
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_dma_plat.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_DMA_PLAT_H
+#define _CC_PAL_DMA_PLAT_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_address_defs.h"
+
+/**
+ * @brief stub function, the function should initialize the DMA mapping of the platform (if needed)
+ *
+ * @param[in] buffSize - buffer size in Bytes
+ * @param[in] physBuffAddr - physical start address of the memory to map
+ *
+ * @return Start address of contiguous memory
+ */
+extern uint32_t CC_PalDmaInit(uint32_t buffSize, /*!< [in] Buffer size in Bytes. */
+ CCDmaAddr_t physBuffAddr /*!< [in] Physical start address of the memory to map. */);
+
+/**
+ * @brief free system resources created in PD_PAL_DmaInit()
+ *
+ *
+ * @return void
+ */
+extern void CC_PalDmaTerminate(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_interrupt_ctrl_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_interrupt_ctrl_plat.h
new file mode 100644
index 0000000..43dc04d
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_interrupt_ctrl_plat.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_INTERRUPTCTRL_PLAT_H
+#define _CC_PAL_INTERRUPTCTRL_PLAT_H
+
+
+
+/**
+ * @brief This function removes the interrupt handler for
+ * cryptocell interrupts.
+ *
+ */
+void CC_PalFinishIrq(void);
+
+/* @brief
+*
+* @param[in]
+*
+* @param[out]
+*
+* @return - CC_SUCCESS for success, CC_FAIL for failure.
+*/
+CCError_t CC_PalInitIrq(void);
+
+/*!
+ * Busy wait upon Interrupt Request Register (IRR) signals.
+ * This function notifys for any ARM CryptoCell interrupt, it is the caller responsiblity
+ * to verify and prompt the expected case interupt source.
+ *
+ * @param[in] data - input data for future use
+ * \return CCError_t - CC_OK upon success
+ */
+CCError_t CC_PalWaitInterrupt( uint32_t data);
+
+
+#endif /* _CC_PAL_INTERRUPTCTRL_H */
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_log_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_log_plat.h
new file mode 100644
index 0000000..a3f3ef4
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_log_plat.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_LOG_PLAT_H_
+#define _CC_PAL_LOG_PLAT_H_
+
+#include "cc_log_mask.h"
+#include <stdio.h>
+
+/************** PRINTF rules ******************/
+#if defined(DEBUG)
+
+void CC_PalLog(int level, const char * format, ...);
+
+#else /* Disable all prints */
+
+#define CC_PalLog(...) do {} while (0)
+
+#endif
+
+
+#endif /*_CC_PAL_LOG_PLAT_H_*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_malloc_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_malloc_plat.h
new file mode 100644
index 0000000..6580e32
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_malloc_plat.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_MEMALLOC_INT_H
+#define _CC_PAL_MEMALLOC_INT_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdlib.h>
+
+/**
+* @brief File Description:
+* This file contains wrappers for memory operations APIs.
+*/
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+/*!
+ * @brief This function purpose is to allocate a memory buffer according to aSize.
+ *
+ *
+ * @return The function returns a pointer to allocated buffer or NULL if allocation failed.
+ */
+void* CC_PalMemMallocPlat(size_t aSize /*!< [in] Number of bytes to allocate. */);
+
+/*!
+ * @brief This function purpose is to reallocate a memory buffer according to aNewSize.
+ * The content of the old buffer is moved to the new location.
+ *
+ * @return The function returns a pointer to the newly allocated buffer or NULL if allocation failed.
+ */
+void* CC_PalMemReallocPlat( void* aBuffer, /*!< [in] Pointer to allocated buffer. */
+ size_t aNewSize /*!< [in] Number of bytes to reallocate. */);
+
+/*!
+ * @brief This function purpose is to free allocated buffer.
+ *
+ *
+ * @return void.
+ */
+void CC_PalMemFreePlat(void* aBuffer /*!< [in] Pointer to allocated buffer.*/);
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_mem_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_mem_plat.h
new file mode 100644
index 0000000..f0aa015
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_mem_plat.h
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_MEM_INT_H
+#define _CC_PAL_MEM_INT_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "cc_pal_compiler.h"
+
+/**
+ * @brief File Description:
+ * This file contains the implementation for memory operations APIs.
+ * The functions implementations are generally just wrappers to different operating system calls.
+ */
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-------------------------------*/
+
+
+/*!
+ * @brief This function purpose is to compare between two given buffers according to given size.
+ *
+ * @return The return values is according to operating system return values.
+ */
+int32_t CC_PalMemCmpPlat( const void* aTarget, /*!< [in] The target buffer to compare. */
+ const void* aSource, /*!< [in] The Source buffer to compare to. */
+ size_t aSize /*!< [in] Number of bytes to compare. */);
+/*!
+ * @brief This function purpose is to copy aSize bytes from source buffer to destination buffer.
+ *
+ * @return void.
+ */
+void* CC_PalMemCopyPlat( void* aDestination, /*!< [out] The destination buffer to copy bytes to. */
+ const void* aSource, /*!< [in] The Source buffer to copy from. */
+ size_t aSize /*!< [in] Number of bytes to copy. */ );
+
+
+/*!
+ * @brief This function purpose is to copy aSize bytes from source buffer to destination buffer.
+ * This function Supports overlapped buffers.
+ *
+ * @return void.
+ */
+void CC_PalMemMovePlat( void* aDestination, /*!< [out] The destination buffer to copy bytes to. */
+ const void* aSource, /*!< [in] The Source buffer to copy from. */
+ size_t aSize /*!< [in] Number of bytes to copy. */);
+
+
+
+/*!
+ * @brief This function purpose is to set aSize bytes in the given buffer with aChar.
+ *
+ * @return void.
+ */
+void CC_PalMemSetPlat( void* aTarget, /*!< [out] The target buffer to set. */
+ uint8_t aChar, /*!< [in] The char to set into aTarget. */
+ size_t aSize /*!< [in] Number of bytes to set. */);
+
+/*!
+ * @brief This function purpose is to set aSize bytes in the given buffer with zeroes.
+ *
+ * @return void.
+ */
+void CC_PalMemSetZeroPlat( void* aTarget, /*!< [out] The target buffer to set. */
+ size_t aSize /*!< [in] Number of bytes to set. */);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_mutex_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_mutex_plat.h
new file mode 100644
index 0000000..14826f8
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_mutex_plat.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_MUTEX_PLAT_H
+#define _CC_PAL_MUTEX_PLAT_H
+
+#include "cmsis_os2.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/**
+* @brief File Description:
+* This file contains functions for resource management (semaphor operations).
+* The functions implementations are generally just wrappers to different operating system calls.
+* None of the described functions will check the input parameters so the behavior
+* of the APIs in illegal parameters case is dependent on the operating system behavior.
+*
+*/
+
+typedef osMutexId_t CC_PalMutex;
+
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_perf_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_perf_plat.h
new file mode 100644
index 0000000..75986dc
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_perf_plat.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PAL_PERF_PLAT_H__
+#define _CC_PAL_PERF_PLAT_H__
+
+#include "stdlib.h"
+#include "stdint.h"
+
+typedef unsigned int CCPalPerfData_t;
+
+#endif /*_CC_PAL_PERF_PLAT_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_types_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_types_plat.h
new file mode 100644
index 0000000..c1a066f
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/mbedos/cc_pal_types_plat.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+/*! @file
+@brief This file contains basic platform-dependent type definitions.
+*/
+#ifndef _CC_PAL_TYPES_PLAT_H
+#define _CC_PAL_TYPES_PLAT_H
+/* Host specific types for standard (ISO-C99) compilant platforms */
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+typedef uintptr_t CCVirtAddr_t;
+typedef uint32_t CCBool_t;
+typedef uint32_t CCStatus;
+
+#define CCError_t CCStatus
+#define CC_INFINITE 0xFFFFFFFF
+
+#define CEXPORT_C
+#define CIMPORT_C
+
+#endif /*_CC_PAL_TYPES_PLAT_H*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_abort_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_abort_plat.h
new file mode 100644
index 0000000..ea5aff2
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_abort_plat.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_ABORT_PLAT_H
+#define _CC_PAL_ABORT_PLAT_H
+
+#include "cc_pal_log.h"
+#include <stdlib.h>
+
+void _CC_PalAbort(const char * exp);
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_dma_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_dma_plat.h
new file mode 100644
index 0000000..be1f464
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_dma_plat.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_DMA_PLAT_H
+#define _CC_PAL_DMA_PLAT_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_address_defs.h"
+
+/**
+ * @brief stub function, the function should initialize the DMA mapping of the platform (if needed)
+ *
+ * @param[in] buffSize - buffer size in Bytes
+ * @param[in] physBuffAddr - physical start address of the memory to map
+ *
+ * @return Virtual start address of contiguous memory
+ */
+extern uint32_t CC_PalDmaInit(uint32_t buffSize, /*!< [in] Buffer size in Bytes. */
+ CCDmaAddr_t physBuffAddr /*!< [in] Physical start address of the memory to map. */);
+
+/**
+ * @brief free system resources created in PD_PAL_DmaInit()
+ *
+ *
+ * @return void
+ */
+extern void CC_PalDmaTerminate(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_interrupt_ctrl_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_interrupt_ctrl_plat.h
new file mode 100644
index 0000000..43dc04d
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_interrupt_ctrl_plat.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_INTERRUPTCTRL_PLAT_H
+#define _CC_PAL_INTERRUPTCTRL_PLAT_H
+
+
+
+/**
+ * @brief This function removes the interrupt handler for
+ * cryptocell interrupts.
+ *
+ */
+void CC_PalFinishIrq(void);
+
+/* @brief
+*
+* @param[in]
+*
+* @param[out]
+*
+* @return - CC_SUCCESS for success, CC_FAIL for failure.
+*/
+CCError_t CC_PalInitIrq(void);
+
+/*!
+ * Busy wait upon Interrupt Request Register (IRR) signals.
+ * This function notifys for any ARM CryptoCell interrupt, it is the caller responsiblity
+ * to verify and prompt the expected case interupt source.
+ *
+ * @param[in] data - input data for future use
+ * \return CCError_t - CC_OK upon success
+ */
+CCError_t CC_PalWaitInterrupt( uint32_t data);
+
+
+#endif /* _CC_PAL_INTERRUPTCTRL_H */
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_log_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_log_plat.h
new file mode 100644
index 0000000..2cfbefc
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_log_plat.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_LOG_PLAT_H_
+#define _CC_PAL_LOG_PLAT_H_
+
+#include "cc_log_mask.h"
+#include <stdio.h>
+
+
+
+void CC_PalLog(int level, const char * format, ...);
+
+
+
+
+#endif /*_CC_PAL_LOG_PLAT_H_*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_malloc_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_malloc_plat.h
new file mode 100644
index 0000000..00ab33a
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_malloc_plat.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_MEMALLOC_INT_H
+#define _CC_PAL_MEMALLOC_INT_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdlib.h>
+/**
+* @brief File Description:
+* This file contains wrappers for memory operations APIs.
+*/
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+/*!
+ * @brief This function purpose is to allocate a memory buffer according to aSize.
+ *
+ *
+ * @return The function returns a pointer to allocated buffer or NULL if allocation failed.
+ */
+void* CC_PalMemMallocPlat(size_t aSize /*!< [in] Number of bytes to allocate. */);
+
+/*!
+ * @brief This function purpose is to reallocate a memory buffer according to aNewSize.
+ * The content of the old buffer is moved to the new location.
+ *
+ * @return The function returns a pointer to the newly allocated buffer or NULL if allocation failed.
+ */
+void* CC_PalMemReallocPlat( void* aBuffer, /*!< [in] Pointer to allocated buffer. */
+ size_t aNewSize /*!< [in] Number of bytes to reallocate. */);
+
+/*!
+ * @brief This function purpose is to free allocated buffer.
+ *
+ *
+ * @return void.
+ */
+void CC_PalMemFreePlat(void* aBuffer /*!< [in] Pointer to allocated buffer.*/);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_mem_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_mem_plat.h
new file mode 100644
index 0000000..ade9712
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_mem_plat.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_MEM_PLAT_H
+#define _CC_PAL_MEM_PLAT_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdlib.h>
+#include <string.h>
+
+
+
+/**
+ * @brief File Description:
+ * This file contains the implementation for memory operations APIs.
+ * The functions implementations are generally just wrappers to different operating system calls.
+ */
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-------------------------------*/
+
+/*!
+ * @brief This function purpose is to compare between two given buffers according to given size.
+ *
+ * @return The return values is according to operating system return values.
+ */
+int32_t CC_PalMemCmpPlat( const void* aTarget, /*!< [in] The target buffer to compare. */
+ const void* aSource, /*!< [in] The Source buffer to compare to. */
+ size_t aSize /*!< [in] Number of bytes to compare. */);
+
+/*!
+ * @brief This function purpose is to copy aSize bytes from source buffer to destination buffer.
+ *
+ * @return void.
+ */
+void* CC_PalMemCopyPlat( void* aDestination, /*!< [out] The destination buffer to copy bytes to. */
+ const void* aSource, /*!< [in] The Source buffer to copy from. */
+ size_t aSize /*!< [in] Number of bytes to copy. */ );
+
+
+/*!
+ * @brief This function purpose is to copy aSize bytes from source buffer to destination buffer.
+ * This function Supports overlapped buffers.
+ *
+ * @return void.
+ */
+void CC_PalMemMovePlat( void* aDestination, /*!< [out] The destination buffer to copy bytes to. */
+ const void* aSource, /*!< [in] The Source buffer to copy from. */
+ size_t aSize /*!< [in] Number of bytes to copy. */);
+
+
+
+/*!
+ * @brief This function purpose is to set aSize bytes in the given buffer with aChar.
+ *
+ * @return void.
+ */
+void CC_PalMemSetPlat( void* aTarget, /*!< [out] The target buffer to set. */
+ uint8_t aChar, /*!< [in] The char to set into aTarget. */
+ size_t aSize /*!< [in] Number of bytes to set. */);
+
+/*!
+ * @brief This function purpose is to set aSize bytes in the given buffer with zeroes.
+ *
+ * @return void.
+ */
+void CC_PalMemSetZeroPlat( void* aTarget, /*!< [out] The target buffer to set. */
+ size_t aSize /*!< [in] Number of bytes to set. */);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_mutex_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_mutex_plat.h
new file mode 100644
index 0000000..d0dc973
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_mutex_plat.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_MUTEX_PLAT_H
+#define _CC_PAL_MUTEX_PLAT_H
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/**
+* @brief File Description:
+* This file contains functions for resource management (semaphor operations).
+* The functions implementations are generally just wrappers to different operating system calls.
+* None of the described functions will check the input parameters so the behavior
+* of the APIs in illegal parameters case is dependent on the operating system behavior.
+*
+*/
+
+typedef uint32_t CC_PalMutex;
+
+
+
+/*----------------------------
+ PUBLIC FUNCTIONS
+-----------------------------------*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_perf_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_perf_plat.h
new file mode 100644
index 0000000..caaa4dc
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_perf_plat.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PAL_PERF_PLAT_H__
+#define _CC_PAL_PERF_PLAT_H__
+
+typedef unsigned int CCPalPerfData_t;
+
+/**
+ * @brief DSM environment bug - sometimes very long write operation.
+ * to overcome this bug we added while to make sure write opeartion is completed
+ *
+ * @param[in]
+ * *
+ * @return None
+ */
+void CC_PalDsmWorkarround();
+
+
+#endif /*_CC_PAL_PERF_PLAT_H__*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_types_plat.h b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_types_plat.h
new file mode 100644
index 0000000..2d90da1
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/pal/no_os/cc_pal_types_plat.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*! @file
+@brief This file contains basic platform-dependent type definitions.
+*/
+#ifndef _CC_PAL_TYPES_PLAT_H
+#define _CC_PAL_TYPES_PLAT_H
+/* Host specific types for standard (ISO-C99) compliant platforms */
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+/*! Type definition for virtual address. */
+typedef uintptr_t CCVirtAddr_t;
+/*! Type Definition for boolean variable. */
+typedef uint32_t CCBool_t;
+/*! Type definition for return status. */
+typedef uint32_t CCStatus;
+
+/*! Type definition for error return. */
+#define CCError_t CCStatus
+/*! Defines inifinite value, used to define unlimited time frame. */
+#define CC_INFINITE 0xFFFFFFFF
+
+/*! Type definition for C export. */
+#define CEXPORT_C
+/*! Type definition for C import. */
+#define CIMPORT_C
+
+#endif /*_CC_PAL_TYPES_PLAT_H*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_address_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_address_defs.h
new file mode 100644
index 0000000..64789da
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_address_defs.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_general_defs
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains general definitions for CryptoCell APIs.
+ */
+
+
+
+#ifndef _CC_ADDRESS_DEFS_H
+#define _CC_ADDRESS_DEFS_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Defines ******************************/
+
+/* Address types within CryptoCell. */
+/*! The SRAM address type. */
+typedef uint32_t CCSramAddr_t;
+/*! The DMA address type. */
+typedef uint32_t CCDmaAddr_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+@}
+ */
+
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_crypto_boot_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_crypto_boot_defs.h
new file mode 100644
index 0000000..a2802c0
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_crypto_boot_defs.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_CRYPTO_BOOT_DEFS_H
+#define _CC_CRYPTO_BOOT_DEFS_H
+
+/*! @file
+@brief This file contains Secure Boot And Secure Debug definitions.
+*/
+#include "cc_pal_types.h"
+/*! Maximal size of secure boot's nonce. */
+#define CC_SB_MAX_SIZE_NONCE_BYTES (2*sizeof(uint32_t))
+
+/*! HASH boot key definition. */
+typedef enum {
+ CC_SB_HASH_BOOT_KEY_0_128B = 0, /*!< 128-bit truncated SHA256 digest of public key 0. */
+ CC_SB_HASH_BOOT_KEY_1_128B = 1, /*!< 128-bit truncated SHA256 digest of public key 1. */
+ CC_SB_HASH_BOOT_KEY_256B = 2, /*!< 256-bit SHA256 digest of public key. */
+ CC_SB_HASH_BOOT_NOT_USED = 0xF,
+ CC_SB_HASH_MAX_NUM = 0x7FFFFFFF, /*!\internal use external 128-bit truncated SHA256 digest */
+}CCSbPubKeyIndexType_t;
+
+
+/*! SW image code encryption type definition. */
+typedef enum {
+ CC_SB_NO_IMAGE_ENCRYPTION = 0, /*!< Plain SW image. */
+ CC_SB_ICV_CODE_ENCRYPTION = 1, /*!< use Kceicv for cipher SW image. */
+ CC_SB_OEM_CODE_ENCRYPTION = 2, /*!< use Kce for cipher SW image. */
+ CC_SB_CODE_ENCRYPTION_MAX_NUM = 0x7FFFFFFF, /*!\internal NA */
+}CCswCodeEncType_t;
+
+/*! SW image load and verify scheme. */
+typedef enum {
+ CC_SB_LOAD_AND_VERIFY = 0, /*!< Load & Verify from flash to memory. */
+ CC_SB_VERIFY_ONLY_IN_FLASH = 1, /*!< Verify only in flash. */
+ CC_SB_VERIFY_ONLY_IN_MEM = 2, /*!< Verify only in memory. */
+ CC_SB_LOAD_ONLY = 3, /*!< Load only from flash to memory. */
+ CC_SB_LOAD_VERIFY_MAX_NUM = 0x7FFFFFFF, /*!\internal NA */
+}CCswLoadVerifyScheme_t;
+
+/*! SW image cryptographic type. */
+typedef enum {
+ CC_SB_HASH_ON_DECRYPTED_IMAGE = 0, /*!< AES to HASH. */
+ CC_SB_HASH_ON_ENCRYPTED_IMAGE = 1, /*!< AES and HASH. */
+ CC_SB_CRYPTO_TYPE_MAX_NUM = 0x7FFFFFFF, /*!\internal NA */
+}CCswCryptoType_t;
+
+/*! Table nonce used in composing IV for SW-component decryption. */
+typedef uint8_t CCSbNonce_t[CC_SB_MAX_SIZE_NONCE_BYTES];
+
+/*! SW components data.*/
+typedef struct {
+ /*! Num of SW components. */
+ uint32_t numOfSwComps;
+
+ /*! SW image code encryption type. */
+ CCswCodeEncType_t swCodeEncType;
+
+ /*! SW image load & verify scheme. */
+ CCswLoadVerifyScheme_t swLoadVerifyScheme;
+
+ /*! SW image crypto type. */
+ CCswCryptoType_t swCryptoType;
+
+ /*! Nonce. */
+ CCSbNonce_t nonce;
+
+ /*! Pointer to start of sw components data. */
+ uint8_t *pSwCompsData;
+
+}CCSbCertParserSwCompsInfo_t;
+
+/*! SW version */
+typedef struct {
+ CCSbPubKeyIndexType_t keyIndex; /*!< Enumeration defining the key hash to retrieve: 128-bit HBK0, 128-bit HBK1, or 256-bit HBK. */
+ uint32_t swVersion; /*!< Sw version.*/
+}CCSbSwVersion_t;
+
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_ecpki_domains_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_ecpki_domains_defs.h
new file mode 100644
index 0000000..6178fe4
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_ecpki_domains_defs.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+/*!
+ @addtogroup cc_ecpki_domains_defs
+
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains CryptoCell ECPKI domains supported by the project.
+ */
+
+#ifndef _CC_ECPKI_DOMAIN_DEFS_H
+#define _CC_ECPKI_DOMAIN_DEFS_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_ecpki_domain_secp192r1.h"
+#include "cc_ecpki_domain_secp224r1.h"
+#include "cc_ecpki_domain_secp256r1.h"
+#include "cc_ecpki_domain_secp521r1.h"
+#include "cc_ecpki_domain_secp192k1.h"
+#include "cc_ecpki_domain_secp224k1.h"
+#include "cc_ecpki_domain_secp256k1.h"
+#include "cc_ecpki_domain_secp384r1.h"
+
+/*! Definition of the domain-retrieval function. */
+typedef const CCEcpkiDomain_t * (*getDomainFuncP)(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_general_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_general_defs.h
new file mode 100644
index 0000000..1222e21
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_general_defs.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_general_defs
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains general definitions of the CryptoCell runtime SW APIs.
+ */
+
+
+#ifndef _CC_GENERAL_DEFS_H
+#define _CC_GENERAL_DEFS_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_hash_defs.h"
+
+/************************ Defines ******************************/
+/*! Hash parameters for HMAC operation. */
+typedef struct {
+ /*! The size of the HMAC hash result. */
+ uint16_t hashResultSize;
+ /*! The hash operation mode. */
+ CCHashOperationMode_t hashMode;
+}HmacHash_t;
+
+/*! The maximal size of the hash string. */
+#define CC_HASH_NAME_MAX_SIZE 10
+/*! Hash parameters for HMAC operation. */
+extern const HmacHash_t HmacHashInfo_t[CC_HASH_NumOfModes];
+/*! Supported hash modes. */
+extern const uint8_t HmacSupportedHashModes_t[CC_HASH_NumOfModes];
+/*! Hash string names. */
+extern const char HashAlgMode2mbedtlsString[CC_HASH_NumOfModes][CC_HASH_NAME_MAX_SIZE];
+
+
+/* general definitions */
+/*-------------------------*/
+/*! Maximal size of AES HUK in bytes. */
+#define CC_AES_KDR_MAX_SIZE_BYTES 32
+/*! Maximal size of AES HUK in words. */
+#define CC_AES_KDR_MAX_SIZE_WORDS (CC_AES_KDR_MAX_SIZE_BYTES/sizeof(uint32_t))
+
+
+/* Life-cycle states. */
+/*! The Chip Manufacturer (CM) LCS value. */
+#define CC_LCS_CHIP_MANUFACTURE_LCS 0x0
+/*! The Secure LCS value. */
+#define CC_LCS_SECURE_LCS 0x5
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_int_general_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_int_general_defs.h
new file mode 100644
index 0000000..20f0099
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_int_general_defs.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_INT_GENERAL_DEFS_H
+#define _CC_INT_GENERAL_DEFS_H
+
+/*!
+@file
+@brief This file contains internal general definitions of the CryptoCell runtime SW APIs.
+@defgroup cc_general_defs CryptoCell general definitions
+@{
+@ingroup cryptocell_api
+
+*/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/************************ Macros ******************************/
+
+/* check if fatal error bit is set to ON */
+#define CC_IS_FATAL_ERR_ON(rc)\
+do {\
+ uint32_t regVal = 0;\
+ regVal = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_AO_LOCK_BITS));\
+ rc = CC_REG_FLD_GET(0, HOST_AO_LOCK_BITS, HOST_FATAL_ERR, regVal);\
+ rc = (rc == 1)?CC_TRUE:CC_FALSE;\
+}while(0)
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif
+
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_otp_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_otp_defs.h
new file mode 100644
index 0000000..dd3634a
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_otp_defs.h
@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_OTP_DEFS_H
+#define _CC_OTP_DEFS_H
+
+/*!
+@file
+@brief This file contains general OTP definitions and memory layout.
+*/
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/* NVM definitions */
+#define CC_OTP_BASE_ADDR 0x2000UL
+#define CC_OTP_START_OFFSET 0x00UL
+#define CC_OTP_LAST_OFFSET 0x7FFUL
+
+/* [0x00-0x07] Device root key (HUK) */
+#define CC_OTP_HUK_OFFSET 0x00UL
+#define CC_OTP_HUK_SIZE_IN_WORDS 8
+
+/* [0x08-0x0B] ICV provisioning secret (KPICV) */
+#define CC_OTP_KPICV_OFFSET 0x08UL
+#define CC_OTP_KPICV_SIZE_IN_WORDS 4
+
+/* [0x0C-0x0F] ICV Code encryption key (KCEICV) */
+#define CC_OTP_KCEICV_OFFSET 0x0CUL
+#define CC_OTP_KCEICV_SIZE_IN_WORDS 4
+
+/* [0x10] Manufacturer-programmed flags */
+#define CC_OTP_MANUFACTURE_FLAG_OFFSET 0x10UL
+
+/* [0x11-0x18] Root-of-Trust Public Key.
+* May be used in one of the following configurations:
+* - A single 256-bit SHA256 digest of the Secure Boot public key (HBK). :
+* - Two 128-bit truncated SHA256 digests of Secure Boot public keys 0 and 1 (HBK0, HBK1) */
+#define CC_OTP_HBK_OFFSET 0x11UL
+#define CC_OTP_HBK_SIZE_IN_WORDS 8
+#define CC_OTP_HBK0_OFFSET 0x11UL
+#define CC_OTP_HBK0_SIZE_IN_WORDS 4
+#define CC_OTP_HBK1_OFFSET 0x15UL
+#define CC_OTP_HBK1_SIZE_IN_WORDS 4
+
+/* [0x19-0x1C] OEM provisioning secret (Kcp) */
+#define CC_OTP_KCP_OFFSET 0x19UL
+#define CC_OTP_KCP_SIZE_IN_WORDS 4
+
+/* OEM Code encryption key (KCE) */
+#define CC_OTP_KCE_OFFSET 0x1DUL
+#define CC_OTP_KCE_SIZE_IN_WORDS 4
+
+/* OEM-programmed flags */
+#define CC_OTP_OEM_FLAG_OFFSET 0x21UL
+
+/* HBK Trusted Firmware minimum version (anti-rollback counter) */
+#define CC_OTP_HBK_MIN_VERSION_OFFSET 0x22UL
+#define CC_OTP_HBK_MIN_VERSION_SIZE_IN_WORDS 5
+
+/* HBK0 Trusted Firmware minimum version (anti-rollback counter) */
+#define CC_OTP_HBK0_MIN_VERSION_OFFSET 0x22UL
+#define CC_OTP_HBK0_MIN_VERSION_SIZE_IN_WORDS 2
+
+/* HBK1 Trusted Firmware minimum version (anti-rollback counter) */
+#define CC_OTP_HBK1_MIN_VERSION_OFFSET 0x24UL
+#define CC_OTP_HBK1_MIN_VERSION_SIZE_IN_WORDS 3
+
+/* General purpose configuration flags */
+#define CC_OTP_ICV_GENERAL_PURPOSE_FLAG_OFFSET 0x27UL
+#define CC_OTP_ICV_GENERAL_PURPOSE_FLAG_SIZE_IN_WORDS 1
+
+/* OTP DCU lock mask */
+#define CC_OTP_DCU_OFFSET 0x28UL
+#define CC_OTP_DCU_SIZE_IN_WORDS 4
+
+/* First stage secure boot loader code and data sections (optional) */
+#define CC_OTP_SB_LOADER_CODE_OFFSET 0x2CUL
+
+
+/* Manufacturer-programmed flags */
+
+/* [7:0] Number of "0" bits in HUK */
+#define CC_OTP_MANUFACTURE_FLAG_HUK_ZERO_BITS_BIT_SHIFT 0
+#define CC_OTP_MANUFACTURE_FLAG_HUK_ZERO_BITS_BIT_SIZE 8
+
+/* [14:8] Number of "0" bits in KPICV (128 bit) */
+#define CC_OTP_MANUFACTURE_FLAG_KPICV_ZERO_BITS_BIT_SHIFT 8
+#define CC_OTP_MANUFACTURE_FLAG_KPICV_ZERO_BITS_BIT_SIZE 7
+
+/* [15:15] KPICV "Not In Use" bit */
+#define CC_OTP_MANUFACTURE_FLAG_KPICV_NOT_IN_USE_BIT_SHIFT 15
+#define CC_OTP_MANUFACTURE_FLAG_KPICV_NOT_IN_USE_BIT_SIZE 1
+
+/* [22:16] Number of "0" bits in KCEICV */
+#define CC_OTP_MANUFACTURE_FLAG_KCEICV_ZERO_BITS_BIT_SHIFT 16
+#define CC_OTP_MANUFACTURE_FLAG_KCEICV_ZERO_BITS_BIT_SIZE 7
+
+/* [23:23] KCEICV "Not In Use" bit */
+#define CC_OTP_MANUFACTURE_FLAG_KCEICV_NOT_IN_USE_BIT_SHIFT 23
+#define CC_OTP_MANUFACTURE_FLAG_KCEICV_NOT_IN_USE_BIT_SIZE 1
+
+/* [30:24] Number of "0" bits in HBK0 (in case it is used as 4 words of the ICV) */
+#define CC_OTP_MANUFACTURE_FLAG_HBK0_ZERO_BITS_BIT_SHIFT 24
+#define CC_OTP_MANUFACTURE_FLAG_HBK0_ZERO_BITS_BIT_SIZE 7
+
+/* [31:31] HBK0 "Not In Use" bit */
+#define CC_OTP_MANUFACTURE_FLAG_HBK0_NOT_IN_USE_BIT_SHIFT 31
+#define CC_OTP_MANUFACTURE_FLAG_HBK0_NOT_IN_USE_BIT_SIZE 1
+
+
+/* OEM-programmed flags */
+
+/* [7:0] Number of "0" bits in HBK1/HBK (128/256 bits public key) */
+#define CC_OTP_OEM_FLAG_HBK_ZERO_BITS_BIT_SHIFT 0
+#define CC_OTP_OEM_FLAG_HBK_ZERO_BITS_BIT_SIZE 8
+#define CC_OTP_OEM_FLAG_HBK1_ZERO_BITS_BIT_SHIFT 0
+#define CC_OTP_OEM_FLAG_HBK1_ZERO_BITS_BIT_SIZE 8
+
+/* [14:8] Number of "0" bits in KCP (128 bit) */
+#define CC_OTP_OEM_FLAG_KCP_ZERO_BITS_BIT_SHIFT 8
+#define CC_OTP_OEM_FLAG_KCP_ZERO_BITS_BIT_SIZE 7
+
+/* [15:15] KCP "Not In Use" bit */
+#define CC_OTP_OEM_FLAG_KCP_NOT_IN_USE_BIT_SHIFT 15
+#define CC_OTP_OEM_FLAG_KCP_NOT_IN_USE_BIT_SIZE 1
+
+/* [22:16] Number of "0" bits in KCE */
+#define CC_OTP_OEM_FLAG_KCE_ZERO_BITS_BIT_SHIFT 16
+#define CC_OTP_OEM_FLAG_KCE_ZERO_BITS_BIT_SIZE 7
+
+/* [23:23] KCE "Not In Use" bit */
+#define CC_OTP_OEM_FLAG_KCE_NOT_IN_USE_BIT_SHIFT 23
+#define CC_OTP_OEM_FLAG_KCE_NOT_IN_USE_BIT_SIZE 1
+
+/* [29:24] Reserved */
+
+/* [30:30] OEM RMA mode flag */
+#define CC_OTP_OEM_FLAG_OEM_RMA_MODE_BIT_SHIFT 30
+#define CC_OTP_OEM_FLAG_OEM_RMA_MODE_BIT_SIZE 1
+
+/* [31:31] ICV RMA mode flag */
+#define CC_OTP_OEM_FLAG_ICV_RMA_MODE_BIT_SHIFT 31
+#define CC_OTP_OEM_FLAG_ICV_RMA_MODE_BIT_SIZE 1
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_pka_hw_plat_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_pka_hw_plat_defs.h
new file mode 100644
index 0000000..3285a40
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_pka_hw_plat_defs.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_pka_hw_plat_defs
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains the platform-dependent definitions of the CryptoCell PKA APIs.
+ */
+
+#ifndef _CC_PKA_HW_PLAT_DEFS_H
+#define _CC_PKA_HW_PLAT_DEFS_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_types.h"
+
+/*! The size of the PKA engine word. */
+#define CC_PKA_WORD_SIZE_IN_BITS 64
+/*! The maximal supported size of modulus in bits. */
+#define CC_SRP_MAX_MODULUS_SIZE_IN_BITS 3072
+/*! The maximal supported size of modulus in RSA in bits. */
+#define CC_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS 4096
+/*! The maximal supported size of key-generation in RSA in bits. */
+#define CC_RSA_MAX_KEY_GENERATION_HW_SIZE_BITS 3072
+/*! The maximal supported size of modulus in RSA in words. */
+#define CC_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_WORDS CC_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS / CC_BITS_IN_32BIT_WORD
+
+/*! The size of the RSA public modulus key of the Secure Boot or Secure Debug
+certificate in bits. */
+#define SB_CERT_RSA_KEY_SIZE_IN_BITS 3072UL
+/*! The size of the RSA public modulus key of the Secure Boot or Secure Debug
+certificate in bytes. */
+#define SB_CERT_RSA_KEY_SIZE_IN_BYTES (SB_CERT_RSA_KEY_SIZE_IN_BITS/CC_BITS_IN_BYTE)
+/*! The size of the RSA public modulus key of the Secure Boot or Secure Debug
+certificate in words. */
+#define SB_CERT_RSA_KEY_SIZE_IN_WORDS (SB_CERT_RSA_KEY_SIZE_IN_BITS/CC_BITS_IN_32BIT_WORD)
+
+/*! The maximal count of extra bits in PKA operations. */
+#define PKA_EXTRA_BITS 8
+/*! The number of memory registers in PKA operations. */
+#define PKA_MAX_COUNT_OF_PHYS_MEM_REGS 32
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif //_CC_PKA_HW_PLAT_DEFS_H
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_production_asset.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_production_asset.h
new file mode 100644
index 0000000..188e8da
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_production_asset.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_PROD_ASSET_H
+#define _CC_PROD_ASSET_H
+
+/*!
+@file
+@brief This file contains the functions and definitions for the OEM Asset provisioning.
+*/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+#include "cc_bitops.h"
+#include "cc_prod.h"
+
+#define PROD_ASSET_PROV_TOKEN 0x50726F64UL // "Prov"
+#define PROD_ASSET_PROV_VERSION 0x10000UL
+
+// parameters for generating the temporary key
+#define PROD_KEY_RTL_KEY_SIZE 16
+#define PROD_KEY_TMP_KEY_SIZE 16
+#define PROD_KEY_TMP_LABEL_SIZE 7
+#define PROD_ICV_KEY_TMP_LABEL "KEY ICV"
+#define PROD_OEM_KEY_TMP_LABEL "KEY OEM"
+#define PROD_KEY_TMP_CONTEXT_SIZE 16
+#define PROD_KEY_TMP_CONTEXT_WORD_SIZE (PROD_KEY_TMP_CONTEXT_SIZE/CC_32BIT_WORD_SIZE)
+
+// parameters for generating the provisioning key
+#define PROD_KPROV_KEY_SIZE 16
+#define PROD_KPROV_LABEL_SIZE 1
+#define PROD_LABEL "P"
+#define PROD_KPROV_CONTEXT_SIZE 4
+#define PROD_ICV_ENC_CONTEXT "EICV"
+#define PROD_ICV_PROV_CONTEXT "PICV"
+#define PROD_OEM_ENC_CONTEXT "Kce "
+#define PROD_OEM_PROV_CONTEXT "Kcp "
+
+// production asset patameters
+#define PROD_ASSET_NONCE_SIZE 12
+#define PROD_ASSET_TAG_SIZE 16
+#define PROD_ASSET_RESERVED1_VAL 0x52657631UL // Rev1
+#define PROD_ASSET_RESERVED2_VAL 0x52657632UL // Rev2
+#define PROD_ASSET_RESERVED_WORD_SIZE 2
+#define PROD_ASSET_RESERVED_SIZE (PROD_ASSET_RESERVED_WORD_SIZE*CC_32BIT_WORD_SIZE)
+#define PROD_ASSET_ADATA_SIZE (3*CC_32BIT_WORD_SIZE+PROD_ASSET_RESERVED_SIZE) // token||version||size||reserved
+
+typedef enum {
+ PROD_ASSET_ENTITY_TYPE_ICV = 1,
+ PROD_ASSET_ENTITY_TYPE_OEM = 2,
+ PROD_ASSET_ENTITY_TYPE_RESERVED = 0x7FFFFFFF,
+}CCProductionEntityType_t;
+
+typedef enum {
+ PROD_ASSET_TYPE_KCE = 1,
+ PROD_ASSET_TYPE_KCP = 2,
+ PROD_ASSET_TYPE_KEY_RESERVED = 0x7FFFFFFF,
+}CCProductionAssetKeyType_t;
+
+
+typedef struct {
+ uint32_t token;
+ uint32_t version;
+ uint32_t assetSize;
+ uint32_t reserved[PROD_ASSET_RESERVED_WORD_SIZE];
+ uint8_t nonce[PROD_ASSET_NONCE_SIZE];
+ uint8_t encAsset[PROD_ASSET_SIZE+PROD_ASSET_TAG_SIZE];
+}CCProdAssetPkg_t; // Total size must be PROD_ASSET_PKG_SIZE
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*_CC_PROD_ASSET_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_sec_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_sec_defs.h
new file mode 100644
index 0000000..bd731a4
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_sec_defs.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_SEC_DEFS_H
+#define _CC_SEC_DEFS_H
+
+/*!
+@file
+@brief This file contains general hash definitions and types.
+*/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*! The hashblock size in words. */
+#define HASH_BLOCK_SIZE_IN_WORDS 16
+
+/*! SHA256 result size in words. */
+#define HASH_RESULT_SIZE_IN_WORDS 8
+/*! SHA256 result size in Bytes. */
+#define HASH_RESULT_SIZE_IN_BYTES 32
+
+/*! Defines the hash result array. */
+typedef uint32_t CCHashResult_t[HASH_RESULT_SIZE_IN_WORDS];
+
+/*! Definition for converting pointer to address. */
+#define CONVERT_TO_ADDR(ptr) (unsigned long)ptr
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_sram_map.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_sram_map.h
new file mode 100644
index 0000000..74f8adf
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_sram_map.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*!
+ @addtogroup cc_sram_map
+ @{
+ */
+
+/*!
+ @file
+ @brief This file contains internal SRAM mapping definitions.
+ */
+
+#ifndef _CC_SRAM_MAP_H_
+#define _CC_SRAM_MAP_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*! The base address of the PKA in the PKA SRAM. */
+#define CC_SRAM_PKA_BASE_ADDRESS 0x0
+/*! The size of the PKA SRAM in KB. */
+#define CC_PKA_SRAM_SIZE_IN_KBYTES 6
+
+/*! The SRAM address of the RND. */
+#define CC_SRAM_RND_HW_DMA_ADDRESS 0x0
+/*! Addresses 0K-2KB in SRAM. Reserved for RND operations. */
+#define CC_SRAM_RND_MAX_SIZE 0x800
+/*! The maximal size of SRAM. */
+#define CC_SRAM_MAX_SIZE 0x1000
+
+#ifdef __cplusplus
+}
+#endif
+
+/*!
+ @}
+ */
+#endif /*_CC_SRAM_MAP_H_*/
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_util_apbc.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_util_apbc.h
new file mode 100644
index 0000000..1a11204
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_util_apbc.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_UTIL_APBC_H_
+#define _CC_UTIL_APBC_H_
+
+/*!
+@file
+@defgroup cc_apbc_defs CryptoCell APBC macros
+@brief This file contains APBC definitions.
+@{
+@ingroup cryptocell_api
+
+*/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_apbc.h"
+
+/*! Get APBC Access counter. Return number of active APBC accesses operations */
+#define CC_APBC_CNTR_GET CC_PalApbcCntrValue()
+
+/*! Increment APBC access counter. */
+#define CC_APBC_ACCESS_INC CC_PalApbcModeSelect(CC_TRUE)
+
+/*! Decrement APBC access counter. */
+#define CC_APBC_ACCESS_DEC CC_PalApbcModeSelect(CC_FALSE)
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif /*_CC_UTIL_APBC_H_*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_util_pm.h b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_util_pm.h
new file mode 100644
index 0000000..a5f1408
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/proj/cc3x/cc_util_pm.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+
+#ifndef _CC_PM_DEFS_H_
+#define _CC_PM_DEFS_H_
+
+/*!
+@file
+@defgroup cc_pm_defs CryptoCell power management macroes
+@brief This file contains power management definitions.
+@{
+@ingroup cryptocell_api
+
+*/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "cc_pal_pm.h"
+
+/*! Get ARM Cerberus status. Return number of active registered CC operations */
+#define CC_STATUS_GET CC_PalPowerSaveModeStatus()
+
+/*! Notify ARM Cerberus is active. */
+#define CC_IS_WAKE CC_PalPowerSaveModeSelect(CC_FALSE)
+
+/*! Notify ARM Cerberus is idle. */
+#define CC_IS_IDLE CC_PalPowerSaveModeSelect(CC_TRUE)
+
+
+#ifdef __cplusplus
+}
+#endif
+/**
+@}
+ */
+#endif /*_CC_PM_DEFS_H_*/
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/sbrom/cc_asset_prov.h b/lib/ext/cryptocell-312-runtime/shared/include/sbrom/cc_asset_prov.h
new file mode 100644
index 0000000..28c0f8a
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/sbrom/cc_asset_prov.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_ASSET_PROV_H
+#define _CC_ASSET_PROV_H
+
+/*!
+@file
+@brief This file contains the functions and definitions for the OEM Asset provisioning.
+*/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+#include "cc_bitops.h"
+
+#define ASSET_PROV_TOKEN 0x41736574UL
+#define ASSET_PROV_VERSION 0x10000UL
+
+#define KPICV_KEY_SIZE 16
+#define KPROV_KEY_SIZE 16
+#define KPROV_DATA_IN_SIZE 8
+#define ASSET_NONCE_SIZE 12
+#define ASSET_RESERVED_SIZE 8
+#define ASSET_RESERVED_WORD_SIZE (8/CC_32BIT_WORD_SIZE)
+#define ASSET_TAG_SIZE 16
+#define ASSET_BLOCK_SIZE 16
+#define MAX_ASSET_SIZE 512
+#define ASSET_ADATA_SIZE (3*CC_32BIT_WORD_SIZE+ASSET_RESERVED_SIZE) // token||version||assetId||reserved
+
+typedef struct {
+ uint32_t token;
+ uint32_t version;
+ uint32_t assetSize;
+ uint32_t reserved[ASSET_RESERVED_WORD_SIZE];
+ uint8_t nonce[ASSET_NONCE_SIZE];
+ uint8_t encAsset[MAX_ASSET_SIZE+ASSET_TAG_SIZE];
+}CCBsvAssetProv_t;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*_CC_ASSET_PROV_H */
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/sbrom/cc_crypto_x509_common_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/sbrom/cc_crypto_x509_common_defs.h
new file mode 100644
index 0000000..7111cb9
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/sbrom/cc_crypto_x509_common_defs.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_CRYPTO_X509_COMMON_DEFS_H
+#define _CC_CRYPTO_X509_COMMON_DEFS_H
+
+/*!
+@file
+@brief This file contains definitions used in the X509 certificates.
+*/
+
+/*! MAX size of issuer name string. */
+#define X509_ISSUER_NAME_MAX_STRING_SIZE 64
+/*! MAX size of subject name string. */
+#define X509_SUBJECT_NAME_MAX_STRING_SIZE 64
+/*! MAX size of validity period string. */
+#define X509_VALIDITY_PERIOD_MAX_STRING_SIZE 16
+/*! MAX size of a single user's data buffer */
+#define X509_USER_DATA_MAX_SIZE_BYTES 64
+
+
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/sbrom/cc_crypto_x509_defs.h b/lib/ext/cryptocell-312-runtime/shared/include/sbrom/cc_crypto_x509_defs.h
new file mode 100644
index 0000000..9d91423
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/sbrom/cc_crypto_x509_defs.h
@@ -0,0 +1,118 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_CRYPTO_X509_DEFS_H
+#define _CC_CRYPTO_X509_DEFS_H
+
+#include "stdint.h"
+
+#define CERTIFICATE_VALIDITY_ENDLESS 0
+#define CC_X509_CERT_PKG_TOKEN 0x43504B47
+#define CC_X509_CERT_PKG_VERSION 0x01000000
+#define CC_X509_MAX_CERT_SIZE 0xFFFF
+
+/* CC object Id's */
+/* all object ID's under CC category */
+#define CC_X509_OBJ_ID_DX 0x2
+/* enable user category */
+#define CC_X509_OBJ_ID_ANY 0x14
+/* MAX NONCE size */
+#define CC_X509_MAX_NONCE_SIZE_BYTES 8
+
+
+#define CC_X509_CERT_ISSUER_NAME "ARM"
+#define CC_X509_CERT_KEY_CERT "KeyCert"
+#define CC_X509_CERT_CNT_CERT "CntCert"
+#define CC_X509_CERT_ENABLER_CERT "EnablerDbg"
+#define CC_X509_CERT_DEVELOPER_CERT "DeveloperDbg"
+
+/* certificate type category */
+typedef enum {
+ CC_X509_CERT_TYPE_MIN = 0x0,
+ CC_X509_CERT_TYPE_KEY = 0x1, /* 0x1 */
+ CC_X509_CERT_TYPE_CONTENT, /* 0x2 */
+ CC_X509_CERT_TYPE_ENABLER_DBG, /* 0x3 */
+ CC_X509_CERT_TYPE_DEVELOPER_DBG, /* 0x4 */
+ CC_X509_CERT_TYPE_MAX,
+ CC_X509_CERT_TYPE_RESERVED = 0xFF
+}CCX509CertType_t;
+
+
+/* certificate type category */
+typedef enum {
+ CC_X509_PKG_TYPE_MIN = 0x0,
+ CC_X509_PKG_TYPE_KEY = 0x1, /* 0x1 */
+ CC_X509_PKG_TYPE_CONTENT, /* 0x2 */
+ CC_X509_PKG_TYPE_ENABLER_DBG, /* 0x3 */
+ CC_X509_PKG_TYPE_DEVELOPER_DBG, /* 0x4 */
+ CC_X509_PKG_TYPE_MAX,
+ CC_X509_PKG_TYPE_RESERVED = 0xFF
+}CCX509PkgType_t;
+
+#ifdef CC_SB_SUPPORT_IOT
+/* specific certificate extension category */
+typedef enum {
+ CC_X509_ID_EXT_NONE = 0,
+ CC_X509_ID_EXT_PROPRIETARY_HEADER,
+ CC_X509_ID_EXT_PUB_KEY_NP,
+ CC_X509_ID_EXT_KEY_CERT_MAIN_VAL,
+ CC_X509_ID_EXT_CONTENT_CERT_MAIN_VAL,
+ CC_X509_ID_EXT_ENABLER_CERT_MAIN_VAL,
+ CC_X509_ID_EXT_DEVELOPER_CERT_MAIN_VAL,
+ CC_X509_ID_EXT_MAX,
+ CC_X509_ID_EXT_RESERVED = 0xFF
+}CCX509ExtType_t;
+
+#define CC3X_X509_CERT_EXT_NUMBER 3
+#else
+/* specific certificate extension category */
+typedef enum {
+ CC_X509_ID_EXT_NONE = 0, /*0x0 */
+ CC_X509_ID_EXT_NV_COUNTER_ID = 0x1, /*0x1 */
+ CC_X509_ID_EXT_NV_COUNTER_VAL, /*0x2 */
+ CC_X509_ID_EXT_PUB_KEY_NP, /*0x3 */
+ CC_X509_ID_EXT_PUB_KEY_HASH, /*0x4 */
+ CC_X509_ID_EXT_NUM_OF_SW_IMAGES, /*0x5 */
+ CC_X509_ID_EXT_SW_IMAGE_NONCE, /*0x6 */
+ CC_X509_ID_EXT_SW_IMAGE_INFO, /*0x7 */
+ CC_X509_ID_EXT_SOC_SPECIFIC, /*0x8 */
+ CC_X509_ID_EXT_SOC_ID, /*0x9 */
+ CC_X509_ID_EXT_VALID_LCS, /*0xA */
+ CC_X509_ID_EXT_RMA_MODE, /*0xB */
+#ifdef CC_SB_CERT_USER_DATA_EXT
+ CC_X509_ID_EXT_USER_DATA, /*0xC */
+#endif
+ CC_X509_ID_EXT_MAX,
+ CC_X509_ID_EXT_RESERVED = 0xFF
+}CCX509ExtType_t;
+#endif
+
+typedef union {
+ struct {
+ uint32_t certOffset:16;
+ uint32_t certSize:16;
+ }certInfoBits;
+ uint32_t certInfoWord;
+}CCX509CertInfo_t;
+
+typedef union {
+ struct {
+ uint32_t certType:8;
+ uint32_t imageEnc:8;
+ uint32_t hbkType:8;
+ uint32_t reserved:8;
+ }pkgFlagsBits;
+ uint32_t pkgFlagsWord;
+}CCX509PkgFlag_t;
+
+typedef struct {
+ uint32_t pkgToken;
+ uint32_t pkgVer;
+ CCX509PkgFlag_t pkgFlags;
+ CCX509CertInfo_t certInfo;
+}CCX509PkgHeader_t;
+
+#endif
diff --git a/lib/ext/cryptocell-312-runtime/shared/include/trng/cc_config_trng90b.h b/lib/ext/cryptocell-312-runtime/shared/include/trng/cc_config_trng90b.h
new file mode 100644
index 0000000..aae1771
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/include/trng/cc_config_trng90b.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CC_CONFIG_TRNG90B_H
+#define _CC_CONFIG_TRNG90B_H
+
+/*
+This file should be updated according to the characterization process.
+*/
+
+/*** For Startup Tests ***/
+// amount of bytes for the startup test = 528 (at least 4096 bits (NIST SP 800-90B (2nd Draft) 4.3.12) = 22 EHRs = 4224 bits)
+#define CC_CONFIG_TRNG90B_AMOUNT_OF_BYTES_STARTUP 528
+
+
+
+#endif // _CC_CONFIG_TRNG90B_H
diff --git a/lib/ext/cryptocell-312-runtime/shared/src/proj/cc3x/cc_ecpki_info.c b/lib/ext/cryptocell-312-runtime/shared/src/proj/cc3x/cc_ecpki_info.c
new file mode 100644
index 0000000..3a2ed13
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/src/proj/cc3x/cc_ecpki_info.c
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/* this file contains the definitions of the hashes used in the ecpki */
+
+#include "cc_ecpki_local.h"
+#include "cc_hash_defs.h"
+#include "cc_ecpki_types.h"
+#include "cc_ecpki_domains_defs.h"
+#include "cc_ecpki_domain_secp192r1.h"
+#include "cc_ecpki_domain_secp224r1.h"
+#include "cc_ecpki_domain_secp256r1.h"
+#include "cc_ecpki_domain_secp521r1.h"
+#include "cc_ecpki_domain_secp192k1.h"
+#include "cc_ecpki_domain_secp224k1.h"
+#include "cc_ecpki_domain_secp256k1.h"
+#include "cc_ecpki_domain_secp384r1.h"
+
+const CCEcpkiHash_t ecpki_hash_info[CC_ECPKI_HASH_NumOfModes] = {
+ /*CC_ECPKI_HASH_SHA1_mode */ {CC_HASH_SHA1_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA1_mode},
+ /*CC_ECPKI_HASH_SHA224_mode */ {CC_HASH_SHA224_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA224_mode},
+ /*CC_ECPKI_HASH_SHA256_mode */ {CC_HASH_SHA256_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA256_mode},
+ /*CC_ECPKI_HASH_SHA384_mode */ {CC_HASH_SHA384_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA384_mode},
+ /*CC_ECPKI_HASH_SHA512_mode */ {CC_HASH_SHA512_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA512_mode},
+ /*CC_ECPKI_AFTER_HASH_SHA1_mode */ {CC_HASH_SHA1_DIGEST_SIZE_IN_WORDS, CC_HASH_NumOfModes},
+ /*CC_ECPKI_AFTER_HASH_SHA224_mode */ {CC_HASH_SHA224_DIGEST_SIZE_IN_WORDS, CC_HASH_NumOfModes},
+ /*CC_ECPKI_AFTER_HASH_SHA256_mode */ {CC_HASH_SHA256_DIGEST_SIZE_IN_WORDS, CC_HASH_NumOfModes},
+ /*CC_ECPKI_AFTER_HASH_SHA384_mode */ {CC_HASH_SHA384_DIGEST_SIZE_IN_WORDS, CC_HASH_NumOfModes},
+ /*CC_ECPKI_AFTER_HASH_SHA512_mode */ {CC_HASH_SHA512_DIGEST_SIZE_IN_WORDS, CC_HASH_NumOfModes},
+};
+
+const uint8_t ecpki_supported_hash_modes[CC_ECPKI_HASH_NumOfModes] = {
+ /*CC_ECPKI_HASH_SHA1_mode */ CC_TRUE,
+ /*CC_ECPKI_HASH_SHA224_mode */ CC_TRUE,
+ /*CC_ECPKI_HASH_SHA256_mode */ CC_TRUE,
+ /*CC_ECPKI_HASH_SHA384_mode */ CC_FALSE,
+ /*CC_ECPKI_HASH_SHA512_mode */ CC_TRUE,
+ /*CC_ECPKI_AFTER_HASH_SHA1_mode */ CC_TRUE,
+ /*CC_ECPKI_AFTER_HASH_SHA224_mode */ CC_TRUE,
+ /*CC_ECPKI_AFTER_HASH_SHA256_mode */ CC_TRUE,
+ /*CC_ECPKI_AFTER_HASH_SHA384_mode */ CC_TRUE,
+ /*CC_ECPKI_AFTER_HASH_SHA512_mode */ CC_TRUE
+};
+
+
+const getDomainFuncP ecDomainsFuncP[CC_ECPKI_DomainID_OffMode] = {
+ (&CC_EcpkiGetSecp192k1DomainP),
+ (&CC_EcpkiGetSecp192r1DomainP),
+ (&CC_EcpkiGetSecp224k1DomainP),
+ (&CC_EcpkiGetSecp224r1DomainP),
+ (&CC_EcpkiGetSecp256k1DomainP),
+ (&CC_EcpkiGetSecp256r1DomainP),
+ (&CC_EcpkiGetSecp384r1DomainP),
+ (&CC_EcpkiGetSecp521r1DomainP)
+};
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/src/proj/cc3x/cc_hash_info.c b/lib/ext/cryptocell-312-runtime/shared/src/proj/cc3x/cc_hash_info.c
new file mode 100644
index 0000000..d63439d
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/src/proj/cc3x/cc_hash_info.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/* this file contains the definitions of the hashes used in the rsa */
+
+#include "cc_hash_defs.h"
+#include "cc_general_defs.h"
+
+const HmacHash_t HmacHashInfo_t[CC_HASH_NumOfModes] = {
+ /*CC_HASH_SHA1_mode */ {CC_HASH_SHA1_DIGEST_SIZE_IN_BYTES, CC_HASH_SHA1_mode},
+ /*CC_HASH_SHA224_mode */ {CC_HASH_SHA224_DIGEST_SIZE_IN_BYTES, CC_HASH_SHA224_mode},
+ /*CC_HASH_SHA256_mode */ {CC_HASH_SHA256_DIGEST_SIZE_IN_BYTES, CC_HASH_SHA256_mode},
+ /*CC_HASH_SHA384_mode */ {CC_HASH_SHA384_DIGEST_SIZE_IN_BYTES, CC_HASH_SHA384_mode},
+ /*CC_HASH_SHA512_mode */ {CC_HASH_SHA512_DIGEST_SIZE_IN_BYTES, CC_HASH_SHA512_mode},
+ /*CC_HASH_MD5_mode */ {CC_HASH_MD5_DIGEST_SIZE_IN_BYTES, CC_HASH_MD5_mode},
+};
+
+const uint8_t HmacSupportedHashModes_t[CC_HASH_NumOfModes] = {
+ /*CC_HASH_SHA1_mode */ CC_TRUE,
+ /*CC_HASH_SHA224_mode */ CC_TRUE,
+ /*CC_HASH_SHA256_mode */ CC_TRUE,
+ /*CC_HASH_SHA384_mode */ CC_TRUE,
+ /*CC_HASH_SHA512_mode */ CC_TRUE,
+ /*CC_HASH_MD5_mode */ CC_FALSE,
+};
+
+const char HashAlgMode2mbedtlsString[CC_HASH_NumOfModes][CC_HASH_NAME_MAX_SIZE] = {
+ "SHA1",
+ "SHA224",
+ "SHA256",
+ "SHA384",
+ "SHA512",
+ "MD5"
+};
+
diff --git a/lib/ext/cryptocell-312-runtime/shared/src/proj/cc3x/cc_rsa_info.c b/lib/ext/cryptocell-312-runtime/shared/src/proj/cc3x/cc_rsa_info.c
new file mode 100644
index 0000000..7248421
--- /dev/null
+++ b/lib/ext/cryptocell-312-runtime/shared/src/proj/cc3x/cc_rsa_info.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/* this file contains the definitions of the hashes used in the rsa */
+#ifdef CC_IOT
+ #if defined(MBEDTLS_CONFIG_FILE)
+ #include MBEDTLS_CONFIG_FILE
+ #endif
+#endif
+
+#if !defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C))
+
+#include "cc_rsa_local.h"
+#include "cc_hash_defs.h"
+#include "cc_rsa_types.h"
+
+const RsaHash_t RsaHashInfo_t[CC_RSA_HASH_NumOfModes] = {
+ /*CC_RSA_HASH_MD5_mode */ {CC_HASH_MD5_DIGEST_SIZE_IN_WORDS, CC_HASH_MD5_mode},
+ /*CC_RSA_HASH_SHA1_mode */ {CC_HASH_SHA1_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA1_mode},
+ /*CC_RSA_HASH_SHA224_mode */ {CC_HASH_SHA224_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA224_mode},
+ /*CC_RSA_HASH_SHA256_mode */ {CC_HASH_SHA256_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA256_mode},
+ /*CC_RSA_HASH_SHA384_mode */ {CC_HASH_SHA384_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA384_mode},
+ /*CC_RSA_HASH_SHA512_mode */ {CC_HASH_SHA512_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA512_mode},
+ /*CC_RSA_After_MD5_mode */ {CC_HASH_MD5_DIGEST_SIZE_IN_WORDS, CC_HASH_MD5_mode},
+ /*CC_RSA_After_SHA1_mode */ {CC_HASH_SHA1_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA1_mode},
+ /*CC_RSA_After_SHA224_mode */ {CC_HASH_SHA224_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA224_mode},
+ /*CC_RSA_After_SHA256_mode */ {CC_HASH_SHA256_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA256_mode},
+ /*CC_RSA_After_SHA384_mode */ {CC_HASH_SHA384_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA384_mode},
+ /*CC_RSA_After_SHA512_mode */ {CC_HASH_SHA512_DIGEST_SIZE_IN_WORDS, CC_HASH_SHA512_mode},
+ /*CC_RSA_After_HASH_NOT_KNOWN_mode */ {0,CC_HASH_NumOfModes},
+ /*CC_RSA_HASH_NO_HASH_mode */ {0,CC_HASH_NumOfModes},
+};
+
+#ifdef USE_MBEDTLS_CRYPTOCELL
+const mbedtls_md_type_t RsaHash_CC_mbedtls_Info[CC_HASH_NumOfModes] = {
+ /* CC_HASH_SHA1_mode */ MBEDTLS_MD_SHA1,
+ /* CC_HASH_SHA224_mode */ MBEDTLS_MD_SHA224,
+ /* CC_HASH_SHA256_mode */ MBEDTLS_MD_SHA256,
+ /* CC_HASH_SHA384_mode */ MBEDTLS_MD_SHA384,
+ /* CC_HASH_SHA512_mode */ MBEDTLS_MD_SHA512,
+ /* CC_HASH_MD5_mode */ MBEDTLS_MD_MD5
+};
+#endif
+const uint8_t RsaSupportedHashModes_t[CC_RSA_HASH_NumOfModes] = {
+
+ /*CC_RSA_HASH_MD5_mode */ CC_FALSE,
+ /*CC_RSA_HASH_SHA1_mode */ CC_TRUE,
+ /*CC_RSA_HASH_SHA224_mode */ CC_TRUE,
+ /*CC_RSA_HASH_SHA256_mode */ CC_TRUE,
+ /*CC_RSA_HASH_SHA384_mode */ CC_TRUE,
+ /*CC_RSA_HASH_SHA512_mode */ CC_TRUE,
+ /*CC_RSA_After_MD5_mode */ CC_FALSE,
+ /*CC_RSA_After_SHA1_mode */ CC_TRUE,
+ /*CC_RSA_After_SHA224_mode */ CC_TRUE,
+ /*CC_RSA_After_SHA256_mode */ CC_TRUE,
+ /*CC_RSA_After_SHA384_mode */ CC_TRUE,
+ /*CC_RSA_After_SHA512_mode */ CC_TRUE,
+ /*CC_RSA_After_HASH_NOT_KNOWN_mode */ CC_FALSE,
+ /*CC_RSA_HASH_NO_HASH_mode */ CC_FALSE,
+};
+
+#endif /* defined(CC_IOT) || ( defined(CC_IOT) && defined(MBEDTLS_RSA_C)) */