Build: Improve NS mailbox config flag setting
Support a flag TFM_MULTI_CORE_NS_OS to control NS integration.
When integrating TF-M with NS OS on dual-cpu platforms, select
TFM_MULTI_CORE_NS_OS in NS build to enable NS OS support in NS
mailbox.
When integrating TF-M with NS bare metal environment, disable
TFM_MULTI_CORE_NS_OS and NS mailbox relies on looping and requires
no support from NS OS.
TFM_MULTI_CORE_MULTI_CLIENT_CALL is removed.
NS mailbox build can get rid of the dependency on the configuration
of TFM_MULTI_CORE_MULTI_CLIENT_CALL in S mailbox build.
NUM_MAILBOX_QUEUE_SLOT directly indicates whether platform and SPE
supports multiple NS PSA Client calls.
Change-Id: I937b2afdb88cccc22a20617d2ab36bcc1b939b05
Signed-off-by: David Hu <david.hu@arm.com>
diff --git a/config/check_config.cmake b/config/check_config.cmake
index 395f4a5..470898a 100644
--- a/config/check_config.cmake
+++ b/config/check_config.cmake
@@ -28,8 +28,6 @@
tfm_invalid_config(TFM_ISOLATION_LEVEL GREATER 1 AND NOT TFM_PSA_API)
tfm_invalid_config(TFM_MULTI_CORE_TOPOLOGY AND NOT TFM_PSA_API)
-tfm_invalid_config(TFM_MULTI_CORE_MULTI_CLIENT_CALL AND NOT TFM_MULTI_CORE_TOPOLOGY)
-tfm_invalid_config(NUM_MAILBOX_QUEUE_SLOT GREATER 1 AND NOT TFM_MULTI_CORE_MULTI_CLIENT_CALL)
tfm_invalid_config(TEST_S AND TEST_PSA_API)
tfm_invalid_config(TEST_NS AND TEST_PSA_API)
diff --git a/config/config_default.cmake b/config/config_default.cmake
index 4438def..1e43dd2 100644
--- a/config/config_default.cmake
+++ b/config/config_default.cmake
@@ -70,7 +70,6 @@
############################ Platform ##########################################
set(TFM_MULTI_CORE_TOPOLOGY OFF CACHE BOOL "Whether to build for a dual-cpu architecture")
-set(TFM_MULTI_CORE_MULTI_CLIENT_CALL OFF CACHE BOOL "Whether to enable multiple PSA client calls feature")
set(NUM_MAILBOX_QUEUE_SLOT 1 CACHE BOOL "Number of mailbox queue slots")
set(DEBUG_AUTHENTICATION CHIP_DEFAULT CACHE STRING "Debug authentication setting. [CHIP_DEFAULT, NONE, NS_ONLY, FULL")
diff --git a/interface/CMakeLists.txt b/interface/CMakeLists.txt
index 188e651..16e6504 100644
--- a/interface/CMakeLists.txt
+++ b/interface/CMakeLists.txt
@@ -47,7 +47,6 @@
$<$<BOOL:${CONFIG_TFM_ENABLE_CTX_MGMT}>:CONFIG_TFM_ENABLE_CTX_MGMT>
$<$<BOOL:${TFM_ISOLATION_LEVEL}>:TFM_LVL=${TFM_ISOLATION_LEVEL}>
$<$<BOOL:${TFM_MULTI_CORE_TOPOLOGY}>:TFM_MULTI_CORE_TOPOLOGY>
- $<$<BOOL:${TFM_MULTI_CORE_MULTI_CLIENT_CALL}>:TFM_MULTI_CORE_MULTI_CLIENT_CALL>
$<$<BOOL:${FORWARD_PROT_MSG}>:FORWARD_PROT_MSG=${FORWARD_PROT_MSG}>
$<$<BOOL:${TFM_SP_META_PTR_ENABLE}>:TFM_SP_META_PTR_ENABLE>
)
diff --git a/interface/include/multi_core/tfm_ns_mailbox.h b/interface/include/multi_core/tfm_ns_mailbox.h
index 6b64443..69d0b29 100644
--- a/interface/include/multi_core/tfm_ns_mailbox.h
+++ b/interface/include/multi_core/tfm_ns_mailbox.h
@@ -18,6 +18,10 @@
extern "C" {
#endif
+#if !defined(TFM_MULTI_CORE_NS_OS) && (NUM_MAILBOX_QUEUE_SLOT > 1)
+#error "NUM_MAILBOX_QUEUE_SLOT should be set to 1 for NS bare metal environment"
+#endif
+
#ifdef TFM_MULTI_CORE_TEST
/**
* \brief The structure to hold the statistics result of NSPE mailbox
@@ -64,6 +68,7 @@
int32_t client_id,
int32_t *reply);
+#ifdef TFM_MULTI_CORE_NS_OS
/**
* \brief Go through mailbox messages already replied by SPE mailbox and
* wake up the owner tasks of replied mailbox messages.
@@ -76,6 +81,12 @@
* \return Other return code Failed with an error code
*/
int32_t tfm_ns_mailbox_wake_reply_owner_isr(void);
+#else
+static inline int32_t tfm_ns_mailbox_wake_reply_owner_isr(void)
+{
+ return MAILBOX_NO_PEND_EVENT;
+}
+#endif
/**
* \brief Platform specific NSPE mailbox initialization.
@@ -127,22 +138,7 @@
*/
void tfm_ns_mailbox_hal_exit_critical_isr(void);
-#ifdef FORWARD_PROT_MSG
-static inline int32_t tfm_ns_mailbox_os_lock_init(void)
-{
- return MAILBOX_SUCCESS;
-}
-
-static inline uint32_t tfm_ns_mailbox_os_lock_acquire(void)
-{
- return MAILBOX_SUCCESS;
-}
-
-static inline uint32_t tfm_ns_mailbox_os_lock_release(void)
-{
- return MAILBOX_SUCCESS;
-}
-#else /* FORWARD_PROT_MSG */
+#ifdef TFM_MULTI_CORE_NS_OS
/**
* \brief Initialize the multi-core lock for synchronizing PSA client call(s)
* The actual implementation depends on the non-secure use scenario.
@@ -169,9 +165,7 @@
* \return \ref MAILBOX_GENERIC_ERROR on error
*/
int32_t tfm_ns_mailbox_os_lock_release(void);
-#endif /* FORWARD_PROT_MSG */
-#ifdef TFM_MULTI_CORE_MULTI_CLIENT_CALL
/**
* \brief Get the handle of the current non-secure task executing mailbox
* functionalities
@@ -208,16 +202,31 @@
* \param[in] task_handle The handle to the task to be woken up.
*/
void tfm_ns_mailbox_os_wake_task_isr(const void *task_handle);
-#else /* TFM_MULTI_CORE_MULTI_CLIENT_CALL */
+#else /* TFM_MULTI_CORE_NS_OS */
#define tfm_ns_mailbox_os_wait_reply() do {} while (0)
+#define tfm_ns_mailbox_os_wake_task_isr(task) do {} while (0)
+
+static inline int32_t tfm_ns_mailbox_os_lock_init(void)
+{
+ return MAILBOX_SUCCESS;
+}
+
+static inline int32_t tfm_ns_mailbox_os_lock_acquire(void)
+{
+ return MAILBOX_SUCCESS;
+}
+
+static inline int32_t tfm_ns_mailbox_os_lock_release(void)
+{
+ return MAILBOX_SUCCESS;
+}
+
static inline const void *tfm_ns_mailbox_os_get_task_handle(void)
{
return NULL;
}
-
-#define tfm_ns_mailbox_os_wake_task_isr(task) do {} while (0)
-#endif /* TFM_MULTI_CORE_MULTI_CLIENT_CALL */
+#endif /* TFM_MULTI_CORE_NS_OS */
#ifdef TFM_MULTI_CORE_TEST
/**
diff --git a/interface/src/multi_core/tfm_ns_mailbox.c b/interface/src/multi_core/tfm_ns_mailbox.c
index 2096b6e..90836ff 100644
--- a/interface/src/multi_core/tfm_ns_mailbox.c
+++ b/interface/src/multi_core/tfm_ns_mailbox.c
@@ -80,7 +80,7 @@
}
}
-#ifdef TFM_MULTI_CORE_MULTI_CLIENT_CALL
+#ifdef TFM_MULTI_CORE_NS_OS
/*
* When NSPE mailbox only covers a single non-secure core, spinlock only
* requires to disable IRQ.
@@ -98,15 +98,15 @@
{
__enable_irq();
}
-#else /* TFM_MULTI_CORE_MULTI_CLIENT_CALL */
+#else /* TFM_MULTI_CORE_NS_OS */
/*
- * Local spinlock is implemented as a dummy one when multiple PSA client call
- * feature is disabled, since interrupt is not required in NS mailbox.
+ * Local spinlock is implemented as a dummy one when integrating with NS bare
+ * metal environment since interrupt is not required in NS mailbox.
*/
#define ns_mailbox_spin_lock() do {} while (0)
#define ns_mailbox_spin_unlock() do {} while (0)
-#endif /* TFM_MULTI_CORE_MULTI_CLIENT_CALL */
+#endif /* TFM_MULTI_CORE_NS_OS */
static uint8_t acquire_empty_slot(struct ns_mailbox_queue_t *queue)
{
@@ -303,7 +303,7 @@
return ret;
}
-#ifdef TFM_MULTI_CORE_MULTI_CLIENT_CALL
+#ifdef TFM_MULTI_CORE_NS_OS
int32_t tfm_ns_mailbox_wake_reply_owner_isr(void)
{
uint8_t idx;
@@ -362,7 +362,7 @@
return is_set;
}
-#else /* TFM_MULTI_CORE_MULTI_CLIENT_CALL */
+#else /* TFM_MULTI_CORE_NS_OS */
static inline bool mailbox_wait_reply_signal(uint8_t idx)
{
bool is_set = false;
@@ -378,7 +378,7 @@
return is_set;
}
-#endif /* TFM_MULTI_CORE_MULTI_CLIENT_CALL */
+#endif /* TFM_MULTI_CORE_NS_OS */
static int32_t mailbox_wait_reply(uint8_t idx)
{
diff --git a/interface/src/multi_core/tfm_ns_mailbox_rtos_api.c b/interface/src/multi_core/tfm_ns_mailbox_rtos_api.c
index f7d23d2..1ac1b4f 100644
--- a/interface/src/multi_core/tfm_ns_mailbox_rtos_api.c
+++ b/interface/src/multi_core/tfm_ns_mailbox_rtos_api.c
@@ -28,7 +28,6 @@
static void *ns_lock_handle = NULL;
-#ifdef TFM_MULTI_CORE_MULTI_CLIENT_CALL
const void *tfm_ns_mailbox_os_get_task_handle(void)
{
return os_wrapper_thread_get_handle();
@@ -43,7 +42,6 @@
{
os_wrapper_thread_set_flag_isr((void *)task_handle, MAILBOX_THREAD_FLAG);
}
-#endif /* TFM_MULTI_CORE_MULTI_CLIENT_CALL */
int32_t tfm_ns_mailbox_os_lock_init(void)
{
diff --git a/platform/CMakeLists.txt b/platform/CMakeLists.txt
index 5e493b1..93f5068 100755
--- a/platform/CMakeLists.txt
+++ b/platform/CMakeLists.txt
@@ -1,5 +1,5 @@
#-------------------------------------------------------------------------------
-# Copyright (c) 2020, Arm Limited. All rights reserved.
+# Copyright (c) 2020-2021, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -96,7 +96,6 @@
PRIVATE
$<$<BOOL:${TFM_IRQ_TEST}>:TFM_ENABLE_IRQ_TEST>
$<$<BOOL:${TFM_PERIPH_ACCESS_TEST}>:TFM_ENABLE_PERIPH_ACCESS_TEST>
- $<$<BOOL:${TFM_MULTI_CORE_MULTI_CLIENT_CALL}>:TFM_MULTI_CORE_MULTI_CLIENT_CALL>
)
#========================= Platform BL2 =======================================#
diff --git a/platform/ext/target/cypress/psoc64/CMakeLists.txt b/platform/ext/target/cypress/psoc64/CMakeLists.txt
index 75510db..d97d682 100644
--- a/platform/ext/target/cypress/psoc64/CMakeLists.txt
+++ b/platform/ext/target/cypress/psoc64/CMakeLists.txt
@@ -198,7 +198,6 @@
target_compile_definitions(platform_ns
PUBLIC
- TFM_MULTI_CORE_MULTI_CLIENT_CALL
RTE_USART5
)
diff --git a/platform/ext/target/cypress/psoc64/config.cmake b/platform/ext/target/cypress/psoc64/config.cmake
index 24bc3c0..b1d7532 100644
--- a/platform/ext/target/cypress/psoc64/config.cmake
+++ b/platform/ext/target/cypress/psoc64/config.cmake
@@ -14,7 +14,6 @@
############################ Platform ##########################################
set(TFM_MULTI_CORE_TOPOLOGY ON CACHE BOOL "Whether to build for a dual-cpu architecture")
-set(TFM_MULTI_CORE_MULTI_CLIENT_CALL ON CACHE BOOL "Whether to enable multiple PSA client calls feature")
set(NUM_MAILBOX_QUEUE_SLOT 4 CACHE BOOL "Number of mailbox queue slots")
set(PLATFORM_DUMMY_ATTEST_HAL FALSE CACHE BOOL "Use dummy attest hal implementation. Should not be used in production.")
diff --git a/platform/ext/target/cypress/psoc64/mailbox/platform_multicore.c b/platform/ext/target/cypress/psoc64/mailbox/platform_multicore.c
index e860ae0..2c41e8e 100644
--- a/platform/ext/target/cypress/psoc64/mailbox/platform_multicore.c
+++ b/platform/ext/target/cypress/psoc64/mailbox/platform_multicore.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
* Copyright (c) 2019 Cypress Semiconductor Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -9,7 +9,6 @@
#include "platform_multicore.h"
#include "tfm_multi_core_api.h"
-#include "tfm_ns_mailbox.h"
#include "cy_ipc_drv.h"
#include "cy_sysint.h"
diff --git a/platform/ext/target/musca_b1/sse_200/config.cmake b/platform/ext/target/musca_b1/sse_200/config.cmake
index 67e5a68..1b6a0c7 100644
--- a/platform/ext/target/musca_b1/sse_200/config.cmake
+++ b/platform/ext/target/musca_b1/sse_200/config.cmake
@@ -1,5 +1,5 @@
#-------------------------------------------------------------------------------
-# Copyright (c) 2020, Arm Limited. All rights reserved.
+# Copyright (c) 2020-2021, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -16,7 +16,6 @@
endif()
set(BL0 OFF)
else()
- set(TFM_MULTI_CORE_MULTI_CLIENT_CALL OFF CACHE BOOL "Whether to enable multiple PSA client calls feature")
set(MCUBOOT_IMAGE_NUMBER 1 CACHE STRING "Whether to combine S and NS into either 1 image, or sign each seperately")
set(MCUBOOT_MEASURED_BOOT OFF CACHE BOOL "Add boot measurement values to boot status. Used for initial attestation token")
set(TFM_PSA_API ON CACHE BOOL "Use PSA api (IPC mode) instead of secure library mode")