Platform: Add timer to the platform test interface
Add timer to the platform test interface so that it can be used from
the IRQ tests as an interrupt source.
Detailed changes:
* Add timer_cmsdk driver files to unpriv code
* Align the timer interrupt handler names in the startup assemblies
accross platforms
* Add timer handling function declarations in tfm_plat_test.h and
implement them in the platform directories
* Create platform data for timer0 in tfm_peripherals_def.h
* Add option to configure timer0 as secure peripheral in PPC
* Fix MUSCA_A and MUSCA_B1 cmake files for building timer driver
Change-Id: I04757d2a961e044218c78aa09b754aaf82ac8a35
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
diff --git a/app/CMakeLists.txt b/app/CMakeLists.txt
index b0f0de7..ac33cbb 100644
--- a/app/CMakeLists.txt
+++ b/app/CMakeLists.txt
@@ -87,7 +87,7 @@
set(BUILD_CMSIS_CORE On)
set(BUILD_RETARGET On)
set(BUILD_NATIVE_DRIVERS On)
-set(BUILD_TIME Off)
+set(BUILD_TIME On)
set(BUILD_STARTUP On)
set(BUILD_TARGET_CFG Off)
set(BUILD_TARGET_HARDWARE_KEYS Off)
@@ -97,7 +97,13 @@
set(BUILD_FLASH Off)
set(BUILD_BOOT_SEED Off)
set(BUILD_DEVICE_ID Off)
-set(BUILD_PLAT_TEST Off)
+if(CORE_TEST_POSITIVE)
+ set(BUILD_PLAT_TEST On)
+ set(BUILD_TIME On)
+else()
+ set(BUILD_PLAT_TEST Off)
+ set(BUILD_TIME Off)
+endif()
if(NOT DEFINED PLATFORM_CMAKE_FILE)
message (FATAL_ERROR "Platform specific CMake is not defined. Please set PLATFORM_CMAKE_FILE.")
elseif(NOT EXISTS ${PLATFORM_CMAKE_FILE})
diff --git a/docs/user_guides/services/core_test_services_integration_guide.rst b/docs/user_guides/services/core_test_services_integration_guide.rst
index 1f28f63..a8f6b8c 100644
--- a/docs/user_guides/services/core_test_services_integration_guide.rst
+++ b/docs/user_guides/services/core_test_services_integration_guide.rst
@@ -37,6 +37,7 @@
read/write access tests
- Get a button state that can be pressed by the user to simulate a secure
service with an arbitrarily long blocking execution.
+- Access to a timer that is able to interrupt the core running TF-M.
The functionality that have to be implemented by the platform is described in
``platform/include/tfm_plat_test.h``. For details see the documentation of the
diff --git a/platform/ext/Mps2AN519.cmake b/platform/ext/Mps2AN519.cmake
index 6dcf5f9..9206a6a 100644
--- a/platform/ext/Mps2AN519.cmake
+++ b/platform/ext/Mps2AN519.cmake
@@ -130,7 +130,7 @@
if (NOT DEFINED BUILD_PLAT_TEST)
message(FATAL_ERROR "Configuration variable BUILD_PLAT_TEST (true|false) is undefined!")
elseif(BUILD_PLAT_TEST)
- list(APPEND ALL_SRC_C_S "${PLATFORM_DIR}/target/mps2/an519/plat_test.c")
+ list(APPEND ALL_SRC_C "${PLATFORM_DIR}/target/mps2/an519/plat_test.c")
endif()
if (NOT DEFINED BUILD_TARGET_HARDWARE_KEYS)
diff --git a/platform/ext/Mps2AN521.cmake b/platform/ext/Mps2AN521.cmake
index 90192c4..7c5c970 100644
--- a/platform/ext/Mps2AN521.cmake
+++ b/platform/ext/Mps2AN521.cmake
@@ -131,7 +131,7 @@
if (NOT DEFINED BUILD_PLAT_TEST)
message(FATAL_ERROR "Configuration variable BUILD_PLAT_TEST (true|false) is undefined!")
elseif(BUILD_PLAT_TEST)
- list(APPEND ALL_SRC_C_S "${PLATFORM_DIR}/target/mps2/an521/plat_test.c")
+ list(APPEND ALL_SRC_C "${PLATFORM_DIR}/target/mps2/an521/plat_test.c")
endif()
if (NOT DEFINED BUILD_TARGET_HARDWARE_KEYS)
diff --git a/platform/ext/Mps3AN524.cmake b/platform/ext/Mps3AN524.cmake
index 04d0e03..94fdef4 100644
--- a/platform/ext/Mps3AN524.cmake
+++ b/platform/ext/Mps3AN524.cmake
@@ -136,7 +136,7 @@
if (NOT DEFINED BUILD_PLAT_TEST)
message(FATAL_ERROR "Configuration variable BUILD_PLAT_TEST (true|false) is undefined!")
elseif(BUILD_PLAT_TEST)
- list(APPEND ALL_SRC_C_S "${AN524_DIR}/plat_test.c")
+ list(APPEND ALL_SRC_C "${AN524_DIR}/plat_test.c")
endif()
if (NOT DEFINED BUILD_TARGET_HARDWARE_KEYS)
diff --git a/platform/ext/musca_a.cmake b/platform/ext/musca_a.cmake
index d8db31a..7433f44 100644
--- a/platform/ext/musca_a.cmake
+++ b/platform/ext/musca_a.cmake
@@ -93,7 +93,7 @@
if (NOT DEFINED BUILD_TIME)
message(FATAL_ERROR "Configuration variable BUILD_TIME (true|false) is undefined!")
elseif(BUILD_TIME)
- list(APPEND ALL_SRC_C "${PLATFORM_DIR}/target/musca_a/Native_Driver/timer_cmsdk.c")
+ list(APPEND ALL_SRC_C "${PLATFORM_DIR}/target/musca_a/Native_Driver/timer_cmsdk_drv.c")
embedded_include_directories(PATH "${PLATFORM_DIR}/target/musca_a/Native_Driver" ABSOLUTE)
endif()
@@ -131,7 +131,7 @@
if (NOT DEFINED BUILD_PLAT_TEST)
message(FATAL_ERROR "Configuration variable BUILD_PLAT_TEST (true|false) is undefined!")
elseif(BUILD_PLAT_TEST)
- list(APPEND ALL_SRC_C_S "${PLATFORM_DIR}/target/musca_a/plat_test.c")
+ list(APPEND ALL_SRC_C "${PLATFORM_DIR}/target/musca_a/plat_test.c")
endif()
if (NOT DEFINED BUILD_TARGET_HARDWARE_KEYS)
diff --git a/platform/ext/musca_b1.cmake b/platform/ext/musca_b1.cmake
index 4eb6f3b..7d3f5c2 100644
--- a/platform/ext/musca_b1.cmake
+++ b/platform/ext/musca_b1.cmake
@@ -98,7 +98,7 @@
if (NOT DEFINED BUILD_TIME)
message(FATAL_ERROR "Configuration variable BUILD_TIME (true|false) is undefined!")
elseif (BUILD_TIME)
- list(APPEND ALL_SRC_C "${PLATFORM_DIR}/target/musca_b1/Native_Driver/timer_cmsdk.c")
+ list(APPEND ALL_SRC_C "${PLATFORM_DIR}/target/musca_b1/Native_Driver/timer_cmsdk_drv.c")
embedded_include_directories(PATH "${PLATFORM_DIR}/target/musca_b1/Native_Driver" ABSOLUTE)
endif()
@@ -137,7 +137,7 @@
if (NOT DEFINED BUILD_PLAT_TEST)
message(FATAL_ERROR "Configuration variable BUILD_PLAT_TEST (true|false) is undefined!")
elseif(BUILD_PLAT_TEST)
- list(APPEND ALL_SRC_C_S "${PLATFORM_DIR}/target/musca_b1/plat_test.c")
+ list(APPEND ALL_SRC_C "${PLATFORM_DIR}/target/musca_b1/plat_test.c")
endif()
if (NOT DEFINED BUILD_TARGET_HARDWARE_KEYS)
diff --git a/platform/ext/target/mps2/an519/plat_test.c b/platform/ext/target/mps2/an519/plat_test.c
index a136386..e77eb1a 100644
--- a/platform/ext/target/mps2/an519/plat_test.c
+++ b/platform/ext/target/mps2/an519/plat_test.c
@@ -7,10 +7,12 @@
#include "platform_retarget.h"
#include "platform_retarget_dev.h"
+#include "timer_cmsdk.h"
#include "tfm_plat_test.h"
#include "smm_mps2.h"
+#define TIMER_RELOAD_VALUE (16*1024*1024)
#define USERLED_MASK (0x3)
#define MPS2_USERPB0_BASE (0x50302008)
#define MPS2_USERPB0_MASK (0x1)
@@ -52,3 +54,37 @@
return USERLED_MASK;
}
+
+void tfm_plat_test_secure_timer_start(void)
+{
+ if (!cmsdk_timer_is_initialized(&CMSDK_TIMER0_DEV_S)) {
+ cmsdk_timer_init(&CMSDK_TIMER0_DEV_S);
+ }
+ cmsdk_timer_set_reload_value(&CMSDK_TIMER0_DEV_S, TIMER_RELOAD_VALUE);
+ cmsdk_timer_enable(&CMSDK_TIMER0_DEV_S);
+ cmsdk_timer_enable_interrupt(&CMSDK_TIMER0_DEV_S);
+}
+
+void tfm_plat_test_secure_timer_stop(void)
+{
+ cmsdk_timer_disable(&CMSDK_TIMER0_DEV_S);
+ cmsdk_timer_disable_interrupt(&CMSDK_TIMER0_DEV_S);
+ cmsdk_timer_clear_interrupt(&CMSDK_TIMER0_DEV_S);
+}
+
+void tfm_plat_test_non_secure_timer_start(void)
+{
+ if (!cmsdk_timer_is_initialized(&CMSDK_TIMER1_DEV_NS)) {
+ cmsdk_timer_init(&CMSDK_TIMER1_DEV_NS);
+ }
+ cmsdk_timer_set_reload_value(&CMSDK_TIMER1_DEV_NS, TIMER_RELOAD_VALUE);
+ cmsdk_timer_enable(&CMSDK_TIMER1_DEV_NS);
+ cmsdk_timer_enable_interrupt(&CMSDK_TIMER1_DEV_NS);
+}
+
+void tfm_plat_test_non_secure_timer_stop(void)
+{
+ cmsdk_timer_disable(&CMSDK_TIMER1_DEV_NS);
+ cmsdk_timer_disable_interrupt(&CMSDK_TIMER1_DEV_NS);
+ cmsdk_timer_clear_interrupt(&CMSDK_TIMER1_DEV_NS);
+}
diff --git a/platform/ext/target/mps2/an519/target_cfg.c b/platform/ext/target/mps2/an519/target_cfg.c
index 4e44047..fb9ddf0 100644
--- a/platform/ext/target/mps2/an519/target_cfg.c
+++ b/platform/ext/target/mps2/an519/target_cfg.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018 ARM Limited
+ * Copyright (c) 2018-2019 Arm Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -114,6 +114,13 @@
CMSDK_FPGA_IO_PPC_POS
};
+struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0 = {
+ CMSDK_TIMER0_BASE_S,
+ CMSDK_TIMER1_BASE_S - 1,
+ PPC_SP_APB_PPC0,
+ CMSDK_TIMER0_APB_PPC_POS
+};
+
void enable_fault_handlers(void)
{
/* Secure fault is not present in the Baseline implementation. */
diff --git a/platform/ext/target/mps2/an519/tfm_peripherals_def.h b/platform/ext/target/mps2/an519/tfm_peripherals_def.h
index b5f963c..de7f5e4 100644
--- a/platform/ext/target/mps2/an519/tfm_peripherals_def.h
+++ b/platform/ext/target/mps2/an519/tfm_peripherals_def.h
@@ -15,9 +15,11 @@
extern struct tfm_spm_partition_platform_data_t tfm_peripheral_std_uart;
extern struct tfm_spm_partition_platform_data_t tfm_peripheral_uart1;
extern struct tfm_spm_partition_platform_data_t tfm_peripheral_fpga_io;
+extern struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0;
#define TFM_PERIPHERAL_STD_UART (&tfm_peripheral_std_uart)
#define TFM_PERIPHERAL_UART1 (&tfm_peripheral_uart1)
#define TFM_PERIPHERAL_FPGA_IO (&tfm_peripheral_fpga_io)
+#define TFM_PERIPHERAL_TIMER0 (&tfm_peripheral_timer0)
#endif /* __TFM_PERIPHERALS_DEF_H__ */
diff --git a/platform/ext/target/mps2/an521/plat_test.c b/platform/ext/target/mps2/an521/plat_test.c
index a136386..8352858 100644
--- a/platform/ext/target/mps2/an521/plat_test.c
+++ b/platform/ext/target/mps2/an521/plat_test.c
@@ -7,10 +7,12 @@
#include "platform_retarget.h"
#include "platform_retarget_dev.h"
+#include "timer_cmsdk.h"
#include "tfm_plat_test.h"
#include "smm_mps2.h"
+#define TIMER_RELOAD_VALUE (16*1024*1024)
#define USERLED_MASK (0x3)
#define MPS2_USERPB0_BASE (0x50302008)
#define MPS2_USERPB0_MASK (0x1)
@@ -52,3 +54,36 @@
return USERLED_MASK;
}
+void tfm_plat_test_secure_timer_start(void)
+{
+ if (!cmsdk_timer_is_initialized(&CMSDK_TIMER0_DEV_S)) {
+ cmsdk_timer_init(&CMSDK_TIMER0_DEV_S);
+ }
+ cmsdk_timer_set_reload_value(&CMSDK_TIMER0_DEV_S, TIMER_RELOAD_VALUE);
+ cmsdk_timer_enable(&CMSDK_TIMER0_DEV_S);
+ cmsdk_timer_enable_interrupt(&CMSDK_TIMER0_DEV_S);
+}
+
+void tfm_plat_test_secure_timer_stop(void)
+{
+ cmsdk_timer_disable(&CMSDK_TIMER0_DEV_S);
+ cmsdk_timer_disable_interrupt(&CMSDK_TIMER0_DEV_S);
+ cmsdk_timer_clear_interrupt(&CMSDK_TIMER0_DEV_S);
+}
+
+void tfm_plat_test_non_secure_timer_start(void)
+{
+ if (!cmsdk_timer_is_initialized(&CMSDK_TIMER1_DEV_NS)) {
+ cmsdk_timer_init(&CMSDK_TIMER1_DEV_NS);
+ }
+ cmsdk_timer_set_reload_value(&CMSDK_TIMER1_DEV_NS, TIMER_RELOAD_VALUE);
+ cmsdk_timer_enable(&CMSDK_TIMER1_DEV_NS);
+ cmsdk_timer_enable_interrupt(&CMSDK_TIMER1_DEV_NS);
+}
+
+void tfm_plat_test_non_secure_timer_stop(void)
+{
+ cmsdk_timer_disable(&CMSDK_TIMER1_DEV_NS);
+ cmsdk_timer_disable_interrupt(&CMSDK_TIMER1_DEV_NS);
+ cmsdk_timer_clear_interrupt(&CMSDK_TIMER1_DEV_NS);
+}
diff --git a/platform/ext/target/mps2/an521/target_cfg.c b/platform/ext/target/mps2/an521/target_cfg.c
index 97191a5..d63ae22 100644
--- a/platform/ext/target/mps2/an521/target_cfg.c
+++ b/platform/ext/target/mps2/an521/target_cfg.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018 ARM Limited
+ * Copyright (c) 2017-2019 Arm Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -114,6 +114,13 @@
CMSDK_FPGA_IO_PPC_POS
};
+struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0 = {
+ CMSDK_TIMER0_BASE_S,
+ CMSDK_TIMER1_BASE_S - 1,
+ PPC_SP_APB_PPC0,
+ CMSDK_TIMER0_APB_PPC_POS
+};
+
void enable_fault_handlers(void)
{
/* Explicitly set secure fault priority to the highest */
diff --git a/platform/ext/target/mps2/an521/tfm_peripherals_def.h b/platform/ext/target/mps2/an521/tfm_peripherals_def.h
index b5f963c..de7f5e4 100644
--- a/platform/ext/target/mps2/an521/tfm_peripherals_def.h
+++ b/platform/ext/target/mps2/an521/tfm_peripherals_def.h
@@ -15,9 +15,11 @@
extern struct tfm_spm_partition_platform_data_t tfm_peripheral_std_uart;
extern struct tfm_spm_partition_platform_data_t tfm_peripheral_uart1;
extern struct tfm_spm_partition_platform_data_t tfm_peripheral_fpga_io;
+extern struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0;
#define TFM_PERIPHERAL_STD_UART (&tfm_peripheral_std_uart)
#define TFM_PERIPHERAL_UART1 (&tfm_peripheral_uart1)
#define TFM_PERIPHERAL_FPGA_IO (&tfm_peripheral_fpga_io)
+#define TFM_PERIPHERAL_TIMER0 (&tfm_peripheral_timer0)
#endif /* __TFM_PERIPHERALS_DEF_H__ */
diff --git a/platform/ext/target/mps3/an524/device/config/device_cfg.h b/platform/ext/target/mps3/an524/device/config/device_cfg.h
index 9e7c8af..29e992e 100644
--- a/platform/ext/target/mps3/an524/device/config/device_cfg.h
+++ b/platform/ext/target/mps3/an524/device/config/device_cfg.h
@@ -46,4 +46,10 @@
#define UART1_CMSDK_S
#define UART1_CMSDK_NS
+/* CMSDK Timers */
+#define CMSDK_TIMER0_S
+#define CMSDK_TIMER0_NS
+#define CMSDK_TIMER1_S
+#define CMSDK_TIMER1_NS
+
#endif /* __ARM_LTD_DEVICE_CFG_H__ */
diff --git a/platform/ext/target/mps3/an524/plat_test.c b/platform/ext/target/mps3/an524/plat_test.c
index 80408a9..bfbe227 100644
--- a/platform/ext/target/mps3/an524/plat_test.c
+++ b/platform/ext/target/mps3/an524/plat_test.c
@@ -5,11 +5,14 @@
*
*/
+#include "timer_cmsdk_drv.h"
#include "platform/include/tfm_plat_defs.h"
#include "tfm_plat_test.h"
+#include "device_definition.h"
#define USERLED_MASK (0x3)
#define BTN_WAIT_INIT_COUNTER_VALUE (10000u)
+#define TIMER_RELOAD_VALUE (16*1024*1024)
/**
* \brief Store the state of the mocked LED
@@ -59,3 +62,36 @@
return USERLED_MASK;
}
+void tfm_plat_test_secure_timer_start(void)
+{
+ if (!timer_cmsdk_is_initialized(&CMSDK_TIMER0_DEV_S)) {
+ timer_cmsdk_init(&CMSDK_TIMER0_DEV_S);
+ }
+ timer_cmsdk_set_reload_value(&CMSDK_TIMER0_DEV_S, TIMER_RELOAD_VALUE);
+ timer_cmsdk_enable(&CMSDK_TIMER0_DEV_S);
+ timer_cmsdk_enable_interrupt(&CMSDK_TIMER0_DEV_S);
+}
+
+void tfm_plat_test_secure_timer_stop(void)
+{
+ timer_cmsdk_disable(&CMSDK_TIMER0_DEV_S);
+ timer_cmsdk_disable_interrupt(&CMSDK_TIMER0_DEV_S);
+ timer_cmsdk_clear_interrupt(&CMSDK_TIMER0_DEV_S);
+}
+
+void tfm_plat_test_non_secure_timer_start(void)
+{
+ if (!timer_cmsdk_is_initialized(&CMSDK_TIMER1_DEV_NS)) {
+ timer_cmsdk_init(&CMSDK_TIMER1_DEV_NS);
+ }
+ timer_cmsdk_set_reload_value(&CMSDK_TIMER1_DEV_NS, TIMER_RELOAD_VALUE);
+ timer_cmsdk_enable(&CMSDK_TIMER1_DEV_NS);
+ timer_cmsdk_enable_interrupt(&CMSDK_TIMER1_DEV_NS);
+}
+
+void tfm_plat_test_non_secure_timer_stop(void)
+{
+ timer_cmsdk_disable(&CMSDK_TIMER1_DEV_NS);
+ timer_cmsdk_disable_interrupt(&CMSDK_TIMER1_DEV_NS);
+ timer_cmsdk_clear_interrupt(&CMSDK_TIMER1_DEV_NS);
+}
diff --git a/platform/ext/target/mps3/an524/target_cfg.c b/platform/ext/target/mps3/an524/target_cfg.c
index 34f0f72..15a3d68 100644
--- a/platform/ext/target/mps3/an524/target_cfg.c
+++ b/platform/ext/target/mps3/an524/target_cfg.c
@@ -123,6 +123,13 @@
#define PPC_BANK_COUNT (sizeof(ppc_bank_drivers)/sizeof(ppc_bank_drivers[0]))
+struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0 = {
+ CMSDK_TIMER0_BASE_S,
+ CMSDK_TIMER1_BASE_S - 1,
+ PPC_SP_APB_PPC0,
+ CMSDK_TIMER0_APB_PPC_POS
+};
+
void enable_fault_handlers(void)
{
/* Enables BUS, MEM, USG and Secure faults */
diff --git a/platform/ext/target/mps3/an524/tfm_peripherals_def.h b/platform/ext/target/mps3/an524/tfm_peripherals_def.h
index 97922be..958313a 100644
--- a/platform/ext/target/mps3/an524/tfm_peripherals_def.h
+++ b/platform/ext/target/mps3/an524/tfm_peripherals_def.h
@@ -17,8 +17,10 @@
struct tfm_spm_partition_platform_data_t;
extern struct tfm_spm_partition_platform_data_t tfm_peripheral_std_uart;
+extern struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0;
#define TFM_PERIPHERAL_STD_UART (&tfm_peripheral_std_uart)
+#define TFM_PERIPHERAL_TIMER0 (&tfm_peripheral_timer0)
#define TFM_PERIPHERAL_FPGA_IO (0)
#ifdef __cplusplus
diff --git a/platform/ext/target/musca_a/Device/Source/armclang/startup_cmsdk_musca_s.s b/platform/ext/target/musca_a/Device/Source/armclang/startup_cmsdk_musca_s.s
index c618ef3..263a0ae 100644
--- a/platform/ext/target/musca_a/Device/Source/armclang/startup_cmsdk_musca_s.s
+++ b/platform/ext/target/musca_a/Device/Source/armclang/startup_cmsdk_musca_s.s
@@ -1,5 +1,5 @@
;/*
-; * Copyright (c) 2017-2018 ARM Limited
+; * Copyright (c) 2017-2019 Arm Limited
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
; * you may not use this file except in compliance with the License.
@@ -56,8 +56,8 @@
DCD NS_WATCHDOG_RESET_IRQHandler ; 0: Non-Secure Watchdog Reset Request Interrupt
DCD NS_WATCHDOG_IRQHandler ; 1: Non-Secure Watchdog Interrupt
DCD S32K_TIMER_IRQHandler ; 2: S32K Timer Interrupt
- DCD TIMER0_IRQHandler ; 3: CMSDK Timer 0 Interrupt
- DCD TIMER1_IRQHandler ; 4: CMSDK Timer 1 Interrupt
+ DCD TIMER0_Handler ; 3: CMSDK Timer 0 Interrupt
+ DCD TIMER1_Handler ; 4: CMSDK Timer 1 Interrupt
DCD DUALTIMER_IRQHandler ; 5: CMSDK Dual Timer Interrupt
DCD MHU0_IRQHandler ; 6: Message Handling Unit 0 Interrupt
DCD MHU1_IRQHandler ; 7: Message Handling Unit 1 Interrupt
@@ -178,8 +178,8 @@
Default_Handler NS_WATCHDOG_RESET_IRQHandler
Default_Handler NS_WATCHDOG_IRQHandler
Default_Handler S32K_TIMER_IRQHandler
- Default_Handler TIMER0_IRQHandler
- Default_Handler TIMER1_IRQHandler
+ Default_Handler TIMER0_Handler
+ Default_Handler TIMER1_Handler
Default_Handler DUALTIMER_IRQHandler
Default_Handler MHU0_IRQHandler
Default_Handler MHU1_IRQHandler
diff --git a/platform/ext/target/musca_a/Device/Source/gcc/startup_cmsdk_musca_s.S b/platform/ext/target/musca_a/Device/Source/gcc/startup_cmsdk_musca_s.S
index a24ac31..37ed397 100644
--- a/platform/ext/target/musca_a/Device/Source/gcc/startup_cmsdk_musca_s.S
+++ b/platform/ext/target/musca_a/Device/Source/gcc/startup_cmsdk_musca_s.S
@@ -1,5 +1,5 @@
;/*
-; * Copyright (c) 2009-2018 ARM Limited
+; * Copyright (c) 2009-2019 Arm Limited
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
; * you may not use this file except in compliance with the License.
@@ -45,8 +45,8 @@
.long NS_WATCHDOG_RESET_IRQHandler /* 0: Non-Secure Watchdog Reset Request Interrupt */
.long NS_WATCHDOG_IRQHandler /* 1: Non-Secure Watchdog Interrupt */
.long S32K_TIMER_IRQHandler /* 2: S32K Timer Interrupt */
- .long TIMER0_IRQHandler /* 3: CMSDK Timer 0 Interrupt */
- .long TIMER1_IRQHandler /* 4: CMSDK Timer 1 Interrupt */
+ .long TIMER0_Handler /* 3: CMSDK Timer 0 Interrupt */
+ .long TIMER1_Handler /* 4: CMSDK Timer 1 Interrupt */
.long DUALTIMER_IRQHandler /* 5: CMSDK Dual Timer Interrupt */
.long MHU0_IRQHandler /* 6: Message Handling Unit 0 Interrupt */
.long MHU1_IRQHandler /* 7: Message Handling Unit 1 Interrupt */
@@ -290,8 +290,8 @@
def_irq_handler NS_WATCHDOG_RESET_IRQHandler /* 0: Non-Secure Watchdog Reset Request Interrupt */
def_irq_handler NS_WATCHDOG_IRQHandler /* 1: Non-Secure Watchdog Interrupt */
def_irq_handler S32K_TIMER_IRQHandler /* 2: S32K Timer Interrupt */
- def_irq_handler TIMER0_IRQHandler /* 3: CMSDK Timer 0 Interrupt */
- def_irq_handler TIMER1_IRQHandler /* 4: CMSDK Timer 1 Interrupt */
+ def_irq_handler TIMER0_Handler /* 3: CMSDK Timer 0 Interrupt */
+ def_irq_handler TIMER1_Handler /* 4: CMSDK Timer 1 Interrupt */
def_irq_handler DUALTIMER_IRQHandler /* 5: CMSDK Dual Timer Interrupt */
def_irq_handler MHU0_IRQHandler /* 6: Message Handling Unit 0 Interrupt */
def_irq_handler MHU1_IRQHandler /* 7: Message Handling Unit 1 Interrupt */
diff --git a/platform/ext/target/musca_a/plat_test.c b/platform/ext/target/musca_a/plat_test.c
index 80408a9..5588bab 100644
--- a/platform/ext/target/musca_a/plat_test.c
+++ b/platform/ext/target/musca_a/plat_test.c
@@ -5,11 +5,14 @@
*
*/
+#include "timer_cmsdk_drv.h"
#include "platform/include/tfm_plat_defs.h"
#include "tfm_plat_test.h"
+#include "device_definition.h"
#define USERLED_MASK (0x3)
#define BTN_WAIT_INIT_COUNTER_VALUE (10000u)
+#define TIMER_RELOAD_VALUE (16*1024*1024)
/**
* \brief Store the state of the mocked LED
@@ -59,3 +62,37 @@
return USERLED_MASK;
}
+
+void tfm_plat_test_secure_timer_start(void)
+{
+ if (!timer_cmsdk_is_initialized(&CMSDK_TIMER0_DEV_S)) {
+ timer_cmsdk_init(&CMSDK_TIMER0_DEV_S);
+ }
+ timer_cmsdk_set_reload_value(&CMSDK_TIMER0_DEV_S, TIMER_RELOAD_VALUE);
+ timer_cmsdk_enable(&CMSDK_TIMER0_DEV_S);
+ timer_cmsdk_enable_interrupt(&CMSDK_TIMER0_DEV_S);
+}
+
+void tfm_plat_test_secure_timer_stop(void)
+{
+ timer_cmsdk_disable(&CMSDK_TIMER0_DEV_S);
+ timer_cmsdk_disable_interrupt(&CMSDK_TIMER0_DEV_S);
+ timer_cmsdk_clear_interrupt(&CMSDK_TIMER0_DEV_S);
+}
+
+void tfm_plat_test_non_secure_timer_start(void)
+{
+ if (!timer_cmsdk_is_initialized(&CMSDK_TIMER1_DEV_NS)) {
+ timer_cmsdk_init(&CMSDK_TIMER1_DEV_NS);
+ }
+ timer_cmsdk_set_reload_value(&CMSDK_TIMER1_DEV_NS, TIMER_RELOAD_VALUE);
+ timer_cmsdk_enable(&CMSDK_TIMER1_DEV_NS);
+ timer_cmsdk_enable_interrupt(&CMSDK_TIMER1_DEV_NS);
+}
+
+void tfm_plat_test_non_secure_timer_stop(void)
+{
+ timer_cmsdk_disable(&CMSDK_TIMER1_DEV_NS);
+ timer_cmsdk_disable_interrupt(&CMSDK_TIMER1_DEV_NS);
+ timer_cmsdk_clear_interrupt(&CMSDK_TIMER1_DEV_NS);
+}
diff --git a/platform/ext/target/musca_a/target_cfg.c b/platform/ext/target/musca_a/target_cfg.c
index f025b8b..fa3a52b 100644
--- a/platform/ext/target/musca_a/target_cfg.c
+++ b/platform/ext/target/musca_a/target_cfg.c
@@ -91,6 +91,13 @@
-1
};
+struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0 = {
+ MUSCA_CMSDK_TIMER0_S_BASE,
+ MUSCA_CMSDK_TIMER1_S_BASE - 1,
+ PPC_SP_APB_PPC0,
+ CMSDK_TIMER0_APB_PPC_POS
+};
+
void enable_fault_handlers(void)
{
/* Explicitly set secure fault priority to the highest */
diff --git a/platform/ext/target/musca_a/tfm_peripherals_def.h b/platform/ext/target/musca_a/tfm_peripherals_def.h
index 872a73a..f557701 100644
--- a/platform/ext/target/musca_a/tfm_peripherals_def.h
+++ b/platform/ext/target/musca_a/tfm_peripherals_def.h
@@ -13,8 +13,10 @@
struct tfm_spm_partition_platform_data_t;
extern struct tfm_spm_partition_platform_data_t tfm_peripheral_std_uart;
+extern struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0;
#define TFM_PERIPHERAL_STD_UART (&tfm_peripheral_std_uart)
+#define TFM_PERIPHERAL_TIMER0 (&tfm_peripheral_timer0)
#define TFM_PERIPHERAL_FPGA_IO (0)
#endif /* __TFM_PERIPHERALS_DEF_H__ */
diff --git a/platform/ext/target/musca_b1/Device/Source/armclang/startup_cmsdk_musca_s.s b/platform/ext/target/musca_b1/Device/Source/armclang/startup_cmsdk_musca_s.s
index b22ed34..f558489 100644
--- a/platform/ext/target/musca_b1/Device/Source/armclang/startup_cmsdk_musca_s.s
+++ b/platform/ext/target/musca_b1/Device/Source/armclang/startup_cmsdk_musca_s.s
@@ -1,5 +1,5 @@
;/*
-; * Copyright (c) 2009-2018 ARM Limited
+; * Copyright (c) 2009-2019 Arm Limited
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
; * you may not use this file except in compliance with the License.
@@ -56,8 +56,8 @@
DCD NS_WATCHDOG_RESET_IRQHandler ; 0: Non-Secure Watchdog Reset Request Interrupt
DCD NS_WATCHDOG_IRQHandler ; 1: Non-Secure Watchdog Interrupt
DCD S32K_TIMER_IRQHandler ; 2: S32K Timer Interrupt
- DCD TIMER0_IRQHandler ; 3: CMSDK Timer 0 Interrupt
- DCD TIMER1_IRQHandler ; 4: CMSDK Timer 1 Interrupt
+ DCD TIMER0_Handler ; 3: CMSDK Timer 0 Interrupt
+ DCD TIMER1_Handler ; 4: CMSDK Timer 1 Interrupt
DCD DUALTIMER_IRQHandler ; 5: CMSDK Dual Timer Interrupt
DCD MHU0_IRQHandler ; 6: Message Handling Unit 0 Interrupt
DCD MHU1_IRQHandler ; 7: Message Handling Unit 1 Interrupt
@@ -178,8 +178,8 @@
Default_Handler NS_WATCHDOG_RESET_IRQHandler
Default_Handler NS_WATCHDOG_IRQHandler
Default_Handler S32K_TIMER_IRQHandler
- Default_Handler TIMER0_IRQHandler
- Default_Handler TIMER1_IRQHandler
+ Default_Handler TIMER0_Handler
+ Default_Handler TIMER1_Handler
Default_Handler DUALTIMER_IRQHandler
Default_Handler MHU0_IRQHandler
Default_Handler MHU1_IRQHandler
diff --git a/platform/ext/target/musca_b1/Device/Source/device_definition.c b/platform/ext/target/musca_b1/Device/Source/device_definition.c
index 2beccd1..b942d29 100644
--- a/platform/ext/target/musca_b1/Device/Source/device_definition.c
+++ b/platform/ext/target/musca_b1/Device/Source/device_definition.c
@@ -26,6 +26,7 @@
#include "device_cfg.h"
#include "device_definition.h"
#include "platform_base_address.h"
+#include "platform/include/tfm_plat_defs.h"
/* ======= Peripheral configuration structure definitions ======= */
/* MUSCA B1 SCC driver structures */
diff --git a/platform/ext/target/musca_b1/Device/Source/gcc/startup_cmsdk_musca_s.S b/platform/ext/target/musca_b1/Device/Source/gcc/startup_cmsdk_musca_s.S
index a24ac31..37ed397 100644
--- a/platform/ext/target/musca_b1/Device/Source/gcc/startup_cmsdk_musca_s.S
+++ b/platform/ext/target/musca_b1/Device/Source/gcc/startup_cmsdk_musca_s.S
@@ -1,5 +1,5 @@
;/*
-; * Copyright (c) 2009-2018 ARM Limited
+; * Copyright (c) 2009-2019 Arm Limited
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
; * you may not use this file except in compliance with the License.
@@ -45,8 +45,8 @@
.long NS_WATCHDOG_RESET_IRQHandler /* 0: Non-Secure Watchdog Reset Request Interrupt */
.long NS_WATCHDOG_IRQHandler /* 1: Non-Secure Watchdog Interrupt */
.long S32K_TIMER_IRQHandler /* 2: S32K Timer Interrupt */
- .long TIMER0_IRQHandler /* 3: CMSDK Timer 0 Interrupt */
- .long TIMER1_IRQHandler /* 4: CMSDK Timer 1 Interrupt */
+ .long TIMER0_Handler /* 3: CMSDK Timer 0 Interrupt */
+ .long TIMER1_Handler /* 4: CMSDK Timer 1 Interrupt */
.long DUALTIMER_IRQHandler /* 5: CMSDK Dual Timer Interrupt */
.long MHU0_IRQHandler /* 6: Message Handling Unit 0 Interrupt */
.long MHU1_IRQHandler /* 7: Message Handling Unit 1 Interrupt */
@@ -290,8 +290,8 @@
def_irq_handler NS_WATCHDOG_RESET_IRQHandler /* 0: Non-Secure Watchdog Reset Request Interrupt */
def_irq_handler NS_WATCHDOG_IRQHandler /* 1: Non-Secure Watchdog Interrupt */
def_irq_handler S32K_TIMER_IRQHandler /* 2: S32K Timer Interrupt */
- def_irq_handler TIMER0_IRQHandler /* 3: CMSDK Timer 0 Interrupt */
- def_irq_handler TIMER1_IRQHandler /* 4: CMSDK Timer 1 Interrupt */
+ def_irq_handler TIMER0_Handler /* 3: CMSDK Timer 0 Interrupt */
+ def_irq_handler TIMER1_Handler /* 4: CMSDK Timer 1 Interrupt */
def_irq_handler DUALTIMER_IRQHandler /* 5: CMSDK Dual Timer Interrupt */
def_irq_handler MHU0_IRQHandler /* 6: Message Handling Unit 0 Interrupt */
def_irq_handler MHU1_IRQHandler /* 7: Message Handling Unit 1 Interrupt */
diff --git a/platform/ext/target/musca_b1/plat_test.c b/platform/ext/target/musca_b1/plat_test.c
index 80408a9..bfbe227 100644
--- a/platform/ext/target/musca_b1/plat_test.c
+++ b/platform/ext/target/musca_b1/plat_test.c
@@ -5,11 +5,14 @@
*
*/
+#include "timer_cmsdk_drv.h"
#include "platform/include/tfm_plat_defs.h"
#include "tfm_plat_test.h"
+#include "device_definition.h"
#define USERLED_MASK (0x3)
#define BTN_WAIT_INIT_COUNTER_VALUE (10000u)
+#define TIMER_RELOAD_VALUE (16*1024*1024)
/**
* \brief Store the state of the mocked LED
@@ -59,3 +62,36 @@
return USERLED_MASK;
}
+void tfm_plat_test_secure_timer_start(void)
+{
+ if (!timer_cmsdk_is_initialized(&CMSDK_TIMER0_DEV_S)) {
+ timer_cmsdk_init(&CMSDK_TIMER0_DEV_S);
+ }
+ timer_cmsdk_set_reload_value(&CMSDK_TIMER0_DEV_S, TIMER_RELOAD_VALUE);
+ timer_cmsdk_enable(&CMSDK_TIMER0_DEV_S);
+ timer_cmsdk_enable_interrupt(&CMSDK_TIMER0_DEV_S);
+}
+
+void tfm_plat_test_secure_timer_stop(void)
+{
+ timer_cmsdk_disable(&CMSDK_TIMER0_DEV_S);
+ timer_cmsdk_disable_interrupt(&CMSDK_TIMER0_DEV_S);
+ timer_cmsdk_clear_interrupt(&CMSDK_TIMER0_DEV_S);
+}
+
+void tfm_plat_test_non_secure_timer_start(void)
+{
+ if (!timer_cmsdk_is_initialized(&CMSDK_TIMER1_DEV_NS)) {
+ timer_cmsdk_init(&CMSDK_TIMER1_DEV_NS);
+ }
+ timer_cmsdk_set_reload_value(&CMSDK_TIMER1_DEV_NS, TIMER_RELOAD_VALUE);
+ timer_cmsdk_enable(&CMSDK_TIMER1_DEV_NS);
+ timer_cmsdk_enable_interrupt(&CMSDK_TIMER1_DEV_NS);
+}
+
+void tfm_plat_test_non_secure_timer_stop(void)
+{
+ timer_cmsdk_disable(&CMSDK_TIMER1_DEV_NS);
+ timer_cmsdk_disable_interrupt(&CMSDK_TIMER1_DEV_NS);
+ timer_cmsdk_clear_interrupt(&CMSDK_TIMER1_DEV_NS);
+}
diff --git a/platform/ext/target/musca_b1/target_cfg.c b/platform/ext/target/musca_b1/target_cfg.c
index 7a4c15a..91fcab5 100644
--- a/platform/ext/target/musca_b1/target_cfg.c
+++ b/platform/ext/target/musca_b1/target_cfg.c
@@ -126,6 +126,13 @@
#define PPC_BANK_COUNT \
(sizeof(ppc_bank_drivers)/sizeof(ppc_bank_drivers[0]))
+struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0 = {
+ MUSCA_B1_CMSDK_TIMER0_S_BASE,
+ MUSCA_B1_CMSDK_TIMER1_S_BASE - 1,
+ PPC_SP_APB_PPC0,
+ CMSDK_TIMER0_APB_PPC_POS
+};
+
void enable_fault_handlers(void)
{
/* Explicitly set secure fault priority to the highest */
diff --git a/platform/ext/target/musca_b1/tfm_peripherals_def.h b/platform/ext/target/musca_b1/tfm_peripherals_def.h
index eae19a1..4ece630 100644
--- a/platform/ext/target/musca_b1/tfm_peripherals_def.h
+++ b/platform/ext/target/musca_b1/tfm_peripherals_def.h
@@ -17,8 +17,10 @@
struct tfm_spm_partition_platform_data_t;
extern struct tfm_spm_partition_platform_data_t tfm_peripheral_std_uart;
+extern struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0;
#define TFM_PERIPHERAL_STD_UART (&tfm_peripheral_std_uart)
+#define TFM_PERIPHERAL_TIMER0 (&tfm_peripheral_timer0)
#define TFM_PERIPHERAL_FPGA_IO (0)
#ifdef __cplusplus
diff --git a/platform/include/tfm_plat_test.h b/platform/include/tfm_plat_test.h
index a71c0fc..c3d7317 100644
--- a/platform/include/tfm_plat_test.h
+++ b/platform/include/tfm_plat_test.h
@@ -46,4 +46,35 @@
TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
uint32_t tfm_plat_test_get_userled_mask(void);
+/**
+ * \brief starts Secure timer
+ *
+ * Configures a timer to start counting, and generate a timer interrupt after a
+ * certain amount of time. For the test case to be useful, the timeout value of
+ * the timer should be long enough so that the test service can go to the state
+ * where it starts waiting for the interrupt.
+ */
+void tfm_plat_test_secure_timer_start(void);
+
+/**
+ * \brief Stops the Secure timer and clears the timer interrupt.
+ */
+void tfm_plat_test_secure_timer_stop(void);
+
+/**
+ * \brief starts Non-secure timer
+ *
+ * Configures a timer to start counting, and generate a timer interrupt after a
+ * certain amount of time. For the test case to be useful, the timeout value of
+ * the timer should be long enough so that the test service can go to the state
+ * where it starts waiting for the interrupt.
+ */
+void tfm_plat_test_non_secure_timer_start(void);
+
+/**
+ * \brief Stops the non-Secure timer and clears the timer interrupt.
+ */
+void tfm_plat_test_non_secure_timer_stop(void);
+
+
#endif /* __TFM_PLAT_TEST_H__ */
diff --git a/test/test_services/CMakeLists.inc b/test/test_services/CMakeLists.inc
index 367cd83..d591ce6 100644
--- a/test/test_services/CMakeLists.inc
+++ b/test/test_services/CMakeLists.inc
@@ -68,15 +68,16 @@
set(BUILD_TARGET_HARDWARE_KEYS Off)
set(BUILD_TARGET_NV_COUNTERS Off)
set(BUILD_CMSIS_DRIVERS Off)
-set(BUILD_TIME Off)
set(BUILD_UART_STDOUT Off)
set(BUILD_FLASH Off)
set(BUILD_BOOT_SEED Off)
set(BUILD_DEVICE_ID On)
-if (REGRESSION OR CORE_TEST OR CORE_IPC)
+if (CORE_TEST_POSITIVE)
set(BUILD_PLAT_TEST On)
+ set(BUILD_TIME On)
else()
set(BUILD_PLAT_TEST Off)
+ set(BUILD_TIME Off)
endif()
if(NOT DEFINED PLATFORM_CMAKE_FILE)
message (FATAL_ERROR "Platform specific CMake is not defined. Please set PLATFORM_CMAKE_FILE.")