Platform: Add linker script for LVL1 and LVL2
Instead of generating from template. Also, update the macros used to
place symbols into a particular sections to match the new linker scripts.
Change-Id: I7b0f14687ba0bb4e6d2f1ffdfe70030738bfbec3
Signed-off-by: Raef Coles <raef.coles@arm.com>
diff --git a/platform/ext/common/armclang/tfm_common_s.sct.template b/platform/ext/common/armclang/tfm_common_s.sct
similarity index 69%
rename from platform/ext/common/armclang/tfm_common_s.sct.template
rename to platform/ext/common/armclang/tfm_common_s.sct
index ecaf6be..93d60d1 100644
--- a/platform/ext/common/armclang/tfm_common_s.sct.template
+++ b/platform/ext/common/armclang/tfm_common_s.sct
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -14,8 +14,6 @@
* limitations under the License.
*/
-{{utilities.donotedit_warning}}
-
#include "region_defs.h"
LR_CODE S_CODE_START S_CODE_SIZE {
@@ -44,30 +42,11 @@
TFM_PSA_CODE_START +0 ALIGN 32 EMPTY 0x0 {
}
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'PSA-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- {{manifest.manifest.name}}_LINKER +0 ALIGN 32 {
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}} (+RO)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}} (+RO)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_FN)
+ TFM_PSA_ROT_LINKER +0 ALIGN 32 {
+ *tfm_psa_rot_partition* (+RO)
+ *.o(TFM_*_PSA-ROT_ATTR_FN)
}
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
- {% endif %}
-{% endfor %}
/*
* This empty, zero long execution region is here to mark the end address
* of PSA RoT code.
@@ -83,30 +62,11 @@
TFM_APP_CODE_START +0 ALIGN 32 EMPTY 0x0 {
}
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'APPLICATION-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- {{manifest.manifest.name}}_LINKER +0 ALIGN 32 {
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}} (+RO)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}} (+RO)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_FN)
+ TFM_APP_ROT_LINKER +0 ALIGN 32 {
+ *tfm_app_rot_partition* (+RO)
+ *.o(TFM_*_APP-ROT_ATTR_FN)
}
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
- {% endif %}
-{% endfor %}
/*
* This empty, zero long execution region is here to mark the end address
* of APP RoT code.
@@ -182,32 +142,12 @@
TFM_APP_RW_STACK_START +0 ALIGN 32 EMPTY 0x0 {
}
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'APPLICATION-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- {{manifest.manifest.name}}_LINKER_DATA +0 ALIGN 32 {
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}} (+RW +ZI)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}} (+RW +ZI)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_RW)
- *({{manifest.manifest.name}}_ATTR_ZI)
+ TFM_APP_ROT_LINKER_DATA +0 ALIGN 32 {
+ *tfm_app_rot_partition* (+RW +ZI)
+ *.o(TFM_*_APP-ROT_ATTR_RW)
+ *.o(TFM_*_APP-ROT_ATTR_ZI)
}
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-
- {% endif %}
-{% endfor %}
/*
* This empty, zero long execution region is here to mark the end address
* of APP RoT RW and Stack.
@@ -254,32 +194,12 @@
TFM_PSA_RW_STACK_START +0 ALIGN 32 EMPTY 0x0 {
}
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'PSA-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- {{manifest.manifest.name}}_LINKER_DATA +0 ALIGN 32 {
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}} (+RW +ZI)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}} (+RW +ZI)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_RW)
- *({{manifest.manifest.name}}_ATTR_ZI)
+ TFM_PSA_ROT_LINKER_DATA +0 ALIGN 32 {
+ *tfm_psa_rot_partition* (+RW +ZI)
+ *.o(TFM_*_PSA-ROT_ATTR_RW)
+ *.o(TFM_*_PSA-ROT_ATTR_ZI)
}
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-
- {% endif %}
-{% endfor %}
/*
* This empty, zero long execution region is here to mark the end address
* of PSA RoT RW and Stack.
diff --git a/platform/ext/common/armclang/tfm_isolation_l3.sct.template b/platform/ext/common/armclang/tfm_isolation_l3.sct.template
index 8891166..13c3a43 100644
--- a/platform/ext/common/armclang/tfm_isolation_l3.sct.template
+++ b/platform/ext/common/armclang/tfm_isolation_l3.sct.template
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -57,7 +57,7 @@
{{pattern}} (+RO)
{% endfor %}
{% endif %}
- *({{manifest.manifest.name}}_ATTR_FN)
+ *({{manifest.manifest.name}}_PSA-ROT_ATTR_FN)
}
{% if manifest.attr.conditional %}
#endif /* {{manifest.attr.conditional}} */
@@ -84,7 +84,7 @@
{{pattern}} (+RO)
{% endfor %}
{% endif %}
- *({{manifest.manifest.name}}_ATTR_FN)
+ *({{manifest.manifest.name}}_APP-ROT_ATTR_FN)
}
{% if manifest.attr.conditional %}
#endif /* {{manifest.attr.conditional}} */
@@ -154,8 +154,8 @@
{{pattern}} (+RW +ZI)
{% endfor %}
{% endif %}
- *({{manifest.manifest.name}}_ATTR_RW)
- *({{manifest.manifest.name}}_ATTR_ZI)
+ *({{manifest.manifest.name}}_PSA-ROT_ATTR_RW)
+ *({{manifest.manifest.name}}_PSA-ROT_ATTR_ZI)
}
PT_{{manifest.manifest.name}}_PRIVATE_DATA_END +0 ALIGN 32 {
@@ -199,8 +199,8 @@
{{pattern}} (+RW +ZI)
{% endfor %}
{% endif %}
- *({{manifest.manifest.name}}_ATTR_RW)
- *({{manifest.manifest.name}}_ATTR_ZI)
+ *({{manifest.manifest.name}}_APP-ROT_ATTR_RW)
+ *({{manifest.manifest.name}}_APP-ROT_ATTR_ZI)
}
PT_{{manifest.manifest.name}}_PRIVATE_DATA_END +0 ALIGN 32 {
diff --git a/platform/ext/common/gcc/tfm_common_s.ld.template b/platform/ext/common/gcc/tfm_common_s.ld
similarity index 65%
rename from platform/ext/common/gcc/tfm_common_s.ld.template
rename to platform/ext/common/gcc/tfm_common_s.ld
index b05653e..61b5b87 100644
--- a/platform/ext/common/gcc/tfm_common_s.ld.template
+++ b/platform/ext/common/gcc/tfm_common_s.ld
@@ -1,5 +1,5 @@
;/*
-; * Copyright (c) 2009-2020 Arm Limited
+; * Copyright (c) 2009-2021 Arm Limited
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
; * you may not use this file except in compliance with the License.
@@ -17,8 +17,6 @@
; * This file is derivative of CMSIS V5.00 gcc_arm.ld
; */
-{{utilities.donotedit_warning}}
-
/* Linker script to configure memory regions. */
/* This file will be run trough the pre-processor. */
@@ -73,17 +71,15 @@
LONG (LOADADDR(.TFM_DATA))
LONG (ADDR(.TFM_DATA))
LONG (SIZEOF(.TFM_DATA))
-{% for manifest in manifests %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- LONG (LOADADDR(.{{manifest.manifest.name}}_LINKER_DATA))
- LONG (ADDR(.{{manifest.manifest.name}}_LINKER_DATA))
- LONG (SIZEOF(.{{manifest.manifest.name}}_LINKER_DATA))
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-{% endfor %}
+
+ LONG (LOADADDR(.TFM_PSA_ROT_LINKER_DATA))
+ LONG (ADDR(.TFM_PSA_ROT_LINKER_DATA))
+ LONG (SIZEOF(.TFM_PSA_ROT_LINKER_DATA))
+
+ LONG (LOADADDR(.TFM_APP_ROT_LINKER_DATA))
+ LONG (ADDR(.TFM_APP_ROT_LINKER_DATA))
+ LONG (SIZEOF(.TFM_APP_ROT_LINKER_DATA))
+
#if defined (S_RAM_CODE_START)
LONG (LOADADDR(.TFM_RAM_CODE))
LONG (ADDR(.TFM_RAM_CODE))
@@ -106,16 +102,11 @@
LONG (ADDR(.TFM_SECURE_STACK))
LONG (SIZEOF(.TFM_SECURE_STACK))
#endif /* !defined(TFM_PSA_API) */
-{% for manifest in manifests %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- LONG (ADDR(.{{manifest.manifest.name}}_LINKER_BSS))
- LONG (SIZEOF(.{{manifest.manifest.name}}_LINKER_BSS))
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-{% endfor %}
+ LONG (ADDR(.TFM_PSA_ROT_LINKER_BSS))
+ LONG (SIZEOF(.TFM_PSA_ROT_LINKER_BSS))
+
+ LONG (ADDR(.TFM_APP_ROT_LINKER_BSS))
+ LONG (SIZEOF(.TFM_APP_ROT_LINKER_BSS))
#if defined(PSA_PROXY_SHARED_MEMORY_BASE)
LONG (PSA_PROXY_SHARED_MEMORY_BASE)
LONG (PSA_PROXY_SHARED_MEMORY_SIZE)
@@ -148,76 +139,38 @@
/**** PSA RoT RO part (CODE + RODATA) start here */
Image$$TFM_PSA_CODE_START$$Base = .;
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'PSA-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- .{{manifest.manifest.name}}_LINKER : ALIGN(32)
+ .TFM_PSA_ROT_LINKER : ALIGN(32)
{
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.text*)
- {{pattern}}:*(.rodata*)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.text*)
- {{pattern}}(.rodata*)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_FN)
+ *tfm_psa_rot_partition*:*(.text*)
+ *tfm_psa_rot_partition*:*(.rodata*)
+ *(TFM_*_PSA-ROT_ATTR_FN)
. = ALIGN(32);
} > FLASH
- Image$${{manifest.manifest.name}}_LINKER$$RO$$Base = ADDR(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$RO$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER) + SIZEOF(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$Base = ADDR(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER) + SIZEOF(.{{manifest.manifest.name}}_LINKER);
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
- {% endif %}
-{% endfor %}
+ Image$$TFM_PSA_ROT_LINKER$$RO$$Base = ADDR(.TFM_PSA_ROT_LINKER);
+ Image$$TFM_PSA_ROT_LINKER$$RO$$Limit = ADDR(.TFM_PSA_ROT_LINKER) + SIZEOF(.TFM_PSA_ROT_LINKER);
+ Image$$TFM_PSA_ROT_LINKER$$Base = ADDR(.TFM_PSA_ROT_LINKER);
+ Image$$TFM_PSA_ROT_LINKER$$Limit = ADDR(.TFM_PSA_ROT_LINKER) + SIZEOF(.TFM_PSA_ROT_LINKER);
+
/**** PSA RoT RO part (CODE + RODATA) end here */
Image$$TFM_PSA_CODE_END$$Base = .;
/**** APPLICATION RoT RO part (CODE + RODATA) start here */
Image$$TFM_APP_CODE_START$$Base = .;
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'APPLICATION-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- .{{manifest.manifest.name}}_LINKER : ALIGN(32)
+ .TFM_APP_ROT_LINKER : ALIGN(32)
{
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.text*)
- {{pattern}}:*(.rodata*)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.text*)
- {{pattern}}(.rodata*)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_FN)
+ *tfm_app_rot_partition*:*(.text*)
+ *tfm_app_rot_partition*:*(.rodata*)
+ *(TFM_*_APP-ROT_ATTR_FN)
. = ALIGN(32);
} > FLASH
- Image$${{manifest.manifest.name}}_LINKER$$RO$$Base = ADDR(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$RO$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER) + SIZEOF(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$Base = ADDR(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER) + SIZEOF(.{{manifest.manifest.name}}_LINKER);
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
- {% endif %}
-{% endfor %}
+ Image$$TFM_APP_ROT_LINKER$$RO$$Base = ADDR(.TFM_APP_ROT_LINKER);
+ Image$$TFM_APP_ROT_LINKER$$RO$$Limit = ADDR(.TFM_APP_ROT_LINKER) + SIZEOF(.TFM_APP_ROT_LINKER);
+ Image$$TFM_APP_ROT_LINKER$$Base = ADDR(.TFM_APP_ROT_LINKER);
+ Image$$TFM_APP_ROT_LINKER$$Limit = ADDR(.TFM_APP_ROT_LINKER) + SIZEOF(.TFM_APP_ROT_LINKER);
+
/**** APPLICATION RoT RO part (CODE + RODATA) end here */
Image$$TFM_APP_CODE_END$$Base = .;
@@ -370,57 +323,27 @@
/**** APPLICATION RoT DATA start here */
Image$$TFM_APP_RW_STACK_START$$Base = .;
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'APPLICATION-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- .{{manifest.manifest.name}}_LINKER_DATA : ALIGN(32)
+ .TFM_APP_ROT_LINKER_DATA : ALIGN(32)
{
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.data*)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.data*)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_RW)
+ *tfm_app_rot_partition*:*(.data*)
+ *(TFM_*_APP-ROT_ATTR_RW)
. = ALIGN(32);
} > RAM AT> FLASH
- Image$${{manifest.manifest.name}}_LINKER_DATA$$RW$$Base = ADDR(.{{manifest.manifest.name}}_LINKER_DATA);
- Image$${{manifest.manifest.name}}_LINKER_DATA$$RW$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER_DATA) + SIZEOF(.{{manifest.manifest.name}}_LINKER_DATA);
+ Image$$TFM_APP_ROT_LINKER_DATA$$RW$$Base = ADDR(.TFM_APP_ROT_LINKER_DATA);
+ Image$$TFM_APP_ROT_LINKER_DATA$$RW$$Limit = ADDR(.TFM_APP_ROT_LINKER_DATA) + SIZEOF(.TFM_APP_ROT_LINKER_DATA);
- .{{manifest.manifest.name}}_LINKER_BSS : ALIGN(32)
+ .TFM_APP_ROT_LINKER_BSS : ALIGN(32)
{
- start_of_{{manifest.manifest.name}}_LINKER = .;
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.bss*)
- {{pattern}}:*(COMMON)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.bss*)
- {{pattern}}(COMMON)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_ZI)
- . += (. - start_of_{{manifest.manifest.name}}_LINKER) ? 0 : 4;
+ start_of_TFM_APP_ROT_LINKER = .;
+ *tfm_app_rot_partition*:*(.bss*)
+ *tfm_app_rot_partition*:*(COMMON)
+ *(TFM_*_APP-ROT_ATTR_ZI)
+ . += (. - start_of_TFM_APP_ROT_LINKER) ? 0 : 4;
. = ALIGN(32);
} > RAM AT> RAM
- Image$${{manifest.manifest.name}}_LINKER_DATA$$ZI$$Base = ADDR(.{{manifest.manifest.name}}_LINKER_BSS);
- Image$${{manifest.manifest.name}}_LINKER_DATA$$ZI$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER_BSS) + SIZEOF(.{{manifest.manifest.name}}_LINKER_BSS);
+ Image$$TFM_APP_ROT_LINKER_DATA$$ZI$$Base = ADDR(.TFM_APP_ROT_LINKER_BSS);
+ Image$$TFM_APP_ROT_LINKER_DATA$$ZI$$Limit = ADDR(.TFM_APP_ROT_LINKER_BSS) + SIZEOF(.TFM_APP_ROT_LINKER_BSS);
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-
- {% endif %}
-{% endfor %}
/**** APPLICATION RoT DATA end here */
Image$$TFM_APP_RW_STACK_END$$Base = .;
@@ -507,59 +430,30 @@
#endif
/**** PSA RoT DATA start here */
+
Image$$TFM_PSA_RW_STACK_START$$Base = .;
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'PSA-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- .{{manifest.manifest.name}}_LINKER_DATA : ALIGN(32)
+ .TFM_PSA_ROT_LINKER_DATA : ALIGN(32)
{
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.data*)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.data*)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_RW)
+ *tfm_psa_rot_partition*:*(.data*)
+ *(TFM_*_PSA-ROT_ATTR_RW)
. = ALIGN(32);
} > RAM AT> FLASH
- Image$${{manifest.manifest.name}}_LINKER_DATA$$RW$$Base = ADDR(.{{manifest.manifest.name}}_LINKER_DATA);
- Image$${{manifest.manifest.name}}_LINKER_DATA$$RW$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER_DATA) + SIZEOF(.{{manifest.manifest.name}}_LINKER_DATA);
+ Image$$TFM_PSA_ROT_LINKER_DATA$$RW$$Base = ADDR(.TFM_PSA_ROT_LINKER_DATA);
+ Image$$TFM_PSA_ROT_LINKER_DATA$$RW$$Limit = ADDR(.TFM_PSA_ROT_LINKER_DATA) + SIZEOF(.TFM_PSA_ROT_LINKER_DATA);
- .{{manifest.manifest.name}}_LINKER_BSS : ALIGN(32)
+ .TFM_PSA_ROT_LINKER_BSS : ALIGN(32)
{
- start_of_{{manifest.manifest.name}}_LINKER = .;
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.bss*)
- {{pattern}}:*(COMMON)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.bss*)
- {{pattern}}(COMMON)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_ZI)
- . += (. - start_of_{{manifest.manifest.name}}_LINKER) ? 0 : 4;
+ start_of_TFM_PSA_ROT_LINKER = .;
+ *tfm_psa_rot_partition*:*(.bss*)
+ *tfm_psa_rot_partition*:*(COMMON)
+ *(TFM_*_PSA-ROT_ATTR_ZI)
+ . += (. - start_of_TFM_PSA_ROT_LINKER) ? 0 : 4;
. = ALIGN(32);
} > RAM AT> RAM
- Image$${{manifest.manifest.name}}_LINKER_DATA$$ZI$$Base = ADDR(.{{manifest.manifest.name}}_LINKER_BSS);
- Image$${{manifest.manifest.name}}_LINKER_DATA$$ZI$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER_BSS) + SIZEOF(.{{manifest.manifest.name}}_LINKER_BSS);
+ Image$$TFM_PSA_ROT_LINKER_DATA$$ZI$$Base = ADDR(.TFM_PSA_ROT_LINKER_BSS);
+ Image$$TFM_PSA_ROT_LINKER_DATA$$ZI$$Limit = ADDR(.TFM_PSA_ROT_LINKER_BSS) + SIZEOF(.TFM_PSA_ROT_LINKER_BSS);
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-
- {% endif %}
-{% endfor %}
/**** PSA RoT DATA end here */
Image$$TFM_PSA_RW_STACK_END$$Base = .;
diff --git a/platform/ext/common/gcc/tfm_isolation_l3.ld.template b/platform/ext/common/gcc/tfm_isolation_l3.ld.template
index 3cbaf66..e074333 100644
--- a/platform/ext/common/gcc/tfm_isolation_l3.ld.template
+++ b/platform/ext/common/gcc/tfm_isolation_l3.ld.template
@@ -1,5 +1,5 @@
;/*
-; * Copyright (c) 2009-2020 Arm Limited
+; * Copyright (c) 2009-2021 Arm Limited
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
; * you may not use this file except in compliance with the License.
@@ -121,7 +121,7 @@
{{pattern}}:*(.rodata*)
{% endfor %}
{% endif %}
- *({{manifest.manifest.name}}_ATTR_FN)
+ *({{manifest.manifest.name}}_PSA-ROT_ATTR_FN)
. = ALIGN(32);
} > FLASH
Image$${{manifest.manifest.name}}_RO$$Base = ADDR(.{{manifest.manifest.name}}_RO);
@@ -154,7 +154,7 @@
{{pattern}}:*(.rodata*)
{% endfor %}
{% endif %}
- *({{manifest.manifest.name}}_ATTR_FN)
+ *({{manifest.manifest.name}}_APP-ROT_ATTR_FN)
. = ALIGN(32);
} > FLASH
Image$${{manifest.manifest.name}}_CODE$$Base = ADDR(.{{manifest.manifest.name}}_RO);
@@ -293,7 +293,7 @@
{{pattern}}(.data*)
{% endfor %}
{% endif %}
- *({{manifest.manifest.name}}_ATTR_RW)
+ *({{manifest.manifest.name}}_PSA-ROT_ATTR_RW)
. = ALIGN(32);
} > RAM AT> FLASH
Image$$ER_{{manifest.manifest.name}}_RWZI$$RW$$Base = ADDR(.ER_{{manifest.manifest.name}}_RWZI);
@@ -314,7 +314,7 @@
{{pattern}}(COMMON)
{% endfor %}
{% endif %}
- *({{manifest.manifest.name}}_ATTR_ZI)
+ *({{manifest.manifest.name}}_PSA-ROT_ATTR_ZI)
. += (. - start_of_{{manifest.manifest.name}}_RWZI) ? 0 : 4;
. = ALIGN(32);
} > RAM AT> RAM
@@ -368,7 +368,7 @@
{{pattern}}(.data*)
{% endfor %}
{% endif %}
- *({{manifest.manifest.name}}_ATTR_RW)
+ *({{manifest.manifest.name}}_APP-ROT_ATTR_RW)
. = ALIGN(32);
} > RAM AT> FLASH
Image$$.ER_{{manifest.manifest.name}}_RWZI$$RW$$Base = ADDR(.ER_{{manifest.manifest.name}}_RWZI);
@@ -389,7 +389,7 @@
{{pattern}}(COMMON)
{% endfor %}
{% endif %}
- *({{manifest.manifest.name}}_ATTR_ZI)
+ *({{manifest.manifest.name}}_APP-ROT_ATTR_ZI)
. += (. - start_of_{{manifest.manifest.name}}_RWZI) ? 0 : 4;
. = ALIGN(32);
} > RAM AT> RAM
diff --git a/platform/ext/common/iar/tfm_common_s.icf.template b/platform/ext/common/iar/tfm_common_s.icf
similarity index 69%
rename from platform/ext/common/iar/tfm_common_s.icf.template
rename to platform/ext/common/iar/tfm_common_s.icf
index b23cec0..32bba2c 100644
--- a/platform/ext/common/iar/tfm_common_s.icf.template
+++ b/platform/ext/common/iar/tfm_common_s.icf
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -16,8 +16,6 @@
* This file is derivative of ../armclang/tfm_common_s.sct.template
*/
-{{utilities.donotedit_warning}}
-
#include "region_defs.h"
define block ER_TFM_CODE with fixed order, alignment = 8, maximum size = S_CODE_SIZE {
@@ -47,29 +45,10 @@
*/
define block TFM_PSA_CODE_START with alignment = 32, size = 0 { };
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'PSA-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
-define block {{manifest.manifest.name}}_LINKER with alignment = 32 {
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- ro object {{pattern}},
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- ro object {{pattern}},
- {% endfor %}
- {% endif %}
+ define block TFM_PSA_ROT_LINKER with alignment = 32 {
+ ro object *tfm_psa_rot_partition*,
};
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
- {% endif %}
-{% endfor %}
/*
* This empty, zero long execution region is here to mark the end address
* of PSA RoT code.
@@ -83,29 +62,10 @@
*/
define block TFM_APP_CODE_START with alignment = 32, size = 0 { };
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'APPLICATION-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
-define block {{manifest.manifest.name}}_LINKER with alignment = 32 {
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- ro object {{pattern}},
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- ro object {{pattern}},
- {% endfor %}
- {% endif %}
+ define block TFM_APP_ROT_LINKER with alignment = 32 {
+ ro object *tfm_app_rot_partition*,
};
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
- {% endif %}
-{% endfor %}
/*
* This empty, zero long execution region is here to mark the end address
* of APP RoT code.
@@ -139,30 +99,10 @@
define block TFM_APP_RW_STACK_START with alignment = 32, size = 0 { };
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'APPLICATION-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
-define block {{manifest.manifest.name}}_LINKER_DATA with alignment = 32 {
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- rw object {{pattern}},
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- rw object {{pattern}},
- {% endfor %}
- {% endif %}
+ define block TFM_APP_ROT_LINKER_DATA with alignment = 32 {
+ rw object *tfm_app_rot_partition*,
};
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-
- {% endif %}
-{% endfor %}
/*
* This empty, zero long execution region is here to mark the end address
@@ -209,30 +149,10 @@
*/
define block TFM_PSA_RW_STACK_START with alignment = 32, size = 0 { };
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'PSA-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
-define block {{manifest.manifest.name}}_LINKER_DATA with alignment = 32 {
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- rw object {{pattern}},
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- rw object {{pattern}},
- {% endfor %}
- {% endif %}
+ define block TFM_PSA_ROT_LINKER_DATA with alignment = 32 {
+ rw object *tfm_psa_rot_partition*,
};
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-
- {% endif %}
-{% endfor %}
/*
* This empty, zero long execution region is here to mark the end address
@@ -257,17 +177,7 @@
block TFM_UNPRIV_CODE,
block TFM_PSA_CODE_START,
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'PSA-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- block {{manifest.manifest.name}}_LINKER,
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
- {% endif %}
-{% endfor %}
+ block TFM_PSA_ROT_LINKER,
block TFM_PSA_CODE_END,
@@ -277,18 +187,9 @@
* of APP RoT code.
*/
block TFM_APP_CODE_START,
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'APPLICATION-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- block {{manifest.manifest.name}}_LINKER,
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
- {% endif %}
-{% endfor %}
+ block TFM_APP_ROT_LINKER,
+
/*
* This empty, zero long execution region is here to mark the end address
* of APP RoT code.
@@ -347,19 +248,8 @@
*/
block TFM_APP_RW_STACK_START,
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'APPLICATION-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- block {{manifest.manifest.name}}_LINKER_DATA,
+ block TFM_APP_ROT_LINKER_DATA,
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-
- {% endif %}
-{% endfor %}
/*
* This empty, zero long execution region is here to mark the end address
* of APP RoT RW and Stack.
@@ -395,19 +285,8 @@
*/
block TFM_PSA_RW_STACK_START,
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'PSA-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- block {{manifest.manifest.name}}_LINKER_DATA,
+ block TFM_PSA_ROT_LINKER_DATA,
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-
- {% endif %}
-{% endfor %}
/*
* This empty, zero long execution region is here to mark the end address
* of PSA RoT RW and Stack.
diff --git a/platform/ext/common/template/tfm_initial_attestation_key_material.c b/platform/ext/common/template/tfm_initial_attestation_key_material.c
index 212c3dd..b171e5a 100644
--- a/platform/ext/common/template/tfm_initial_attestation_key_material.c
+++ b/platform/ext/common/template/tfm_initial_attestation_key_material.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -30,7 +30,7 @@
* It is used in HMAC-SHA256.
* It MUST be present on the device.
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION", "PSA-ROT")
const uint8_t initial_attestation_hmac_sha256_key[] =
{
0xA9, 0xB4, 0x54, 0xB2, 0x6D, 0x6F, 0x90, 0xA4,
@@ -39,11 +39,11 @@
0x4B, 0x92, 0xA1, 0x93, 0x71, 0x34, 0x58, 0x5F
};
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION", "PSA-ROT")
const size_t initial_attestation_hmac_sha256_key_size =
sizeof(initial_attestation_hmac_sha256_key);
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION", "PSA-ROT")
const char *initial_attestation_kid = "kid@trustedfirmware.example";
#else /* SYMMETRIC_INITIAL_ATTESTATION */
/*
@@ -59,14 +59,14 @@
*/
/* Type of the EC curve which the key belongs to, in PSA curve ID form */
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION", "PSA-ROT")
const psa_ecc_family_t initial_attestation_curve_type = PSA_ECC_CURVE_SECP256R1;
/* Initial attestation private key in raw format, without any encoding.
* It belongs to the ECDSA P-256 curve.
* It MUST be present on the device.
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION", "PSA-ROT")
const uint8_t initial_attestation_private_key[] =
{
0xA9, 0xB4, 0x54, 0xB2, 0x6D, 0x6F, 0x90, 0xA4,
@@ -75,7 +75,7 @@
0x4B, 0x92, 0xA1, 0x93, 0x71, 0x34, 0x58, 0x5F
};
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_INITIAL_ATTESTATION", "PSA-ROT")
const uint32_t initial_attestation_private_key_size =
sizeof(initial_attestation_private_key);
#endif /* SYMMETRIC_INITIAL_ATTESTATION */
diff --git a/platform/ext/target/cypress/psoc64/Device/Source/device_definition.c b/platform/ext/target/cypress/psoc64/Device/Source/device_definition.c
index b4011c4..ee33379 100644
--- a/platform/ext/target/cypress/psoc64/Device/Source/device_definition.c
+++ b/platform/ext/target/cypress/psoc64/Device/Source/device_definition.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2018 ARM Limited
+ * Copyright (c) 2016-2021 ARM Limited
* Copyright (c) 2020, Cypress Semiconductor Corporation. All rights reserved.
*
* Licensed under the Apache License Version 2.0 (the "License");
@@ -63,7 +63,7 @@
/* TCPWM Timer driver structures */
#if defined(CY_TCPWM0_TIMER0_S)
cy_stc_tcpwm_counter_config_t tcpwm_config_timer0
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {
.period = TIMER0_MATCH, /* Upper limit (wrap around) */
.clockPrescaler = CY_TCPWM_COUNTER_PRESCALER_DIVBY_8, /* Clk_counter = Clk_input / 8 */
@@ -88,7 +88,7 @@
#if (CY_CPU_CORTEX_M0P)
cy_stc_sysint_t CY_TCPWM_NVIC_CFG_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {
.intrSrc = TFM_TIMER0_IRQ, /* NVIC #3 */
.cm0pSrc = tcpwm_0_interrupts_0_IRQn, /* IRQ 123 */
@@ -96,7 +96,7 @@
};
#endif
tfm_timer_irq_test_dev_t CY_TCPWM0_TIMER0_DEV_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {
.is_initialized = false,
.tcpwm_base = TCPWM0,
diff --git a/platform/ext/target/mps2/an519/retarget/platform_retarget_dev.c b/platform/ext/target/mps2/an519/retarget/platform_retarget_dev.c
index 1d69e63..f763479 100644
--- a/platform/ext/target/mps2/an519/retarget/platform_retarget_dev.c
+++ b/platform/ext/target/mps2/an519/retarget/platform_retarget_dev.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2020 Arm Limited
+ * Copyright (c) 2016-2021 Arm Limited
*
* Licensed under the Apache License Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -302,14 +302,14 @@
/* CMSDK Timer driver structures */
#ifdef CMSDK_TIMER0_S
static const struct cmsdk_timer_dev_cfg_t CMSDK_TIMER0_DEV_CFG_S
- TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {.base = CMSDK_TIMER0_BASE_S};
static struct cmsdk_timer_dev_data_t CMSDK_TIMER0_DEV_DATA_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {.is_initialized = 0};
struct cmsdk_timer_dev_t CMSDK_TIMER0_DEV_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {&(CMSDK_TIMER0_DEV_CFG_S), &(CMSDK_TIMER0_DEV_DATA_S)};
#endif
#ifdef CMSDK_TIMER0_NS
diff --git a/platform/ext/target/mps2/an521/retarget/platform_retarget_dev.c b/platform/ext/target/mps2/an521/retarget/platform_retarget_dev.c
index a281960..620b390 100644
--- a/platform/ext/target/mps2/an521/retarget/platform_retarget_dev.c
+++ b/platform/ext/target/mps2/an521/retarget/platform_retarget_dev.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2019 Arm Limited
+ * Copyright (c) 2016-2021 Arm Limited
*
* Licensed under the Apache License Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -302,14 +302,14 @@
/* CMSDK Timer driver structures */
#ifdef CMSDK_TIMER0_S
static const struct cmsdk_timer_dev_cfg_t CMSDK_TIMER0_DEV_CFG_S
- TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {.base = CMSDK_TIMER0_BASE_S};
static struct cmsdk_timer_dev_data_t CMSDK_TIMER0_DEV_DATA_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {.is_initialized = 0};
struct cmsdk_timer_dev_t CMSDK_TIMER0_DEV_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {&(CMSDK_TIMER0_DEV_CFG_S), &(CMSDK_TIMER0_DEV_DATA_S)};
#endif
#ifdef CMSDK_TIMER0_NS
diff --git a/platform/ext/target/mps2/sse-200_aws/retarget/platform_retarget_dev.c b/platform/ext/target/mps2/sse-200_aws/retarget/platform_retarget_dev.c
index 162f272..f280492 100644
--- a/platform/ext/target/mps2/sse-200_aws/retarget/platform_retarget_dev.c
+++ b/platform/ext/target/mps2/sse-200_aws/retarget/platform_retarget_dev.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2020 Arm Limited
+ * Copyright (c) 2016-2021 Arm Limited
*
* Licensed under the Apache License Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -210,14 +210,14 @@
/* CMSDK Timer driver structures */
#ifdef CMSDK_TIMER0_S
static const struct timer_cmsdk_dev_cfg_t CMSDK_TIMER0_DEV_CFG_S
- TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {.base = CMSDK_TIMER0_BASE_S};
static struct timer_cmsdk_dev_data_t CMSDK_TIMER0_DEV_DATA_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {.is_initialized = 0};
struct timer_cmsdk_dev_t CMSDK_TIMER0_DEV_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {&(CMSDK_TIMER0_DEV_CFG_S), &(CMSDK_TIMER0_DEV_DATA_S)};
#endif
#ifdef CMSDK_TIMER0_NS
diff --git a/platform/ext/target/mps3/an524/device/source/device_definition.c b/platform/ext/target/mps3/an524/device/source/device_definition.c
index ea5a38c..6e3834b 100644
--- a/platform/ext/target/mps3/an524/device/source/device_definition.c
+++ b/platform/ext/target/mps3/an524/device/source/device_definition.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
*
* Licensed under the Apache License Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -344,15 +344,15 @@
/* CMSDK Timer driver structures */
#ifdef CMSDK_TIMER0_S
static const struct timer_cmsdk_dev_cfg_t CMSDK_TIMER0_DEV_CFG_S
- TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1") = {
+ TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT") = {
.base = CMSDK_TIMER0_BASE_S
};
static struct timer_cmsdk_dev_data_t CMSDK_TIMER0_DEV_DATA_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1") = {
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT") = {
.is_initialized = 0
};
struct timer_cmsdk_dev_t CMSDK_TIMER0_DEV_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1") = {
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT") = {
&(CMSDK_TIMER0_DEV_CFG_S),
&(CMSDK_TIMER0_DEV_DATA_S)
};
diff --git a/platform/ext/target/mps3/an524/plat_test.c b/platform/ext/target/mps3/an524/plat_test.c
index 55f6a8b..cdfcfa2 100644
--- a/platform/ext/target/mps3/an524/plat_test.c
+++ b/platform/ext/target/mps3/an524/plat_test.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -22,7 +22,7 @@
* domain the Core Test service can access it.
*/
uint32_t led_status
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
= 0x02u;
/**
diff --git a/platform/ext/target/mps3/fvp_sse300/plat_test.c b/platform/ext/target/mps3/fvp_sse300/plat_test.c
index d3dd1c5..12bd437 100644
--- a/platform/ext/target/mps3/fvp_sse300/plat_test.c
+++ b/platform/ext/target/mps3/fvp_sse300/plat_test.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -23,7 +23,7 @@
* domain the Core Test service can access it.
*/
uint32_t led_status
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
= 0x02u;
/**
diff --git a/platform/ext/target/musca_a/Device/Source/device_definition.c b/platform/ext/target/musca_a/Device/Source/device_definition.c
index c0c39ad..240f78b 100644
--- a/platform/ext/target/musca_a/Device/Source/device_definition.c
+++ b/platform/ext/target/musca_a/Device/Source/device_definition.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
*
* Licensed under the Apache License Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -391,13 +391,13 @@
/* CMSDK Timers driver structures */
#ifdef CMSDK_TIMER0_S
static const struct timer_cmsdk_dev_cfg_t CMSDK_TIMER0_DEV_CFG_S
- TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {.base = MUSCA_CMSDK_TIMER0_S_BASE};
static struct timer_cmsdk_dev_data_t CMSDK_TIMER0_DEV_DATA_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {.is_initialized = 0};
struct timer_cmsdk_dev_t CMSDK_TIMER0_DEV_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {&(CMSDK_TIMER0_DEV_CFG_S), &(CMSDK_TIMER0_DEV_DATA_S)};
#endif
#ifdef CMSDK_TIMER0_NS
diff --git a/platform/ext/target/musca_a/plat_test.c b/platform/ext/target/musca_a/plat_test.c
index bf09254..cd6118a 100644
--- a/platform/ext/target/musca_a/plat_test.c
+++ b/platform/ext/target/musca_a/plat_test.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -22,7 +22,7 @@
* domain the Core Test service can access it.
*/
uint32_t led_status
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
= 0x02u;
/**
diff --git a/platform/ext/target/musca_b1/sse_200/Device/Source/device_definition.c b/platform/ext/target/musca_b1/sse_200/Device/Source/device_definition.c
index 7c9bda3..2b6e726 100644
--- a/platform/ext/target/musca_b1/sse_200/Device/Source/device_definition.c
+++ b/platform/ext/target/musca_b1/sse_200/Device/Source/device_definition.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
*
* Licensed under the Apache License Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -365,13 +365,13 @@
/** CMSDK Timers driver structures */
#ifdef CMSDK_TIMER0_S
static const struct timer_cmsdk_dev_cfg_t CMSDK_TIMER0_DEV_CFG_S
- TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {.base = MUSCA_B1_CMSDK_TIMER0_S_BASE};
static struct timer_cmsdk_dev_data_t CMSDK_TIMER0_DEV_DATA_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {.is_initialized = 0};
struct timer_cmsdk_dev_t CMSDK_TIMER0_DEV_S
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
= {&(CMSDK_TIMER0_DEV_CFG_S), &(CMSDK_TIMER0_DEV_DATA_S)};
#endif
#ifdef CMSDK_TIMER0_NS
diff --git a/platform/ext/target/musca_b1/sse_200/plat_test.c b/platform/ext/target/musca_b1/sse_200/plat_test.c
index 55f6a8b..cdfcfa2 100644
--- a/platform/ext/target/musca_b1/sse_200/plat_test.c
+++ b/platform/ext/target/musca_b1/sse_200/plat_test.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -22,7 +22,7 @@
* domain the Core Test service can access it.
*/
uint32_t led_status
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
= 0x02u;
/**
diff --git a/platform/ext/target/musca_s1/plat_test.c b/platform/ext/target/musca_s1/plat_test.c
index 55f6a8b..cdfcfa2 100644
--- a/platform/ext/target/musca_s1/plat_test.c
+++ b/platform/ext/target/musca_s1/plat_test.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -22,7 +22,7 @@
* domain the Core Test service can access it.
*/
uint32_t led_status
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
= 0x02u;
/**
diff --git a/platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld.template b/platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld
similarity index 64%
rename from platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld.template
rename to platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld
index 2cdcf8d..80319d8 100644
--- a/platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld.template
+++ b/platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld
@@ -1,5 +1,5 @@
;/*
-; * Copyright (c) 2009-2020 Arm Limited
+; * Copyright (c) 2009-2021 Arm Limited
; * Copyright (c) 2020 Nordic Semiconductor ASA
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
@@ -18,8 +18,6 @@
; * This file is derivative of CMSIS V5.00 gcc_arm.ld
; */
-{{utilities.donotedit_warning}}
-
/* Linker script to configure memory regions. */
/* This file will be run trough the pre-processor. */
@@ -93,17 +91,15 @@
LONG (LOADADDR(.TFM_DATA))
LONG (ADDR(.TFM_DATA))
LONG (SIZEOF(.TFM_DATA))
-{% for manifest in manifests %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- LONG (LOADADDR(.{{manifest.manifest.name}}_LINKER_DATA))
- LONG (ADDR(.{{manifest.manifest.name}}_LINKER_DATA))
- LONG (SIZEOF(.{{manifest.manifest.name}}_LINKER_DATA))
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-{% endfor %}
+
+ LONG (LOADADDR(.TFM_PSA_ROT_LINKER_DATA))
+ LONG (ADDR(.TFM_PSA_ROT_LINKER_DATA))
+ LONG (SIZEOF(.TFM_PSA_ROT_LINKER_DATA))
+
+ LONG (LOADADDR(.TFM_APP_ROT_LINKER_DATA))
+ LONG (ADDR(.TFM_APP_ROT_LINKER_DATA))
+ LONG (SIZEOF(.TFM_APP_ROT_LINKER_DATA))
+
#if defined (S_RAM_CODE_START)
LONG (LOADADDR(.TFM_RAM_CODE))
LONG (ADDR(.TFM_RAM_CODE))
@@ -126,16 +122,11 @@
LONG (ADDR(.TFM_SECURE_STACK))
LONG (SIZEOF(.TFM_SECURE_STACK))
#endif /* !defined(TFM_PSA_API) */
-{% for manifest in manifests %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- LONG (ADDR(.{{manifest.manifest.name}}_LINKER_BSS))
- LONG (SIZEOF(.{{manifest.manifest.name}}_LINKER_BSS))
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-{% endfor %}
+ LONG (ADDR(.TFM_PSA_ROT_LINKER_BSS))
+ LONG (SIZEOF(.TFM_PSA_ROT_LINKER_BSS))
+
+ LONG (ADDR(.TFM_APP_ROT_LINKER_BSS))
+ LONG (SIZEOF(.TFM_APP_ROT_LINKER_BSS))
__zero_table_end__ = .;
} > FLASH
@@ -164,76 +155,38 @@
/**** PSA RoT RO part (CODE + RODATA) start here */
Image$$TFM_PSA_CODE_START$$Base = .;
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'PSA-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- .{{manifest.manifest.name}}_LINKER : ALIGN(32)
+ .TFM_PSA_ROT_LINKER : ALIGN(32)
{
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.text*)
- {{pattern}}:*(.rodata*)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.text*)
- {{pattern}}(.rodata*)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_FN)
+ *tfm_psa_rot_partition*:*(.text*)
+ *tfm_psa_rot_partition*:*(.rodata*)
+ *(TFM_*_PSA-ROT_ATTR_FN)
. = ALIGN(32);
} > FLASH
- Image$${{manifest.manifest.name}}_LINKER$$RO$$Base = ADDR(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$RO$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER) + SIZEOF(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$Base = ADDR(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER) + SIZEOF(.{{manifest.manifest.name}}_LINKER);
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
- {% endif %}
-{% endfor %}
+ Image$$TFM_PSA_ROT_LINKER$$RO$$Base = ADDR(.TFM_PSA_ROT_LINKER);
+ Image$$TFM_PSA_ROT_LINKER$$RO$$Limit = ADDR(.TFM_PSA_ROT_LINKER) + SIZEOF(.TFM_PSA_ROT_LINKER);
+ Image$$TFM_PSA_ROT_LINKER$$Base = ADDR(.TFM_PSA_ROT_LINKER);
+ Image$$TFM_PSA_ROT_LINKER$$Limit = ADDR(.TFM_PSA_ROT_LINKER) + SIZEOF(.TFM_PSA_ROT_LINKER);
+
/**** PSA RoT RO part (CODE + RODATA) end here */
Image$$TFM_PSA_CODE_END$$Base = .;
/**** APPLICATION RoT RO part (CODE + RODATA) start here */
Image$$TFM_APP_CODE_START$$Base = .;
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'APPLICATION-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- .{{manifest.manifest.name}}_LINKER : ALIGN(32)
+ .TFM_APP_ROT_LINKER : ALIGN(32)
{
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.text*)
- {{pattern}}:*(.rodata*)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.text*)
- {{pattern}}(.rodata*)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_FN)
+ *tfm_app_rot_partition*:*(.text*)
+ *tfm_app_rot_partition*:*(.rodata*)
+ *(TFM_*_APP-ROT_ATTR_FN)
. = ALIGN(32);
} > FLASH
- Image$${{manifest.manifest.name}}_LINKER$$RO$$Base = ADDR(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$RO$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER) + SIZEOF(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$Base = ADDR(.{{manifest.manifest.name}}_LINKER);
- Image$${{manifest.manifest.name}}_LINKER$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER) + SIZEOF(.{{manifest.manifest.name}}_LINKER);
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
- {% endif %}
-{% endfor %}
+ Image$$TFM_APP_ROT_LINKER$$RO$$Base = ADDR(.TFM_APP_ROT_LINKER);
+ Image$$TFM_APP_ROT_LINKER$$RO$$Limit = ADDR(.TFM_APP_ROT_LINKER) + SIZEOF(.TFM_APP_ROT_LINKER);
+ Image$$TFM_APP_ROT_LINKER$$Base = ADDR(.TFM_APP_ROT_LINKER);
+ Image$$TFM_APP_ROT_LINKER$$Limit = ADDR(.TFM_APP_ROT_LINKER) + SIZEOF(.TFM_APP_ROT_LINKER);
+
/**** APPLICATION RoT RO part (CODE + RODATA) end here */
Image$$TFM_APP_CODE_END$$Base = .;
@@ -389,57 +342,27 @@
/**** APPLICATION RoT DATA start here */
Image$$TFM_APP_RW_STACK_START$$Base = .;
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'APPLICATION-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- .{{manifest.manifest.name}}_LINKER_DATA : ALIGN(32)
+ .TFM_APP_ROT_LINKER_DATA : ALIGN(32)
{
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.data*)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.data*)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_RW)
+ *tfm_app_rot_partition*:*(.data*)
+ *(TFM_*_APP-ROT_ATTR_RW)
. = ALIGN(32);
} > RAM AT> FLASH
- Image$${{manifest.manifest.name}}_LINKER_DATA$$RW$$Base = ADDR(.{{manifest.manifest.name}}_LINKER_DATA);
- Image$${{manifest.manifest.name}}_LINKER_DATA$$RW$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER_DATA) + SIZEOF(.{{manifest.manifest.name}}_LINKER_DATA);
+ Image$$TFM_APP_ROT_LINKER_DATA$$RW$$Base = ADDR(.TFM_APP_ROT_LINKER_DATA);
+ Image$$TFM_APP_ROT_LINKER_DATA$$RW$$Limit = ADDR(.TFM_APP_ROT_LINKER_DATA) + SIZEOF(.TFM_APP_ROT_LINKER_DATA);
- .{{manifest.manifest.name}}_LINKER_BSS : ALIGN(32)
+ .TFM_APP_ROT_LINKER_BSS : ALIGN(32)
{
- start_of_{{manifest.manifest.name}}_LINKER = .;
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.bss*)
- {{pattern}}:*(COMMON)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.bss*)
- {{pattern}}(COMMON)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_ZI)
- . += (. - start_of_{{manifest.manifest.name}}_LINKER) ? 0 : 4;
+ start_of_TFM_APP_ROT_LINKER = .;
+ *tfm_app_rot_partition*:*(.bss*)
+ *tfm_app_rot_partition*:*(COMMON)
+ *(TFM_*_APP-ROT_ATTR_ZI)
+ . += (. - start_of_TFM_APP_ROT_LINKER) ? 0 : 4;
. = ALIGN(32);
} > RAM AT> RAM
- Image$${{manifest.manifest.name}}_LINKER_DATA$$ZI$$Base = ADDR(.{{manifest.manifest.name}}_LINKER_BSS);
- Image$${{manifest.manifest.name}}_LINKER_DATA$$ZI$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER_BSS) + SIZEOF(.{{manifest.manifest.name}}_LINKER_BSS);
+ Image$$TFM_APP_ROT_LINKER_DATA$$ZI$$Base = ADDR(.TFM_APP_ROT_LINKER_BSS);
+ Image$$TFM_APP_ROT_LINKER_DATA$$ZI$$Limit = ADDR(.TFM_APP_ROT_LINKER_BSS) + SIZEOF(.TFM_APP_ROT_LINKER_BSS);
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-
- {% endif %}
-{% endfor %}
/**** APPLICATION RoT DATA end here */
Image$$TFM_APP_RW_STACK_END$$Base = .;
@@ -528,57 +451,27 @@
/**** PSA RoT DATA start here */
Image$$TFM_PSA_RW_STACK_START$$Base = .;
-{% for manifest in manifests %}
- {% if manifest.manifest.type == 'PSA-ROT' %}
- {% if manifest.attr.conditional %}
-#ifdef {{manifest.attr.conditional}}
- {% endif %}
- .{{manifest.manifest.name}}_LINKER_DATA : ALIGN(32)
+ .TFM_PSA_ROT_LINKER_DATA : ALIGN(32)
{
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.data*)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.data*)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_RW)
+ *tfm_psa_rot_partition*:*(.data*)
+ *(TFM_*_PSA-ROT_ATTR_RW)
. = ALIGN(32);
} > RAM AT> FLASH
- Image$${{manifest.manifest.name}}_LINKER_DATA$$RW$$Base = ADDR(.{{manifest.manifest.name}}_LINKER_DATA);
- Image$${{manifest.manifest.name}}_LINKER_DATA$$RW$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER_DATA) + SIZEOF(.{{manifest.manifest.name}}_LINKER_DATA);
+ Image$$TFM_PSA_ROT_LINKER_DATA$$RW$$Base = ADDR(.TFM_PSA_ROT_LINKER_DATA);
+ Image$$TFM_PSA_ROT_LINKER_DATA$$RW$$Limit = ADDR(.TFM_PSA_ROT_LINKER_DATA) + SIZEOF(.TFM_PSA_ROT_LINKER_DATA);
- .{{manifest.manifest.name}}_LINKER_BSS : ALIGN(32)
+ .TFM_PSA_ROT_LINKER_BSS : ALIGN(32)
{
- start_of_{{manifest.manifest.name}}_LINKER = .;
- {% if manifest.attr.linker_pattern.library_list %}
- {% for pattern in manifest.attr.linker_pattern.library_list %}
- {{pattern}}:*(.bss*)
- {{pattern}}:*(COMMON)
- {% endfor %}
- {% endif %}
- {% if manifest.attr.linker_pattern.object_list %}
- {% for pattern in manifest.attr.linker_pattern.object_list %}
- {{pattern}}(.bss*)
- {{pattern}}(COMMON)
- {% endfor %}
- {% endif %}
- *({{manifest.manifest.name}}_ATTR_ZI)
- . += (. - start_of_{{manifest.manifest.name}}_LINKER) ? 0 : 4;
+ start_of_TFM_PSA_ROT_LINKER = .;
+ *tfm_psa_rot_partition*:*(.bss*)
+ *tfm_psa_rot_partition*:*(COMMON)
+ *(TFM_*_PSA-ROT_ATTR_ZI)
+ . += (. - start_of_TFM_PSA_ROT_LINKER) ? 0 : 4;
. = ALIGN(32);
} > RAM AT> RAM
- Image$${{manifest.manifest.name}}_LINKER_DATA$$ZI$$Base = ADDR(.{{manifest.manifest.name}}_LINKER_BSS);
- Image$${{manifest.manifest.name}}_LINKER_DATA$$ZI$$Limit = ADDR(.{{manifest.manifest.name}}_LINKER_BSS) + SIZEOF(.{{manifest.manifest.name}}_LINKER_BSS);
+ Image$$TFM_PSA_ROT_LINKER_DATA$$ZI$$Base = ADDR(.TFM_PSA_ROT_LINKER_BSS);
+ Image$$TFM_PSA_ROT_LINKER_DATA$$ZI$$Limit = ADDR(.TFM_PSA_ROT_LINKER_BSS) + SIZEOF(.TFM_PSA_ROT_LINKER_BSS);
- {% if manifest.attr.conditional %}
-#endif /* {{manifest.attr.conditional}} */
- {% endif %}
-
- {% endif %}
-{% endfor %}
/**** PSA RoT DATA end here */
Image$$TFM_PSA_RW_STACK_END$$Base = .;
diff --git a/platform/ext/target/nordic_nrf/common/core/generated_file_list.yaml b/platform/ext/target/nordic_nrf/common/core/generated_file_list.yaml
deleted file mode 100644
index 6b47a9a..0000000
--- a/platform/ext/target/nordic_nrf/common/core/generated_file_list.yaml
+++ /dev/null
@@ -1,26 +0,0 @@
-#-------------------------------------------------------------------------------
-# Copyright (c) 2018-2020, Arm Limited. All rights reserved.
-# Copyright (c) 2020, Nordic Semiconductor ASA
-#
-# SPDX-License-Identifier: BSD-3-Clause
-#
-#-------------------------------------------------------------------------------
-
-# The path of "template" can be relative path to TF-M root or absolute path
-# The path of "output" must be relative path to the root for generated files
-# Both can contain environment variables
-
-{
- "name": "nordic_nrf generated file list",
- "type": "generated_file_list",
- "version_major": 0,
- "version_minor": 1,
- "file_list": [
- {
- "name": "nordic_nrf secure ld file",
- "short_name": "nordic_nrf_s.ld",
- "template": "platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld.template",
- "output": "platform/ext/common/core/gcc/nordic_nrf_s.ld"
- }
- ]
-}
diff --git a/platform/ext/target/nordic_nrf/common/nrf5340/config.cmake b/platform/ext/target/nordic_nrf/common/nrf5340/config.cmake
index de72e7d..ceb1ecf 100644
--- a/platform/ext/target/nordic_nrf/common/nrf5340/config.cmake
+++ b/platform/ext/target/nordic_nrf/common/nrf5340/config.cmake
@@ -1,6 +1,6 @@
#-------------------------------------------------------------------------------
# Copyright (c) 2020, Nordic Semiconductor ASA.
-# Copyright (c) 2020, Arm Limited. All rights reserved.
+# Copyright (c) 2020-2021, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -8,5 +8,4 @@
set(SECURE_UART1 ON CACHE BOOL "Enable secure UART1")
set(PSA_API_TEST_TARGET "nrf" CACHE STRING "PSA API test target")
-set(TFM_EXTRA_GENERATED_FILE_LIST_PATH ${CMAKE_CURRENT_SOURCE_DIR}/${NRF_PATH}/common/core/generated_file_list.yaml CACHE PATH "Path to extra generated file list. Appended to stardard TFM generated file list.")
set(ITS_NUM_ASSETS "5" CACHE STRING "The maximum number of assets to be stored in the Internal Trusted Storage area")
diff --git a/platform/ext/target/nordic_nrf/common/nrf9160/config.cmake b/platform/ext/target/nordic_nrf/common/nrf9160/config.cmake
index de72e7d..ceb1ecf 100644
--- a/platform/ext/target/nordic_nrf/common/nrf9160/config.cmake
+++ b/platform/ext/target/nordic_nrf/common/nrf9160/config.cmake
@@ -1,6 +1,6 @@
#-------------------------------------------------------------------------------
# Copyright (c) 2020, Nordic Semiconductor ASA.
-# Copyright (c) 2020, Arm Limited. All rights reserved.
+# Copyright (c) 2020-2021, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -8,5 +8,4 @@
set(SECURE_UART1 ON CACHE BOOL "Enable secure UART1")
set(PSA_API_TEST_TARGET "nrf" CACHE STRING "PSA API test target")
-set(TFM_EXTRA_GENERATED_FILE_LIST_PATH ${CMAKE_CURRENT_SOURCE_DIR}/${NRF_PATH}/common/core/generated_file_list.yaml CACHE PATH "Path to extra generated file list. Appended to stardard TFM generated file list.")
set(ITS_NUM_ASSETS "5" CACHE STRING "The maximum number of assets to be stored in the Internal Trusted Storage area")
diff --git a/platform/ext/target/nuvoton/m2351/plat_test.c b/platform/ext/target/nuvoton/m2351/plat_test.c
index d36572a..22f43b8 100644
--- a/platform/ext/target/nuvoton/m2351/plat_test.c
+++ b/platform/ext/target/nuvoton/m2351/plat_test.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
* Copyright (c) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -23,7 +23,7 @@
* domain the Core Test service can access it.
*/
uint32_t led_status
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
= 0x02u;
/**
diff --git a/platform/ext/target/nxp/lpcxpresso55s69/plat_test.c b/platform/ext/target/nxp/lpcxpresso55s69/plat_test.c
index 24c1cb2..285122f 100755
--- a/platform/ext/target/nxp/lpcxpresso55s69/plat_test.c
+++ b/platform/ext/target/nxp/lpcxpresso55s69/plat_test.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -24,7 +24,7 @@
* domain the Core Test service can access it.
*/
uint32_t led_status
- TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+ TFM_LINK_SET_RW_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
= 0x02u;
/**
diff --git a/platform/include/tfm_plat_defs.h b/platform/include/tfm_plat_defs.h
index 487bba5..808a6d3 100644
--- a/platform/include/tfm_plat_defs.h
+++ b/platform/include/tfm_plat_defs.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -36,9 +36,12 @@
*
* \param[in] TFM_PARTITION_NAME TF-M partition name assigned in the manifest
* file "name" field.
+ * \param[in] TFM_PARTITION_TYPE TF-M partition type assigned in the manifest
+ * file "type" field.
*/
-#define TFM_LINK_SET_RO_IN_PARTITION_SECTION(TFM_PARTITION_NAME) \
- __attribute__((section(TFM_PARTITION_NAME"_ATTR_FN")))
+#define TFM_LINK_SET_RO_IN_PARTITION_SECTION(TFM_PARTITION_NAME, \
+ TFM_PARTITION_TYPE) \
+ __attribute__((section(TFM_PARTITION_NAME "_" TFM_PARTITION_TYPE "_ATTR_FN")))
/*!
* \def TFM_LINK_SET_RW_IN_PARTITION_SECTION(TFM_PARTITION_NAME)
@@ -48,9 +51,12 @@
*
* \param[in] TFM_PARTITION_NAME TF-M partition name assigned in the manifest
* file "name" field.
+ * \param[in] TFM_PARTITION_TYPE TF-M partition type assigned in the manifest
+ * file "type" field.
*/
-#define TFM_LINK_SET_RW_IN_PARTITION_SECTION(TFM_PARTITION_NAME) \
- __attribute__((section(TFM_PARTITION_NAME"_ATTR_RW")))
+#define TFM_LINK_SET_RW_IN_PARTITION_SECTION(TFM_PARTITION_NAME, \
+ TFM_PARTITION_TYPE) \
+ __attribute__((section(TFM_PARTITION_NAME "_" TFM_PARTITION_TYPE "_ATTR_RW")))
/*!
* \def TFM_LINK_SET_ZI_IN_PARTITION_SECTION(TFM_PARTITION_NAME)
@@ -60,12 +66,15 @@
*
* \param[in] TFM_PARTITION_NAME TF-M partition name assigned in the manifest
* file "name" field.
+ * \param[in] TFM_PARTITION_TYPE TF-M partition type assigned in the manifest
+ * file "type" field.
*/
-#define TFM_LINK_SET_ZI_IN_PARTITION_SECTION(TFM_PARTITION_NAME) \
- __attribute__((section(TFM_PARTITION_NAME"_ATTR_ZI")))
+#define TFM_LINK_SET_ZI_IN_PARTITION_SECTION(TFM_PARTITION_NAME, \
+ TFM_PARTITION_TYPE) \
+ __attribute__((section(TFM_PARTITION_NAME "_" TFM_PARTITION_TYPE "_ATTR_ZI")))
#else
-#define TFM_LINK_SET_RO_IN_PARTITION_SECTION(TFM_PARTITION_NAME)
-#define TFM_LINK_SET_RW_IN_PARTITION_SECTION(TFM_PARTITION_NAME)
-#define TFM_LINK_SET_ZI_IN_PARTITION_SECTION(TFM_PARTITION_NAME)
+#define TFM_LINK_SET_RO_IN_PARTITION_SECTION(TFM_PARTITION_NAME, TFM_PARTITION_TYPE)
+#define TFM_LINK_SET_RW_IN_PARTITION_SECTION(TFM_PARTITION_NAME, TFM_PARTITION_TYPE)
+#define TFM_LINK_SET_ZI_IN_PARTITION_SECTION(TFM_PARTITION_NAME, TFM_PARTITION_TYPE)
#endif
#endif /* __TFM_PLAT_DEFS_H__ */
diff --git a/platform/include/tfm_plat_test.h b/platform/include/tfm_plat_test.h
index 513134d..58bc6e0 100644
--- a/platform/include/tfm_plat_test.h
+++ b/platform/include/tfm_plat_test.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -13,13 +13,13 @@
/**
* \brief Busy wait until the user presses a specific button
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
void tfm_plat_test_wait_user_button_pressed(void);
/**
* \brief Busy wait until the user releases a specific button
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
void tfm_plat_test_wait_user_button_released(void);
/**
@@ -27,7 +27,7 @@
*
* \return Returns the current status of LEDs
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
uint32_t tfm_plat_test_get_led_status(void);
/**
@@ -35,7 +35,7 @@
*
* \param[in] status The status to be set
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
void tfm_plat_test_set_led_status(uint32_t status);
/**
@@ -43,7 +43,7 @@
*
* \return Returns the mask of the LEDs used for testing
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_CORE_TEST", "PSA-ROT")
uint32_t tfm_plat_test_get_userled_mask(void);
/**
@@ -54,13 +54,13 @@
* the timer should be long enough so that the test service can go to the state
* where it starts waiting for the interrupt.
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
void tfm_plat_test_secure_timer_start(void);
/**
* \brief Stops the Secure timer and clears the timer interrupt.
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_IRQ_TEST_1", "APP-ROT")
void tfm_plat_test_secure_timer_stop(void);
/**
diff --git a/platform/include/tfm_platform_system.h b/platform/include/tfm_platform_system.h
index c297d3b..40bd130 100644
--- a/platform/include/tfm_platform_system.h
+++ b/platform/include/tfm_platform_system.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -25,7 +25,7 @@
*
* \details Requests a system reset to reset the MCU.
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_PLATFORM")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_PLATFORM", "PSA-ROT")
void tfm_platform_hal_system_reset(void);
/*!
@@ -38,7 +38,7 @@
*
* \return Returns values as specified by the \ref tfm_platform_err_t
*/
-TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_PLATFORM")
+TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_PLATFORM", "PSA-ROT")
enum tfm_platform_err_t tfm_platform_hal_ioctl(tfm_platform_ioctl_req_t request,
psa_invec *in_vec,
psa_outvec *out_vec);
diff --git a/tools/tfm_generated_file_list.yaml b/tools/tfm_generated_file_list.yaml
index 19a5190..dc89493 100644
--- a/tools/tfm_generated_file_list.yaml
+++ b/tools/tfm_generated_file_list.yaml
@@ -1,5 +1,5 @@
#-------------------------------------------------------------------------------
-# Copyright (c) 2018-2020, Arm Limited. All rights reserved.
+# Copyright (c) 2018-2021, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -34,24 +34,6 @@
"output": "secure_fw/partitions/tfm_service_list.inc"
},
{
- "name": "Common secure ld file",
- "short_name": "tfm_common_s.ld",
- "template": "platform/ext/common/gcc/tfm_common_s.ld.template",
- "output": "platform/ext/common/gcc/tfm_common_s.ld"
- },
- {
- "name": "Common secure sct file",
- "short_name": "tfm_common_s.sct",
- "template": "platform/ext/common/armclang/tfm_common_s.sct.template",
- "output": "platform/ext/common/armclang/tfm_common_s.sct"
- },
- {
- "name": "Common secure icf file",
- "short_name": "tfm_common_s.icf",
- "template": "platform/ext/common/iar/tfm_common_s.icf.template",
- "output": "platform/ext/common/iar/tfm_common_s.icf"
- },
- {
"name": "Secure Veneers C file",
"short_name": "tfm_veneers_c",
"template": "secure_fw/spm/cmsis_func/tfm_veneers.c.template",