SPM: Do not schedule if NSPE was interrupted by SPE
Scheduling should not happen if NSPE was interrupted by SPE, otherwise
the NSPE and SPE would be out of sync on thread context.
Note: Multi-core case does not have this issue.
Change-Id: I58e376e175604c57cfd7d240de8030664ce6b4a7
Signed-off-by: Kevin Peng <kevin.peng@arm.com>
diff --git a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_base.c b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_base.c
index 61a8cd7..72d1685 100644
--- a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_base.c
+++ b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_base.c
@@ -53,6 +53,13 @@
__attribute__((naked)) void PendSV_Handler(void)
{
__ASM volatile(
+#ifndef __ICCARM__
+ ".syntax unified \n"
+#endif
+ "movs r0, #0x40 \n"
+ "mov r1, lr \n"
+ "tst r0, r1 \n" /* Was NS interrupted by S? */
+ "beq exc_return \n" /* Yes, do not schedule */
"mrs r0, psp \n"
"mrs r1, psplim \n"
"push {r0, r1, r2, lr} \n"
@@ -74,6 +81,7 @@
"mov lr, r3 \n"
"msr psp, r0 \n"
"msr psplim, r1 \n"
+ "exc_return: \n"
"bx lr \n"
);
}
diff --git a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
index 57fd9a2..7ee168b 100644
--- a/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
+++ b/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c
@@ -56,6 +56,9 @@
__attribute__((naked)) void PendSV_Handler(void)
{
__ASM volatile(
+ "tst lr, #0x40 \n" /* Was NS interrupted by S? */
+ "it eq \n"
+ "bxeq lr \n" /* Yes, do not schedule */
"mrs r0, psp \n"
"mrs r1, psplim \n"
"push {r0, r1, r2, lr} \n"